Commit message (Expand) | Author | Age | |
---|---|---|---|
* | MIPS: MT: Remove SMTC support | Ralf Baechle | 2014-05-23 |
* | MIPS: Fix gigaton of warning building with microMIPS. | Ralf Baechle | 2014-03-31 |
* | MIPS: asm: r4kcache: Add EVA cache flushing functions | Leonid Yegoshin | 2014-03-26 |
* | MIPS: asm: r4kcache: Add protected cache operation for EVA | Leonid Yegoshin | 2014-03-26 |
* | MIPS: asm: r4kcache: Build flushing code for instruction cache | Leonid Yegoshin | 2014-03-26 |
* | MIPS: fix blast_icache32 on loongson2 | Aaro Koskinen | 2014-01-15 |
* | MIPS: fix case mismatch in local_r4k_flush_icache_range() | Huacai Chen | 2014-01-15 |
* | MIPS: Loongson: Get rid of Loongson 2 #ifdefery all over arch/mips. | Ralf Baechle | 2013-10-29 |
* | MIPS: Whitespace cleanup. | Ralf Baechle | 2013-02-01 |
* | update David Miller's old email address | Justin P. Mattock | 2011-04-06 |
* | MIPS: Support 64-byte D-cache line size | Kevin Cernekee | 2009-06-17 |
* | MIPS: Move headfiles to new location below arch/mips/include | Ralf Baechle | 2008-10-11 |