Commit message (Expand) | Author | Age | |
---|---|---|---|
* | MIPS: Update comment for cpu_has_clo_clz | Ralf Baechle | 2010-08-05 |
* | MIPS: Implement Read Inhibit/eXecute Inhibit | David Daney | 2010-02-27 |
* | MIPS: 64-bit: Detect virtual memory size | Guenter Roeck | 2010-02-02 |
* | MIPS: Allow kernel use of LL/SC to be separate from the presence of LL/SC. | David Daney | 2009-09-17 |
* | MIPS: Allow CPU specific overriding of CP0 hwrena impl bits. | David Daney | 2009-06-17 |
* | MIPS: Allow R2 CPUs to turn off generation of 'ehb' instructions. | David Daney | 2009-06-17 |
* | MIPS: Enable CLO / CLZ instructions via separate CPU property | Ralf Baechle | 2009-05-14 |
* | MIPS: Hook Cavium OCTEON cache init into cache.c | David Daney | 2009-01-11 |
* | MIPS: New feature test macro cpu_has_mips_r | Ralf Baechle | 2008-10-30 |
* | MIPS: Move headfiles to new location below arch/mips/include | Ralf Baechle | 2008-10-11 |