| Commit message (Collapse) | Author | Age |
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Specify the external clock label in each SDHCI node.
Signed-off-by: Tim Kryger <tim.kryger@linaro.org>
Reviewed-by: Markus Mayer <markus.mayer@linaro.org>
Reviewed-by: Matt Porter <matt.porter@linaro.org>
Signed-off-by: Christian Daudt <bcm@fixthebug.org>
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The frequency property in "snps,dw-apb-uart" entries are no longer
required if the rate of the external clock can be determined using the
clk api (see e302cd9 serial: 8250_dw: add support for clk api).
This patch replaces the frequency property in the UART nodes of
bcm11351.dtsi with references to the relevant clocks following the
common clock binding.
Signed-off-by: Tim Kryger <tim.kryger@linaro.org>
Reviewed-by: Markus Mayer <markus.mayer@linaro.org>
Reviewed-by: Matt Porter <matt.porter@linaro.org>
Signed-off-by: Christian Daudt <bcm@fixthebug.org>
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Add the DTS nodes for all the i2c busses in the SoC.
Signed-off-by: Tim Kryger <tim.kryger@linaro.org>
Reviewed-by: Christian Daudt <csd@broadcom.com>
Reviewed-by: Matt Porter <matt.porter@linaro.org>
Reviewed-by: Markus Mayer <markus.mayer@linaro.org>
Signed-off-by: Christian Daudt <bcm@fixthebug.org>
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Declare clocks that are enabled and configured by bootloaders as fixed
rate clocks in the DTS such that device drivers may use standard clock
function calls.
Signed-off-by: Tim Kryger <tim.kryger@linaro.org>
Reviewed-by: Markus Mayer <markus.mayer@linaro.org>
Reviewed-by: Matt Porter <matt.porter@linaro.org>
Signed-off-by: Christian Daudt <bcm@fixthebug.org>
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Enable all available i2c busses.
Signed-off-by: Tim Kryger <tim.kryger@linaro.org>
Reviewed-by: Christian Daudt <csd@broadcom.com>
Reviewed-by: Matt Porter <matt.porter@linaro.org>
Reviewed-by: Markus Mayer <markus.mayer@linaro.org>
Signed-off-by: Christian Daudt <bcm@fixthebug.org>
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Pull watchdog updates from Wim Van Sebroeck:
- new driver for bcm281xx watchdog device
- new driver for gpio based watchdog devices
- remove DEFINE_PCI_DEVICE_TABLE macro for watchdog device drivers
- conversion of davinci_wdt and mpc8xxx_wdt to watchdog core
- improvements on davinci_wdt, at91/dt, at91sam9_wdt and s3c2410_wdt
- Auto-detect IO address and expand supported chips on w836* super-I/O
chipsets
- core: Make dt "timeout-sec" property work on drivers w/out min/max
- fix Kconfig dependencies
- sirf: Remove redundant of_match_ptr helper
- mach-moxart: add restart handler
- hpwdt patch to display better panic information
- imx2_wdt: disable watchdog timer during low power mode
* git://www.linux-watchdog.org/linux-watchdog: (31 commits)
watchdog: w83627hf_wdt: Reset watchdog trigger during initialization
watchdog: w83627hf: Add support for W83697HF and W83697UG
watchdog: w83627hf: Auto-detect IO address and supported chips
watchdog: at91sam9_wdt: increase security margin on watchdog counter reset
watchdog: at91sam9_wdt: avoid spurious watchdog reset during init
watchdog: at91sam9_wdt: fix secs_to_ticks
ARM: at91/dt: add watchdog properties to kizbox board
ARM: at91/dt: add sam9 watchdog default options to SoCs
watchdog: at91sam9_wdt: update device tree doc
watchdog: at91sam9_wdt: better watchdog support
watchdog: sp805_wdt depends also on ARM64
watchdog: mach-moxart: add restart handler
watchdog: mpc8xxx_wdt convert to watchdog core
watchdog: sirf: Remove redundant of_match_ptr helper
watchdog: hpwdt patch to display informative string
watchdog: dw_wdt: remove build dependencies
watchdog: imx2_wdt: disable watchdog timer during low power mode
watchdog: s3c2410_wdt: Report when the watchdog reset the system
watchdog: s3c2410_wdt: use syscon regmap interface to configure pmu register
watchdog: s3c2410_wdt: Handle rounding a little better for timeout
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Add watchdog specific config for kizbox board.
Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
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Set default watchdog options in every SoC compatible with the sam9 watchdog.
Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
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This change introduces debugfs support for the BCM281xx watchdog driver.
Signed-off-by: Markus Mayer <markus.mayer@linaro.org>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
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This commit adds support for the watchdog timer used on the BCM281xx
family of SoCs.
Signed-off-by: Markus Mayer <markus.mayer@linaro.org>
Reviewed-by: Matt Porter <matt.porter@linaro.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
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Pull more ARM updates from Russell King:
"Some further changes for this merge window:
- fix bug building with gcc 4.6.4 and EABI.
- fix pgtbl macro with some LPAE configurations
- fix initrd override - FDT was overriding the command line, and it
should be the other way around.
- fix byteswap of instructions in undefined instruction handler
- add basic support for SolidRun Hummingboard and Cubox-i boards"
* 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
ARM: fix building with gcc 4.6.4
ARM: 7941/2: Fix incorrect FDT initrd parameter override
ARM: 7947/1: Make pgtbl macro more robust
ARM: 7946/1: asm: __und_usr_thumb need byteswap instructions in BE case
ARM: 7930/1: Introduce atomic MMIO modify
ARM: imx: initial SolidRun Cubox-i support
ARM: imx: initial SolidRun HummingBoard support
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Add support for the SolidRun Cubox-i devices. This commit adds similar
basic support as the HummingBoard. Further devices will be supported
in future patches.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Add support for the SolidRun HummingBoard. This commit adds support for
the following interfaces on this board:
- Consumer Ir receiver
- S/PDIF output
- Both USB interfaces
- Gigabit Ethernet using AR8035
- UART port
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Some SoC have MMIO regions that are shared across orthogonal
subsystems. This commit implements a possible solution for the
thread-safe access of such regions through a spinlock-protected API.
Concurrent access is protected with a single spinlock for the
entire MMIO address space. While this protects shared-registers,
it also serializes access to unrelated/unshared registers.
We add relaxed and non-relaxed variants, by using writel_relaxed and writel,
respectively. The rationale for this is that some users may not require
register write completion but only thread-safe access to a register.
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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GCC fails to build the kernel if EABI is selected, and the default FPU
is selected. Avoid this by explicitly stating that we want VFP with
EABI.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Commit 65939301acdb (arm: set initrd_start/initrd_end for fdt scan)
caused the FDT initrd_start and initrd_end to override the
phys_initrd_start and phys_initrd_size set by the initrd= kernel
parameter. With this patch initrd_start and initrd_end will be
overridden if phys_initrd_start and phys_initrd_size are set by the
kernel initrd= parameter.
Fixes: 65939301acdb (arm: set initrd_start/initrd_end for fdt scan)
Signed-off-by: Ben Peddell <klightspeed@killerwolves.net>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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The pgtbl macro couldn't handle the specific
(TEXT_OFFSET - PG_DIR_SIZE) value that the combination of
MSM platforms and LPAE created:
head.S:163: Error: invalid constant (203000) after fixup
Regardless of whether this combination of configuration options
will work on currently support platforms at run time, make it
at least assemble properly.
Signed-off-by: Christopher Covington <cov@codeaurora.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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__und_usr_thumb function deals with thumb2 opcodes. In case of BE
image, it needs to byteswap half word thumb2 encoded instructions
before further processing them.
Without this fix BE image user-land thread executing first VFP
instruction encoded in thumb2 fails with SIGILL, because kernel
does not recognize instruction and does not enable VFP.
Reported-by: Corey Melton <comelton@cisco.com>
Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org>
Tested-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Pull MTD updates from Brian Norris:
- Add me (Brian Norris) as an additional MTD maintainer (it'd be nice to get
David's "ack" for this; I'm sure he approves, but he's been pretty silent
lately)
- Add Ezequiel Garcie as maintainer for the pxa3xx NAND driver
- Last (?) round of pxa3xx improvements for supporting Armada 370/XP
- Typical churn in driver boilerplate (OOM messages, printk()'s, devm_*, etc.)
- Quad read mode support for SPI NOR driver (m25p80)
- Update Davinci NAND driver to prepare for use on new platforms
- Begin to kill off NAND_MAX_{PAGE,OOB}SIZE macros; more work is pending
- Miscellaneous NAND device support (new IDs)
- Add READ RETRY support for Micron MLC NAND
- Support new GPMI NAND ECC layout device-tree binding
- Avoid mapping stack/vmalloc() memory for GPMI NAND DMA
* tag 'for-linus-20140127' of git://git.infradead.org/linux-mtd: (151 commits)
mtd: gpmi: add sanity check when mapping DMA for read_buf/write_buf
mtd: gpmi: allocate a proper buffer for non ECC read/write
mtd: m25p80: Set rx_nbits for Quad SPI transfers
mtd: m25p80: Enable Quad SPI read transfers for s25fl512s
mtd: s3c2410: Merge plat/regs-nand.h into s3c2410.c
mtd: mtdram: add missing 'const'
mtd: m25p80: assign default read command
mtd: nuc900_nand: remove redundant return value check of platform_get_resource()
mtd: plat_nand: remove redundant return value check of platform_get_resource()
mtd: nand: add Intel manufacturer ID
mtd: nand: add SanDisk manufacturer ID
mtd: nand: add support for Samsung K9LCG08U0B
mtd: nand: pxa3xx: Add support for 2048 bytes page size devices
mtd: m25p80: Use OPCODE_QUAD_READ_4B for 4-byte addressing
mtd: nand: don't use {read,write}_buf for 8-bit transfers
mtd: nand: use __packed shorthand
mtd: nand: support Micron READ RETRY
mtd: nand: add generic READ RETRY support
mtd: nand: add ONFI vendor block for Micron
mtd: nand: localize ECC failures per page
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plat/regs-nand.h is used only by S3C2410 nand driver. Since there
are no other users, merge this file into the driver code to remove
platform dependency. While at it also remove unused macros.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/linux-leds
Pull LED subsystem update from Bryan Wu:
"Basically this cycle is mostly cleanup for LED subsystem"
* 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/linux-leds:
leds: s3c24xx: Remove hardware.h inclusion
leds: replace list_for_each with list_for_each_entry
leds: kirkwood: Cleanup in header files
leds: pwm: Remove a warning on non-DT platforms
leds: leds-pwm: fix duty time overflow.
leds: leds-mc13783: Remove unneeded mc13xxx_{un}lock
leds: leds-mc13783: Remove duplicate field in platform data
drivers: leds: leds-tca6507: check CONFIG_GPIOLIB whether defined for 'gpio_base'
leds: lp5523: Support LED MUX configuration on running a pattern
leds: lp5521/5523: Fix multiple engine usage bug
LEDS: tca6507 - fix up some comments.
LEDS: tca6507: add device-tree support for GPIO configuration.
LEDS: tca6507 - fix bugs in parsing of device-tree configuration.
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LED platform data are overwhelmed by excessive field "max_cur"
which just replicates few bits of "led_control" field.
This patch removes this field and adds a definition for the
current settings in the header.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Bryan Wu <cooloney@gmail.com>
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git://git.linaro.org/people/mike.turquette/linux
Pull more clock framework changes from Mike Turquette:
"The second half of the clock framework pull requeust for 3.14 is
dominated by platform support for Qualcomm's MSM SoCs, DT binding
updates for TI's OMAP-ish processors and additional support for
Samsung chips.
Additionally there are other smaller clock driver changes and several
last minute fixes. This pull request also includes the HiSilicon
support that depends on the already-merged arm-soc pull request"
[ Fix up stupid compile error in the source tree with evil merge - Grumpy Linus ]
* tag 'clk-for-linus-3.14-part2' of git://git.linaro.org/people/mike.turquette/linux: (49 commits)
clk: sort Makefile
clk: sunxi: fix overflow when setting up divided factors
clk: Export more clk-provider functions
dt-bindings: qcom: Fix warning with duplicate dt define
clk: si5351: remove variant from platform_data
clk: samsung: Remove unneeded semicolon
clk: qcom: Fix modular build
ARM: OMAP3: use DT clock init if DT data is available
ARM: AM33xx: remove old clock data and link in new clock init code
ARM: AM43xx: Enable clock init
ARM: OMAP: DRA7: Enable clock init
ARM: OMAP4: remove old clock data and link in new clock init code
ARM: OMAP2+: io: use new clock init API
ARM: OMAP2+: PRM: add support for initializing PRCM clock modules from DT
ARM: OMAP3: hwmod: initialize clkdm from clkdm_name
ARM: OMAP: hwmod: fix an incorrect clk type cast with _get_clkdm
ARM: OMAP2+: clock: use driver API instead of direct memory read/write
ARM: OMAP2+: clock: add support for indexed memmaps
ARM: dts: am43xx clock data
ARM: dts: AM35xx: use DT clock data
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OMAP3 platforms support both DT and non-DT boot at the moment, make
the clock init work according to the used setup.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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AM33xx clocks have now been moved to DT, thus remove the old data file
and use the new init code under OMAP clock driver.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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Initializes clock data from device tree.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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Initializes clock data from device tree.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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OMAP4 clocks have now been moved to DT, thus remove the old data file
and use the new init code under drivers/clk/omap/clk-44xx.c.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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clk_init is now separated to a common function which gets called for all
SoC:s, which initializes the DT clocks and calls the SoC specific clock init.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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This patch provides top level functionality for the DT clock initialization.
Clock tree is initialized hierarchically starting from IP modules (CM/PRM/PRCM)
going down towards individual clock nodes, and finally initializing
clockdomains once all the clocks are ready.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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DT clocks are mostly missing clkdm info now, and this causes an issue with
counter32k which makes its slave idlemode wrong and prevents core idle.
Fixed by initializing the hwmod clkdm pointers for omap3 also which makes
sure the clkdm flag matching logic works properly.
This patch also changes the return value for _init_clkdm to 0 for
incorrect clkdm_name, as this a warning, not a fatal error.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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If the main clock for a hwmod is of basic clock type, it is illegal to type
cast this to clk_hw_omap and will result in bogus data. Fixed by checking
the clock flags before attempting the type cast.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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Clock nodes shall use the services provided by underlying drivers to access
the hardware registers instead of direct memory read/write. Thus, change
all the code to use the new omap2_clk_readl / omap2_clk_writel APIs for this.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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Using indexed memmaps is required for isolating the actual memory access
from the clock code. Now, the driver providing the support for the clock IP
block provides the low level routines for reading/writing clock registers
also.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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This patch creates a unique node for each clock in the AM43xx power,
reset and clock manager (PRCM).
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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AM35xx now uses the clock data from device tree. Most of the data is
shared with OMAP3xxx, but as there is some delta, a new base .dtsi
file is also created for the SoC.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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This patch creates a unique node for each clock in the OMAP3 power,
reset and clock manager (PRCM).
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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This patch creates a unique node for each clock in the AM33xx power,
reset and clock manager (PRCM).
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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This patch adds optfclk_pciephy_clk and optfclk_pciephy_div_clk
which are used by PCIe phy. It also adds a mux clock to choose
the source of optfclk_pciephy_div_clk clock.
Signed-off-by: J Keerthy <j-keerthy@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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This patch changes apll_pcie_m2_ck to fixed factor
clock as there are no configurable divider associated to m2.
Signed-off-by: J Keerthy <j-keerthy@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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The patch adds a mux node to choose the parent of apll_pcie_ck node.
Signed-off-by: J Keerthy <j-keerthy@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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This patch creates a unique node for each clock in the DRA7 power,
reset and clock manager (PRCM).
TODO: apll_pcie clock node is still a dummy in this version, and
proper support for the APLL should be added.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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This patch creates a unique node for each clock in the OMAP5 power,
reset and clock manager (PRCM).
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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This patch creates a unique node for each clock in the OMAP4 power,
reset and clock manager (PRCM). OMAP443x and OMAP446x have slightly
different clock tree which is taken into account in the data.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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clk-3xxx.c now contains the clock init functionality for omap3, including
DT clock registration and adding of static clkdev entries.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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OMAP3 has interface clocks in addition to functional clocks, which
require special handling for the autoidle and idle status register
offsets mainly.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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clk-33xx.c now contains the clock init functionality for am33xx, including
DT clock registration and adding of static clkdev entries.
This patch also moves the omap2_clk_enable_init_clocks declaration to
the driver include, as this is needed by the am33xx clock init code.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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clk-54xx.c now contains the clock init functionality for omap5, including
DT clock registration and adding of static clkdev entries.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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