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* mx5: Enable board specific functions for enabling USB host on BabbageDinh Nguyen2010-05-03
| | | | | | | | | | | | This patch enables USB host functionality for Host1 and OTG port on Freescale MX51 Babbage HW. This patch contains the board specific HW initialization of the USB HW. This patch applies to 2.6.34-rc6. Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com> Reviewed-by: Daniel Mack <daniel@caiaq.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* mx5: Add USB device definitions for Freescale MX51 Babbage HWDinh Nguyen2010-05-03
| | | | | | | | | | | This patch is part of enabling USB for Freescale MX51 Babbage HW. This patch adds device structures for USB Host1 and OTG port, and adds clocking information for USB HW. This patch applies to 2.6.34-rc6. Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* mxc: Update GPIO for USB support on Freescale MX51 Babbage HWDinh Nguyen2010-05-03
| | | | | | | | | | | This patch is part of enabling USB for Freescale MX51 Babbage HW. This patch updates the iomux pins for USB, and gpio line for reset the USB hub on the MX51 Babbage HW. This patch applies to 2.6.34-rc6. Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* arm/plat-mxc: Fix forgotten renaming in timer.cWolfram Sang2010-04-23
| | | | | | | | | | | Commit "mxc: Change gpt timer code to be more generic by using V2 instead of MX3" forgot to replace one occurence causing a build failure. Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Cc: Amit Kucheria <amit.kucheria@canonical.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* mx5: Add registration of GPIOs for MX5 devicesDinh Nguyen2010-04-22
| | | | | | | | Register the gpio irqs on Freescale's MX51 Babbage HW. Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com> Signed-off-by: Amit Kucheria <amit.kucheria@canonical.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* mxc: Change gpt timer code to be more generic by using V2 instead of MX3Amit Kucheria2010-04-22
| | | | | | | | Replace mx3_ with v2_ since the register layout is the same for all SoCs using version 2 of the timer (mx25, mx31, mx37 and now mx51) Signed-off-by: Amit Kucheria <amit.kucheria@canonical.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: mx3/lilly1131: add USB supportDaniel Mack2010-04-14
| | | | | | Signed-off-by: Daniel Mack <daniel@caiaq.de> Cc: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* imx31: add rtc device on litekit board.Vladimir Zapolskiy2010-04-14
| | | | | | | | This patch adds support for SoC build-in RTC device on litekit board. Signed-off-by: Vladimir Zapolskiy <vzapolskiy@gmail.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* imx3: Add rtc platform device supportVladimir Zapolskiy2010-04-14
| | | | | | | | | This patch adds support for build-in RTC device found on Freescale imx31 and imx35 SoCs. Signed-off-by: Vladimir Zapolskiy <vzapolskiy@gmail.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2010-04-12
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * master.kernel.org:/home/rmk/linux-2.6-arm: (21 commits) ARM: Fix ioremap_cached()/ioremap_wc() for SMP platforms ARM: 6043/1: AT91 slow-clock resume: Don't wait for a disabled PLL to lock ARM: 6031/1: fix Thumb-2 decompressor ARM: 6029/1: ep93xx: gpio.c: local functions should be static ARM: 6028/1: ARM: add MAINTAINERS for U300 ARM: 6024/1: bcmring: fix missing down on semaphore in dma.c MXC: mach_armadillo5x0: Add USB Host support. ARM mach-mx3: duplicated include ARM mach-mx3: duplicated include imx31: add watchdog device on litekit board. imx3: Add watchdog platform device support MXC: mach-mx31_3ds: add support for freescale mc13783 power management device. MXC: mach-mx31_3ds: Add SPI1 device support. MXC: mach-mx31_3ds: Add support for on board NAND Flash. MXC: mach-mx31_3ds: Update variable names over recent mach name modification. imx31: fix parent clock for rtc i.MX51: remove NFC AXI static mapping i.MX51: determine silicon revision dynamically i.MX51: map TZIC dynamically i.MX51: Use correct clock for gpt ...
| * ARM: Fix ioremap_cached()/ioremap_wc() for SMP platformsRussell King2010-04-09
| | | | | | | | | | | | | | | | | | Write combining/cached device mappings are not setting the shared bit, which could potentially cause problems on SMP systems since the cache lines won't participate in the cache coherency protocol. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
| * ARM: 6043/1: AT91 slow-clock resume: Don't wait for a disabled PLL to lockAnders Larsen2010-04-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | at91 slow-clock resume: Don't wait for a disabled PLL to lock. We run into this problem with the PLLB on the at91: ohci-at91 disables the PLLB when going to suspend. The slowclock code however tries to do the same: It saves the PLLB register value and when restoring the value during resume, it waits for the PLLB to lock again. However the PLL will never lock and the loop would run into its timeout because the slowclock code just stored and restored an empty register. This fixes the problem by only restoring PLLA/PLLB when they were enabled at suspend time. Cc: Andrew Victor <avictor.za@gmail.com> Signed-off-by: Anders Larsen <al@alarsen.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * Merge branch 'for-rmk' of git://git.pengutronix.de/git/imx/linux-2.6Russell King2010-04-08
| |\ | | | | | | | | | | | | Conflicts: arch/arm/mach-mx3/mach-pcm037.c
| | * MXC: mach_armadillo5x0: Add USB Host support.Alberto Panizzo2010-03-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | This add USB Host capability. The Armadillo 500 board is supplied with two USB Host connectors driven by the USB OTG and USB Host 2 ports, through two NXP isp 1504 transceivers. Signed-off-by: Alberto Panizzo <maramaopercheseimorto@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * ARM mach-mx3: duplicated includeAndrea Gelmini2010-03-30
| | | | | | | | | | | | | | | | | | | | | arch/arm/mach-mx3/mx31lite-db.c: linux/platform_device.h is included more than once. Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * ARM mach-mx3: duplicated includeAndrea Gelmini2010-03-30
| | | | | | | | | | | | | | | | | | | | | arch/arm/mach-mx3/mach-pcm037.c: linux/fsl_devices.h is included more than once. Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * imx31: add watchdog device on litekit board.Vladimir Zapolskiy2010-03-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for SoC build-in watchdog device on litekit board. Signed-off-by: Vladimir Zapolskiy <vzapolskiy@gmail.com> Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Cc: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * imx3: Add watchdog platform device supportVladimir Zapolskiy2010-03-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for build-in watchdog device found on Freescale imx31 and imx35 SoCs. Signed-off-by: Vladimir Zapolskiy <vzapolskiy@gmail.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * Merge branch 'mx51' into mxc-rcSascha Hauer2010-03-25
| | |\
| | | * i.MX51: remove NFC AXI static mappingSascha Hauer2010-03-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This area contains the Nand Flash controller registers. There is no need to map them statically as the Nand driver uses ioremap(). Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | | * i.MX51: determine silicon revision dynamicallySascha Hauer2010-03-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Freescale redboot passes the silicon revision via ATAG_REVISION. Remove this bootloader dependency by doing the same as redboot does in the Kernel. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | | * i.MX51: map TZIC dynamicallySascha Hauer2010-03-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This looks cleaner and allows us to call mx51_revision later when we can use ioremap to determine the silicon revision dynamically. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | | * i.MX51: Use correct clock for gptSascha Hauer2010-03-19
| | | | | | | | | | | | | | | | | | | | | | | | The gpt uses the ipg clock, not ipg_perclk Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | | * i.MX51 Babbage: Add uncompress outputSascha Hauer2010-03-19
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * | MXC: mach-mx31_3ds: add support for freescale mc13783 power management device.Alberto Panizzo2010-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Power Gates must to be always enabled. Signed-off-by: Alberto Panizzo <maramaopercheseimorto@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * | MXC: mach-mx31_3ds: Add SPI1 device support.Alberto Panizzo2010-03-25
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Alberto Panizzo <maramaopercheseimorto@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * | MXC: mach-mx31_3ds: Add support for on board NAND Flash.Alberto Panizzo2010-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since the using of Bad Block Table is not constantly a good behave I had made it configurable. Signed-off-by: Alberto Panizzo <maramaopercheseimorto@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * | MXC: mach-mx31_3ds: Update variable names over recent mach name modification.Alberto Panizzo2010-03-25
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Alberto Panizzo <maramaopercheseimorto@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * | imx31: fix parent clock for rtcVladimir Zapolskiy2010-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to imx31 reference manual the signal from external low frequency clock is sent to RTC clock. The patch makes redundant the previously defined mxc_rtc clock. Signed-off-by: Vladimir Zapolskiy <vzapolskiy@gmail.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Daniel Mack <daniel@caiaq.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: 6031/1: fix Thumb-2 decompressorRabin Vincent2010-04-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 98e12b5a6e05413 ("ARM: Fix decompressor's kernel size estimation for ROM=y") broke the Thumb-2 decompressor because it added an entry in the LC0 table but didn't adjust the offset the Thumb-2 code uses to load the SP from that table. Fix it. Cc: stable <stable@kernel.org> Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: 6029/1: ep93xx: gpio.c: local functions should be staticHartley Sweeten2010-04-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The functions ep93xx_gpio_update_int_params and ep93xx_gpio_int_mask are not exported and should be static. This was overlooked when moving the code from core.c. Also, change a comment to better indicate what the code is for. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Ryan Mallon <ryan@bluewatersys.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: 6024/1: bcmring: fix missing down on semaphore in dma.cLeo Chen2010-04-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added missing down on the memMap->lock semaphore. Also fixed a return statement so that we always exit with an up (i.e. early exit via return is not allowed) Signed-off-by: Leo Hao Chen <leochen@broadcom.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | Merge branch 'davinci-fixes-for-linus' of ↵Linus Torvalds2010-04-07
|\ \ \ \ | |/ / / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci * 'davinci-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci: davinci: fix compile warning: <mach/da8xx.h>: #include <linux/platform_device.h> davinci: DM365: fix duplicate default IRQ priorities davinci: edma: clear events in edma_start() davinci: da8xx/omap-l1: fix build error when CONFIG_DAVINCI_MUX is undefined davinci: timers: don't enable timer until clocksource is initialized
| * | | davinci: fix compile warning: <mach/da8xx.h>: #include <linux/platform_device.h>Sergei Shtylyov2010-04-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This hushes the following warning: arch/arm/mach-davinci/include/mach/da8xx.h:104: warning: ‘struct platform_device’ declared inside parameter list arch/arm/mach-davinci/include/mach/da8xx.h:104: warning: its scope is only this definition or declaration, which is probably not what you want Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | | davinci: DM365: fix duplicate default IRQ prioritiesKevin Hilman2010-04-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | IRQ 29 has two possible interrupts DDRINT and RTC, but having both in the default priority table is confusing (and triggers a warning from sparse.) This patch removes the lower priority DDRINT from the default priority table leaving the RTC setting as the default. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | | davinci: edma: clear events in edma_start()Brian Niebuhr2010-04-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes an issue where a DMA channel can erroneously process an event generated by a previous transfer. A failure case is where DMA is being used for SPI transmit and receive channels on OMAP L138. In this case there is a single bit that controls all event generation from the SPI peripheral. Therefore it is possible that between when edma_stop() has been called for the transmit channel on a previous transfer and edma_start() is called for the transmit channel on a subsequent transfer, that a transmit event has been generated. The fix is to clear events in edma_start(). This prevents false events from being processed when events are enabled for that channel. Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | | davinci: da8xx/omap-l1: fix build error when CONFIG_DAVINCI_MUX is undefinedSekhar Nori2010-04-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The da8xx/omap-l1 boards refuse to build when CONFIG_DAVINCI_MUX is undefined because arch/arm/mach-davinci/mux.c:da8xx_pinmux_setup() is not defined. This patch fixes this issue. This is build tested with davinci_all_defconfig and da8xx_omapl_defconfig and boot tested on DA830 EVM. Reported-by: Shanmuga Sundaram Mahendran <shanmuga@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | | davinci: timers: don't enable timer until clocksource is initializedKevin Hilman2010-04-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On da830, when the same timer is used for clocksource and clockevent, the timer can be started before the clockevent is registered/initialzed. This creates a window where a timer interrupt might fire before the clockevent handler has been setup and causes a crash. This patch moves the actual enable/start of the timer after the clockevent has ben registered. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* | | | Merge branch 'master' into export-slabhTejun Heo2010-04-04
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| * | | | ARM: 6006/1: ARM: Use the correct NOP size in memmove for Thumb-2 kernel buildsCatalin Marinas2010-03-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When compiling the kernel to Thumb-2, using a 16-bit NOP in the memmove() implementation causes the preceding ADD PC instruction to branch incorrectly in the middle of a 32-bit LDR or STR instruction. The memmove() code is now similar to the memcpy() template. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | ARM: 6005/1: arm: kprobes: fix register corruption with jprobesMika Westerberg2010-03-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current implementation of jprobes allocates empty pt_regs from the stack which is then passed to kprobe_handler() and eventually to singlestep(). Now when instruction being simulated is STMFD (like in normal function prologues without CONFIG_FRAME_POINTER), stores using SP actually write over top of the fabricated pt_regs structure. This can be reproduced for example by using LKDTM module: # modprobe lkdtm # mount -t debugfs none /sys/kernel/debug # echo PANIC > /sys/kernel/debug/provoke-crash/INT_HW_IRQ_EN after this, it fails with corrupted registers (before the requested crash would occur): lkdtm: Crash point INT_HW_IRQ_EN of type PANIC hit, trigger in 9 rounds lkdtm: Crash point INT_HW_IRQ_EN of type PANIC hit, trigger in 8 rounds Internal error: Oops - undefined instruction: 0 [#1] last sysfs file: /sys/devices/platform/serial8250.0/sleep_timeout Modules linked in: lkdtm CPU: 0 Not tainted (2.6.34-rc2 #69) PC is at irq_desc+0x1638/0xeeb0 LR is at 0x25 pc : [<c050b428>] lr : [<00000025>] psr: c80a0013 sp : ce94bd60 ip : c050b3e8 fp : a0000013 r10: c0aa453c r9 : cf5d4000 r8 : ce9a1822 r7 : c050b424 r6 : 00000025 r5 : c039d8f8 r4 : c050b3e8 r3 : 00000001 r2 : cf4d0440 r1 : c039d8f8 r0 : 00000020 Flags: NZcv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user Control: 10c5387d Table: 8e804019 DAC: 00000015 Process sh (pid: 496, stack limit = 0xce94a2e8) Stack: (0xce94bd60 to 0xce94c000) [...] Code: 000002cd 00000000 00000000 00000001 (dead4ead) ---[ end trace 2b46d5f2b682f370 ]--- Kernel panic - not syncing: Fatal exception in interrupt This patch allocates enough space (2 * sizeof(struct pt_regs)) from the stack to prevent such corruption. Signed-off-by: Mika Westerberg <ext-mika.1.westerberg@nokia.com> Acked-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | ARM: 6001/1: removing compilation warning comming from clkdev.hviresh kumar2010-03-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clkdev.h is using struct device *. Due to this compilation warning is comming. Removing this warning. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | ARM: 6000/1: removing compilation warning comming from <asm/irq.h>viresh kumar2010-03-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | irq.h is using struct pt_regs *. Due to this compilation warning is comming. Removing this warning by adding declaration of struct pt_regs. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | ARM: 5997/1: ARM: Correct the VFPv3 detectionCatalin Marinas2010-03-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A CPU has VFPv3 hardware if the FPSID[19:16] bits are 2 or more. Currently Linux was only checking for 3 or more. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | ARM: 5996/1: ARM: Change the mandatory barriers implementation (4/4)Catalin Marinas2010-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mandatory barriers (mb, rmb, wmb) are used even on uniprocessor systems for things like ordering Normal Non-cacheable memory accesses with DMA transfer (via Device memory writes). The current implementation uses dmb() for mb() and friends but this is not sufficient. The DMB only ensures the relative ordering of the observability of accesses by other processors or devices acting as masters. In case of DMA transfers started by writes to device memory, the relative ordering is not ensured because accesses to slave ports of a device are not considered observable by the DMB definition. A DSB is required for the data to reach the main memory (even if mapped as Normal Non-cacheable) before the device receives the notification to begin the transfer. Furthermore, some L2 cache controllers (like L2x0 or PL310) buffer stores to Normal Non-cacheable memory and this would need to be drained with the outer_sync() function call. The patch also allows platforms to define their own mandatory barriers implementation by selecting CONFIG_ARCH_HAS_BARRIERS and providing a mach/barriers.h file. Note that the SMP barriers are unchanged (being DMBs as before) since they are only guaranteed to work with Normal Cacheable memory. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | ARM: 5995/1: ARM: Add L2x0 outer_sync() support (3/4)Catalin Marinas2010-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The L2x0 cache controllers need to explicitly drain their write buffer even for Normal Noncacheable memory accesses. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | ARM: 5994/1: ARM: Add outer_cache_fns.sync function pointer (2/4)Catalin Marinas2010-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch introduces the outer_cache_fns.sync function pointer together with the OUTER_CACHE_SYNC config option that can be used to drain the write buffer of the outer cache. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | ARM: 5993/1: ARM: Move the outer_cache definitions into a separate file (1/4)Catalin Marinas2010-03-25
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To avoid #include collisions with subsequent patches in the series, this patch moves the outer_cache definitions to a separate asm/outercache.h file. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* / / / include cleanup: Update gfp.h and slab.h includes to prepare for breaking ↵Tejun Heo2010-03-30
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | implicit slab.h inclusion from percpu.h percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: Tejun Heo <tj@kernel.org> Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
* | | [ARM] Orion5x: replace KEY_WLAN with KEY_WPS_BUTTONChristian Lamparter2010-03-23
| | | | | | | | | | | | | | | | | | | | | | | | "Input: add KEY_WPS_BUTTON definition" introduced a generic keycode for WPS input events. Signed-off-by: Christian Lamparter <chunkeey@googlemail.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
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