aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm
diff options
context:
space:
mode:
authorAlberto Panizzo <maramaopercheseimorto@gmail.com>2010-03-23 14:51:45 -0400
committerSascha Hauer <s.hauer@pengutronix.de>2010-03-25 03:43:03 -0400
commitae7a3f13ab59784d9d5041d8ecb08477a049e2c6 (patch)
treeb538de4ce5552b64f3384c1a10834975859534eb /arch/arm
parenta1ac442443342f778d5230b16efadc4c32d96298 (diff)
MXC: mach-mx31_3ds: add support for freescale mc13783 power management device.
Power Gates must to be always enabled. Signed-off-by: Alberto Panizzo <maramaopercheseimorto@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-mx3/mach-mx31_3ds.c45
1 files changed, 45 insertions, 0 deletions
diff --git a/arch/arm/mach-mx3/mach-mx31_3ds.c b/arch/arm/mach-mx3/mach-mx31_3ds.c
index 80179cf9e2f5..f54af1e29ca4 100644
--- a/arch/arm/mach-mx3/mach-mx31_3ds.c
+++ b/arch/arm/mach-mx3/mach-mx31_3ds.c
@@ -23,6 +23,9 @@
23#include <linux/gpio.h> 23#include <linux/gpio.h>
24#include <linux/smsc911x.h> 24#include <linux/smsc911x.h>
25#include <linux/platform_device.h> 25#include <linux/platform_device.h>
26#include <linux/mfd/mc13783.h>
27#include <linux/spi/spi.h>
28#include <linux/regulator/machine.h>
26 29
27#include <mach/hardware.h> 30#include <mach/hardware.h>
28#include <asm/mach-types.h> 31#include <asm/mach-types.h>
@@ -60,6 +63,33 @@ static int mx31_3ds_pins[] = {
60 MX31_PIN_CSPI2_SPI_RDY__SPI_RDY, 63 MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
61 MX31_PIN_CSPI2_SS0__SS0, 64 MX31_PIN_CSPI2_SS0__SS0,
62 MX31_PIN_CSPI2_SS2__SS2, /*CS for MC13783 */ 65 MX31_PIN_CSPI2_SS2__SS2, /*CS for MC13783 */
66 /* MC13783 IRQ */
67 IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO),
68};
69
70/* Regulators */
71static struct regulator_init_data pwgtx_init = {
72 .constraints = {
73 .boot_on = 1,
74 .always_on = 1,
75 },
76};
77
78static struct mc13783_regulator_init_data mx31_3ds_regulators[] = {
79 {
80 .id = MC13783_REGU_PWGT1SPI, /* Power Gate for ARM core. */
81 .init_data = &pwgtx_init,
82 }, {
83 .id = MC13783_REGU_PWGT2SPI, /* Power Gate for L2 Cache. */
84 .init_data = &pwgtx_init,
85 },
86};
87
88/* MC13783 */
89static struct mc13783_platform_data mc13783_pdata __initdata = {
90 .regulators = mx31_3ds_regulators,
91 .num_regulators = ARRAY_SIZE(mx31_3ds_regulators),
92 .flags = MC13783_USE_REGULATOR,
63}; 93};
64 94
65/* SPI */ 95/* SPI */
@@ -73,6 +103,18 @@ static struct spi_imx_master spi1_pdata = {
73 .num_chipselect = ARRAY_SIZE(spi1_internal_chipselect), 103 .num_chipselect = ARRAY_SIZE(spi1_internal_chipselect),
74}; 104};
75 105
106static struct spi_board_info mx31_3ds_spi_devs[] __initdata = {
107 {
108 .modalias = "mc13783",
109 .max_speed_hz = 1000000,
110 .bus_num = 1,
111 .chip_select = 1, /* SS2 */
112 .platform_data = &mc13783_pdata,
113 .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3),
114 .mode = SPI_CS_HIGH,
115 },
116};
117
76/* 118/*
77 * NAND Flash 119 * NAND Flash
78 */ 120 */
@@ -268,7 +310,10 @@ static void __init mxc_board_init(void)
268 310
269 mxc_register_device(&mxc_uart_device0, &uart_pdata); 311 mxc_register_device(&mxc_uart_device0, &uart_pdata);
270 mxc_register_device(&mxc_nand_device, &imx31_3ds_nand_flash_pdata); 312 mxc_register_device(&mxc_nand_device, &imx31_3ds_nand_flash_pdata);
313
271 mxc_register_device(&mxc_spi_device1, &spi1_pdata); 314 mxc_register_device(&mxc_spi_device1, &spi1_pdata);
315 spi_register_board_info(mx31_3ds_spi_devs,
316 ARRAY_SIZE(mx31_3ds_spi_devs));
272 317
273 if (!mx31_3ds_init_expio()) 318 if (!mx31_3ds_init_expio())
274 platform_device_register(&smsc911x_device); 319 platform_device_register(&smsc911x_device);