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git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/multiplatform
From Stephen Warren <swarren@wwwdotorg.org>:
ARM: tegra: multi-platform conversion
This branch converts Tegra to support multi-platform/single-zImage.
One header is made accessible to drivers. The earlyprintk implementation
is moved to the multi-platform location. Some Kconfig changes are made
to enable multi-platform. Some dead files are deleted.
The APIs exposed in the now-global tegra-powergate.h should be replaced
with standard reset and power domain APIs in the future.
This branch is based on (part of) the previous soc pull request.
* tag 'tegra-for-3.10-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: tegra: convert to multi-platform
ARM: tegra: move <mach/powergate.h> to <linux/tegra-powergate.h>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This allows Tegra be included in a kernel build that supports multiple
SoCs at once, which is useful for distro kernels.
This change:
* Moves Tegra's Kconfig into its own directory, as seems typical for
multi-platform conversions.
* Stops selecting some ARM errata that are incompatible with multi-
platform. This requires that you use a bootloader that enables the
workaround!
* Deletes some headers and Makefile.boot that aren't needed now that we
support multi-platform.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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This is required so that code such as Tegra's PCIe and clock drivers
can still access this header file once Tegra is converted to
multiplatform, and <mach/> no longer exists.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Olof Johansson:
"This branch contains part 1 of the platform updates for 3.10. Among
the highlights:
- Support for the new Atmel Cortex-A5 based platforms (SAMA5D3)
- New support for CSR SiRFatlas6 SoCs
- A handful of updates for NVidia T114 (a.k.a. Tegra 4)
- A bunch of updates for the shmobile platforms
- A handful of updates for davinci
- A few updates for Qualcomm MSM
- Plus a handful of other patches, defconfig updates, etc."
* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (135 commits)
ARM: tegra: pm: fix build error w/o PM_SLEEP
ARM: davinci: ensure global variables are declared
ARM: davinci: sram.c: fix incorrect type in assignment
ARM: davinci: da8xx dt: make file local symbols static
ARM: davinci: da8xx: add remoteproc support
ARM: socfpga: Upgrade clk driver for socfpga to make use of dts clock entries
ARM: socfpga: Add clock entries into device tree
ARM: socfpga: Enable soft reset
ARM: EXYNOS: replace cpumask by the corresponding macro
ARM: EXYNOS: handle properly the return values
ARM: EXYNOS: factor out the idle states
ARM: OMAP4: Enable fix for Cortex-A9 erratas
ARM: OMAP2+: Export SoC information to userspace
ARM: OMAP2+: SoC name and revision unification
ARM: OMAP2+: Move common part of late init into common function
ARM: tegra: pm: remove duplicated include from pm.c
ARM: davinci: da850: override mmc DT node device name
ARM: davinci: da850: add mmc DT entries
mmc: davinci_mmc: add DT support
ARM: SAMSUNG: check processor type before cache restoration in resume
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Merge in the gic cleanup since it has a handful of annoying internal conflicts
with soc development branches. All of them are delete/delete conflicts.
* gic/cleanup:
irqchip: vic: add include of linux/irq.h
irqchip: gic: Perform the gic_secondary_init() call via CPU notifier
irqchip: gic: Call handle_bad_irq() directly
arm: Move chained_irq_(enter|exit) to a generic file
arm: Move the set_handle_irq and handle_arch_irq declarations to asm/irq.h
Signed-off-by: Olof Johansson <olof@lixom.net>
Conflicts:
arch/arm/mach-shmobile/smp-emev2.c
arch/arm/mach-shmobile/smp-r8a7779.c
arch/arm/mach-shmobile/smp-sh73a0.c
arch/arm/mach-socfpga/platsmp.c
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This fixes the building error when the PM_SLEEP is disabled. The fucntional
defintion of "tegra_pm_validate_suspend_mode" without "static inline"
would become a multiple definition error.
Reported-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/soc
From Stephen Warren <swarren@wwwdotorg.org>:
ARM: tegra: core SoC support development
This branch includes major development on the core Tegra SoC support code
in the mach-tegra directory:
* SMP support for Tegra114.
* Exposes SoC chip ID and revision through standard sysfs files.
* System-level suspend/resume for Tegra20/30. At present, this only
supports "LP2" mode (CPU power-down), but provides the basis to
implement "LP0"/"LP1" (various levels of core/chip power-down) in the
hopefully near future.
* A minor cleanup of a duplicate include, which was introduced in this
branch.
This branch is based on the previous cleanup pull request.
* tag 'tegra-for-3.10-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: tegra: pm: remove duplicated include from pm.c
ARM: tegra: cpuidle: remove redundant parameters for powered-down mode
ARM: tegra: pm: add platform suspend support
ARM: dt: tegra: add bindings of power management configurations for PMC
ARM: tegra: irq: add wake up handling
gpio: tegra: add gpio wakeup source handling
ARM: tegra: moving the CPU power timer function to PMC driver
ARM: tegra: add clock source of PMC to device trees
ARM: tegra: add speedo-based process id for Tegra114
ARM: tegra: expose chip ID and revision
ARM: tegra: bring up secondary CPU for Tegra114
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Remove duplicated include.
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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After the patch series for system suspending support, tegra_idle_lp2_last()
no longer uses its parameters cpu_on_time or cpu_off_time, so remove them.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Adding suspend to RAM support for Tegra platform. There are three suspend
mode for Tegra. The difference were below.
* LP2: CPU voltage off
* LP1: CPU voltage off, DRAM in self-refresh
* LP0: CPU + Core voltage off, DRAM in self-refresh
After this patch, the LP2 suspend mode will be supported.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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The PMC mostly controls the entry and exit of the system from different
sleep modes. Different platform or system may have different configurations.
The power management configurations of PMC is represented as some properties.
The system needs to define the properties when the system supports deep sleep
mode (i.e. suspend).
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: devicetree-discuss@lists.ozlabs.org
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Add the wake up handling for legacy irq controller, and using
IRQCHIP_MASK_ON_SUSPEND for wake irq handling.
Based on the work by:
Varun Wadekar <vwadekar@nvidia.com>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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The CPU power timer set up function was related to PMC register. Now moving
it to PMC driver. And it also help to clean up the PM related code later.
The timer was calculated based on the input clock of PMC. In this patch, we
also get the clock from DT.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Add speedo-based process identification for Tegra114.
Based on the work by: Alex Frid <afrid@nvidia.com>
Signed-off-by: Danny Huang <dahuang@nvidia.com>
[swarren: added include of bug.h]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Expose Tegra chip ID and revision in /sys/devices/soc for user mode
usage
Signed-off-by: Danny Huang <dahuang@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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The secondary CPU can be brought up by toggling the power in PMC. Then
the flow controller will release CPU to go by clearing the reset and
clamp signal automatically.
Based on the work by:
Bo Yan <byan@nvidia.com>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC cleanup from Olof Johansson:
"Here is a collection of cleanup patches. Among the pieces that stand
out are:
- The deletion of h720x platforms
- Split of at91 non-dt platforms to their own Kconfig file to keep
them separate
- General cleanups and refactoring of i.MX and MXS platforms
- Some restructuring of clock tables for OMAP
- Convertion of PMC driver for Tegra to dt-only
- Some renames of sunxi -> sun4i (Allwinner A10)
- ... plus a bunch of other stuff that I haven't mentioned"
* tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (119 commits)
ARM: i.MX: remove unused ARCH_* configs
ARM i.MX53: remove platform ahci support
ARM: sunxi: Rework the restart code
irqchip: sunxi: Rename sunxi to sun4i
irqchip: sunxi: Make use of the IRQCHIP_DECLARE macro
clocksource: sunxi: Rename sunxi to sun4i
clocksource: sunxi: make use of CLKSRC_OF
clocksource: sunxi: Cleanup the timer code
ARM: at91: remove trailing semicolon from macros
ARM: at91/setup: fix trivial typos
ARM: EXYNOS: remove "config EXYNOS_DEV_DRM"
ARM: EXYNOS: change the name of USB ohci header
ARM: SAMSUNG: Remove unnecessary code for dma
ARM: S3C24XX: Remove unused GPIO drive strength register definitions
ARM: OMAP4+: PM: Restore CPU power state to ON with clockdomain force wakeup method
ARM: S3C24XX: Removed unneeded dependency on CPU_S3C2412
ARM: S3C24XX: Removed unneeded dependency on CPU_S3C2410
ARM: S3C24XX: Removed unneeded dependency on ARCH_S3C24XX for boards
ARM: SAMSUNG: Fix typo "CONFIG_SAMSUNG_DEV_RTC"
ARM: S5P64X0: Fix typo "CONFIG_S5P64X0_SETUP_SDHCI"
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git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/cleanup
From Stephen Warren <swarren@wwwdotorg.org>:
ARM: tegra: cleanup
This branch includes various cleanup of the core Tegra support.
* Unification of the separate board-dt-tegra*.c files into a single
tegra.c, now that everything is DT-driven and basically identical.
* Use of_clk_get() in the Tegra clocksource driver so that clocks are
described in DT rather than hard-coding clock names.
* Some cleanup of the PMC-related code, with the aim that the PMC
"driver" contains more of the code that touches PMC registers, rather
than spreading PMC register accesses through other files.
* Conversion of the "PMC" driver to acquire resources describe in device
tree rather than hard-coding them.
* Use of common code for the CPU sleep TLB invalidation.
This branch is based on the previous fixes pull request.
* tag 'tegra-for-3.10-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: tegra: use setup_mm_for_reboot rather than explicit pgd switch
ARM: tegra: replace the CPU power on function with PMC call
ARM: tegra: pmc: add power on function for secondary CPUs
ARM: tegra: pmc: convert PMC driver to support DT only
ARM: tegra: fix the PMC compatible string in DT
ARM: tegra: pmc: add specific compatible DT string for Tegra30 and Tegra114
ARM: tegra: refactor tegra{20,30}_boot_secondary
clocksource: tegra: move to of_clk_get
ARM: tegra: Unify Device tree board files
ARM: tegra: Rename board-dt-tegra20.c to tegra.c
ARM: tegra: Unify tegra{20,30,114}_init_early()
Conflicts:
drivers/clocksource/tegra20_timer.c
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This patch changes the Tegra PM code to use the setup_mm_for_reboot
helper rather than call cpu_switch_mm directly. This keeps things like
TLB invalidation in one place.
Cc: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Using the CPU power on function in PMC driver to bring up secondary CPUs,
because we are going to re-factor powergate driver to support generic
power domain. It will be removed later and added the generic power domain
support in PMC driver.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Adding the power on function for secondary CPUs in PMC driver, this can
help us to remove legacy powergate driver and add generic power domain
support later.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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The Tegra kernel only support boot from DT now. Clean up the PMC driver
to support DT only, that includes:
* remove the ifdef of CONFIG_OF
* replace the static mapping of PMC addr to map from DT
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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The PMC HW is not 100% compatible across all Tegra series. We need to
specify each of them in the DT match table.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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"tegra_boot_secondary()" has many condition branches for some Tegra
SoC generations in a single function so that it's not easy to compile
a kernel only for a single SoC if one wants with some reason, debug
purpose(?). This patch provides SoC specific version of
boot_secondary(), tegra{20,30}_boot_secondary(). This could allow
any combination of SoC to be built. Those boot_secondary functions can
be preparation when we ntroduce chip specific function pointers in the
future without having chip dependent branches around.
Also removed unused definition/prototpye.
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
[josephl: remove the Tegra114 part of the original patch]
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Unify board-dt-tegra{30,114} to the Tegra20 DT board file, "tegra.c".
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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This is the preparation to unify "board-dt-tegra{20,30,114}.c" to a
single file "tegra.c".
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Refactored tegra{20,30,114}_init_early() so that we have the unified
tegra_init_early().
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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This is a dependency for tegra/cleanups
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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All the calls to gic_secondary_init() pass 0 as the first argument.
Since this function is called on each CPU when starting, it can be done
in a platform-independent way via a CPU notifier registered by the GIC
code.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Tested-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Tested-by: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Tested-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: David Brown <davidb@codeaurora.org>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Barry Song <baohua.song@csr.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC non-critical fixes from Olof Johansson:
"Here is a collection of fixes (and some intermixed cleanups) that were
considered less important and thus not included in the later parts of
the 3.9-rc cycle.
It's a bit all over the map, contents wise. A series of ux500 fixes
and cleanups, a bunch of various fixes for OMAP and tegra, and some
for Freescale i.MX and even Qualcomm MSM.
Note that there's also a patch on this branch to globally turn off
-Wmaybe-uninitialized when building with -Os. It's been posted
several times by Arnd and no dissent was raised, but nobody seemed
interested to pick it up. So here it is, as the topmost patch."
* tag 'fixes-nc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (70 commits)
Turn off -Wmaybe-uninitialized when building with -Os
ARM: orion5x: include linux/cpu.h
ARM: tegra: call cpu_do_idle from C code
ARM: u300: fix ages old copy/paste bug
ARM: OMAP2+: add dependencies on ARCH_MULTI_V6/V7
ARM: tegra: solve adr range issue with THUMB2_KERNEL enabled
ARM: tegra: fix relocation truncated error when THUMB2_KERNEL enabled
ARM: tegra: fix build error when THUMB2_KERNEL enabled
ARM: msm: Fix uncompess.h tx underrun check
ARM: vexpress: Remove A9 PMU compatible values for non-A9 platforms
ARM: cpuimx27 and mbimx27: prepend CONFIG_ to Kconfig macro
ARM: OMAP2+: fix typo "CONFIG_BRIDGE_DVFS"
ARM: OMAP1: remove "config MACH_OMAP_HTCWIZARD"
ARM: mach-imx: mach-imx6q: Fix sparse warnings
ARM: mach-imx: src: Include "common.h
ARM: mach-imx: gpc: Include "common.h"
ARM: mach-imx: avic: Staticize *avic_base
ARM: mach-imx: tzic: Staticize *tzic_base
ARM: mach-imx: clk: Include "clk.h"
ARM: mach-imx: clk-busy: Staticize clk_busy_mux_ops
...
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When building a kernel for multiple CPU architecture levels,
cpu_do_idle() is a macro for an indirect function call, which
cannot be called from assembly code as Tegra does.
Adding a trivial C wrapper for this function lets us build
a tegra kernel with ARMv6 support enabled.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Joseph Lo <josephl@nvidia.com>
Cc: Stephen Warren <swarren@nvidia.com>
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When building the kernel with CONFIG_THUMB2_KERNEL enabled, older
assemblers may emit the following error:
reset-handler.S:78: Error: invalid immediate for address calculation (value = 0x00000004)
Using an explicit adr.w instruction will solve this. Newer assemblers do
this automatically. Use the W() macro to do this under Thumb mode only.
Inspired-by: Joseph Lo <josephl@nvidia.com>
Suggested-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
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The conditional branch instruction in Thumb2 only available to short range.
The linker will fail when the conditional branch over the range. Then
resulting in link error when generating kernel image. e.g.:
arch/arm/mach-tegra/reset-handler.S:47:(.text+0xf8e):
relocation truncated to fit: R_ARM_THM_JUMP19 against symbol
`cpu_resume' defined in .data section in arch/arm/kernel/built-in.o
This patch using a Thumb2 instruction IT (if-then) to have a longer branch
range.
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
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This patch fix the build failure when CONFIG_THUBM2_KERNEL enabled. You
clould see the error message below:
arch/arm/mach-tegra/sleep-tegra30.S:69: Error: shift must be constant --
`orr r12,r12,r4,lsl r3'
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
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Don't treat it as an error if a partition is already in the same power
state when a user wants to power it on or off. This allows code to
proceed if no state change is required.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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This function can be used by drivers to enable power to the hardware
blocks that they drive. Most of the drivers can be built as a module
and therefore require this function to be exported.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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This fixes:
arch/arm/mach-tegra/board-harmony-pcie.c: In function ‘harmony_pcie_init’:
arch/arm/mach-tegra/board-harmony-pcie.c:65:18: warning: ignoring return
value of ‘regulator_enable’, declared with attribute
warn_unused_result [-Wunused-result]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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The warm boot sequence of Tegra30 secondary CPUs should wait for the
power ready then removing the clamps.
This did not fix any known or unknown issue, but nice to have this fix.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Check a return value for tegra_powergate_remove_clamping().
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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There is no need to unlock MMIO access to the DBGLAR all the time. Doing
so may even cause problems if a SW bug causes writes to that MMIO region.
Cortex-A15 processors do not support the CP14 register write the code
currently uses to unlock the DBGLAR; the instruction throws an undefined
instruction exceptions. This prevents tegra_secondary_startup() from
executing on Tegra114, and hence prevents SMP.
Remove the code that unlocks this access.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Prior to this change, {save,restore}_cpu_arch_register() collaborated to
maintain the value of the CPU diagnostic register across power cycles.
This was required to maintain any CPU errata workaround enable bits in
that register. However, now that the Tegra reset vector code always
enables all required workarounds, there is no need to save and restore
the diagnostic register; it is always explicitly programmed in the
required manner.
Hence, remove the save/restore logic.
This has the advantage that the kernel always directly controls the value
of this register every boot, rather than relying on a bootloader or other
kernel code having previously written the correct value into it. This
makes CPU0 (which was previously saved/restored) and CPUn (which should
have been set up by the reset vector) be controlled in exactly the same
way, which is easier to debug/find/...
In particular, when converting Tegra to a multi-platform kernel, the CPU0
diagnostic register value initially comes from the bootloader. Most Tegra
bootloaders don't yet enable all required CPU bug workarounds. The
previous commit updates the kernel to do so on any CPU power cycle.
However, the save/restore code ends up over-writing the value with the
old bootloader-driven value instead of the now more-likely-to-be-correct
kernel value!
Even irrespective of multi-platform conversion, this change limits the
kernel's exposure to any WARs the bootloader didn't enable for CPU0: on
the very first LP2 transition (CPU power-saving which power-cycles the
CPU), the correct value will be enabled.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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The CPU cores in Tegra contain some errata. Workarounds must be applied
for these every time a CPU boots. Implement those workarounds directly
in the Tegra-specific CPU reset vector.
Many of these workarounds duplicate code in the core ARM kernel.
However, the core ARM kernel cannot enable those workarounds when
building a multi-platform kernel, since they require writing to secure-
only registers, and a multi-platform kernel often does not run in secure
mode, and also cannot generically/architecturally detect whether it is
running in secure mode, and hence cannot either unconditionally or
conditionally apply these workarounds.
Instead, the workarounds must be applied in architecture-specific reset
code, which is able to have more direct knowledge of the secure/normal
state. On Tegra, we will be able to detect this using a non-architected
register in the future, although we currently assume the kernel runs only
in secure mode. Other SoCs may never run the kernel in secure mode, and
hence always rely on a secure monitor to enable the workarounds, and
hence never implement them in the kernel.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
Pull power management and ACPI updates from Rafael J Wysocki:
- ARM big.LITTLE cpufreq driver from Viresh Kumar.
- exynos5440 cpufreq driver from Amit Daniel Kachhap.
- cpufreq core cleanup and code consolidation from Viresh Kumar and
Stratos Karafotis.
- cpufreq scalability improvement from Nathan Zimmer.
- AMD "frequency sensitivity feedback" powersave bias for the ondemand
cpufreq governor from Jacob Shin.
- cpuidle code consolidation and cleanups from Daniel Lezcano.
- ARM OMAP cpuidle fixes from Santosh Shilimkar and Daniel Lezcano.
- ACPICA fixes and other improvements from Bob Moore, Jung-uk Kim, Lv
Zheng, Yinghai Lu, Tang Chen, Colin Ian King, and Linn Crosetto.
- ACPI core updates related to hotplug from Toshi Kani, Paul Bolle,
Yasuaki Ishimatsu, and Rafael J Wysocki.
- Intel Lynxpoint LPSS (Low-Power Subsystem) support improvements from
Rafael J Wysocki and Andy Shevchenko.
* tag 'pm+acpi-3.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (192 commits)
cpufreq: Revert incorrect commit 5800043
cpufreq: MAINTAINERS: Add co-maintainer
cpuidle: add maintainer entry
ACPI / thermal: do not always return THERMAL_TREND_RAISING for active trip points
ARM: s3c64xx: cpuidle: use init/exit common routine
cpufreq: pxa2xx: initialize variables
ACPI: video: correct acpi_video_bus_add error processing
SH: cpuidle: use init/exit common routine
ARM: S5pv210: compiling issue, ARM_S5PV210_CPUFREQ needs CONFIG_CPU_FREQ_TABLE=y
ACPI: Fix wrong parameter passed to memblock_reserve
cpuidle: fix comment format
pnp: use %*phC to dump small buffers
isapnp: remove debug leftovers
ARM: imx: cpuidle: use init/exit common routine
ARM: davinci: cpuidle: use init/exit common routine
ARM: kirkwood: cpuidle: use init/exit common routine
ARM: calxeda: cpuidle: use init/exit common routine
ARM: tegra: cpuidle: use init/exit common routine for tegra3
ARM: tegra: cpuidle: use init/exit common routine for tegra2
ARM: OMAP4: cpuidle: use init/exit common routine
...
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* pm-cpufreq: (57 commits)
cpufreq: MAINTAINERS: Add co-maintainer
cpufreq: pxa2xx: initialize variables
ARM: S5pv210: compiling issue, ARM_S5PV210_CPUFREQ needs CONFIG_CPU_FREQ_TABLE=y
cpufreq: cpu0: Put cpu parent node after using it
cpufreq: ARM big LITTLE: Adapt to latest cpufreq updates
cpufreq: ARM big LITTLE: put DT nodes after using them
cpufreq: Don't call __cpufreq_governor() for drivers without target()
cpufreq: exynos5440: Protect OPP search calls with RCU lock
cpufreq: dbx500: Round to closest available freq
cpufreq: Call __cpufreq_governor() with correct policy->cpus mask
cpufreq / intel_pstate: Optimize intel_pstate_set_policy
cpufreq: OMAP: instantiate omap-cpufreq as a platform_driver
arm: exynos: Enable OPP library support for exynos5440
cpufreq: exynos: Remove error return even if no soc is found
cpufreq: exynos: Add cpufreq driver for exynos5440
cpufreq: AMD "frequency sensitivity feedback" powersave bias for ondemand governor
cpufreq: ondemand: allow custom powersave_bias_target handler to be registered
cpufreq: convert cpufreq_driver to using RCU
cpufreq: powerpc/platforms/cell: move cpufreq driver to drivers/cpufreq
cpufreq: sparc: move cpufreq driver to drivers/cpufreq
...
Conflicts:
MAINTAINERS (with commit a8e39c3 from pm-cpuidle)
drivers/cpufreq/cpufreq_governor.h (with commit beb0ff3)
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This patch moves cpufreq driver of ARM based tegra platform to drivers/cpufreq.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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policy->cpus contains all online cpus that have single shared clock line. And
their frequencies are always updated together.
Many SMP system's cpufreq drivers take care of this in individual drivers but
the best place for this code is in cpufreq core.
This patch modifies cpufreq_notify_transition() to notify frequency change for
all cpus in policy->cpus and hence updates all users of this API.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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Remove the duplicated code and use the cpuidle common code for initialization.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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Remove the duplicated code and use the cpuidle common code for initialization.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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Remove the duplicated code and use the cpuidle common code for initialization.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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The en_core_tk_irqen flag is set in all the cpuidle driver which
means it is not necessary to specify this flag.
Remove the flag and the code related to it.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Kevin Hilman <khilman@linaro.org> # for mach-omap2/*
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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