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* USB: musb: fix the nop registration for OMAP3EVMGupta, Ajay Kumar2009-08-07
| | | | | | | | | | | | | | | | | | OMAP3EVM uses ISP1504 phy which doesn't require any programming and thus has to use NOP otg transceiver. Cleanups being done: - Remove unwanted code in usb-musb.c file - Register NOP in OMAP3EVM board file using usb_nop_xceiv_register(). - Select NOP_USB_XCEIV for OMAP3EVM boards. - Don't enable TWL4030_USB in omap3_evm_defconfig Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com> Signed-off-by: Eino-Ville Talvala <talvala@stanford.edu> Acked-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* ARM: includecheck fix: mach-omap2/mcbsp.cJaswinder Singh Rajput2009-07-25
| | | | | | | | | | | fix the following 'make includecheck' warning: arch/arm/mach-omap2/mcbsp.c: mach/irqs.h is included more than once. Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com> Acked-by: Eduardo Valentin <eduardo.valentin@nokia.com> Acked-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* OMAP3: RX51: Use OneNAND sync read / writeAdrian Hunter2009-06-23
| | | | | | | Use OneNAND sync read / write Signed-off-by: Adrian Hunter <adrian.hunter@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* OMAP2/3: gpmc-onenand: correct use of async timingsAdrian Hunter2009-06-23
| | | | | | | | | | Use async timings when sync timings are not requested. Also ensure that OneNAND is in async mode when async timings are used. Signed-off-by: Adrian Hunter <adrian.hunter@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* OMAP2/3: Add omap_type() for determining GP/EMU/HSKevin Hilman2009-06-23
| | | | | | | | | | | | | | | The omap_type() function is added and returns the DEVICETYPE field of the CONTROL_STATUS register. The result can be used for conditional code based on whether device is GP (general purpose), EMU or HS (high security). Also move the type defines so omap1 code compile does not require ifdefs for sections using these defines. This code is needed for the following fix to set the SRAM size correctly for HS omaps. Also at least PM and watchdog code will need this function. Signed-off-by: Kevin Hilman <khilman@ti.deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* OMAP2/3: omap mailbox: platform_get_irq() error ignoredRoel Kluin2009-06-23
| | | | | | | | | platform_get_irq may return -ENXIO. but struct omap_mbox mbox_dsp_info.irq is unsigned, so the error was not noticed. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* OMAP2/3: mmc-twl4030: use correct controller in twl_mmc23_set_powerGrazvydas Ignotas2009-06-23
| | | | | | | | | twl_mmc23_set_power() has MMC2 twl_mmc_controller hardcoded in it, which breaks MMC3. Find the right controller to use instead. Signed-off-by: Grazvydas Ignotas <notasas@gmail.com> Cc: David Brownell <david-b@pacbell.net> Signed-off-by: Tony Lindgren <tony@atomide.com>
* Merge branch 'omap-clock-for-next' of git://git.pwsan.com/linux-2.6 into develRussell King2009-06-20
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| * OMAP2 clock/powerdomain: off by 1 error in loop timeout comparisonsRoel Kluin2009-06-19
| | | | | | | | | | | | | | | | with while (i++ < MAX_CLOCK_ENABLE_WAIT); i can reach MAX_CLOCK_ENABLE_WAIT + 1 after the loop, so if (i == MAX_CLOCK_ENABLE_WAIT) that's still success. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
| * OMAP3 SDRC: set FIXEDDELAY when disabling SDRC DLLPaul Walmsley2009-06-19
| | | | | | | | | | | | | | | | | | | | Correspondence with the TI OMAP hardware team indicates that SDRC_DLLA_CTRL.FIXEDDELAY should be initialized to 0x0f. This number was apparently derived from process validation. This is only used when the SDRC DLL is unlocked (e.g., SDRC clock frequency less than 83MHz). Signed-off-by: Paul Walmsley <paul@pwsan.com>
| * OMAP3: Add support for DPLL3 divisor values higher than 2Tero Kristo2009-06-19
| | | | | | | | | | | | Previously only 1 and 2 was supported. This is needed for DVFS VDD2 control. Signed-off-by: Tero Kristo <tero.kristo@nokia.com>
| * OMAP3 SRAM: convert SRAM code to use macros rather than magic numbersPaul Walmsley2009-06-19
| | | | | | | | | | | | | | Convert omap3_sram_configure_core_dpll() to use macros rather than magic numbers. Signed-off-by: Paul Walmsley <paul@pwsan.com>
| * OMAP3 SRAM: add more comments on the SRAM codePaul Walmsley2009-06-19
| | | | | | | | | | | | Clean up comments and copyrights on the CORE DPLL3 M2 divider change code. Signed-off-by: Paul Walmsley <paul@pwsan.com>
| * OMAP3 clock/SDRC: program SDRC_MR register during SDRC clock changePaul Walmsley2009-06-19
| | | | | | | | | | | | | | | | | | Program the SDRC_MR_0 register as well during SDRC clock changes. This register allows selection of the memory CAS latency. Some SDRAM chips, such as the Qimonda HYB18M512160AF6, have a lower CAS latency at lower clock rates. Signed-off-by: Paul Walmsley <paul@pwsan.com>
| * OMAP3 clock: add a short delay when lowering CORE clk ratePaul Walmsley2009-06-19
| | | | | | | | | | | | | | | | | | | | | | | | | | When changing the SDRAM clock from 166MHz to 83MHz via the CORE DPLL M2 divider, add a short delay before returning to SDRAM to allow the SDRC time to stabilize. Without this delay, the system is prone to random panics upon re-entering SDRAM. This time delay varies based on MPU frequency. At 500MHz MPU frequency at room temperature, 64 loops seems to work okay; so add another 32 loops for environmental and process variation. Signed-off-by: Paul Walmsley <paul@pwsan.com>
| * OMAP3 clock: initialize SDRC timings at kernel startPaul Walmsley2009-06-19
| | | | | | | | | | | | | | | | On the OMAP3, initialize SDRC timings when the kernel boots. This ensures that the kernel is running with known, optimized SDRC timings, rather than whatever was configured by the bootloader. Signed-off-by: Paul Walmsley <paul@pwsan.com>
| * OMAP3 clock: remove wait for DPLL3 M2 clock to stabilizePaul Walmsley2009-06-19
| | | | | | | | | | | | | | | | The original CDP kernel that this code comes from waited for 0x800 loops after switching the CORE DPLL M2 divider. This does not appear to be necessary. Signed-off-by: Paul Walmsley <paul@pwsan.com>
* | ARM: OMAP4: SMP: Enable SMP support for OMAP4430Santosh Shilimkar2009-06-09
| | | | | | | | | | | | This patch enables SMP on OMAP4430 SDP platform. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* | ARM: OMAP4: SMP: Add mpu timer support for OMAP4430Santosh Shilimkar2009-06-09
| | | | | | | | | | | | | | | | This patch adds SMP platform specific parts for local(mpu) timer support for OMAP4430 platform. Each Cortex-a9 core has it's own local timer in the MPU domain. These timers are not in wakeup domain. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* | ARM: OMAP4: SMP: Add OMAP4430 SMP board filesSantosh Shilimkar2009-06-09
| | | | | | | | | | | | | | | | This patch adds SMP platform files support for OMAP4430SDP. TI's OMAP4430 SOC is based on ARM Cortex-A9 SMP architecture. It's a dual core SOC with GIC used for interrupt handling and SCU for cache coherency. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* | Merge branch 'for-next' of ↵Russell King2009-05-29
|\| | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6 into devel Conflicts: arch/arm/Makefile
| * Merge branch 'omap4' into for-nextTony Lindgren2009-05-28
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| | * ARM: OMAP4: Add support for 4430 SDPSantosh Shilimkar2009-05-28
| | | | | | | | | | | | | | | | | | | | | | | | This patch updates the Makefile and Kconfig entries for OMAP4. The OMAP4430 SDP board file supports only minimal set of drivers. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP4: Add minimal support for omap4Santosh Shilimkar2009-05-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the support for OMAP4. The platform and machine specific headers and sources updated for OMAP4430 SDP platform. OMAP4430 is Texas Instrument's SOC based on ARM Cortex-A9 SMP architecture. It's a dual core SOC with GIC used for interrupt handling and SCU for cache coherency. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | Merge branch 'omap3-boards' into for-nextTony Lindgren2009-05-28
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| | * ARM: OMAP3: pandora: add support for mode devicesGrazvydas Ignotas2009-05-28
| | | | | | | | | | | | | | | | | | | | | | | | Add support for keypad, GPIO keys and LEDs. Also enable hardware debounce feature for GPIO keys. Signed-off-by: Grazvydas Ignotas <notasas@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP3: Add omap3 EVM supportSyed Mohammed Khasim2009-05-28
| | | | | | | | | | | | | | | | | | | | | Add omap3 EVM support Signed-off-by: Syed Mohammed Khasim <khasim@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP3: Add support for OMAP3 Zoom2 boardVikram Pandita2009-05-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch creates the minimal OMAP3 Zoom2 board support. Signed-off-by: Mikkel Christensen <mlc@ti.com> Signed-off-by: Vikram Pandita <vikram.pandita@ti.com> Acked-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP3: RX51: Connect VAUX3 to MMC2Adrian Hunter2009-05-28
| | | | | | | | | | | | | | | | | | | | | Connect VAUX3 to MMC2 Signed-off-by: Adrian Hunter <adrian.hunter@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP3: pandora: setup regulator framework for MMCGrazvydas Ignotas2009-05-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Setup regulators for MMC1 and MMC2 to get those SD slots working again. Signed-off-by: Grazvydas Ignotas <notasas@gmail.com> CC: David Brownell <david-b@pacbell.net> Acked-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP3: Initialize regulators for Beagle and OveroDavid Brownell2009-05-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Initialize regulators for Beagle and Overo. Patch is based on earlier patches posted to linux-omap mailing list. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP3: mmc-twl4030 uses regulator frameworkDavid Brownell2009-05-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Decouple the HSMMC glue from the twl4030 as the only regulator provider, using the regulator framework instead. This makes the glue's "mmc-twl4030" name become a complete misnomer ... this code could probably all migrate into the HSMMC driver now. Tested on 3430SDP (SD and low-voltage MMC) and Beagle (SD), plus some other boards (including Overo) after they were converted to set up MMC regulators properly. Eventually all boards should just associate a regulator with each MMC controller they use. In some cases (Overo MMC2 and Pandora MMC3, at least) that would be a fixed-voltage regulator with no real software control. As a temporary hack (pending regulator-next updates to make the "fixed.c" regulator become usable) there's a new ocr_mask field for those boards. Patch updated with a fix for disabling vcc_aux by Adrian Hunter <adrian.hunter@nokia.com> Cc: Pierre Ossman <drzeus-list@drzeus.cx> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | Merge branch 'omap3-upstream' into for-nextTony Lindgren2009-05-28
| |\| | | | | | | | | | | | | Conflicts: arch/arm/mach-omap2/serial.c
| | * ARM: OMAP3: Initialize more devices for LDPTony Lindgren2009-05-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on an earlier patches by Stanley.Miao <stanley.miao@windriver.com> and Nishant Kamat <nskamat@ti.com>. Note that at the ads7846 support still needs support for vaux_control for the touchscreen to work. Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP3: ZOOM MDK: Add FB support to board fileImre Deak2009-05-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on an earlier patch by Stanley.Miao <stanley.miao@windriver.com> with board-*.c changes split to avoid conflicts with other device updates. Cc: linux-fbdev-devel@lists.sourceforge.net Signed-off-by: Stanley.Miao <stanley.miao@windriver.com> Signed-off-by: Imre Deak <imre.deak@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP3: SDRC: add timing data for Qimonda HYB18M512160AF-6Paul Walmsley2009-05-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add timing data for the Qimonda HYB18M512160AF-6 SDRAM chip, used on the OMAP3430SDP boards. Thanks to Rajendra Nayak <rnayak@ti.com> for his help identifying the chip used on 3430SDP. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP3: SDRC: add timing data for Micron MT46H32M32LF-6, v2Paul Walmsley2009-05-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add timing data for the Micron MT46H32M32LF-6 SDRAM chip, used on the OMAP3 Beagle and EVM boards. Original timing data is from the Micron datasheet PDF downloaded from: http://download.micron.com/pdf/datasheets/dram/mobile/1gb_ddr_mobile_sdram_t48m.pdf Thanks to Rajendra Nayak <rnayak@ti.com> for his help identifying the chips used on Beagle & OMAP3EVM. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP2/3: Serial: Remove arch_initcall dependencyVikram Pandita2009-05-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move platform_device_register() for serial device to omap_serial_init() There is no need to have arch_initcall() dependency in serial as already board files call the function omap_serial_init() Signed-off-by: Vikram Pandita <vikram.pandita@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | Merge branch 'omap-upstream' into for-nextTony Lindgren2009-05-28
| |\| | | | | | | | | | | | | Conflicts: arch/arm/mach-omap2/Makefile
| | * ARM: OMAP2: 2430SDP: Add FB support to board fileImre Deak2009-05-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on an earlier patch by Hunyue Yau <hyau@mvista.com> with board-*.c changes split to avoid conflicts with other device updates. Cc: linux-fbdev-devel@lists.sourceforge.net Signed-off-by: Hunyue Yau <hyau@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Imre Deak <imre.deak@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP2/3: Add generic smc91x support when connected to GPMCTony Lindgren2009-05-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the board-rx51 smc91x code to be generic and make the boards to use it. This allows future recalculation of the timings when the source clock gets scaled. Also correct the rx51 interrupt to be IORESOURCE_IRQ_HIGHLEVEL. Thanks to Paul Walmsley <paul@pwsan.com> for better GPMC timing calculations. Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP2/3: Add generic onenand support when connected to GPMCJuha Yrjola2009-05-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add generic onenand support when connected to GPMC and make the boards to use it. The patch has been modified to make it more generic to support all the boards with GPMC. The patch also remove unused prototype for omap2_onenand_rephase(void). Note that board-apollon.c is currently using the MTD_ONENAND_GENERIC and setting the GPMC timings in the bootloader. Setting the GPMC timings in the bootloader will not allow supporting frequency scaling for the onenand source clock. Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP2/3: Reorganize Makefile to add omap4 supportTony Lindgren2009-05-25
| | | | | | | | | | | | | | | | | | | | | We don't necessarily want to compile in irq.o and sdrc.o for omap4. Also, clock and prcm may not be implemented initially. Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP2/3: Remove OMAP_CM_REGADDRTony Lindgren2009-05-25
| | | | | | | | | | | | | | | | | | Processor specific macros should be used instead. Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP2/3: Remove OMAP_PRM_REGADDR and OMAP2_PRM_BASETony Lindgren2009-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove OMAP_PRM_REGADDR and use processor specific defines instead. Also fold in a patch from Kevin Hilman to add _OFFSET #defines for the PRCM registers to be used with the prm_[read|write]_* macros. These are used extensively in the forthcoming OMAP PM support. Also remove now unused OMAP2_PRM_BASE. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * ARM: OMAP2/3: Remove OMAP2_32KSYNCT_BASETony Lindgren2009-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use processor specific defines instead. As an extra bonus, this patch fixes the problem of CONFIG_DEBUG_SPINLOCK calling sched_clock before we have things initialized: http://patchwork.kernel.org/patch/15810/ Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | OMAP3: PM: prevent module wakeups from waking IVA2Kevin Hilman2009-05-28
| | | | | | | | | | | | | | | | | | | | | By default, prevent functional wakeups from inside a module from waking up the IVA2. Let DSP Bridge code handle this when loaded. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | OMAP3: PM: Clear pending PRCM reset flags on initKevin Hilman2009-05-28
| | | | | | | | | | | | Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | OMAP3: PM: Ensure PRCM interrupts are cleared at bootKevin Hilman2009-05-28
| | | | | | | | | | | | Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * | OMAP3: PM: Ensure MUSB block can idle when driver not loadedPeter 'p2' De Schrijver2009-05-28
| | | | | | | | | | | | | | | | | | | | | Otherwise, bootloaders may leave MUSB in a state which prevents retention. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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