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* arm/dts: OMAP3+: Add mpu, dsp and iva nodesBenoit Cousson2011-10-04
| | | | | | | | | | | | Add nodes for devices used by PM code (mpu, dsp, iva). Add a cpus node as well as recommended in the DT spec. Remove mpu, dsp, iva devices init if is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Kevin Hilman <khilman@ti.com>
* arm/dts: OMAP4: Add a main ocp entry bound to l3-noc driverBenoit Cousson2011-10-04
| | | | | | | | | | Used the main OCP node to add bindings with the l3_noc driver. Remove l3_noc static device creation if DT is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Tony Lindgren <tony@atomide.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
* ARM: OMAP2+: l3-noc: Add support for device-treeBenoit Cousson2011-10-04
| | | | | | | | | | | | | Add device-tree support for the l3-noc driver. Use platform_driver_register to defer the probing at device init time. Add documentation for the l3-noc bindings. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
* ARM: OMAP2+: board-generic: Add i2c static initBenoit Cousson2011-10-04
| | | | | | | | | Still needed to boot until the i2c & twl driver is adapted to device-tree. Otherwise the voltage control code will try to access the twl and crash. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Tony Lindgren <tony@atomide.com>
* ARM: OMAP2+: board-generic: Add DT support to generic boardBenoit Cousson2011-10-04
| | | | | | | | | | | | Re-cycle the original board-generic.c file to support Device Tree for every OMAP2+ variants. The current approach is an intermediate step before having only one machine descriptor that will use some generic DT aware functions. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Tony Lindgren <tony@atomide.com>
* ARM: OMAP2+: devices: Remove all omap_device_pm_latency structuresBenoit Cousson2011-10-04
| | | | | | | | Remove all these duplicated structures since a default one is now available. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* ARM: OMAP2+: pm: Remove static devices variable for mpu, dsp, iva and l3 PMBenoit Cousson2011-10-04
| | | | | | | | | Since the device pointer is now retrieved using the hwmod name, remove the static variables used to store the device pointers for DSP, MPU, IVA and L3 devices for PM/DVFS usage. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* ARM: OMAP2+: pm: Use hwmod name instead of dev pointerBenoit Cousson2011-10-04
| | | | | | | | | | | | Replace the struct device parameter of omap2_set_init_voltage by the hwmod name. It will avoid having to store explicitely the device pointer into a static variable. Moreover, it will be a little bit more scalable if we introduce new DVFS devices. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* ARM: OMAP3: beagle-board: Use the omap_hwmod_name_get_dev APIBenoit Cousson2011-10-04
| | | | | | | | | | Replace the multiple omap2_get_XXX_device APIs with the new omap_hwmod_name_get_dev that uses the hwmod name to get the proper device. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
*-----. Merge branches 'cleanup-part3', 'voltage', 'dmtimer' and 'l3' into dt-baseTony Lindgren2011-10-04
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| | | | * OMAP: Print Initiator name for l3 custom error.sricharan2011-09-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The initiator id gets logged in the l3 target registers for custom error. So print it to aid debugging. Based on a internal patch by Devaraj Rangasamy <dev@ti.com> Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
| | | | * OMAP: Fix sparse warnings in l3 error handler.sricharan2011-09-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix below sparse warnings from the l3-noc and l3-smx error handlers files. arch/arm/mach-omap2/omap_l3_smx.h:209:22: warning: symbol 'omap3_l3_app_bases' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_smx.h:308:22: warning: symbol 'omap3_l3_debug_bases' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_smx.h:325:2: warning: incorrect type in initializer (different address spaces) arch/arm/mach-omap2/omap_l3_smx.h:325:2: expected unsigned int [usertype] * arch/arm/mach-omap2/omap_l3_smx.h:325:2: got unsigned int [noderef] [toplevel] <asn:2>*<noident> arch/arm/mach-omap2/omap_l3_smx.h:326:2: warning: incorrect type in initializer (different address spaces) arch/arm/mach-omap2/omap_l3_smx.h:326:2: expected unsigned int [usertype] * arch/arm/mach-omap2/omap_l3_smx.h:326:2: got unsigned int [noderef] [toplevel] <asn:2>*<noident> arch/arm/mach-omap2/omap_l3_smx.h:324:5: warning: symbol 'omap3_l3_bases' was not declared. Should it be static? CC arch/arm/mach-omap2/omap_l3_smx.o CHECK arch/arm/mach-omap2/omap_l3_noc.c arch/arm/mach-omap2/omap_l3_noc.c:73:13: warning: symbol '__v' shadows an earlier one arch/arm/mach-omap2/omap_l3_noc.c:73:13: originally declared here arch/arm/mach-omap2/omap_l3_noc.c:83:20: warning: symbol '__v' shadows an earlier one arch/arm/mach-omap2/omap_l3_noc.c:83:20: originally declared here arch/arm/mach-omap2/omap_l3_noc.c:90:5: warning: symbol '__v' shadows an earlier one arch/arm/mach-omap2/omap_l3_noc.c:90:5: originally declared here arch/arm/mach-omap2/omap_l3_noc.h:39:5: warning: symbol 'l3_flagmux' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_noc.h:46:5: warning: symbol 'l3_targ_inst_clk1' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_noc.h:54:5: warning: symbol 'l3_targ_inst_clk2' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_noc.h:75:5: warning: symbol 'l3_targ_inst_clk3' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_noc.h:79:6: warning: symbol 'l3_targ_inst_name' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_noc.h:112:5: warning: symbol 'l3_targ' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_noc.c:72:11: warning: cast removes address space of expression arch/arm/mach-omap2/omap_l3_noc.c:73:13: warning: incorrect type in argument 1 (different base types) arch/arm/mach-omap2/omap_l3_noc.c:73:13: expected void const volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap2/omap_l3_noc.c:73:13: got unsigned int arch/arm/mach-omap2/omap_l3_noc.c:83:20: warning: incorrect type in argument 1 (different base types) arch/arm/mach-omap2/omap_l3_noc.c:83:20: expected void const volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap2/omap_l3_noc.c:83:20: got unsigned int arch/arm/mach-omap2/omap_l3_noc.c:90:5: warning: incorrect type in argument 1 (different base types) arch/arm/mach-omap2/omap_l3_noc.c:90:5: expected void const volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap2/omap_l3_noc.c:90:5: got unsigned int arch/arm/mach-omap2/omap_l3_noc.c:96:5: warning: incorrect type in argument 1 (different base types) arch/arm/mach-omap2/omap_l3_noc.c:96:5: expected void const volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap2/omap_l3_noc.c:96:5: got unsigned int arch/arm/mach-omap2/omap_l3_noc.c:108:5: warning: incorrect type in argument 1 (different base types) arch/arm/mach-omap2/omap_l3_noc.c:108:5: expected void const volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap2/omap_l3_noc.c:108:5: got unsigned int Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reported-by: Paul Walmsley <paul@pwsan.com> Reviewed-by: Paul Walmsley <paul@pwsan.com>
| | | | * OMAP: Fix indentation issues in l3 error handler.sricharan2011-09-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The indentation problems in the l3 noc and smx error handler files are fixed. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reported-by: Paul Walmsley <paul@pwsan.com>
| | | | * OMAP: Fix a BUG in l3 error handler.Todd Poynor2011-09-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the current sequence of registering the irq and assigning it to the app_irq, debug_irq driver variables, there can be corner cases where the pending irq gets triggered immediately after registering, handler gets called resulting in a crash. So changed this sequence. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Todd Poynor <toddpoynor@google.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
| | | | * OMAP: Improve register access in L3 Error handler.Todd Poynor2011-09-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Changed the way of accessing L3 target registers from standard base rather than relative to STDERRLOG_MAIN. * Use ffs() to find error source from the L3_FLAGMUX_REGERRn register. * Remove extra l3_base[] entry. * Modified L3 custom error message. Signed-off-by: Todd Poynor <toddpoynor@google.com> Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
| | | * | ARM: OMAP: dmtimer: low-power mode supportTarun Kanti DebBarma2011-09-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clock is enabled only when timer is started and disabled when the the timer is stopped. Therefore before accessing registers in functions clock is enabled and then disabled back at the end of access. Context save is done dynamically whenever the registers are modified. Context restore is called when context is lost. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [tony@atomide.com: updated to use revision instead of tidr] Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | * | ARM: OMAP: dmtimer: skip reserved timersTony Lindgren2011-09-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pass the reserved flag in pdata and use it. We can now make sys_timer_reserved static to mach-omap2/timer.c. Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | * | ARM: OMAP: dmtimer: switch-over to platform device driverTarun Kanti DebBarma2011-09-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Register timer devices by going through hwmod database using hwmod API. The driver probes each of the registered devices. Functionality which are already performed by hwmod framework are removed from timer code. New set of timers present on OMAP4 are now supported. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Acked-by: Cousson, Benoit <b-cousson@ti.com> [tony@atomide.com: folded in spinlock changes, left out is_omap2] Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | * | ARM: OMAP2+: dmtimer: convert to platform devicesTarun Kanti DebBarma2011-09-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add routines to converts dmtimers to platform devices. The device data is obtained from hwmod database of respective platform and is registered to device model after successful binding to driver. In addition, capability attribute of each of the timers is added in hwmod database. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Thara Gopinath <thara@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Cousson, Benoit <b-cousson@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | * | ARM: OMAP2+: dmtimer: add device names to flck nodesTarun Kanti DebBarma2011-09-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add device name to OMAP2 dmtimer fclk nodes so that the fclk nodes can be retrieved by doing a clk_get with the corresponding device pointers or device names. Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Thara Gopinath <thara@ti.com> Acked-by: Cousson, Benoit <b-cousson@ti.com> [tony@atomide.com: fixed typo in email address] Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | * | ARM: OMAP: Add support for dmtimer v2 ipTony Lindgren2011-09-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The registers are slightly different between v1 and v2 ip that is available in omap4 and later for some timers. Add support for v2 ip by mapping the interrupt related registers separately and adding func_base for the functional registers. Also disable dmtimer driver features on omap4 for now as those need the hwmod conversion series to deal with enabling the timers properly in omap_dm_timer_init. Signed-off-by: Afzal Mohammed <afzal@ti.com> Tested-by: Hemant Pedanekar <hemantp@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | | Merge branch 'for_3.2/voltage-cleanup' of ↵Tony Lindgren2011-09-23
| | |\ \ \ | | | | | | | | | | | | | | | | | | git://gitorious.org/khilman/linux-omap-pm into voltage
| | | * | | ARM: OMAP: voltage: voltage layer present, even when CONFIG_PM=nKevin Hilman2011-09-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Even when CONFIG_PM=n, we try to scale the boot voltage to a sane, known value using OPP table to find matching voltage based on boot frequency. This should be done, even when CONFIG_PM=n to avoid mis-configured bootloaders and/or boot voltage assumptions made by boot loaders. Also fixes various compile problems due to depenencies between voltage domain and powerdomain code (also present when CONFIG_PM=n). Reported-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Kevin Hilman <khilman@ti.com>
| | * | | | Merge branch 'for_3.2/voltage-cleanup' of ↵Tony Lindgren2011-09-15
| | |\| | | | | | |/ / | | |/| | | | | | | git://gitorious.org/khilman/linux-omap-pm into voltage
| | | * | OMAP4: PM: TWL6030: add cmd registerNishanth Menon2011-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without the command register, ON/ONLP/RET/OFF voltages are useless. and TWL will be unable to use these Signed-off-by: Nishanth Menon <nm@ti.com>
| | | * | OMAP4: PM: TWL6030: fix ON/RET/OFF voltagesPatrick Titiano2011-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to latest OMAP4430 Data Manual v0.4 dated March 2011: - Retention voltage shall be set to 0.83V. See tables 2.2, 2.4 and 2.6 in DM. This allows saving a little more power in retention states. - OPP100 IVA nominal voltage is 1.188V. See table 2.4 in DM. This allows saving a little power when CPU wakes up until Smart-Reflex is not yet resumed. [nm@ti.com: ported to voltdm_c] Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Patrick Titiano <p-titiano@ti.com>
| | | * | OMAP4: PM: TWL6030: address 0V conversionsNishanth Menon2011-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 0V conversions should be mapped to 0 as it is meant to denote off voltages. Signed-off-by: Nishanth Menon <nm@ti.com>
| | | * | OMAP4: PM: TWL6030: fix uv to voltage for >0x39Nishanth Menon2011-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | using 1.35V as a check is not correct, we know that beyond 0x39, voltages are non linear - hence use the conversion iff uV greater than that for 0x39. For example, with 709mV as the smps offset, the max linear is actually 1.41V(0x39vsel)! Signed-off-by: Nishanth Menon <nm@ti.com>
| | | * | OMAP4: PM: TWL6030: fix voltage conversion formulaPatrick Titiano2011-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | omap_twl_vsel_to_uv() and omap_twl_uv_to_vsel() functions used to convert voltages to TWL6030 SMPS commands (a.k.a "vsel") implement incorrect conversion formula. It uses legacy OMAP3 formula, but OMAP4 Power IC has different offset and voltage step: - Voltage Step is now 12.66mV (instead of 12.5mV) - Offset is either 607.7mV or 709mV depending on TWL6030 chip revision (instead of 600mV) This leads to setting voltages potentially higher than expected, and so potentially some (limited) power overconsumption. For reference, see formula and tables in section 8.5.2.3 "Output Voltage Selection (Standard Mode / Extended Mode with or without offset)" in TWL6030 functional specifications document. [nm@ti.com: ported to voltdm_c] Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Patrick Titiano <p-titiano@ti.com>
| | | * | OMAP2+: VC: more registers are per-channel starting with OMAP5Kevin Hilman2011-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Starting with OMAP5, the following registers are per-channel and not common to a all VC channels: - SMPS I2C slave address - SMPS voltage register address offset - SMPS cmd/value register address offset - VC channel configuration register Move these from the channel-common struct into the per-channel struct to support OMAP5. Signed-off-by: Kevin Hilman <khilman@ti.com>
| | | * | OMAP3+: voltage: update nominal voltage in voltdm_scale() not VC post-scaleKevin Hilman2011-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the nominal voltage is updated in the VC post-scale function which is common to both scaling methods. However, this has readabiliy problems as this update is not where it might be expected. Instead, move the updated into voltdm_scale() upon a successful return of voltdm->scale() Signed-off-by: Kevin Hilman <khilman@ti.com>
| | | * | OMAP3+: voltage: rename omap_voltage_get_nom_volt -> voltdm_get_voltageKevin Hilman2011-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use preferred voltdm_ naming for getting current nominal voltage. No functional changes. Signed-off-by: Kevin Hilman <khilman@ti.com>
| | | * | OMAP3+: voltdm: final removal of omap_vdd_infoKevin Hilman2011-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove last remaining member (volt_data) from omap_vdd_info into struct voltagedomain and removal remaining usage and reference to omap_vdd_info. Signed-off-by: Kevin Hilman <khilman@ti.com>
| | | * | OMAP3+: voltage: move/rename curr_volt from vdd_info into struct voltagedomainKevin Hilman2011-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Track current nominal voltage as part of struct voltagedomain instead of omap_vdd_info, which will soon be removed. Also renames field from curr_volt to nominal_volt. No functional changes. Signed-off-by: Kevin Hilman <khilman@ti.com>
| | | * | OMAP3+: voltage: rename scale and reset functions using voltdm_ prefixKevin Hilman2011-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename voltage scaling related functions to use voltdm_ prefix intead of omap_voltage_, and cleanup kerneldoc comments in the process. s/omap_voltage_scale_vdd/voltdm_scale/ s/omap_voltage_reset/voltdm_reset/ Also, in voltdm_reset() s/target_uvdc/target_volt/ to be consistent with naming throughout the file. No functional changes. Signed-off-by: Kevin Hilman <khilman@ti.com>
| | | * | OMAP3+: VP: combine setting init voltage into common functionKevin Hilman2011-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | combine VPCONFIG init voltage setup into common function and use from both vp_enable and from vp_forceupdate_scale(). NOTE: this patch changes the sequence of when the initVDD bit is cleared. The bit is now cleared immediately after it was written. Since only the rising edge of this bit has any affect according to the TRM, the exact timing of clearing of this bit should not have any effect. Signed-off-by: Kevin Hilman <khilman@ti.com>
| | | * | OMAP3+: VP: remove unused omap_vp_get_curr_volt()Kevin Hilman2011-09-15
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Kevin Hilman <khilman@ti.com>
| | | * | OMAP3+: VP: update_errorgain(): return error if VPKevin Hilman2011-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add check for valid VP in omap_vp_update_errorgain() Signed-off-by: Kevin Hilman <khilman@ti.com>
| | | * | OMAP: VP: Explicitly mask VPVOLTAGE fieldTodd Poynor2011-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reading the VPVOLTAGE field of PRM_VP_*_VOLTAGE registers currently relies on a u32 -> u8 conversion to mask off the FORCEUPDATEWAIT field in the upper bits. Make this explicit using the mask symbol already defined, added as a new field in struct omap_vp_common. Signed-off-by: Todd Poynor <toddpoynor@google.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| | | * | OMAP3+: VP: move voltage scale function pointer into struct voltagedomainKevin Hilman2011-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Function pointer used for actual voltage scaling (e.g. VP force update or VC bypass) is moved from omap_vdd_info into struct voltagedomain, resulting in renames s/vdd->volt_scale/voltdm->scale/ No functional changes. Signed-off-by: Kevin Hilman <khilman@ti.com>
| | | * | OMAP3+: VP: remove omap_vp_runtime_dataKevin Hilman2011-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the "runtime" VP data in favor of direct programming of VP registers. The VP is in the PRM, which is in the wakeup powerdomain, so there is no need to keep the state dynamically. Fixes to original version from Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| | | * | OMAP3+: VP: create VP helper function for updating error gainKevin Hilman2011-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Create new helper function in VP layer for updating VP error gain. Currently used during pre-scale for VP force update and VC bypass. TODO: determine if this can be removed from the pre-scale path and moved to VP enable path. Signed-off-by: Kevin Hilman <khilman@ti.com>
| | | * | OMAP3+: VP: move timing calculation/config into VP initKevin Hilman2011-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move VP timing calcluation (based on sys clock) and register programming into VP init. Signed-off-by: Kevin Hilman <khilman@ti.com>
| | | * | OMAP3+: VP: move SoC-specific sys clock rate retreival late initKevin Hilman2011-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add sys clock name and rate to struct voltage domain. SoC specific voltagedomain init code initializes sys clock name. After clock framework is initialized, voltage late init will then use use the sys_clk rate to calculate the various timing that depend on that rate. Signed-off-by: Kevin Hilman <khilman@ti.com>
| | | * | OMAP3+: VP: struct omap_vp_common: replace shift with __ffs(mask)Kevin Hilman2011-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In struct omap_vp_common, the shift value can be derived from the mask value by using __ffs(), so remove the shift value for the various VPCONFIG bitfields, and use __ffs() in the code for the shift value. While here, rename field names in kerneldoc comment to match actual field names in structure. Also, cleanup indendentaion for other VP register accesses in omap_vp_init(). No functional changes. Signed-off-by: Kevin Hilman <khilman@ti.com>
| | | * | OMAP3+: voltage: remove unneeded debugfs interfaceKevin Hilman2011-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove read-only debugfs interface to VP values. Most of the values are init-time only and never change. Current voltage value should be retreived from the (eventual) regulator framework interface to the voltage domain. Fixes to original version provided by Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| | | * | OMAP3+: VP: cleanup: move VP instance into voltdm, misc. renamesKevin Hilman2011-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - move VP instance struct from vdd_info into struct voltage domain - remove _data suffix from structure name - rename vp_ prefix from vp_common field: accesses are now vp->common - move vp_enabled bool from vdd_info into VP instance - remove remaining references to omap_vdd_info No functional changes. Signed-off-by: Kevin Hilman <khilman@ti.com>
| | | * | OMAP3+: VC: use last nominal voltage setting to get current_vselKevin Hilman2011-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of reading current vsel value from the VP's voltage register, just use current nominal voltage translated into vsel via the PMIC. Doing this allows VC bypass scaling to work even without a VP configured. Signed-off-by: Kevin Hilman <khilman@ti.com>
| | | * | OMAP3+: PM: VC: handle mutant channel config for OMAP4 MPU channelKevin Hilman2011-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On OMAP3+, all VC channels have the the same bitfield ordering for all VC channels, except the OMAP4 MPU channel. This appears to be a freak accident as all other VC channel (including OMAP5) have the standard configuration. Handle the mutant case by adding a per-channel flag to signal the deformity and handle it during VC init. Special thanks to Nishanth Menon <nm@ti.com> for finding this problem and for proposing the initial solution. Cc: Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| | | * | OMAP3+: VC: make I2C config programmable with PMIC-specific settingsKevin Hilman2011-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove hard-coded I2C configuration in favor of settings that can be configured from PMIC-specific values. Currently only high-speed mode and the master-code value are supported, since they were the only fields currently used, but extending this is now trivial. Thanks to Nishanth Menon <nm@ti.com> for reporting/fixing a sparse problem and making omap_vc_i2c_init() static, as well as finding and fixing a problem with the shift/mask of mcode. Signed-off-by: Kevin Hilman <khilman@ti.com>
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-19 20:32:51 -0500