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authorsricharan <r.sricharan@ti.com>2011-08-24 10:37:45 -0400
committerSantosh Shilimkar <santosh.shilimkar@ti.com>2011-09-24 03:58:57 -0400
commited0e352073ff86c876ff7820ad0b6bac123082b5 (patch)
treeb2a77f867ecdb97cc9ffbd8c956edd4090c048b9 /arch/arm/mach-omap2
parentc1df2dcc90dc6f5110726e9bdcd2353db989c29d (diff)
OMAP: Fix indentation issues in l3 error handler.
The indentation problems in the l3 noc and smx error handler files are fixed. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reported-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r--arch/arm/mach-omap2/omap_l3_noc.c58
-rw-r--r--arch/arm/mach-omap2/omap_l3_noc.h106
-rw-r--r--arch/arm/mach-omap2/omap_l3_smx.c86
-rw-r--r--arch/arm/mach-omap2/omap_l3_smx.h156
4 files changed, 202 insertions, 204 deletions
diff --git a/arch/arm/mach-omap2/omap_l3_noc.c b/arch/arm/mach-omap2/omap_l3_noc.c
index cf237dd4dba5..1f68e95c3e80 100644
--- a/arch/arm/mach-omap2/omap_l3_noc.c
+++ b/arch/arm/mach-omap2/omap_l3_noc.c
@@ -1,25 +1,25 @@
1/* 1/*
2 * OMAP4XXX L3 Interconnect error handling driver 2 * OMAP4XXX L3 Interconnect error handling driver
3 * 3 *
4 * Copyright (C) 2011 Texas Corporation 4 * Copyright (C) 2011 Texas Corporation
5 * Santosh Shilimkar <santosh.shilimkar@ti.com> 5 * Santosh Shilimkar <santosh.shilimkar@ti.com>
6 * Sricharan <r.sricharan@ti.com> 6 * Sricharan <r.sricharan@ti.com>
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by 9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or 10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version. 11 * (at your option) any later version.
12 * 12 *
13 * This program is distributed in the hope that it will be useful, 13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details. 16 * GNU General Public License for more details.
17 * 17 *
18 * You should have received a copy of the GNU General Public License 18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software 19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
21 * USA 21 * USA
22 */ 22 */
23#include <linux/init.h> 23#include <linux/init.h>
24#include <linux/io.h> 24#include <linux/io.h>
25#include <linux/platform_device.h> 25#include <linux/platform_device.h>
@@ -55,7 +55,7 @@
55static irqreturn_t l3_interrupt_handler(int irq, void *_l3) 55static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
56{ 56{
57 57
58 struct omap4_l3 *l3 = _l3; 58 struct omap4_l3 *l3 = _l3;
59 int inttype, i; 59 int inttype, i;
60 int err_src = 0; 60 int err_src = 0;
61 u32 std_err_main, err_reg, clear, base, l3_targ_base; 61 u32 std_err_main, err_reg, clear, base, l3_targ_base;
@@ -122,7 +122,7 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
122 122
123static int __init omap4_l3_probe(struct platform_device *pdev) 123static int __init omap4_l3_probe(struct platform_device *pdev)
124{ 124{
125 static struct omap4_l3 *l3; 125 static struct omap4_l3 *l3;
126 struct resource *res; 126 struct resource *res;
127 int ret; 127 int ret;
128 128
@@ -182,7 +182,7 @@ static int __init omap4_l3_probe(struct platform_device *pdev)
182 IRQF_DISABLED, "l3-dbg-irq", l3); 182 IRQF_DISABLED, "l3-dbg-irq", l3);
183 if (ret) { 183 if (ret) {
184 pr_crit("L3: request_irq failed to register for 0x%x\n", 184 pr_crit("L3: request_irq failed to register for 0x%x\n",
185 OMAP44XX_IRQ_L3_DBG); 185 OMAP44XX_IRQ_L3_DBG);
186 goto err3; 186 goto err3;
187 } 187 }
188 188
@@ -192,7 +192,7 @@ static int __init omap4_l3_probe(struct platform_device *pdev)
192 IRQF_DISABLED, "l3-app-irq", l3); 192 IRQF_DISABLED, "l3-app-irq", l3);
193 if (ret) { 193 if (ret) {
194 pr_crit("L3: request_irq failed to register for 0x%x\n", 194 pr_crit("L3: request_irq failed to register for 0x%x\n",
195 OMAP44XX_IRQ_L3_APP); 195 OMAP44XX_IRQ_L3_APP);
196 goto err4; 196 goto err4;
197 } 197 }
198 198
@@ -213,7 +213,7 @@ err0:
213 213
214static int __exit omap4_l3_remove(struct platform_device *pdev) 214static int __exit omap4_l3_remove(struct platform_device *pdev)
215{ 215{
216 struct omap4_l3 *l3 = platform_get_drvdata(pdev); 216 struct omap4_l3 *l3 = platform_get_drvdata(pdev);
217 217
218 free_irq(l3->app_irq, l3); 218 free_irq(l3->app_irq, l3);
219 free_irq(l3->debug_irq, l3); 219 free_irq(l3->debug_irq, l3);
@@ -226,9 +226,9 @@ static int __exit omap4_l3_remove(struct platform_device *pdev)
226} 226}
227 227
228static struct platform_driver omap4_l3_driver = { 228static struct platform_driver omap4_l3_driver = {
229 .remove = __exit_p(omap4_l3_remove), 229 .remove = __exit_p(omap4_l3_remove),
230 .driver = { 230 .driver = {
231 .name = "omap_l3_noc", 231 .name = "omap_l3_noc",
232 }, 232 },
233}; 233};
234 234
diff --git a/arch/arm/mach-omap2/omap_l3_noc.h b/arch/arm/mach-omap2/omap_l3_noc.h
index 22c0d57ee3d9..9120e70aa08a 100644
--- a/arch/arm/mach-omap2/omap_l3_noc.h
+++ b/arch/arm/mach-omap2/omap_l3_noc.h
@@ -1,25 +1,25 @@
1 /* 1/*
2 * OMAP4XXX L3 Interconnect error handling driver header 2 * OMAP4XXX L3 Interconnect error handling driver header
3 * 3 *
4 * Copyright (C) 2011 Texas Corporation 4 * Copyright (C) 2011 Texas Corporation
5 * Santosh Shilimkar <santosh.shilimkar@ti.com> 5 * Santosh Shilimkar <santosh.shilimkar@ti.com>
6 * sricharan <r.sricharan@ti.com> 6 * sricharan <r.sricharan@ti.com>
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by 9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or 10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version. 11 * (at your option) any later version.
12 * 12 *
13 * This program is distributed in the hope that it will be useful, 13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details. 16 * GNU General Public License for more details.
17 * 17 *
18 * You should have received a copy of the GNU General Public License 18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software 19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
21 * USA 21 * USA
22 */ 22 */
23#ifndef __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H 23#ifndef __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H
24#define __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H 24#define __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H
25 25
@@ -32,9 +32,9 @@
32#define L3_DEBUG_ERROR 0x1 32#define L3_DEBUG_ERROR 0x1
33 33
34/* L3 TARG register offsets */ 34/* L3 TARG register offsets */
35#define L3_TARG_STDERRLOG_MAIN 0x48 35#define L3_TARG_STDERRLOG_MAIN 0x48
36#define L3_TARG_STDERRLOG_SLVOFSLSB 0x5c 36#define L3_TARG_STDERRLOG_SLVOFSLSB 0x5c
37#define L3_FLAGMUX_REGERR0 0xc 37#define L3_FLAGMUX_REGERR0 0xc
38 38
39u32 l3_flagmux[L3_MODULES] = { 39u32 l3_flagmux[L3_MODULES] = {
40 0x500, 40 0x500,
@@ -78,34 +78,34 @@ u32 l3_targ_inst_clk3[] = {
78 78
79char *l3_targ_inst_name[L3_MODULES][18] = { 79char *l3_targ_inst_name[L3_MODULES][18] = {
80 { 80 {
81 "DMM1", 81 "DMM1",
82 "DMM2", 82 "DMM2",
83 "ABE", 83 "ABE",
84 "L4CFG", 84 "L4CFG",
85 "CLK2 PWR DISC", 85 "CLK2 PWR DISC",
86 }, 86 },
87 { 87 {
88 "CORTEX M3" , 88 "CORTEX M3" ,
89 "DSS ", 89 "DSS ",
90 "GPMC ", 90 "GPMC ",
91 "ISS ", 91 "ISS ",
92 "IVAHD ", 92 "IVAHD ",
93 "AES1", 93 "AES1",
94 "L4 PER0", 94 "L4 PER0",
95 "OCMRAM ", 95 "OCMRAM ",
96 "GPMC sERROR", 96 "GPMC sERROR",
97 "SGX ", 97 "SGX ",
98 "SL2 ", 98 "SL2 ",
99 "C2C ", 99 "C2C ",
100 "PWR DISC CLK1", 100 "PWR DISC CLK1",
101 "SHA1", 101 "SHA1",
102 "AES2", 102 "AES2",
103 "L4 PER3", 103 "L4 PER3",
104 "L4 PER1", 104 "L4 PER1",
105 "L4 PER2", 105 "L4 PER2",
106 }, 106 },
107 { 107 {
108 "EMUSS", 108 "EMUSS",
109 }, 109 },
110}; 110};
111 111
@@ -116,13 +116,13 @@ u32 *l3_targ[L3_MODULES] = {
116}; 116};
117 117
118struct omap4_l3 { 118struct omap4_l3 {
119 struct device *dev; 119 struct device *dev;
120 struct clk *ick; 120 struct clk *ick;
121 121
122 /* memory base */ 122 /* memory base */
123 void __iomem *l3_base[L3_MODULES]; 123 void __iomem *l3_base[L3_MODULES];
124 124
125 int debug_irq; 125 int debug_irq;
126 int app_irq; 126 int app_irq;
127}; 127};
128#endif 128#endif
diff --git a/arch/arm/mach-omap2/omap_l3_smx.c b/arch/arm/mach-omap2/omap_l3_smx.c
index fa07edf938b2..a05a62f9ee5b 100644
--- a/arch/arm/mach-omap2/omap_l3_smx.c
+++ b/arch/arm/mach-omap2/omap_l3_smx.c
@@ -1,26 +1,26 @@
1 /* 1/*
2 * OMAP3XXX L3 Interconnect Driver 2 * OMAP3XXX L3 Interconnect Driver
3 * 3 *
4 * Copyright (C) 2011 Texas Corporation 4 * Copyright (C) 2011 Texas Corporation
5 * Felipe Balbi <balbi@ti.com> 5 * Felipe Balbi <balbi@ti.com>
6 * Santosh Shilimkar <santosh.shilimkar@ti.com> 6 * Santosh Shilimkar <santosh.shilimkar@ti.com>
7 * Sricharan <r.sricharan@ti.com> 7 * Sricharan <r.sricharan@ti.com>
8 * 8 *
9 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by 10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or 11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version. 12 * (at your option) any later version.
13 * 13 *
14 * This program is distributed in the hope that it will be useful, 14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details. 17 * GNU General Public License for more details.
18 * 18 *
19 * You should have received a copy of the GNU General Public License 19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software 20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
22 * USA 22 * USA
23 */ 23 */
24 24
25#include <linux/kernel.h> 25#include <linux/kernel.h>
26#include <linux/slab.h> 26#include <linux/slab.h>
@@ -135,7 +135,7 @@ static char *omap3_l3_initiator_string(u8 initid)
135 } 135 }
136} 136}
137 137
138/** 138/*
139 * omap3_l3_block_irq - handles a register block's irq 139 * omap3_l3_block_irq - handles a register block's irq
140 * @l3: struct omap3_l3 * 140 * @l3: struct omap3_l3 *
141 * @base: register block base address 141 * @base: register block base address
@@ -150,30 +150,29 @@ static char *omap3_l3_initiator_string(u8 initid)
150static irqreturn_t omap3_l3_block_irq(struct omap3_l3 *l3, 150static irqreturn_t omap3_l3_block_irq(struct omap3_l3 *l3,
151 u64 error, int error_addr) 151 u64 error, int error_addr)
152{ 152{
153 u8 code = omap3_l3_decode_error_code(error); 153 u8 code = omap3_l3_decode_error_code(error);
154 u8 initid = omap3_l3_decode_initid(error); 154 u8 initid = omap3_l3_decode_initid(error);
155 u8 multi = error & L3_ERROR_LOG_MULTI; 155 u8 multi = error & L3_ERROR_LOG_MULTI;
156 u32 address = omap3_l3_decode_addr(error_addr); 156 u32 address = omap3_l3_decode_addr(error_addr);
157 157
158 WARN(true, "%s seen by %s %s at address %x\n", 158 WARN(true, "%s seen by %s %s at address %x\n",
159 omap3_l3_code_string(code), 159 omap3_l3_code_string(code),
160 omap3_l3_initiator_string(initid), 160 omap3_l3_initiator_string(initid),
161 multi ? "Multiple Errors" : "", 161 multi ? "Multiple Errors" : "", address);
162 address);
163 162
164 return IRQ_HANDLED; 163 return IRQ_HANDLED;
165} 164}
166 165
167static irqreturn_t omap3_l3_app_irq(int irq, void *_l3) 166static irqreturn_t omap3_l3_app_irq(int irq, void *_l3)
168{ 167{
169 struct omap3_l3 *l3 = _l3; 168 struct omap3_l3 *l3 = _l3;
170 u64 status, clear; 169 u64 status, clear;
171 u64 error; 170 u64 error;
172 u64 error_addr; 171 u64 error_addr;
173 u64 err_source = 0; 172 u64 err_source = 0;
174 void __iomem *base; 173 void __iomem *base;
175 int int_type; 174 int int_type;
176 irqreturn_t ret = IRQ_NONE; 175 irqreturn_t ret = IRQ_NONE;
177 176
178 int_type = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR; 177 int_type = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR;
179 if (!int_type) { 178 if (!int_type) {
@@ -197,7 +196,6 @@ static irqreturn_t omap3_l3_app_irq(int irq, void *_l3)
197 error = omap3_l3_readll(base, L3_ERROR_LOG); 196 error = omap3_l3_readll(base, L3_ERROR_LOG);
198 if (error) { 197 if (error) {
199 error_addr = omap3_l3_readll(base, L3_ERROR_LOG_ADDR); 198 error_addr = omap3_l3_readll(base, L3_ERROR_LOG_ADDR);
200
201 ret |= omap3_l3_block_irq(l3, error, error_addr); 199 ret |= omap3_l3_block_irq(l3, error, error_addr);
202 } 200 }
203 201
@@ -214,9 +212,9 @@ static irqreturn_t omap3_l3_app_irq(int irq, void *_l3)
214 212
215static int __init omap3_l3_probe(struct platform_device *pdev) 213static int __init omap3_l3_probe(struct platform_device *pdev)
216{ 214{
217 struct omap3_l3 *l3; 215 struct omap3_l3 *l3;
218 struct resource *res; 216 struct resource *res;
219 int ret; 217 int ret;
220 218
221 l3 = kzalloc(sizeof(*l3), GFP_KERNEL); 219 l3 = kzalloc(sizeof(*l3), GFP_KERNEL);
222 if (!l3) 220 if (!l3)
diff --git a/arch/arm/mach-omap2/omap_l3_smx.h b/arch/arm/mach-omap2/omap_l3_smx.h
index 185d77ad4b2e..18e5ec2629ca 100644
--- a/arch/arm/mach-omap2/omap_l3_smx.h
+++ b/arch/arm/mach-omap2/omap_l3_smx.h
@@ -1,26 +1,26 @@
1 /* 1/*
2 * OMAP3XXX L3 Interconnect Driver header 2 * OMAP3XXX L3 Interconnect Driver header
3 * 3 *
4 * Copyright (C) 2011 Texas Corporation 4 * Copyright (C) 2011 Texas Corporation
5 * Felipe Balbi <balbi@ti.com> 5 * Felipe Balbi <balbi@ti.com>
6 * Santosh Shilimkar <santosh.shilimkar@ti.com> 6 * Santosh Shilimkar <santosh.shilimkar@ti.com>
7 * sricharan <r.sricharan@ti.com> 7 * sricharan <r.sricharan@ti.com>
8 * 8 *
9 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by 10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or 11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version. 12 * (at your option) any later version.
13 * 13 *
14 * This program is distributed in the hope that it will be useful, 14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details. 17 * GNU General Public License for more details.
18 * 18 *
19 * You should have received a copy of the GNU General Public License 19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software 20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
22 * USA 22 * USA
23 */ 23 */
24#ifndef __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H 24#ifndef __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H
25#define __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H 25#define __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H
26 26
@@ -78,32 +78,32 @@ static const u64 shift = 1;
78#define L3_STATUS_0_L4EMUTA_REQ (shift << 60) 78#define L3_STATUS_0_L4EMUTA_REQ (shift << 60)
79#define L3_STATUS_0_MAD2DTA_REQ (shift << 61) 79#define L3_STATUS_0_MAD2DTA_REQ (shift << 61)
80 80
81#define L3_STATUS_0_TIMEOUT_MASK (L3_STATUS_0_MPUIA_BRST \ 81#define L3_STATUS_0_TIMEOUT_MASK (L3_STATUS_0_MPUIA_BRST \
82 | L3_STATUS_0_MPUIA_RSP \ 82 | L3_STATUS_0_MPUIA_RSP \
83 | L3_STATUS_0_IVAIA_BRST \ 83 | L3_STATUS_0_IVAIA_BRST \
84 | L3_STATUS_0_IVAIA_RSP \ 84 | L3_STATUS_0_IVAIA_RSP \
85 | L3_STATUS_0_SGXIA_BRST \ 85 | L3_STATUS_0_SGXIA_BRST \
86 | L3_STATUS_0_SGXIA_RSP \ 86 | L3_STATUS_0_SGXIA_RSP \
87 | L3_STATUS_0_CAMIA_BRST \ 87 | L3_STATUS_0_CAMIA_BRST \
88 | L3_STATUS_0_CAMIA_RSP \ 88 | L3_STATUS_0_CAMIA_RSP \
89 | L3_STATUS_0_DISPIA_BRST \ 89 | L3_STATUS_0_DISPIA_BRST \
90 | L3_STATUS_0_DISPIA_RSP \ 90 | L3_STATUS_0_DISPIA_RSP \
91 | L3_STATUS_0_DMARDIA_BRST \ 91 | L3_STATUS_0_DMARDIA_BRST \
92 | L3_STATUS_0_DMARDIA_RSP \ 92 | L3_STATUS_0_DMARDIA_RSP \
93 | L3_STATUS_0_DMAWRIA_BRST \ 93 | L3_STATUS_0_DMAWRIA_BRST \
94 | L3_STATUS_0_DMAWRIA_RSP \ 94 | L3_STATUS_0_DMAWRIA_RSP \
95 | L3_STATUS_0_USBOTGIA_BRST \ 95 | L3_STATUS_0_USBOTGIA_BRST \
96 | L3_STATUS_0_USBOTGIA_RSP \ 96 | L3_STATUS_0_USBOTGIA_RSP \
97 | L3_STATUS_0_USBHOSTIA_BRST \ 97 | L3_STATUS_0_USBHOSTIA_BRST \
98 | L3_STATUS_0_SMSTA_REQ \ 98 | L3_STATUS_0_SMSTA_REQ \
99 | L3_STATUS_0_GPMCTA_REQ \ 99 | L3_STATUS_0_GPMCTA_REQ \
100 | L3_STATUS_0_OCMRAMTA_REQ \ 100 | L3_STATUS_0_OCMRAMTA_REQ \
101 | L3_STATUS_0_OCMROMTA_REQ \ 101 | L3_STATUS_0_OCMROMTA_REQ \
102 | L3_STATUS_0_IVATA_REQ \ 102 | L3_STATUS_0_IVATA_REQ \
103 | L3_STATUS_0_SGXTA_REQ \ 103 | L3_STATUS_0_SGXTA_REQ \
104 | L3_STATUS_0_L4CORETA_REQ \ 104 | L3_STATUS_0_L4CORETA_REQ \
105 | L3_STATUS_0_L4PERTA_REQ \ 105 | L3_STATUS_0_L4PERTA_REQ \
106 | L3_STATUS_0_L4EMUTA_REQ \ 106 | L3_STATUS_0_L4EMUTA_REQ \
107 | L3_STATUS_0_MAD2DTA_REQ) 107 | L3_STATUS_0_MAD2DTA_REQ)
108 108
109#define L3_SI_FLAG_STATUS_1 0x530 109#define L3_SI_FLAG_STATUS_1 0x530
@@ -137,19 +137,19 @@ static const u64 shift = 1;
137 137
138enum omap3_l3_initiator_id { 138enum omap3_l3_initiator_id {
139 /* LCD has 1 ID */ 139 /* LCD has 1 ID */
140 OMAP_L3_LCD = 29, 140 OMAP_L3_LCD = 29,
141 /* SAD2D has 1 ID */ 141 /* SAD2D has 1 ID */
142 OMAP_L3_SAD2D = 28, 142 OMAP_L3_SAD2D = 28,
143 /* MPU has 5 IDs */ 143 /* MPU has 5 IDs */
144 OMAP_L3_IA_MPU_SS_1 = 27, 144 OMAP_L3_IA_MPU_SS_1 = 27,
145 OMAP_L3_IA_MPU_SS_2 = 26, 145 OMAP_L3_IA_MPU_SS_2 = 26,
146 OMAP_L3_IA_MPU_SS_3 = 25, 146 OMAP_L3_IA_MPU_SS_3 = 25,
147 OMAP_L3_IA_MPU_SS_4 = 24, 147 OMAP_L3_IA_MPU_SS_4 = 24,
148 OMAP_L3_IA_MPU_SS_5 = 23, 148 OMAP_L3_IA_MPU_SS_5 = 23,
149 /* IVA2.2 SS has 3 IDs*/ 149 /* IVA2.2 SS has 3 IDs*/
150 OMAP_L3_IA_IVA_SS_1 = 22, 150 OMAP_L3_IA_IVA_SS_1 = 22,
151 OMAP_L3_IA_IVA_SS_2 = 21, 151 OMAP_L3_IA_IVA_SS_2 = 21,
152 OMAP_L3_IA_IVA_SS_3 = 20, 152 OMAP_L3_IA_IVA_SS_3 = 20,
153 /* IVA 2.2 SS DMA has 6 IDS */ 153 /* IVA 2.2 SS DMA has 6 IDS */
154 OMAP_L3_IA_IVA_SS_DMA_1 = 19, 154 OMAP_L3_IA_IVA_SS_DMA_1 = 19,
155 OMAP_L3_IA_IVA_SS_DMA_2 = 18, 155 OMAP_L3_IA_IVA_SS_DMA_2 = 18,
@@ -158,25 +158,25 @@ enum omap3_l3_initiator_id {
158 OMAP_L3_IA_IVA_SS_DMA_5 = 15, 158 OMAP_L3_IA_IVA_SS_DMA_5 = 15,
159 OMAP_L3_IA_IVA_SS_DMA_6 = 14, 159 OMAP_L3_IA_IVA_SS_DMA_6 = 14,
160 /* SGX has 1 ID */ 160 /* SGX has 1 ID */
161 OMAP_L3_IA_SGX = 13, 161 OMAP_L3_IA_SGX = 13,
162 /* CAM has 3 ID */ 162 /* CAM has 3 ID */
163 OMAP_L3_IA_CAM_1 = 12, 163 OMAP_L3_IA_CAM_1 = 12,
164 OMAP_L3_IA_CAM_2 = 11, 164 OMAP_L3_IA_CAM_2 = 11,
165 OMAP_L3_IA_CAM_3 = 10, 165 OMAP_L3_IA_CAM_3 = 10,
166 /* DAP has 1 ID */ 166 /* DAP has 1 ID */
167 OMAP_L3_IA_DAP = 9, 167 OMAP_L3_IA_DAP = 9,
168 /* SDMA WR has 2 IDs */ 168 /* SDMA WR has 2 IDs */
169 OMAP_L3_SDMA_WR_1 = 8, 169 OMAP_L3_SDMA_WR_1 = 8,
170 OMAP_L3_SDMA_WR_2 = 7, 170 OMAP_L3_SDMA_WR_2 = 7,
171 /* SDMA RD has 4 IDs */ 171 /* SDMA RD has 4 IDs */
172 OMAP_L3_SDMA_RD_1 = 6, 172 OMAP_L3_SDMA_RD_1 = 6,
173 OMAP_L3_SDMA_RD_2 = 5, 173 OMAP_L3_SDMA_RD_2 = 5,
174 OMAP_L3_SDMA_RD_3 = 4, 174 OMAP_L3_SDMA_RD_3 = 4,
175 OMAP_L3_SDMA_RD_4 = 3, 175 OMAP_L3_SDMA_RD_4 = 3,
176 /* HSUSB OTG has 1 ID */ 176 /* HSUSB OTG has 1 ID */
177 OMAP_L3_USBOTG = 2, 177 OMAP_L3_USBOTG = 2,
178 /* HSUSB HOST has 1 ID */ 178 /* HSUSB HOST has 1 ID */
179 OMAP_L3_USBHOST = 1, 179 OMAP_L3_USBHOST = 1,
180}; 180};
181 181
182enum omap3_l3_code { 182enum omap3_l3_code {
@@ -192,17 +192,17 @@ enum omap3_l3_code {
192}; 192};
193 193
194struct omap3_l3 { 194struct omap3_l3 {
195 struct device *dev; 195 struct device *dev;
196 struct clk *ick; 196 struct clk *ick;
197 197
198 /* memory base*/ 198 /* memory base*/
199 void __iomem *rt; 199 void __iomem *rt;
200 200
201 int debug_irq; 201 int debug_irq;
202 int app_irq; 202 int app_irq;
203 203
204 /* true when and inband functional error occurs */ 204 /* true when and inband functional error occurs */
205 unsigned inband:1; 205 unsigned inband:1;
206}; 206};
207 207
208/* offsets for l3 agents in order with the Flag status register */ 208/* offsets for l3 agents in order with the Flag status register */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-10 22:20:00 -0500