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* drm/edid: Restore kerneldoc consistencyThierry Reding2014-12-03
| | | | | | | | | Commit 18df89fef2d5 ("drm: Decouple EDID parsing from I2C adapter") renamed the adapter parameter of the drm_do_probe_ddc_edid function to data but didn't update the kerneldoc accordingly. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/edid: new drm_edid_block_checksum helper function V3Stefan Brüns2014-12-01
| | | | | | | | | | | The function will also be used by a later patch, so factor it out. V2: make raw_edid const, define/declare before first use V3: fix erroneuos removal of csum variable Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/edid: shorten log output in case of all zeroes edid blockStefan Brüns2014-12-01
| | | | | | | | | | There is no need to dump the whole EDID block in case it contains no information. Just print a single line stating the block is empty instead of 8 lines containing only zeroes. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/edid: move drm_edid_is_zero to top, make edid argument constStefan Brüns2014-12-01
| | | | | | | | drm_edid_is_zero will be used by drm_edid_block valid, move it up. raw_edid argument can be const. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/atomic: clear plane's CRTC and FB when shutting downRob Clark2014-11-27
| | | | | | | | | | | | | | | | | | | | | | Otherwise we'd still end up w/ the plane attached to the CRTC, and seemingly active, but without an FB. Which ends up going *boom* in the drivers. Slightly modified version of Daniel's irc suggestion. Note that the big problem isn't drivers going *boom* here (since we already have the situation of planes being left enabled when the crtc goes down). The real issue is that the core assumes the primary plane always goes down when calling ->set_config with a NULL mode. Ignoring that assumption leads to the legacy state pointers plane->fb/crtc getting out of sync with atomic, and that then leads to the subsequent *boom* all over the place. CC: Daniel Vetter <daniel@ffwll.ch> Signed-off-by: Rob Clark <robdclark@gmail.com> [danvet: Drop my opinion of what's going sidewides here into the commit message as a note.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm: Handle atomic state properly in kms getfoo ioctlDaniel Vetter2014-11-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | So the problem with async commit (especially async modeset commit) is that the legacy pointers only get updated after the point of no return, in the async part of the modeset sequence. At least as implemented by the current helper functions. This is done in the set_routing_links function in drm_atomic_helper.c. Which also means that access isn't protected by locks but only coordinated by synchronizing with async workers. No problem thus far, until we lock at the getconnector/encoder ioctls. So fix this up by adding special cases for atomic drivers: For those we need to look at state objects. Unfortunately digging out the correct encoder->crtc link is a bit of work, so wrap this up in a helper function. Moving the assignments of connector->encoder and encoder->crtc earlier isn't a good idea because the point of the atomic helpers is that we stage the state updates. That way the disable functions can still inspect the links and rely upon them. v2: Extract full encoder->crtc lookup into helper (Rob). v3: Extract drm_connector_get_encoder too since - we need to always return state->best_encoder when there is a state otherwise we might return stale data if there's a pending async disable (and chase unlocked pointers, too). Same issue with encoder_get_crtc but there it's a bit more tricky to handle. Cc: Rob Clark <robdclark@gmail.com> Cc: Sean Paul <seanpaul@chromium.org> Reviewed-by: Sean Paul <seanpaul@chromium.org> Lightly-Tested-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
* drm: use mode_object_find helpersRob Clark2014-11-27
| | | | | Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm: fix indentationRob Clark2014-11-27
| | | | | Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/msm: switch to atomic-helpers iterator macrosRob Clark2014-11-27
| | | | | Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/atomic: add plane iterator macrosRob Clark2014-11-27
| | | | | | | | | | | | Add helper macros to iterate the current, or incoming set of planes attached to a crtc. These helpers are only available for drivers converted to use atomic-helpers. Signed-off-by: Rob Clark <robdclark@gmail.com> [danvet: Squash in fixup from Rob to move the planemask iterator to drm_crtc.h and document it. That one is needed by the atomic ioctl so can't be in a helper library.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/atomic: track bitmask of planes attached to crtcRob Clark2014-11-27
| | | | | | | | | | | | | | | | | | | | | | | | | Chasing plane->state->crtc of planes that are *not* part of the same atomic update is racy, making it incredibly awkward (or impossible) to do something simple like iterate over all planes and figure out which ones are attached to a crtc. Solve this by adding a bitmask of currently attached planes in the crtc-state. Note that the transitional helpers do not maintain the plane_mask. But they only support the legacy ioctls, which have sufficient brute-force locking around plane updates that they can continue to loop over all planes to see what is attached to a crtc the old way. Signed-off-by: Rob Clark <robdclark@gmail.com> [danvet: - Drop comments about locking in set_crtc_for_plane since they're a bit misleading - we already should hold lock for the current crtc. - Also WARN_ON if get_state on the old crtc fails since that should have been done already. - Squash in fixup to check get_plane_state return value, reported by Dan Carpenter and acked by Rob Clark.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm: Free atomic state during cleanupThierry Reding2014-11-25
| | | | | | | | | | | The current state of CRTCs, planes and connectors currently leaks during DRM driver ->unload() unless drivers explicitly clean it up. Since there is nothing driver-specific about it, that cleanup can be done within the DRM core. Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm: Make drm_atomic.h standalone includibleThierry Reding2014-11-25
| | | | | | | | | This header file makes use of a bunch of structures declared in the drm_crtc.h header file. Include that to make sure the drm_atomic.h header can be included standalone. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm: Make drm_atomic_helper.h standalone includibleThierry Reding2014-11-25
| | | | | | | | | | This header uses a bunch of declarations from the drm/drm_crtc.h header, so make sure to include that as well so that drm_atomic_helper.h can be included standalone. Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/plane: Add missing kerneldocThierry Reding2014-11-25
| | | | | | | | | The plane helpers aren't pulled into the DocBook yet, so these weren't noticed. Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/plane: Pass old state to ->atomic_update()Thierry Reding2014-11-25
| | | | | | | | | | | | | | | In most situations it will be useful to have the old state passed to the ->atomic_update() callback. For example if a plane is being disabled the new state's .crtc field will be NULL, but some drivers may rely on this field to program the CRTCs registers. v2: rename variable to old_plane_state and remove redundant comment as suggested by Daniel Vetter, remove an Exynos hunk that doesn't apply to drm-next and add a hunk for pending MSM mdp5 changes Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/atomic_helper: Cope with plane->crtc == NULL in disable helperJasper St. Pierre2014-11-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The drm core can call the plane disable hook multiple times, which means it can get called when plane->crtc is already NULL. That in turn means we can't get at the implicit acquire ctx we use in the atomic helpers for legacy entries points. We could try to pass drm_modeset_legacy_acquire_ctx a drm_device pointer so that it can cope with a NULL crtc. But that still doesn't work since the cursor ioctls (remapped with the universal cursor plane support code) only grabs the crtc locks. So the global acquire context isn't set eitehr. The real solution here would be to bite the bullet and wire up explicit acquire context parameters to all relevant functions. We need to do that anyway (to be able to get rid of some small allocations which we can't cope with failing). But that's a lot of work and better done once atomic has settled a bit. So meanwhile just catch this case in the helper and bail out. Signed-off-by: Jasper St. Pierre <jstpierre@mecheye.net> Reviewed-by: Rob Clark <robdclark@gmail.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> [danvet: Completely rewrite commit message and comment but keep Jasper's logic and author credits since his patch is the only short-term solution that works.] Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/atomic: Drop per-plane locking TODODaniel Vetter2014-11-25
| | | | | | | I've forgotten to remove that in my per-plane locking patch. Reported-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
* drm/atomic-helper: Skip vblank waits for unchanged fbsDaniel Vetter2014-11-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | Especially with legacy cursor ioctls existing userspace assumes that you can pile up lots of updates in one go. The super-proper way to support this would be a special commit mode which overwrites the last update. But getting there will be quite a bit of work. Meanwhile do what pretty much all the drivers have done for the plane update functions: Simply skip the vblank wait for the buffer cleanup if the buffer is the same. Since the universal cursor plane code will not recreate framebuffers needlessly this allows us to not slow down legacy pageflip events while someone moves the cursor around. v2: Drop the async plane update hunk from a previous attempt at this issue. v3: Fix up kerneldoc. v4: Don't oops so badly. Reported by Jasper. Cc: Rob Clark <robdclark@gmail.com> Cc: "Jasper St. Pierre" <jstpierre@mecheye.net> Reviewed-by: Rob Clark <robdclark@gmail.com> Reviewed-by: Jasper St. Pierre <jstpierre@mecheye.net> Tested-by: Jasper St. Pierre <jstpierre@mecheye.net> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
* drm: Document that drm_dev_alloc doesn't need a parentDaniel Vetter2014-11-25
| | | | | | Possible for purely virtual debug devices. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* Merge branch 'msm-next' of git://people.freedesktop.org/~robclark/linux into ↵Dave Airlie2014-11-25
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | drm-next Now that we have the bits needed for mdp5 atomic, here is the followup pull request I mentioned. Main highlights are: 1) mdp5 multiple crtc and public plane support (no more hard-coded mixer setup!) 2) mdp5 atomic conversion 3) couple atomic helper fixes for issues found during mdp5 atomic debug (reviewed by danvet.. but he didn't plane to send an atomic-fixes pull request so I agreed to tack them on to mine) * 'msm-next' of git://people.freedesktop.org/~robclark/linux: drm/atomic: shutdown *current* encoder drm/atomic: check mode_changed *after* atomic_check drm/msm/mdp4: fix mixer setup for multi-crtc + planes drm/msm/mdp5: dpms(OFF) cleanups drm/msm/mdp5: atomic drm/msm: atomic fixes drm/msm/mdp5: remove global mdp5_ctl_mgr drm/msm/mdp5: don't use void * for opaque types drm/msm: add multiple CRTC and overlay support drm/msm/mdp5: set rate before enabling clk drm/msm/mdp5: introduce mdp5_cfg module drm/msm/mdp5: make SMP module dynamically configurable drm/msm/hdmi: remove useless kref drm/msm/mdp5: get the core clock rate from MDP5 config drm/msm/mdp5: use irqdomains
| * drm/atomic: shutdown *current* encoderRob Clark2014-11-21
| | | | | | | | | | | | | | | | | | | | | | | | In disable_outputs() we need to shut down the outgoing encoder, not the incoming one (we have already swapped-state at this point). Without this, we end up telling the driver to crtc->dpms(OFF) without first encoder->dpms(OFF), and that makes some hw quite unhappy. v2: missing WARN_ON() hunk and comment Reviewed-by: Daniel Vetter <daniel.vetter@intel.com> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/atomic: check mode_changed *after* atomic_checkRob Clark2014-11-21
| | | | | | | | | | | | | | | | | | The intention is that drivers can set crtc_state->mode_changed in their atomic_check() fxns if they encounter a scenario that requires full modeset. Signed-off-by: Rob Clark <robdclark@gmail.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/msm/mdp4: fix mixer setup for multi-crtc + planesRob Clark2014-11-21
| | | | | | | | | | | | | | | | | | On mdp4 there is a single global LAYERMIXER_IN_CFG register. The previous logic to share that between multiple crtcs didn't actually handle plane-disable very well. Easier just to look at all of the crtcs each time. Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/mdp5: dpms(OFF) cleanupsRob Clark2014-11-21
| | | | | | | | | | | | | | | | | | | | | | When disabling the interface (INTF), the change doesn't latch until next vblank, so we need to wait for vblank. Also, to be pedantic, in the crtc, set all the mixer stages to unused. It shouldn't really matter, since at this point we have already disabled the INTF and waited for necessary vblank. Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/mdp5: atomicRob Clark2014-11-21
| | | | | | | | | | | | | | | | | | | | Convert mdp5 over to atomic helpers. Extend/wrap drm_plane_state to track plane zpos and to keep track of the needed when applying the atomic update. In mdp5's plane->atomic_check() we also need to check for updates which require SMP reallocation, in order to trigger full modeset. Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm: atomic fixesRob Clark2014-11-21
| | | | | | | | | | | | Fixes for a couple little issues found in testing. Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/mdp5: remove global mdp5_ctl_mgrRob Clark2014-11-21
| | | | | | | | | | | | | | A bit cleaner.. and won't resulting in an attempt to kfree() a static global in unload path. Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/mdp5: don't use void * for opaque typesRob Clark2014-11-21
| | | | | | | | | | | | | | | | | | For example, use 'struct mdp5_smp *' everywhere instead of 'void *', but only declare it as 'struct mdp5_smp;' in common headers, so the struct body is still private. The accomplishes the desired modularity while still letting the compiler provide some type checking for us. Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm: add multiple CRTC and overlay supportStephane Viau2014-11-21
| | | | | | | | | | | | | | | | | | MDP5 currently support one single CRTC with its private pipe. This change allows the configuration of multiple CRTCs with the possibility to attach several public planes to these CRTCs. Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/mdp5: set rate before enabling clkRob Clark2014-11-21
| | | | | | | | | | | | | | Set a "safe" rate at first, in order to read out the hw revision. And then after set the optimal value. Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/mdp5: introduce mdp5_cfg moduleStephane Viau2014-11-21
| | | | | | | | | | | | | | | | | | | | The hardware configuration modification from a version to another is quite consequent. Introducing a configuration module (mdp5_cfg) may make things more clear and easier to access when a new hardware version comes up. Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/mdp5: make SMP module dynamically configurableStephane Viau2014-11-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Shared Memory Pool (SMP) has its own limitation, features and state. Some examples are: - the number of Memory Macro Block (MMB) and their size - the number of lines that can be fetched - the state of MMB currently allocated - the computation of number of blocks required per plane - client IDs ... In order to avoid private data to be overwritten by other modules, let's make these private to the SMP module. Some of these depend on the hardware configuration, let's add them to the mdp5_config struct. In some hw configurations, some MMBs are statically tied to RGB pipes and cannot be re-allocated dynamically. This change introduces the concept of MMB static usage and makes sure that dynamic MMB requests are dimensioned accordingly. A note on passing a pipe pointer, instead of client IDs: Client IDs are SMP-related information. Passing PIPE information to SMP lets SMP module to find out which SMP client(s) are used. This allows the SMP module to access the PIPE pointer, which can be used for FIFO watermark configuration. By the way, even though REG_MDP5_PIPE_REQPRIO_FIFO_WM_* registers are part of the PIPE registers, their functionality is to reflect the behavior of the SMP block. These registers access is now restricted to the SMP module. Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/hdmi: remove useless krefRob Clark2014-11-21
| | | | | | | | | | | | | | | | | | | | A left-over from prior to component framework. The original intent was to deal with hdmi getting unloaded before the master component, but that isn't really going to work anyways. These days with the component framework taking care to unload the master component first, we don't have to worry about this. Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/mdp5: get the core clock rate from MDP5 configStephane Viau2014-11-21
| | | | | | | | | | | | | | | | | | | | | | The core clock rate depends on the hw configuration. Once we have read the hardware revision, we can set the core clock to its maximum value. Before then, the clock is set at a rate supported by all MDP5 revisions. Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/mdp5: use irqdomainsRob Clark2014-11-21
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | For mdp5, the irqs of hdmi/eDP/dsi0/dsi1 blocks get routed through the mdp block. In order to decouple hdmi/eDP/etc, register an irq domain in mdp5. When hdmi/dsi/etc are used with mdp4, they can directly setup their irqs in their DT nodes as normal. When used with mdp5, instead set the mdp device as the interrupt-parent, as in: mdp: qcom,mdss_mdp@fd900000 { compatible = "qcom,mdss_mdp"; interrupt-controller; #interrupt-cells = <1>; ... }; hdmi: qcom,hdmi_tx@fd922100 { compatible = "qcom,hdmi-tx-8074"; interrupt-parent = <&mdp>; interrupts = <8 0>; /* MDP5_HW_INTR_STATUS.INTR_HDMI */ ... }; There is a slight awkwardness, in that we cannot disable child irqs at the mdp level, they can only be cleared in the child block. So you must not use threaded irq handlers in the child. I'm not sure if there is a better way to deal with that. Signed-off-by: Rob Clark <robdclark@gmail.com>
* Merge branch 'drm-next-3.19' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie2014-11-20
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-next - More CI dpm fixes - Initial DPM fan control for SI/CI (disabled by default) - GPUVM multi-ring efficiency improvements - Some cursor fixes * 'drm-next-3.19' of git://people.freedesktop.org/~agd5f/linux: (22 commits) drm/radeon: update the VM after setting BO address v4 drm/radeon: sync PT updates as shared v2 drm/radeon: sync PD updates as shared drm/radeon: fence BO_VAs manually drm/radeon: use one VMID for each ring drm/radeon: track VM update fences separately drm/radeon: fence PT updates manually v2 drm/radeon: split semaphore and sync object handling v2 drm/radeon: remove unnecessary VM syncs drm/radeon: stop re-reserving the BO in radeon_vm_bo_set_addr drm/radeon: rework vm_flush parameters drm/radeon/ci: disable needless sclk changes drm/radeon/ci: force pcie level before sclk and mclk drm/radeon/ci: use different smc command for pcie dpm drm/radeon/ci: apply disp voltage changes before clk changes drm/radeon: fix PCC debugging message for CI DPM drm/radeon/dpm: add thermal dpm support for CI drm/radeon/dpm: add smc fan control for CI (v2) drm/radeon/dpm: add smc fan control for SI (v2) drm/radeon: work around a hw bug in MGCG on CIK ...
| * drm/radeon: update the VM after setting BO address v4Christian König2014-11-20
| | | | | | | | | | | | | | | | | | | | | | | | | | This way the necessary VM update is kicked off immediately if all BOs involved are in GPU accessible memory. v2: fix vm lock v3: immediately update unmaps as well v4: use drm_free_large instead of kfree Tested-by: Kai Wasserbäch <kai@dev.carbon-project.org> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: sync PT updates as shared v2Christian König2014-11-20
| | | | | | | | | | | | | | | | | | Only invalidating PTEs needs to be executed synchronized to using the PT. v2: fix sync to uses Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: sync PD updates as sharedChristian König2014-11-20
| | | | | | | | | | | | | | | | We never invalidate PD entries and making them valid can run with other users in parallel. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: fence BO_VAs manuallyChristian König2014-11-20
| | | | | | | | | | | | | | | | This allows us to finally remove the VM fence and so allow concurrent use of it from different engines. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: use one VMID for each ringChristian König2014-11-20
| | | | | | | | | | | | | | | | | | Use multiple VMIDs for each VM, one for each ring. That allows us to execute flushes separately on each ring, still not ideal cause in a lot of cases rings can share IDs. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: track VM update fences separatelyChristian König2014-11-20
| | | | | | | | | | | | | | | | | | Note for each fence if it's a VM page table update or not. This allows us to determine the last VM update in a sync object and so to figure out if we need to flush the TLB or not. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: fence PT updates manually v2Christian König2014-11-20
| | | | | | | | | | | | | | | | | | This allows us to add the real execution fence as shared. v2: fix typo Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: split semaphore and sync object handling v2Christian König2014-11-20
| | | | | | | | | | | | | | | | | | | | | | | | Previously we just allocated space for four hardware semaphores in each software semaphore object. Make software semaphore objects represent only one hardware semaphore address again by splitting the sync code into it's own object. v2: fix typo in comment Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: remove unnecessary VM syncsChristian König2014-11-20
| | | | | | | | | | | | | | The PD/PTs reservation object now contains everything needed. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: stop re-reserving the BO in radeon_vm_bo_set_addrChristian König2014-11-20
| | | | | | | | | | | | | | | | That's useless when all callers drop the reservation immediately after calling the function. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon: rework vm_flush parametersChristian König2014-11-20
| | | | | | | | | | | | | | Use ring structure instead of index and provide vm_id and pd_addr separately. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon/ci: disable needless sclk changesAlex Deucher2014-11-20
| | | | | | | | | | | | | | | | The current code always reprogrammed the sclk levels, but we don't currently handle disp sclk requirements so just skip it. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/radeon/ci: force pcie level before sclk and mclkAlex Deucher2014-11-20
| | | | | | | | | | | | Preferred ordering. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-03 11:37:45 -0500