diff options
author | Christian König <christian.koenig@amd.com> | 2014-11-19 08:01:23 -0500 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2014-11-20 13:00:16 -0500 |
commit | 587cdda8f739f4c57c91d3f73a1d5b2851a86cb8 (patch) | |
tree | b3ea73b6ddc684ce75c97ec4e4ba0cb4c9eeee3a | |
parent | 975700d2cc84408efa9b2360e38b1ab95368556f (diff) |
drm/radeon: fence PT updates manually v2
This allows us to add the real execution fence as shared.
v2: fix typo
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_object.c | 19 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_object.h | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_vm.c | 65 |
3 files changed, 62 insertions, 24 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c index 33e6c7a89c32..686e450199c5 100644 --- a/drivers/gpu/drm/radeon/radeon_object.c +++ b/drivers/gpu/drm/radeon/radeon_object.c | |||
@@ -818,3 +818,22 @@ int radeon_bo_wait(struct radeon_bo *bo, u32 *mem_type, bool no_wait) | |||
818 | ttm_bo_unreserve(&bo->tbo); | 818 | ttm_bo_unreserve(&bo->tbo); |
819 | return r; | 819 | return r; |
820 | } | 820 | } |
821 | |||
822 | /** | ||
823 | * radeon_bo_fence - add fence to buffer object | ||
824 | * | ||
825 | * @bo: buffer object in question | ||
826 | * @fence: fence to add | ||
827 | * @shared: true if fence should be added shared | ||
828 | * | ||
829 | */ | ||
830 | void radeon_bo_fence(struct radeon_bo *bo, struct radeon_fence *fence, | ||
831 | bool shared) | ||
832 | { | ||
833 | struct reservation_object *resv = bo->tbo.resv; | ||
834 | |||
835 | if (shared) | ||
836 | reservation_object_add_shared_fence(resv, &fence->base); | ||
837 | else | ||
838 | reservation_object_add_excl_fence(resv, &fence->base); | ||
839 | } | ||
diff --git a/drivers/gpu/drm/radeon/radeon_object.h b/drivers/gpu/drm/radeon/radeon_object.h index 1b8ec7917154..3b0b377f76cb 100644 --- a/drivers/gpu/drm/radeon/radeon_object.h +++ b/drivers/gpu/drm/radeon/radeon_object.h | |||
@@ -155,6 +155,8 @@ extern void radeon_bo_move_notify(struct ttm_buffer_object *bo, | |||
155 | struct ttm_mem_reg *new_mem); | 155 | struct ttm_mem_reg *new_mem); |
156 | extern int radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo); | 156 | extern int radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo); |
157 | extern int radeon_bo_get_surface_reg(struct radeon_bo *bo); | 157 | extern int radeon_bo_get_surface_reg(struct radeon_bo *bo); |
158 | extern void radeon_bo_fence(struct radeon_bo *bo, struct radeon_fence *fence, | ||
159 | bool shared); | ||
158 | 160 | ||
159 | /* | 161 | /* |
160 | * sub allocation | 162 | * sub allocation |
diff --git a/drivers/gpu/drm/radeon/radeon_vm.c b/drivers/gpu/drm/radeon/radeon_vm.c index 20ef8263d970..4ca2779ed828 100644 --- a/drivers/gpu/drm/radeon/radeon_vm.c +++ b/drivers/gpu/drm/radeon/radeon_vm.c | |||
@@ -143,7 +143,7 @@ struct radeon_cs_reloc *radeon_vm_get_bos(struct radeon_device *rdev, | |||
143 | list[0].prefered_domains = RADEON_GEM_DOMAIN_VRAM; | 143 | list[0].prefered_domains = RADEON_GEM_DOMAIN_VRAM; |
144 | list[0].allowed_domains = RADEON_GEM_DOMAIN_VRAM; | 144 | list[0].allowed_domains = RADEON_GEM_DOMAIN_VRAM; |
145 | list[0].tv.bo = &vm->page_directory->tbo; | 145 | list[0].tv.bo = &vm->page_directory->tbo; |
146 | list[0].tv.shared = false; | 146 | list[0].tv.shared = true; |
147 | list[0].tiling_flags = 0; | 147 | list[0].tiling_flags = 0; |
148 | list[0].handle = 0; | 148 | list[0].handle = 0; |
149 | list_add(&list[0].tv.head, head); | 149 | list_add(&list[0].tv.head, head); |
@@ -157,7 +157,7 @@ struct radeon_cs_reloc *radeon_vm_get_bos(struct radeon_device *rdev, | |||
157 | list[idx].prefered_domains = RADEON_GEM_DOMAIN_VRAM; | 157 | list[idx].prefered_domains = RADEON_GEM_DOMAIN_VRAM; |
158 | list[idx].allowed_domains = RADEON_GEM_DOMAIN_VRAM; | 158 | list[idx].allowed_domains = RADEON_GEM_DOMAIN_VRAM; |
159 | list[idx].tv.bo = &list[idx].robj->tbo; | 159 | list[idx].tv.bo = &list[idx].robj->tbo; |
160 | list[idx].tv.shared = false; | 160 | list[idx].tv.shared = true; |
161 | list[idx].tiling_flags = 0; | 161 | list[idx].tiling_flags = 0; |
162 | list[idx].handle = 0; | 162 | list[idx].handle = 0; |
163 | list_add(&list[idx++].tv.head, head); | 163 | list_add(&list[idx++].tv.head, head); |
@@ -388,35 +388,25 @@ static void radeon_vm_set_pages(struct radeon_device *rdev, | |||
388 | static int radeon_vm_clear_bo(struct radeon_device *rdev, | 388 | static int radeon_vm_clear_bo(struct radeon_device *rdev, |
389 | struct radeon_bo *bo) | 389 | struct radeon_bo *bo) |
390 | { | 390 | { |
391 | struct ttm_validate_buffer tv; | ||
392 | struct ww_acquire_ctx ticket; | ||
393 | struct list_head head; | ||
394 | struct radeon_ib ib; | 391 | struct radeon_ib ib; |
395 | unsigned entries; | 392 | unsigned entries; |
396 | uint64_t addr; | 393 | uint64_t addr; |
397 | int r; | 394 | int r; |
398 | 395 | ||
399 | memset(&tv, 0, sizeof(tv)); | 396 | r = radeon_bo_reserve(bo, false); |
400 | tv.bo = &bo->tbo; | 397 | if (r) |
401 | tv.shared = false; | ||
402 | |||
403 | INIT_LIST_HEAD(&head); | ||
404 | list_add(&tv.head, &head); | ||
405 | |||
406 | r = ttm_eu_reserve_buffers(&ticket, &head, true); | ||
407 | if (r) | ||
408 | return r; | 398 | return r; |
409 | 399 | ||
410 | r = ttm_bo_validate(&bo->tbo, &bo->placement, true, false); | 400 | r = ttm_bo_validate(&bo->tbo, &bo->placement, true, false); |
411 | if (r) | 401 | if (r) |
412 | goto error; | 402 | goto error_unreserve; |
413 | 403 | ||
414 | addr = radeon_bo_gpu_offset(bo); | 404 | addr = radeon_bo_gpu_offset(bo); |
415 | entries = radeon_bo_size(bo) / 8; | 405 | entries = radeon_bo_size(bo) / 8; |
416 | 406 | ||
417 | r = radeon_ib_get(rdev, R600_RING_TYPE_DMA_INDEX, &ib, NULL, 256); | 407 | r = radeon_ib_get(rdev, R600_RING_TYPE_DMA_INDEX, &ib, NULL, 256); |
418 | if (r) | 408 | if (r) |
419 | goto error; | 409 | goto error_unreserve; |
420 | 410 | ||
421 | ib.length_dw = 0; | 411 | ib.length_dw = 0; |
422 | 412 | ||
@@ -426,15 +416,15 @@ static int radeon_vm_clear_bo(struct radeon_device *rdev, | |||
426 | 416 | ||
427 | r = radeon_ib_schedule(rdev, &ib, NULL, false); | 417 | r = radeon_ib_schedule(rdev, &ib, NULL, false); |
428 | if (r) | 418 | if (r) |
429 | goto error; | 419 | goto error_free; |
430 | 420 | ||
431 | ttm_eu_fence_buffer_objects(&ticket, &head, &ib.fence->base); | 421 | radeon_bo_fence(bo, ib.fence, false); |
432 | radeon_ib_free(rdev, &ib); | ||
433 | 422 | ||
434 | return 0; | 423 | error_free: |
424 | radeon_ib_free(rdev, &ib); | ||
435 | 425 | ||
436 | error: | 426 | error_unreserve: |
437 | ttm_eu_backoff_reservation(&ticket, &head); | 427 | radeon_bo_unreserve(bo); |
438 | return r; | 428 | return r; |
439 | } | 429 | } |
440 | 430 | ||
@@ -707,6 +697,7 @@ int radeon_vm_update_page_directory(struct radeon_device *rdev, | |||
707 | radeon_ib_free(rdev, &ib); | 697 | radeon_ib_free(rdev, &ib); |
708 | return r; | 698 | return r; |
709 | } | 699 | } |
700 | radeon_bo_fence(pd, ib.fence, false); | ||
710 | radeon_fence_unref(&vm->fence); | 701 | radeon_fence_unref(&vm->fence); |
711 | vm->fence = radeon_fence_ref(ib.fence); | 702 | vm->fence = radeon_fence_ref(ib.fence); |
712 | radeon_fence_unref(&vm->last_flush); | 703 | radeon_fence_unref(&vm->last_flush); |
@@ -863,6 +854,31 @@ static void radeon_vm_update_ptes(struct radeon_device *rdev, | |||
863 | } | 854 | } |
864 | 855 | ||
865 | /** | 856 | /** |
857 | * radeon_vm_fence_pts - fence page tables after an update | ||
858 | * | ||
859 | * @vm: requested vm | ||
860 | * @start: start of GPU address range | ||
861 | * @end: end of GPU address range | ||
862 | * @fence: fence to use | ||
863 | * | ||
864 | * Fence the page tables in the range @start - @end (cayman+). | ||
865 | * | ||
866 | * Global and local mutex must be locked! | ||
867 | */ | ||
868 | static void radeon_vm_fence_pts(struct radeon_vm *vm, | ||
869 | uint64_t start, uint64_t end, | ||
870 | struct radeon_fence *fence) | ||
871 | { | ||
872 | unsigned i; | ||
873 | |||
874 | start >>= radeon_vm_block_size; | ||
875 | end >>= radeon_vm_block_size; | ||
876 | |||
877 | for (i = start; i <= end; ++i) | ||
878 | radeon_bo_fence(vm->page_tables[i].bo, fence, false); | ||
879 | } | ||
880 | |||
881 | /** | ||
866 | * radeon_vm_bo_update - map a bo into the vm page table | 882 | * radeon_vm_bo_update - map a bo into the vm page table |
867 | * | 883 | * |
868 | * @rdev: radeon_device pointer | 884 | * @rdev: radeon_device pointer |
@@ -973,6 +989,7 @@ int radeon_vm_bo_update(struct radeon_device *rdev, | |||
973 | radeon_ib_free(rdev, &ib); | 989 | radeon_ib_free(rdev, &ib); |
974 | return r; | 990 | return r; |
975 | } | 991 | } |
992 | radeon_vm_fence_pts(vm, bo_va->it.start, bo_va->it.last + 1, ib.fence); | ||
976 | radeon_fence_unref(&vm->fence); | 993 | radeon_fence_unref(&vm->fence); |
977 | vm->fence = radeon_fence_ref(ib.fence); | 994 | vm->fence = radeon_fence_ref(ib.fence); |
978 | radeon_ib_free(rdev, &ib); | 995 | radeon_ib_free(rdev, &ib); |