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* pinctrl/abx500: add AB9540 sub-driverPatrice Chotard2013-02-05
| | | | | | | | | | | | | Add AB9540 sub driver to the ABx500 family, pins, pin groups and gpio range. As the pin controller (also the ABx500 controllers) is an inherent part of the SoC and will prevent boot if not available, select this from the Ux500 SoC Kconfig. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl/abx500: add AB8505 sub-driverPatrice Chotard2013-02-05
| | | | | | | | | | | | Add AB8505 sub driver to the ABx5x family. As the pin controller (also the ABx500 controllers) is an inherent part of the SoC and will prevent boot if not available, select this from the Ux500 SoC Kconfig. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl/abx500: add AB8500 sub-driverPatrice Chotard2013-01-30
| | | | | | | | | | | | This adds a subdriver for the AB8500 pinctrl portions. As the pin controller (also the ABx500 controllers) is an inherent part of the SoC and will prevent boot if not available, select this from the Ux500 SoC Kconfig. Acked-by: Olof Johansson <olof@lixom.net> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: add abx500 pinctrl driver corePatrice Chotard2013-01-30
| | | | | | | | | | | This adds the AB8500 core driver, which will be utilized by the follow-on drivers for different ABx500 variants. Sselect the driver from the DBX500_SOC, as this chip is powering and clocking that SoC. Cc: Samuel Ortiz <sameo@linux.intel.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: delete AB8500 driverLinus Walleij2013-01-30
| | | | | | | | The AB8500 GPIO driver has been marked BROKEN for ages, and we have something better in store: a shiny new pinctrl driver. So let use delete this old driver as the first step. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* mfd: ab8500: update header file and version detectionLinus Walleij2013-01-30
| | | | | | | | | This updates the AB8500 register map with defines for a few new chip variants and adds version detection helpers to handle the different variants. Acked-by: Samuel Ortiz <sameo@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: ux500: select the DB8540 pin controllerLinus Walleij2013-01-30
| | | | | | | | | The pin controller is an inherent part of the SoC, without it the system will not boot, thus it needs to be selected from Kconfig. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: ux500: correct typo in pinctrl Device Tree nodeLee Jones2013-01-30
| | | | | | | The preference is to use '-' instead of '_' in compatible strings. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: core: Make pinctrl_release staticSachin Kamat2013-01-30
| | | | | | | | | | | 'pinctrl_release' is used only in this file. Hence make it static. Without this patch we get the following sparse error: drivers/pinctrl/core.c:815:6: warning: symbol 'pinctrl_release' was not declared. Should it be static? Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* drivers/pinctrl: grab default handles from device coreLinus Walleij2013-01-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This makes the device core auto-grab the pinctrl handle and set the "default" (PINCTRL_STATE_DEFAULT) state for every device that is present in the device model right before probe. This will account for the lion's share of embedded silicon devcies. A modification of the semantics for pinctrl_get() is also done: previously if the pinctrl handle for a certain device was already taken, the pinctrl core would return an error. Now, since the core may have already default-grabbed the handle and set its state to "default", if the handle was already taken, this will be disregarded and the located, previously instanitated handle will be returned to the caller. This way all code in drivers explicitly requesting their pinctrl handlers will still be functional, and drivers that want to explicitly retrieve and switch their handles can still do that. But if the desired functionality is just boilerplate of this type in the probe() function: struct pinctrl *p; p = devm_pinctrl_get_select_default(&dev); if (IS_ERR(p)) { if (PTR_ERR(p) == -EPROBE_DEFER) return -EPROBE_DEFER; dev_warn(&dev, "no pinctrl handle\n"); } The discussion began with the addition of such boilerplate to the omap4 keypad driver: http://marc.info/?l=linux-input&m=135091157719300&w=2 A previous approach using notifiers was discussed: http://marc.info/?l=linux-kernel&m=135263661110528&w=2 This failed because it could not handle deferred probes. This patch alone does not solve the entire dilemma faced: whether code should be distributed into the drivers or if it should be centralized to e.g. a PM domain. But it solves the immediate issue of the addition of boilerplate to a lot of drivers that just want to grab the default state. As mentioned, they can later explicitly retrieve the handle and set different states, and this could as well be done by e.g. PM domains as it is only related to a certain struct device * pointer. ChangeLog v4->v5 (Stephen): - Simplified the devicecore grab code. - Deleted a piece of documentation recommending that pins be mapped to a device rather than hogged. ChangeLog v3->v4 (Linus): - Drop overzealous NULL checks. - Move kref initialization to pinctrl_create(). - Seeking Tested-by from Stephen Warren so we do not disturb the Tegra platform. - Seeking ACK on this from Greg (and others who like it) so I can merge it through the pinctrl subsystem. ChangeLog v2->v3 (Linus): - Abstain from using IS_ERR_OR_NULL() in the driver core, Russell recently sent a patch to remove it. Handle the NULL case explicitly even though it's a bogus case. - Make sure we handle probe deferral correctly in the device core file. devm_kfree() the container on error so we don't waste memory for devices without pinctrl handles. - Introduce reference counting into the pinctrl core using <linux/kref.h> so that we don't release pinctrl handles that have been obtained for two or more places. ChangeLog v1->v2 (Linus): - Only store a pointer in the device struct, and only allocate this if it's really used by the device. Cc: Felipe Balbi <balbi@ti.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Mitch Bradley <wmb@firmworks.com> Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: Rafael J. Wysocki <rjw@sisk.pl> Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Rickard Andersson <rickard.andersson@stericsson.com> Cc: Russell King <linux@arm.linux.org.uk> Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> [swarren: fixed and simplified error-handling in pinctrl_bind_pins(), to correctly handle deferred probe. Removed admonition from docs not to use pinctrl hogs for devices] Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: generic: add slew rate config parameterHaojian Zhuang2013-01-21
| | | | | | | Add PIN_CONFIG_SLEW_RATE parameter into pinconf-generic driver. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: use pinctrl device name for add rangeHaojian Zhuang2013-01-21
| | | | | | | | gpiochip_add_pin_range() needs pinctrl device name as parameter. Currently the parameter is pinctrl description name. So fix it. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: core: get devname from pinctrl_devHaojian Zhuang2013-01-21
| | | | | | | | | Add new function to get devname from pinctrl_dev. pinctrl_dev_get_name() can only get pinctrl description name. If we want to use gpio driver to find pinctrl device node, we need to fetch the pinctrl device name. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: nomadik: Allow prcm_base to be extracted from Device TreeLee Jones2013-01-18
| | | | | | | | | | | | | | | | | | The Nomadik Pinctrl driver requires access to some PRCMU registers in order to run with full functionality. When Device Tree is disabled the required PRCMU base address is passed in via platform data, so in order for Device Tree booting to be as functional, we need a similar mechanism to fetch it from Device Tree. The new semantics goes like this: Parse the Device Tree and look for the PRCMU node using a provided Phandle. Obtain the ioremaped address from that node. If one was supplied via platform data over-write it with anything found in Device Tree. Fail if either the prcm_base can't be found if we're running on anything other than an STN8815 ASIC. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: ux500: Provide a link from AB8500 Pinctrl to the PRCMULee Jones2013-01-18
| | | | | | | | | | | | | The AB8500 Pinctrl driver uses PRCMU register addresses to control Pinctrl related functions. For this to happen, the Pinctrl driver needs the PRCMU base to work from. We can do that using standard Open Firmware (of_*) function calls, but first we need a mechanism to gain access to the PRCMU device node. We're going to use a Phandle in this case. Signed-off-by: Lee Jones <lee.jones@linaro.org> [Added reg-names="prcmu"; to the prcmu DT node] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: exynos: change PINCTRL_EXYNOS optionKukjin Kim2013-01-18
| | | | | | | | | | | Since pinctrl-exynos can support exynos4 and exynos5 so changed the option name to PINCTRL_EXYNOS for more clarity. Cc: Thomas Abraham <Thomas.abraham@linaro.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: pinconf-generic: add drive strength parameterMaxime Ripard2013-01-18
| | | | | | | | | | Some pin configurations IP allows to set the current output to the pin. This patch adds such a parameter to the pinconf-generic mechanism. This parameter takes as argument the drive strength in mA. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: tegra114: add pinctrl driver for NVIDIA's Tegra114 SoCPritesh Raithatha2013-01-18
| | | | | | | | | | | | | | | | | | | | | | This adds a driver for the Tegra114 pinmux, and required parameterization data for Tegra114. The driver uses the common Tegra pincontrol driver utility functions to implement the majority of the driver. This driver is not compatible with the earlier NVIDIA's SoCs, hence add new compatibile as "nvidia,tegra114-pinmux". Originally written by Pritesh. ldewangan: - cleanup the patches, - remove non-require tables. - Use module_platform_driver() for driver registartion. Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: tegra: add support for rcv-sel and drive typePritesh Raithatha2013-01-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | NVIDIA's Tegra114 added two more configuration parameter in pinmux i.e. rcv-sel and drive type. rcv-sel: Select between High and Normal VIL/VIH receivers. RCVR_SEL=1: High VIL/VIH RCVR_SEL=0: Normal VIL/VIH drv_type: Ouptput drive type: 33-50 ohm driver: 0x1 66-100ohm driver: 0x0 Add support of these parameters to be configure from DTS file. Tegra20 and Tegra30 does not support this configuration and hence initialize their pinmux structure with reg = -1. Originally written by Pritesh Raithatha. Changes by ldewangan: - remove drvtype_width as it is always 2. - Better describe the change. Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: do not defer device tree hogsLinus Walleij2013-01-11
| | | | | | | | | | | | commit af1024e0f7cde9023ddd0f3116db03911d5914c0 "pinctrl: skip deferral of hogs" Attempts to avoid probe deferral on hogged pins, but we forgot the device tree case. This patch fixes this. Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reported-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl/nomadik: add device tree supportGabriel Fernandez2013-01-11
| | | | | | | | | | This implements pin multiplexing and pin configuration for the Nomadik pin controller using the device tree. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@stericsson.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Philippe Langlais <philippe.langlais@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl/nomadik: simplify GPIO probeLinus Walleij2013-01-11
| | | | | | | | | Instead of jumping to a label later in the probe just return with an error code whenever probe() fails. Make sure to remove the gpiochip on irqdomain error now that we're at it. Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl/nomadik: make independent of <mach/irqs.h>Linus Walleij2013-01-11
| | | | | | | | | | Some leftovers in the driver were using NOMADIK_* macros to translate the irq numbers to offsets, while the first base IRQ was already being passed from platform data, and the function setting the disable mask could just as well use the irqdomain. Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: add pinconf-generic defines for outputLinus Walleij2013-01-11
| | | | | | | | | | | | | | | This adds a definition of a generic output configuration for a certain pin when using the generic pin configuration library. Whereas driving pins low/high is usually a GPIO business, you may want to set up pins into a default state using hogs, and never touch them again. This helps out with that scenario. Based on a patch from Patrice Chotard. Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl/nomadik: adopt pinctrl sleep mode managementJulien Delacou2013-01-11
| | | | | | | | | | This fix makes pinctrl-nomadik able to handle suspend/resume events and change hogged pins states accordingly. Signed-off-by: Julien Delacou <julien.delacou@stericsson.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: add sleep mode management for hogsJulien Delacou2013-01-11
| | | | | | | | | | | This fix allows handling sleep mode for hogged pins in pinctrl. It provides functions to set pins to sleep/default configurations according to their current state. Signed-off-by: Julien Delacou <julien.delacou@stericsson.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: skip deferral of hogsLinus Walleij2013-01-11
| | | | | | | | | | | | | | | | Up until now, as hogs were always taken at the end of the pin control device registration, it didn't cause any problem. But when starting to hog pins from the device core it will cause deferral of the pin controller device itself since the default pin fetch is done *before* the device probes, so let's fix this annoyance (which is also aesthetically ugly). Also take some care to make sure that if any one map entry results in a deferral rather than a failure, then that deferral will take precedence. Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Linux 3.8-rc3Linus Torvalds2013-01-09
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* Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-armLinus Torvalds2013-01-09
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM fixes from Russell King. * 'fixes' of git://git.linaro.org/people/rmk/linux-arm: ARM: 7616/1: cache-l2x0: aurora: Use writel_relaxed instead of writel ARM: 7615/1: cache-l2x0: aurora: Invalidate during clean operation with WT enable ARM: 7614/1: mm: fix wrong branch from Cortex-A9 to PJ4b ARM: 7612/1: imx: Do not select some errata that depends on !ARCH_MULTIPLATFORM ARM: 7611/1: VIC: fix bug in VIC irqdomain code ARM: 7610/1: versatile: bump IRQ numbers ARM: 7609/1: disable errata work-arounds which access secure registers ARM: 7608/1: l2x0: Only set .set_debug on PL310 r3p0 and earlier
| * ARM: 7616/1: cache-l2x0: aurora: Use writel_relaxed instead of writelGregory CLEMENT2013-01-07
| | | | | | | | | | | | | | | | | | | | | | The use of writel instead of writel_relaxed lead to deadlock in some situation (SMP on Armada 370 for instance). The use of writel_relaxed as it was done in the rest of this driver fixes this bug. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7615/1: cache-l2x0: aurora: Invalidate during clean operation with WT ↵Gregory CLEMENT2013-01-07
| | | | | | | | | | | | | | | | | | | | | | | | | | enable This patch fixes a bug for Aurora L2 cache controller when the write-through mode is enable. For the clean operation even if we don't have to flush the lines we still need to invalidate them. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7614/1: mm: fix wrong branch from Cortex-A9 to PJ4bHaojian Zhuang2013-01-06
| | | | | | | | | | | | | | | | | | | | | | If CONFIG_ARCH_MULTIPLATFORM & CONFIG_ARCH_MVEBU are both enabled, __v7_pj4b_setup is added between __v7_ca9mp_setup and __v7_setup. But there's no jump instruction added. If the chip is Cortex A5/A9, it goes through __v7_pj4b_setup also. It results in system hang. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7612/1: imx: Do not select some errata that depends on !ARCH_MULTIPLATFORMFabio Estevam2013-01-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 62e4d357a (ARM: 7609/1: disable errata work-arounds which access secure registers) ARM_ERRATA_743622/751472 depends on !ARCH_MULTIPLATFORM. Since imx has been converted to multiplatform, the following warning happens: $ make imx_v6_v7_defconfig warning: (SOC_IMX6Q && ARCH_TEGRA_2x_SOC && ARCH_TEGRA_3x_SOC) selects ARM_ERRATA_751472 which has unmet direct dependencies (CPU_V7 && !ARCH_MULTIPLATFORM) warning: (SOC_IMX6Q && ARCH_TEGRA_3x_SOC) selects ARM_ERRATA_743622 which has unmet direct dependencies (CPU_V7 && !ARCH_MULTIPLATFORM) warning: (SOC_IMX6Q && ARCH_TEGRA_3x_SOC) selects ARM_ERRATA_743622 which has unmet direct dependencies (CPU_V7 && !ARCH_MULTIPLATFORM) warning: (SOC_IMX6Q && ARCH_TEGRA_2x_SOC && ARCH_TEGRA_3x_SOC) selects ARM_ERRATA_751472 which has unmet direct dependencies (CPU_V7 && !ARCH_MULTIPLATFORM) Recommended approach is to remove ARM_ERRATA_743622/751472 from being selected by SOC_IMX6Q and apply such workarounds into the bootloader. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7611/1: VIC: fix bug in VIC irqdomain codeLinus Walleij2013-01-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The VIC irqdomain code added in commit 07c9249f1fa90cc8189bed44c0bcece664596a72 "ARM: 7554/1: VIC: use irq_domain_add_simple()" Had two bugs: 1) It didn't call irq_create_mapping() once on each valid irq source in the slowpath when registering the controller. 2) It passed a -1 as IRQ offset for the DT case, whereas 0 should be passed as invalid IRQ instead. Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7610/1: versatile: bump IRQ numbersLinus Walleij2013-01-02
| | | | | | | | | | | | | | | | | | | | The Versatile starts to register Linux IRQ numbers from offset 0 which is illegal, since this is NO_IRQ. Bump all hard-coded IRQs by 32 to get rid of the problem. Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7609/1: disable errata work-arounds which access secure registersRob Herring2013-01-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to support secure and non-secure platforms in multi-platform kernels, errata work-arounds that access secure only registers need to be disabled. Make all the errata options that fit in this category depend on !CONFIG_ARCH_MULTIPLATFORM. This will effectively remove the errata options as platforms are converted over to multi-platform. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 7608/1: l2x0: Only set .set_debug on PL310 r3p0 and earlierRob Herring2013-01-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | PL310 errata work-arounds using .set_debug function are only needed on r3p0 and earlier, so check the rev and only set .set_debug on older revs. Avoiding debug register accesses fixes aborts on non-secure platforms like highbank. It is assumed that non-secure platforms needing these work-arounds have already implemented .set_debug with secure monitor calls. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | Merge tag 'edac_fixes_for_3.8' of ↵Linus Torvalds2013-01-09
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp Pull EDAC fixes from Borislav Petkov: "Two error path fixes causing a crash and a Kconfig fix for an issue which spilled all EDAC suboptions into the 'Device Drivers' menu." * tag 'edac_fixes_for_3.8' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: EDAC: Cleanup device deregistering path EDAC: Fix EDAC Kconfig menu EDAC: Fix kernel panic on module unloading
| * | EDAC: Cleanup device deregistering pathLans Zhang2013-01-07
| | | | | | | | | | | | | | | | | | | | | | | | Use device_unregister to replace put_device + device_del for cleanup, and fix the potential use after free. Signed-off-by: Lans Zhang <jia.zhang@windriver.com> Signed-off-by: Borislav Petkov <bp@alien8.de>
| * | EDAC: Fix EDAC Kconfig menuBorislav Petkov2013-01-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After f65aad41772f("MIPS: Cavium: Add EDAC support."), when entering the "Device Drivers" toplevel menu in menuconfig, the suboptions behind EDAC appeared merged with the rest of the device drivers types. This was because the menuconfig option EDAC is querying an EDAC_SUPPORT Kconfig bool which was defined after the menu definition. When pushing EDAC_SUPPORT up, before the menu definition, the variable is defined earlier and the above menuconfig artifact doesn't happen. Drop a useless menuconfig comment while at it. Cc: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Borislav Petkov <bp@alien8.de>
| * | EDAC: Fix kernel panic on module unloadingKonstantin Khlebnikov2013-01-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes use-after-free and double-free bugs in edac_mc_sysfs_exit(). mci_pdev has single reference and put_device() calls mc_attr_release() which calls kfree(). The following device_del() works with already released memory. An another kfree() in edac_mc_sysfs_exit() releses the same memory again. Great. Signed-off-by: Konstantin Khlebnikov <khlebnikov@openvz.org> Cc: stable@vger.kernel.org # 3.[67] Cc: Denis Kirjanov <kirjanov@gmail.com> Cc: Mauro Carvalho Chehab <mchehab@redhat.com> Link: http://lkml.kernel.org/r/20121214110310.11019.21098.stgit@zurg Signed-off-by: Borislav Petkov <bp@alien8.de>
* | | mm: reinstante dropped pmd_trans_splitting() checkLinus Torvalds2013-01-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The check for a pmd being in the process of being split was dropped by mistake by commit d10e63f29488 ("mm: numa: Create basic numa page hinting infrastructure"). Put it back. Reported-by: Dave Jones <davej@redhat.com> Debugged-by: Hillf Danton <dhillf@gmail.com> Acked-by: Andrea Arcangeli <aarcange@redhat.com> Acked-by: Mel Gorman <mgorman@suse.de> Cc: Kirill Shutemov <kirill@shutemov.name> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | cred: Remove tgcred pointer from struct credMarc Dionne2013-01-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 3a50597de863 ("KEYS: Make the session and process keyrings per-thread") removed the definition of the thread_group_cred structure, but left a now unused pointer in struct cred. Signed-off-by: Marc Dionne <marc.c.dionne@gmail.com> Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | Merge tag 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds2013-01-08
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM SoC fixes from Olof Johansson: "People are back from the holiday breaks, and it shows. Here are a bunch of fixes for a number of platforms: - A couple of small fixes for Nomadik - A larger set of changes for kirkwood/mvebu - uart driver selection, dt clocks, gpio-poweroff fixups, a few __init annotation fixes and some error handling improvement in their xor dma driver. - i.MX had a couple of minor fixes (and a critical one for flexcan2 clock setup) - MXS has a small board fix and a framebuffer bugfix - A set of fixes for Samsung Exynos, fixing default bootargs and some Exynos5440 clock issues - A set of OMAP changes including PM fixes and a few sparse warning fixups All in all a bit more positive code delta than we'd ideally want to see here, mostly from the OMAP PM changes, but nothing overly crazy." * tag 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (44 commits) ARM: clps711x: Fix bad merge of clockevents setup ARM: highbank: save and restore L2 cache and GIC on suspend ARM: highbank: add a power request clear ARM: highbank: fix secondary boot and hotplug ARM: highbank: fix typos with hignbank in power request functions ARM: dts: fix highbank cpu mpidr values ARM: dts: add device_type prop to cpu nodes on Calxeda platforms ARM: mx5: Fix MX53 flexcan2 clock ARM: OMAP2+: am33xx-hwmod: Fix wrongly terminated am33xx_usbss_mpu_irqs array pinctrl: mvebu: make pdma clock on dove mandatory ARM: Dove: Add pinctrl clock to DT dma: mv_xor: fix error handling for clocks dma: mv_xor: fix error handling of mv_xor_channel_add() arm: mvebu: Add missing ; for cpu node. arm: mvebu: Armada XP MV78230 has only three Ethernet interfaces arm: mvebu: Armada XP MV78230 has two cores, not one clk: mvebu: Remove inappropriate __init tagging ARM: Kirkwood: Use fixed-regulator instead of board gpio call ARM: Kirkwood: Fix missing sdio clock ARM: Kirkwood: Switch TWSI1 of 88f6282 to DT clock providers ...
| * \ \ Merge tag 'omap-for-v3.8-rc2/fixes-signed-v2' of ↵Olof Johansson2013-01-08
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes From Tony Lindgren: The biggest change is a fix to deal with different power state on omap2 registers that causes issues trying to use common PM code. Also fix few incorrect registers, and an issue for omap1 USB, and few sparse fixes for issues that sneaked in with all the clean-up. * tag 'omap-for-v3.8-rc2/fixes-signed-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: am33xx-hwmod: Fix wrongly terminated am33xx_usbss_mpu_irqs array ARM: OMAP1: fix USB configuration use-after-release ARM: OMAP2/3: PRM: fix bogus OMAP2xxx powerstate return values ARM: OMAP3: clock data: Add missing enable/disable for EMU clock ARM: OMAP4: PRM: Correct wrong instance usage for reading reset sources ARM: OMAP4: PRM: fix RSTTIME and RSTST offsets ARM: OMAP4: PRM: Correct reset source map ARM: OMAP: SRAM: resolve sparse warnings ARM: OMAP AM33xx: hwmod data: resolve sparse warnings ARM: OMAP: 32k counter: resolve sparse warnings Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | ARM: OMAP2+: am33xx-hwmod: Fix wrongly terminated am33xx_usbss_mpu_irqs arrayPantelis Antoniou2013-01-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The IRQ array must be terminated by -1 and not by -1+OMAP_INTC_START This led to having a resource list of 100s of IRQs. Looks like this was caused by commit a2cfc509 (ARM: OMAP3+: hwmod: Add AM33XX HWMOD data) that probably had some search and replace updates done for the patch for sparse irq support. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com> Acked-by: Paul Walmsley <paul@pwsan.com> [tony@atomide.com: updated wit information about the breaking commit] Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | | ARM: OMAP1: fix USB configuration use-after-releaseAaro Koskinen2013-01-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All boards, except Amstrad E3, mark USB config with __initdata. As a result, when you compile USB into modules, they will try to refer already released platform data and the behaviour is undefined. For example on Nokia 770, I get the following kernel panic when modprobing ohci-hcd: [ 3.462158] Unable to handle kernel paging request at virtual address e7fddef0 [ 3.477050] pgd = c3434000 [ 3.487365] [e7fddef0] *pgd=00000000 [ 3.498535] Internal error: Oops: 80000005 [#1] ARM [ 3.510955] Modules linked in: ohci_hcd(+) [ 3.522705] CPU: 0 Not tainted (3.7.0-770_tiny+ #5) [ 3.535552] PC is at 0xe7fddef0 [ 3.546508] LR is at ohci_omap_init+0x5c/0x144 [ohci_hcd] [ 3.560272] pc : [<e7fddef0>] lr : [<bf003140>] psr: a0000013 [ 3.560272] sp : c344bdb0 ip : c344bce0 fp : c344bdcc [ 3.589782] r10: 00000001 r9 : 00000000 r8 : 00000000 [ 3.604553] r7 : 00000026 r6 : 000000de r5 : c0227300 r4 : c342d620 [ 3.621032] r3 : e7fddef0 r2 : c048b880 r1 : 00000000 r0 : 0000000a [ 3.637786] Flags: NzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user [ 3.655822] Control: 0005317f Table: 13434000 DAC: 00000015 [ 3.672790] Process modprobe (pid: 425, stack limit = 0xc344a1b8) [ 3.690643] Stack: (0xc344bdb0 to 0xc344c000) [ 3.707031] bda0: bf0030e4 c342d620 00000000 c049e62c [ 3.727905] bdc0: c344be04 c344bdd0 c0150ff0 bf0030f4 bf001b88 00000000 c048a4ac c345b020 [ 3.748870] bde0: c342d620 00000000 c048a468 bf003968 00000001 bf006000 c344be34 c344be08 [ 3.769836] be00: bf001bf0 c0150e48 00000000 c344be18 c00b9bfc c048a478 c048a4ac bf0037f8 [ 3.790985] be20: c012ca04 c000e024 c344be44 c344be38 c012d968 bf001a84 c344be64 c344be48 [ 3.812164] be40: c012c8ac c012d95c 00000000 c048a478 c048a4ac bf0037f8 c344be84 c344be68 [ 3.833740] be60: c012ca74 c012c80c 20000013 00000000 c344be88 bf0037f8 c344beac c344be88 [ 3.855468] be80: c012b038 c012ca14 c38093cc c383ee10 bf0037f8 c35be5a0 c049d5e8 00000000 [ 3.877166] bea0: c344bebc c344beb0 c012c40c c012aff4 c344beec c344bec0 c012bfc0 c012c3fc [ 3.898834] bec0: bf00378c 00000000 c344beec bf0037f8 00067f39 00000000 00005c44 c000e024 [ 3.920837] bee0: c344bf14 c344bef0 c012cd54 c012befc c04ce080 00067f39 00000000 00005c44 [ 3.943023] bf00: c000e024 bf006000 c344bf24 c344bf18 c012db14 c012ccc0 c344bf3c c344bf28 [ 3.965423] bf20: bf00604c c012dad8 c344a000 bf003834 c344bf7c c344bf40 c00087ac bf006010 [ 3.987976] bf40: 0000000f bf003834 00067f39 00000000 00005c44 bf003834 00067f39 00000000 [ 4.010711] bf60: 00005c44 c000e024 c344a000 00000000 c344bfa4 c344bf80 c004c35c c0008720 [ 4.033569] bf80: c344bfac c344bf90 01422192 01427ea0 00000000 00000080 00000000 c344bfa8 [ 4.056518] bfa0: c000dec0 c004c2f0 01422192 01427ea0 01427ea0 00005c44 00067f39 00000000 [ 4.079406] bfc0: 01422192 01427ea0 00000000 00000080 b6e11008 014221aa be941fcc b6e1e008 [ 4.102569] bfe0: b6ef6300 be941758 0000e93c b6ef6310 60000010 01427ea0 00000000 00000000 [ 4.125946] Backtrace: [ 4.143463] [<bf0030e4>] (ohci_omap_init+0x0/0x144 [ohci_hcd]) from [<c0150ff0>] (usb_add_hcd+0x1b8/0x61c) [ 4.183898] r6:c049e62c r5:00000000 r4:c342d620 r3:bf0030e4 [ 4.205596] [<c0150e38>] (usb_add_hcd+0x0/0x61c) from [<bf001bf0>] (ohci_hcd_omap_drv_probe+0x17c/0x224 [ohci_hcd]) [ 4.248138] [<bf001a74>] (ohci_hcd_omap_drv_probe+0x0/0x224 [ohci_hcd]) from [<c012d968>] (platform_drv_probe+0x1c/0x20) [ 4.292144] r8:c000e024 r7:c012ca04 r6:bf0037f8 r5:c048a4ac r4:c048a478 [ 4.316192] [<c012d94c>] (platform_drv_probe+0x0/0x20) from [<c012c8ac>] (driver_probe_device+0xb0/0x208) [ 4.360168] [<c012c7fc>] (driver_probe_device+0x0/0x208) from [<c012ca74>] (__driver_attach+0x70/0x94) [ 4.405548] r6:bf0037f8 r5:c048a4ac r4:c048a478 r3:00000000 [ 4.429809] [<c012ca04>] (__driver_attach+0x0/0x94) from [<c012b038>] (bus_for_each_dev+0x54/0x90) [ 4.475708] r6:bf0037f8 r5:c344be88 r4:00000000 r3:20000013 [ 4.500366] [<c012afe4>] (bus_for_each_dev+0x0/0x90) from [<c012c40c>] (driver_attach+0x20/0x28) [ 4.528442] r7:00000000 r6:c049d5e8 r5:c35be5a0 r4:bf0037f8 [ 4.553466] [<c012c3ec>] (driver_attach+0x0/0x28) from [<c012bfc0>] (bus_add_driver+0xd4/0x228) [ 4.581878] [<c012beec>] (bus_add_driver+0x0/0x228) from [<c012cd54>] (driver_register+0xa4/0x134) [ 4.629730] r8:c000e024 r7:00005c44 r6:00000000 r5:00067f39 r4:bf0037f8 [ 4.656738] [<c012ccb0>] (driver_register+0x0/0x134) from [<c012db14>] (platform_driver_register+0x4c/0x60) [ 4.706542] [<c012dac8>] (platform_driver_register+0x0/0x60) from [<bf00604c>] (ohci_hcd_mod_init+0x4c/0x8c [ohci_hcd]) [ 4.757843] [<bf006000>] (ohci_hcd_mod_init+0x0/0x8c [ohci_hcd]) from [<c00087ac>] (do_one_initcall+0x9c/0x174) [ 4.808990] r4:bf003834 r3:c344a000 [ 4.832641] [<c0008710>] (do_one_initcall+0x0/0x174) from [<c004c35c>] (sys_init_module+0x7c/0x194) [ 4.881530] [<c004c2e0>] (sys_init_module+0x0/0x194) from [<c000dec0>] (ret_fast_syscall+0x0/0x2c) [ 4.930664] r7:00000080 r6:00000000 r5:01427ea0 r4:01422192 [ 4.956481] Code: bad PC value [ 4.978729] ---[ end trace 58280240f08342c4 ]--- [ 5.002258] Kernel panic - not syncing: Fatal exception Fix this by taking a copy of the data. Also mark Amstrad E3's data with __initdata to save some memory with multi-board kernels. Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | | Merge tag 'omap-fixes-a2-for-v3.8-rc' of ↵Tony Lindgren2013-01-03
| | |\ \ \ | | | |/ / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.8-rc2/fixes Some OMAP PRCM and sparse fixes against v3.8-rc1. A basic set of test logs are available here: http://www.pwsan.com/omap/testlogs/prcm_fixes_b_3.8-rc/20130102120724/ The 3730 Beagle XM here has an intermittent failure mounting SD root, but the suspicion right now is that this is due to a failing SD card, rather than any change introduced by these patches. This second version includes a few changes requested by Tony Lindgren.
| | | * | ARM: OMAP2/3: PRM: fix bogus OMAP2xxx powerstate return valuesPaul Walmsley2013-01-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On OMAP2xxx chips, the register bitfields for the PM_PWSTCTRL_*.POWERSTATE and PM_PWSTST_*.LASTSTATEENTERED are different than those used on OMAP3/4. The order is reversed. So, for example, on OMAP2xxx, 0x0 indicates 'ON'; but on OMAP3/4, 0x0 indicates 'OFF'. Similarly, on OMAP2xxx, 0x3 indicates 'OFF', but on OMAP3/4, 0x3 indicates 'ON'. To fix this, we treat the OMAP3/4 values as the powerdomain API values, and create new low-level powerdomain functions for the OMAP2xxx chips which translate between the OMAP2xxx values and the OMAP3/4 values. Without this patch, the conversion of the OMAP2xxx PM code to the functional powerstate code results in a non-booting kernel. Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | | * | ARM: OMAP3: clock data: Add missing enable/disable for EMU clockJon Hunter2013-01-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ETM/ETB drivers for OMAP3, enable the emu_src_ck clock in order to access the ETM/ETB hardware. The emu_src_ck should enable the EMU clock domain so that the ETM/ETB hardware is accessible. However, currently when enabling the emu_src_ck the EMU clock domain is not being enabled and so the ETM/ETB drivers are failing. Add enable/disable clock functions to enable the EMU clock domain when enabling the emu_src_ck. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
generated by cgit v1.2.2 (git 2.25.0) at 2025-07-19 04:19:34 -0400