diff options
Diffstat (limited to 'tools/power/x86/turbostat/turbostat.8')
-rw-r--r-- | tools/power/x86/turbostat/turbostat.8 | 103 |
1 files changed, 67 insertions, 36 deletions
diff --git a/tools/power/x86/turbostat/turbostat.8 b/tools/power/x86/turbostat/turbostat.8 index e4d0690cccf9..0d7dc2cfefb5 100644 --- a/tools/power/x86/turbostat/turbostat.8 +++ b/tools/power/x86/turbostat/turbostat.8 | |||
@@ -11,16 +11,16 @@ turbostat \- Report processor frequency and idle statistics | |||
11 | .RB [ Options ] | 11 | .RB [ Options ] |
12 | .RB [ "\-i interval_sec" ] | 12 | .RB [ "\-i interval_sec" ] |
13 | .SH DESCRIPTION | 13 | .SH DESCRIPTION |
14 | \fBturbostat \fP reports processor topology, frequency | 14 | \fBturbostat \fP reports processor topology, frequency, |
15 | and idle power state statistics on modern X86 processors. | 15 | idle power-state statistics, temperature and power on modern X86 processors. |
16 | Either \fBcommand\fP is forked and statistics are printed | 16 | Either \fBcommand\fP is forked and statistics are printed |
17 | upon its completion, or statistics are printed periodically. | 17 | upon its completion, or statistics are printed periodically. |
18 | 18 | ||
19 | \fBturbostat \fP | 19 | \fBturbostat \fP |
20 | requires that the processor | 20 | must be run on root, and |
21 | minimally requires that the processor | ||
21 | supports an "invariant" TSC, plus the APERF and MPERF MSRs. | 22 | supports an "invariant" TSC, plus the APERF and MPERF MSRs. |
22 | \fBturbostat \fP will report idle cpu power state residency | 23 | Additional information is reported depending on hardware counter support. |
23 | on processors that additionally support C-state residency counters. | ||
24 | 24 | ||
25 | .SS Options | 25 | .SS Options |
26 | The \fB-p\fP option limits output to the 1st thread in 1st core of each package. | 26 | The \fB-p\fP option limits output to the 1st thread in 1st core of each package. |
@@ -57,7 +57,15 @@ Note that multiple CPUs per core indicate support for Intel(R) Hyper-Threading T | |||
57 | \fBGHz\fP average clock rate while the CPU was in c0 state. | 57 | \fBGHz\fP average clock rate while the CPU was in c0 state. |
58 | \fBTSC\fP average GHz that the TSC ran during the entire interval. | 58 | \fBTSC\fP average GHz that the TSC ran during the entire interval. |
59 | \fB%c1, %c3, %c6, %c7\fP show the percentage residency in hardware core idle states. | 59 | \fB%c1, %c3, %c6, %c7\fP show the percentage residency in hardware core idle states. |
60 | \fBCTMP\fP Degrees Celsius reported by the per-core Digital Thermal Sensor. | ||
61 | \fBPTMP\fP Degrees Celsius reported by the per-package Package Thermal Monitor. | ||
60 | \fB%pc2, %pc3, %pc6, %pc7\fP percentage residency in hardware package idle states. | 62 | \fB%pc2, %pc3, %pc6, %pc7\fP percentage residency in hardware package idle states. |
63 | \fBPkg_W\fP Watts consumed by the whole package. | ||
64 | \fBCor_W\fP Watts consumed by the core part of the package. | ||
65 | \fBGFX_W\fP Watts consumed by the Graphics part of the package -- available only on client processors. | ||
66 | \fBRAM_W\fP Watts consumed by the DRAM DIMMS -- available only on server processors. | ||
67 | \fBPKG_%\fP percent of the interval that RAPL throttling was active on the Package. | ||
68 | \fBRAM_%\fP percent of the interval that RAPL throttling was active on DRAM. | ||
61 | .fi | 69 | .fi |
62 | .PP | 70 | .PP |
63 | .SH EXAMPLE | 71 | .SH EXAMPLE |
@@ -66,50 +74,73 @@ Without any parameters, turbostat prints out counters ever 5 seconds. | |||
66 | for turbostat to fork). | 74 | for turbostat to fork). |
67 | 75 | ||
68 | The first row of statistics is a summary for the entire system. | 76 | The first row of statistics is a summary for the entire system. |
69 | Note that the summary is a weighted average. | 77 | For residency % columns, the summary is a weighted average. |
78 | For Temperature columns, the summary is the column maximum. | ||
79 | For Watts columns, the summary is a system total. | ||
70 | Subsequent rows show per-CPU statistics. | 80 | Subsequent rows show per-CPU statistics. |
71 | 81 | ||
72 | .nf | 82 | .nf |
73 | [root@x980]# ./turbostat | 83 | [root@sandy]# ./turbostat |
74 | cor CPU %c0 GHz TSC %c1 %c3 %c6 %pc3 %pc6 | 84 | cor CPU %c0 GHz TSC %c1 %c3 %c6 %c7 CTMP PTMP %pc2 %pc3 %pc6 %pc7 Pkg_W Cor_W GFX_W |
75 | 0.09 1.62 3.38 1.83 0.32 97.76 1.26 83.61 | 85 | 0.06 0.80 2.29 0.11 0.00 0.00 99.83 47 40 0.26 0.01 0.44 98.78 3.49 0.12 0.14 |
76 | 0 0 0.15 1.62 3.38 10.23 0.05 89.56 1.26 83.61 | 86 | 0 0 0.07 0.80 2.29 0.07 0.00 0.00 99.86 40 40 0.26 0.01 0.44 98.78 3.49 0.12 0.14 |
77 | 0 6 0.05 1.62 3.38 10.34 | 87 | 0 4 0.03 0.80 2.29 0.12 |
78 | 1 2 0.03 1.62 3.38 0.07 0.05 99.86 | 88 | 1 1 0.04 0.80 2.29 0.25 0.01 0.00 99.71 40 |
79 | 1 8 0.03 1.62 3.38 0.06 | 89 | 1 5 0.16 0.80 2.29 0.13 |
80 | 2 4 0.21 1.62 3.38 0.10 1.49 98.21 | 90 | 2 2 0.05 0.80 2.29 0.06 0.01 0.00 99.88 40 |
81 | 2 10 0.02 1.62 3.38 0.29 | 91 | 2 6 0.03 0.80 2.29 0.08 |
82 | 8 1 0.04 1.62 3.38 0.04 0.08 99.84 | 92 | 3 3 0.05 0.80 2.29 0.08 0.00 0.00 99.87 47 |
83 | 8 7 0.01 1.62 3.38 0.06 | 93 | 3 7 0.04 0.84 2.29 0.09 |
84 | 9 3 0.53 1.62 3.38 0.10 0.20 99.17 | ||
85 | 9 9 0.02 1.62 3.38 0.60 | ||
86 | 10 5 0.01 1.62 3.38 0.02 0.04 99.92 | ||
87 | 10 11 0.02 1.62 3.38 0.02 | ||
88 | .fi | 94 | .fi |
89 | .SH SUMMARY EXAMPLE | 95 | .SH SUMMARY EXAMPLE |
90 | The "-s" option prints the column headers just once, | 96 | The "-s" option prints the column headers just once, |
91 | and then the one line system summary for each sample interval. | 97 | and then the one line system summary for each sample interval. |
92 | 98 | ||
93 | .nf | 99 | .nf |
94 | [root@x980]# ./turbostat -s | 100 | [root@wsm]# turbostat -S |
95 | %c0 GHz TSC %c1 %c3 %c6 %pc3 %pc6 | 101 | %c0 GHz TSC %c1 %c3 %c6 CTMP %pc3 %pc6 |
96 | 0.23 1.67 3.38 2.00 0.30 97.47 1.07 82.12 | 102 | 1.40 2.81 3.38 10.78 43.47 44.35 42 13.67 2.09 |
97 | 0.10 1.62 3.38 1.87 2.25 95.77 12.02 72.60 | 103 | 1.34 2.90 3.38 11.48 58.96 28.23 41 19.89 0.15 |
98 | 0.20 1.64 3.38 1.98 0.11 97.72 0.30 83.36 | 104 | 1.55 2.72 3.38 26.73 37.66 34.07 42 2.53 2.80 |
99 | 0.11 1.70 3.38 1.86 1.81 96.22 9.71 74.90 | 105 | 1.37 2.83 3.38 16.95 60.05 21.63 42 5.76 0.20 |
100 | .fi | 106 | .fi |
101 | .SH VERBOSE EXAMPLE | 107 | .SH VERBOSE EXAMPLE |
102 | The "-v" option adds verbosity to the output: | 108 | The "-v" option adds verbosity to the output: |
103 | 109 | ||
104 | .nf | 110 | .nf |
105 | GenuineIntel 11 CPUID levels; family:model:stepping 0x6:2c:2 (6:44:2) | 111 | [root@ivy]# turbostat -v |
106 | 12 * 133 = 1600 MHz max efficiency | 112 | turbostat v3.0 November 23, 2012 - Len Brown <lenb@kernel.org> |
107 | 25 * 133 = 3333 MHz TSC frequency | 113 | CPUID(0): GenuineIntel 13 CPUID levels; family:model:stepping 0x6:3a:9 (6:58:9) |
108 | 26 * 133 = 3467 MHz max turbo 4 active cores | 114 | CPUID(6): APERF, DTS, PTM, EPB |
109 | 26 * 133 = 3467 MHz max turbo 3 active cores | 115 | RAPL: 851 sec. Joule Counter Range |
110 | 27 * 133 = 3600 MHz max turbo 2 active cores | 116 | cpu0: MSR_NHM_PLATFORM_INFO: 0x81010f0012300 |
111 | 27 * 133 = 3600 MHz max turbo 1 active cores | 117 | 16 * 100 = 1600 MHz max efficiency |
112 | 118 | 35 * 100 = 3500 MHz TSC frequency | |
119 | cpu0: MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x1e008402 (UNdemote-C3, UNdemote-C1, demote-C3, demote-C1, locked: pkg-cstate-limit=2: pc6-noret) | ||
120 | cpu0: MSR_NHM_TURBO_RATIO_LIMIT: 0x25262727 | ||
121 | 37 * 100 = 3700 MHz max turbo 4 active cores | ||
122 | 38 * 100 = 3800 MHz max turbo 3 active cores | ||
123 | 39 * 100 = 3900 MHz max turbo 2 active cores | ||
124 | 39 * 100 = 3900 MHz max turbo 1 active cores | ||
125 | cpu0: MSR_IA32_ENERGY_PERF_BIAS: 0x00000006 (balanced) | ||
126 | cpu0: MSR_RAPL_POWER_UNIT: 0x000a1003 (0.125000 Watts, 0.000015 Joules, 0.000977 sec.) | ||
127 | cpu0: MSR_PKG_POWER_INFO: 0x01e00268 (77 W TDP, RAPL 60 - 0 W, 0.000000 sec.) | ||
128 | cpu0: MSR_PKG_POWER_LIMIT: 0x830000148268 (UNlocked) | ||
129 | cpu0: PKG Limit #1: ENabled (77.000000 Watts, 1.000000 sec, clamp DISabled) | ||
130 | cpu0: PKG Limit #2: ENabled (96.000000 Watts, 0.000977* sec, clamp DISabled) | ||
131 | cpu0: MSR_PP0_POLICY: 0 | ||
132 | cpu0: MSR_PP0_POWER_LIMIT: 0x00000000 (UNlocked) | ||
133 | cpu0: Cores Limit: DISabled (0.000000 Watts, 0.000977 sec, clamp DISabled) | ||
134 | cpu0: MSR_PP1_POLICY: 0 | ||
135 | cpu0: MSR_PP1_POWER_LIMIT: 0x00000000 (UNlocked) | ||
136 | cpu0: GFX Limit: DISabled (0.000000 Watts, 0.000977 sec, clamp DISabled) | ||
137 | cpu0: MSR_IA32_TEMPERATURE_TARGET: 0x00691400 (105 C) | ||
138 | cpu0: MSR_IA32_PACKAGE_THERM_STATUS: 0x884e0000 (27 C) | ||
139 | cpu0: MSR_IA32_THERM_STATUS: 0x88560000 (19 C +/- 1) | ||
140 | cpu1: MSR_IA32_THERM_STATUS: 0x88560000 (19 C +/- 1) | ||
141 | cpu2: MSR_IA32_THERM_STATUS: 0x88540000 (21 C +/- 1) | ||
142 | cpu3: MSR_IA32_THERM_STATUS: 0x884e0000 (27 C +/- 1) | ||
143 | ... | ||
113 | .fi | 144 | .fi |
114 | The \fBmax efficiency\fP frequency, a.k.a. Low Frequency Mode, is the frequency | 145 | The \fBmax efficiency\fP frequency, a.k.a. Low Frequency Mode, is the frequency |
115 | available at the minimum package voltage. The \fBTSC frequency\fP is the nominal | 146 | available at the minimum package voltage. The \fBTSC frequency\fP is the nominal |
@@ -142,7 +173,7 @@ cor CPU %c0 GHz TSC %c1 %c3 %c6 %pc3 %pc6 | |||
142 | 10 5 1.42 3.43 3.38 2.14 30.99 65.44 | 173 | 10 5 1.42 3.43 3.38 2.14 30.99 65.44 |
143 | 10 11 0.16 2.88 3.38 3.40 | 174 | 10 11 0.16 2.88 3.38 3.40 |
144 | .fi | 175 | .fi |
145 | Above the cycle soaker drives cpu7 up its 3.6 Ghz turbo limit | 176 | Above the cycle soaker drives cpu7 up its 3.6 GHz turbo limit |
146 | while the other processors are generally in various states of idle. | 177 | while the other processors are generally in various states of idle. |
147 | 178 | ||
148 | Note that cpu1 and cpu7 are HT siblings within core8. | 179 | Note that cpu1 and cpu7 are HT siblings within core8. |