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-rw-r--r--sound/soc/blackfin/bf5xx-i2s-pcm.c13
-rw-r--r--sound/soc/codecs/ak4642.c2
-rw-r--r--sound/soc/codecs/tlv320aic26.c14
-rw-r--r--sound/soc/codecs/tlv320aic3x.c9
-rw-r--r--sound/soc/codecs/wm8731.c29
-rw-r--r--sound/soc/codecs/wm8994.c2
-rw-r--r--sound/soc/soc-core.c5
-rw-r--r--sound/soc/tegra/tegra_i2s.c6
8 files changed, 45 insertions, 35 deletions
diff --git a/sound/soc/blackfin/bf5xx-i2s-pcm.c b/sound/soc/blackfin/bf5xx-i2s-pcm.c
index b5101efd1c87..f1fd95bb6416 100644
--- a/sound/soc/blackfin/bf5xx-i2s-pcm.c
+++ b/sound/soc/blackfin/bf5xx-i2s-pcm.c
@@ -138,11 +138,20 @@ static snd_pcm_uframes_t bf5xx_pcm_pointer(struct snd_pcm_substream *substream)
138 pr_debug("%s enter\n", __func__); 138 pr_debug("%s enter\n", __func__);
139 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 139 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
140 diff = sport_curr_offset_tx(sport); 140 diff = sport_curr_offset_tx(sport);
141 frames = bytes_to_frames(substream->runtime, diff);
142 } else { 141 } else {
143 diff = sport_curr_offset_rx(sport); 142 diff = sport_curr_offset_rx(sport);
144 frames = bytes_to_frames(substream->runtime, diff);
145 } 143 }
144
145 /*
146 * TX at least can report one frame beyond the end of the
147 * buffer if we hit the wraparound case - clamp to within the
148 * buffer as the ALSA APIs require.
149 */
150 if (diff == snd_pcm_lib_buffer_bytes(substream))
151 diff = 0;
152
153 frames = bytes_to_frames(substream->runtime, diff);
154
146 return frames; 155 return frames;
147} 156}
148 157
diff --git a/sound/soc/codecs/ak4642.c b/sound/soc/codecs/ak4642.c
index 4be0570e3f1f..65f46047b1cb 100644
--- a/sound/soc/codecs/ak4642.c
+++ b/sound/soc/codecs/ak4642.c
@@ -357,7 +357,7 @@ static int ak4642_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
357 default: 357 default:
358 return -EINVAL; 358 return -EINVAL;
359 } 359 }
360 snd_soc_update_bits(codec, PW_MGMT2, MS, data); 360 snd_soc_update_bits(codec, PW_MGMT2, MS | MCKO | PMPLL, data);
361 snd_soc_update_bits(codec, MD_CTL1, BCKO_MASK, bcko); 361 snd_soc_update_bits(codec, MD_CTL1, BCKO_MASK, bcko);
362 362
363 /* format type */ 363 /* format type */
diff --git a/sound/soc/codecs/tlv320aic26.c b/sound/soc/codecs/tlv320aic26.c
index e2a7608d3944..7859bdcc93db 100644
--- a/sound/soc/codecs/tlv320aic26.c
+++ b/sound/soc/codecs/tlv320aic26.c
@@ -161,10 +161,18 @@ static int aic26_hw_params(struct snd_pcm_substream *substream,
161 dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL; 161 dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL;
162 } 162 }
163 163
164 /* Configure PLL */ 164 /**
165 * Configure PLL
166 * fsref = (mclk * PLLM) / 2048
167 * where PLLM = J.DDDD (DDDD register ranges from 0 to 9999, decimal)
168 */
165 pval = 1; 169 pval = 1;
166 jval = (fsref == 44100) ? 7 : 8; 170 /* compute J portion of multiplier */
167 dval = (fsref == 44100) ? 5264 : 1920; 171 jval = fsref / (aic26->mclk / 2048);
172 /* compute fractional DDDD component of multiplier */
173 dval = fsref - (jval * (aic26->mclk / 2048));
174 dval = (10000 * dval) / (aic26->mclk / 2048);
175 dev_dbg(&aic26->spi->dev, "Setting PLLM to %d.%04d\n", jval, dval);
168 qval = 0; 176 qval = 0;
169 reg = 0x8000 | qval << 11 | pval << 8 | jval << 2; 177 reg = 0x8000 | qval << 11 | pval << 8 | jval << 2;
170 aic26_reg_write(codec, AIC26_REG_PLL_PROG1, reg); 178 aic26_reg_write(codec, AIC26_REG_PLL_PROG1, reg);
diff --git a/sound/soc/codecs/tlv320aic3x.c b/sound/soc/codecs/tlv320aic3x.c
index c3d96fc8c267..789453d44ec5 100644
--- a/sound/soc/codecs/tlv320aic3x.c
+++ b/sound/soc/codecs/tlv320aic3x.c
@@ -1114,12 +1114,19 @@ static int aic3x_set_power(struct snd_soc_codec *codec, int power)
1114 1114
1115 /* Sync reg_cache with the hardware */ 1115 /* Sync reg_cache with the hardware */
1116 codec->cache_only = 0; 1116 codec->cache_only = 0;
1117 for (i = 0; i < ARRAY_SIZE(aic3x_reg); i++) 1117 for (i = AIC3X_SAMPLE_RATE_SEL_REG; i < ARRAY_SIZE(aic3x_reg); i++)
1118 snd_soc_write(codec, i, cache[i]); 1118 snd_soc_write(codec, i, cache[i]);
1119 if (aic3x->model == AIC3X_MODEL_3007) 1119 if (aic3x->model == AIC3X_MODEL_3007)
1120 aic3x_init_3007(codec); 1120 aic3x_init_3007(codec);
1121 codec->cache_sync = 0; 1121 codec->cache_sync = 0;
1122 } else { 1122 } else {
1123 /*
1124 * Do soft reset to this codec instance in order to clear
1125 * possible VDD leakage currents in case the supply regulators
1126 * remain on
1127 */
1128 snd_soc_write(codec, AIC3X_RESET, SOFT_RESET);
1129 codec->cache_sync = 1;
1123 aic3x->power = 0; 1130 aic3x->power = 0;
1124 /* HW writes are needless when bias is off */ 1131 /* HW writes are needless when bias is off */
1125 codec->cache_only = 1; 1132 codec->cache_only = 1;
diff --git a/sound/soc/codecs/wm8731.c b/sound/soc/codecs/wm8731.c
index 2dc964b55e4f..76b4361e9b80 100644
--- a/sound/soc/codecs/wm8731.c
+++ b/sound/soc/codecs/wm8731.c
@@ -175,6 +175,7 @@ static const struct snd_kcontrol_new wm8731_input_mux_controls =
175SOC_DAPM_ENUM("Input Select", wm8731_insel_enum); 175SOC_DAPM_ENUM("Input Select", wm8731_insel_enum);
176 176
177static const struct snd_soc_dapm_widget wm8731_dapm_widgets[] = { 177static const struct snd_soc_dapm_widget wm8731_dapm_widgets[] = {
178SND_SOC_DAPM_SUPPLY("ACTIVE",WM8731_ACTIVE, 0, 0, NULL, 0),
178SND_SOC_DAPM_SUPPLY("OSC", WM8731_PWR, 5, 1, NULL, 0), 179SND_SOC_DAPM_SUPPLY("OSC", WM8731_PWR, 5, 1, NULL, 0),
179SND_SOC_DAPM_MIXER("Output Mixer", WM8731_PWR, 4, 1, 180SND_SOC_DAPM_MIXER("Output Mixer", WM8731_PWR, 4, 1,
180 &wm8731_output_mixer_controls[0], 181 &wm8731_output_mixer_controls[0],
@@ -204,6 +205,8 @@ static int wm8731_check_osc(struct snd_soc_dapm_widget *source,
204static const struct snd_soc_dapm_route wm8731_intercon[] = { 205static const struct snd_soc_dapm_route wm8731_intercon[] = {
205 {"DAC", NULL, "OSC", wm8731_check_osc}, 206 {"DAC", NULL, "OSC", wm8731_check_osc},
206 {"ADC", NULL, "OSC", wm8731_check_osc}, 207 {"ADC", NULL, "OSC", wm8731_check_osc},
208 {"DAC", NULL, "ACTIVE"},
209 {"ADC", NULL, "ACTIVE"},
207 210
208 /* output mixer */ 211 /* output mixer */
209 {"Output Mixer", "Line Bypass Switch", "Line Input"}, 212 {"Output Mixer", "Line Bypass Switch", "Line Input"},
@@ -315,29 +318,6 @@ static int wm8731_hw_params(struct snd_pcm_substream *substream,
315 return 0; 318 return 0;
316} 319}
317 320
318static int wm8731_pcm_prepare(struct snd_pcm_substream *substream,
319 struct snd_soc_dai *dai)
320{
321 struct snd_soc_codec *codec = dai->codec;
322
323 /* set active */
324 snd_soc_write(codec, WM8731_ACTIVE, 0x0001);
325
326 return 0;
327}
328
329static void wm8731_shutdown(struct snd_pcm_substream *substream,
330 struct snd_soc_dai *dai)
331{
332 struct snd_soc_codec *codec = dai->codec;
333
334 /* deactivate */
335 if (!codec->active) {
336 udelay(50);
337 snd_soc_write(codec, WM8731_ACTIVE, 0x0);
338 }
339}
340
341static int wm8731_mute(struct snd_soc_dai *dai, int mute) 321static int wm8731_mute(struct snd_soc_dai *dai, int mute)
342{ 322{
343 struct snd_soc_codec *codec = dai->codec; 323 struct snd_soc_codec *codec = dai->codec;
@@ -480,7 +460,6 @@ static int wm8731_set_bias_level(struct snd_soc_codec *codec,
480 snd_soc_write(codec, WM8731_PWR, reg | 0x0040); 460 snd_soc_write(codec, WM8731_PWR, reg | 0x0040);
481 break; 461 break;
482 case SND_SOC_BIAS_OFF: 462 case SND_SOC_BIAS_OFF:
483 snd_soc_write(codec, WM8731_ACTIVE, 0x0);
484 snd_soc_write(codec, WM8731_PWR, 0xffff); 463 snd_soc_write(codec, WM8731_PWR, 0xffff);
485 regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies), 464 regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies),
486 wm8731->supplies); 465 wm8731->supplies);
@@ -496,9 +475,7 @@ static int wm8731_set_bias_level(struct snd_soc_codec *codec,
496 SNDRV_PCM_FMTBIT_S24_LE) 475 SNDRV_PCM_FMTBIT_S24_LE)
497 476
498static struct snd_soc_dai_ops wm8731_dai_ops = { 477static struct snd_soc_dai_ops wm8731_dai_ops = {
499 .prepare = wm8731_pcm_prepare,
500 .hw_params = wm8731_hw_params, 478 .hw_params = wm8731_hw_params,
501 .shutdown = wm8731_shutdown,
502 .digital_mute = wm8731_mute, 479 .digital_mute = wm8731_mute,
503 .set_sysclk = wm8731_set_dai_sysclk, 480 .set_sysclk = wm8731_set_dai_sysclk,
504 .set_fmt = wm8731_set_dai_fmt, 481 .set_fmt = wm8731_set_dai_fmt,
diff --git a/sound/soc/codecs/wm8994.c b/sound/soc/codecs/wm8994.c
index 970a95c5360b..c2fc0356c2a4 100644
--- a/sound/soc/codecs/wm8994.c
+++ b/sound/soc/codecs/wm8994.c
@@ -1713,6 +1713,8 @@ static int _wm8994_set_fll(struct snd_soc_codec *codec, int id, int src,
1713 snd_soc_update_bits(codec, WM8994_FLL1_CONTROL_1 + reg_offset, 1713 snd_soc_update_bits(codec, WM8994_FLL1_CONTROL_1 + reg_offset,
1714 WM8994_FLL1_ENA | WM8994_FLL1_FRAC, 1714 WM8994_FLL1_ENA | WM8994_FLL1_FRAC,
1715 reg); 1715 reg);
1716
1717 msleep(5);
1716 } 1718 }
1717 1719
1718 wm8994->fll[id].in = freq_in; 1720 wm8994->fll[id].in = freq_in;
diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c
index d75043ed7fc0..b194be09e74d 100644
--- a/sound/soc/soc-core.c
+++ b/sound/soc/soc-core.c
@@ -1929,8 +1929,9 @@ static void snd_soc_instantiate_card(struct snd_soc_card *card)
1929 "%s", card->name); 1929 "%s", card->name);
1930 snprintf(card->snd_card->longname, sizeof(card->snd_card->longname), 1930 snprintf(card->snd_card->longname, sizeof(card->snd_card->longname),
1931 "%s", card->long_name ? card->long_name : card->name); 1931 "%s", card->long_name ? card->long_name : card->name);
1932 snprintf(card->snd_card->driver, sizeof(card->snd_card->driver), 1932 if (card->driver_name)
1933 "%s", card->driver_name ? card->driver_name : card->name); 1933 strlcpy(card->snd_card->driver, card->driver_name,
1934 sizeof(card->snd_card->driver));
1934 1935
1935 if (card->late_probe) { 1936 if (card->late_probe) {
1936 ret = card->late_probe(card); 1937 ret = card->late_probe(card);
diff --git a/sound/soc/tegra/tegra_i2s.c b/sound/soc/tegra/tegra_i2s.c
index 6b817e20548c..95f03c10b4f7 100644
--- a/sound/soc/tegra/tegra_i2s.c
+++ b/sound/soc/tegra/tegra_i2s.c
@@ -222,12 +222,18 @@ static int tegra_i2s_hw_params(struct snd_pcm_substream *substream,
222 if (i2sclock % (2 * srate)) 222 if (i2sclock % (2 * srate))
223 reg |= TEGRA_I2S_TIMING_NON_SYM_ENABLE; 223 reg |= TEGRA_I2S_TIMING_NON_SYM_ENABLE;
224 224
225 if (!i2s->clk_refs)
226 clk_enable(i2s->clk_i2s);
227
225 tegra_i2s_write(i2s, TEGRA_I2S_TIMING, reg); 228 tegra_i2s_write(i2s, TEGRA_I2S_TIMING, reg);
226 229
227 tegra_i2s_write(i2s, TEGRA_I2S_FIFO_SCR, 230 tegra_i2s_write(i2s, TEGRA_I2S_FIFO_SCR,
228 TEGRA_I2S_FIFO_SCR_FIFO2_ATN_LVL_FOUR_SLOTS | 231 TEGRA_I2S_FIFO_SCR_FIFO2_ATN_LVL_FOUR_SLOTS |
229 TEGRA_I2S_FIFO_SCR_FIFO1_ATN_LVL_FOUR_SLOTS); 232 TEGRA_I2S_FIFO_SCR_FIFO1_ATN_LVL_FOUR_SLOTS);
230 233
234 if (!i2s->clk_refs)
235 clk_disable(i2s->clk_i2s);
236
231 return 0; 237 return 0;
232} 238}
233 239