diff options
Diffstat (limited to 'sound/soc/samsung/i2s-regs.h')
| -rw-r--r-- | sound/soc/samsung/i2s-regs.h | 51 |
1 files changed, 35 insertions, 16 deletions
diff --git a/sound/soc/samsung/i2s-regs.h b/sound/soc/samsung/i2s-regs.h index c0e6d9a19efc..821a50231002 100644 --- a/sound/soc/samsung/i2s-regs.h +++ b/sound/soc/samsung/i2s-regs.h | |||
| @@ -31,6 +31,10 @@ | |||
| 31 | #define I2SLVL1ADDR 0x34 | 31 | #define I2SLVL1ADDR 0x34 |
| 32 | #define I2SLVL2ADDR 0x38 | 32 | #define I2SLVL2ADDR 0x38 |
| 33 | #define I2SLVL3ADDR 0x3c | 33 | #define I2SLVL3ADDR 0x3c |
| 34 | #define I2SSTR1 0x40 | ||
| 35 | #define I2SVER 0x44 | ||
| 36 | #define I2SFIC2 0x48 | ||
| 37 | #define I2STDM 0x4c | ||
| 34 | 38 | ||
| 35 | #define CON_RSTCLR (1 << 31) | 39 | #define CON_RSTCLR (1 << 31) |
| 36 | #define CON_FRXOFSTATUS (1 << 26) | 40 | #define CON_FRXOFSTATUS (1 << 26) |
| @@ -95,24 +99,39 @@ | |||
| 95 | #define MOD_RXONLY (1 << 8) | 99 | #define MOD_RXONLY (1 << 8) |
| 96 | #define MOD_TXRX (2 << 8) | 100 | #define MOD_TXRX (2 << 8) |
| 97 | #define MOD_MASK (3 << 8) | 101 | #define MOD_MASK (3 << 8) |
| 98 | #define MOD_LR_LLOW (0 << 7) | 102 | #define MOD_LRP_SHIFT 7 |
| 99 | #define MOD_LR_RLOW (1 << 7) | 103 | #define MOD_LR_LLOW 0 |
| 100 | #define MOD_SDF_IIS (0 << 5) | 104 | #define MOD_LR_RLOW 1 |
| 101 | #define MOD_SDF_MSB (1 << 5) | 105 | #define MOD_SDF_SHIFT 5 |
| 102 | #define MOD_SDF_LSB (2 << 5) | 106 | #define MOD_SDF_IIS 0 |
| 103 | #define MOD_SDF_MASK (3 << 5) | 107 | #define MOD_SDF_MSB 1 |
| 104 | #define MOD_RCLK_256FS (0 << 3) | 108 | #define MOD_SDF_LSB 2 |
| 105 | #define MOD_RCLK_512FS (1 << 3) | 109 | #define MOD_SDF_MASK 3 |
| 106 | #define MOD_RCLK_384FS (2 << 3) | 110 | #define MOD_RCLK_SHIFT 3 |
| 107 | #define MOD_RCLK_768FS (3 << 3) | 111 | #define MOD_RCLK_256FS 0 |
| 108 | #define MOD_RCLK_MASK (3 << 3) | 112 | #define MOD_RCLK_512FS 1 |
| 109 | #define MOD_BCLK_32FS (0 << 1) | 113 | #define MOD_RCLK_384FS 2 |
| 110 | #define MOD_BCLK_48FS (1 << 1) | 114 | #define MOD_RCLK_768FS 3 |
| 111 | #define MOD_BCLK_16FS (2 << 1) | 115 | #define MOD_RCLK_MASK 3 |
| 112 | #define MOD_BCLK_24FS (3 << 1) | 116 | #define MOD_BCLK_SHIFT 1 |
| 113 | #define MOD_BCLK_MASK (3 << 1) | 117 | #define MOD_BCLK_32FS 0 |
| 118 | #define MOD_BCLK_48FS 1 | ||
| 119 | #define MOD_BCLK_16FS 2 | ||
| 120 | #define MOD_BCLK_24FS 3 | ||
| 121 | #define MOD_BCLK_MASK 3 | ||
| 114 | #define MOD_8BIT (1 << 0) | 122 | #define MOD_8BIT (1 << 0) |
| 115 | 123 | ||
| 124 | #define EXYNOS5420_MOD_LRP_SHIFT 15 | ||
| 125 | #define EXYNOS5420_MOD_SDF_SHIFT 6 | ||
| 126 | #define EXYNOS5420_MOD_RCLK_SHIFT 4 | ||
| 127 | #define EXYNOS5420_MOD_BCLK_SHIFT 0 | ||
| 128 | #define EXYNOS5420_MOD_BCLK_64FS 4 | ||
| 129 | #define EXYNOS5420_MOD_BCLK_96FS 5 | ||
| 130 | #define EXYNOS5420_MOD_BCLK_128FS 6 | ||
| 131 | #define EXYNOS5420_MOD_BCLK_192FS 7 | ||
| 132 | #define EXYNOS5420_MOD_BCLK_256FS 8 | ||
| 133 | #define EXYNOS5420_MOD_BCLK_MASK 0xf | ||
| 134 | |||
| 116 | #define MOD_CDCLKCON (1 << 12) | 135 | #define MOD_CDCLKCON (1 << 12) |
| 117 | 136 | ||
| 118 | #define PSR_PSREN (1 << 15) | 137 | #define PSR_PSREN (1 << 15) |