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path: root/sound/soc/rockchip/rockchip_i2s.c
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Diffstat (limited to 'sound/soc/rockchip/rockchip_i2s.c')
-rw-r--r--sound/soc/rockchip/rockchip_i2s.c41
1 files changed, 25 insertions, 16 deletions
diff --git a/sound/soc/rockchip/rockchip_i2s.c b/sound/soc/rockchip/rockchip_i2s.c
index 8d8e4b59049f..033487c9a164 100644
--- a/sound/soc/rockchip/rockchip_i2s.c
+++ b/sound/soc/rockchip/rockchip_i2s.c
@@ -165,13 +165,14 @@ static int rockchip_i2s_set_fmt(struct snd_soc_dai *cpu_dai,
165 struct rk_i2s_dev *i2s = to_info(cpu_dai); 165 struct rk_i2s_dev *i2s = to_info(cpu_dai);
166 unsigned int mask = 0, val = 0; 166 unsigned int mask = 0, val = 0;
167 167
168 mask = I2S_CKR_MSS_SLAVE; 168 mask = I2S_CKR_MSS_MASK;
169 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 169 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
170 case SND_SOC_DAIFMT_CBS_CFS: 170 case SND_SOC_DAIFMT_CBS_CFS:
171 val = I2S_CKR_MSS_SLAVE; 171 /* Set source clock in Master mode */
172 val = I2S_CKR_MSS_MASTER;
172 break; 173 break;
173 case SND_SOC_DAIFMT_CBM_CFM: 174 case SND_SOC_DAIFMT_CBM_CFM:
174 val = I2S_CKR_MSS_MASTER; 175 val = I2S_CKR_MSS_SLAVE;
175 break; 176 break;
176 default: 177 default:
177 return -EINVAL; 178 return -EINVAL;
@@ -243,16 +244,6 @@ static int rockchip_i2s_hw_params(struct snd_pcm_substream *substream,
243 regmap_update_bits(i2s->regmap, I2S_TXCR, I2S_TXCR_VDW_MASK, val); 244 regmap_update_bits(i2s->regmap, I2S_TXCR, I2S_TXCR_VDW_MASK, val);
244 regmap_update_bits(i2s->regmap, I2S_RXCR, I2S_RXCR_VDW_MASK, val); 245 regmap_update_bits(i2s->regmap, I2S_RXCR, I2S_RXCR_VDW_MASK, val);
245 246
246 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
247 dai->playback_dma_data = &i2s->playback_dma_data;
248 regmap_update_bits(i2s->regmap, I2S_DMACR, I2S_DMACR_TDL_MASK,
249 I2S_DMACR_TDL(1) | I2S_DMACR_TDE_ENABLE);
250 } else {
251 dai->capture_dma_data = &i2s->capture_dma_data;
252 regmap_update_bits(i2s->regmap, I2S_DMACR, I2S_DMACR_RDL_MASK,
253 I2S_DMACR_RDL(1) | I2S_DMACR_RDE_ENABLE);
254 }
255
256 return 0; 247 return 0;
257} 248}
258 249
@@ -300,6 +291,16 @@ static int rockchip_i2s_set_sysclk(struct snd_soc_dai *cpu_dai, int clk_id,
300 return ret; 291 return ret;
301} 292}
302 293
294static int rockchip_i2s_dai_probe(struct snd_soc_dai *dai)
295{
296 struct rk_i2s_dev *i2s = snd_soc_dai_get_drvdata(dai);
297
298 dai->capture_dma_data = &i2s->capture_dma_data;
299 dai->playback_dma_data = &i2s->playback_dma_data;
300
301 return 0;
302}
303
303static const struct snd_soc_dai_ops rockchip_i2s_dai_ops = { 304static const struct snd_soc_dai_ops rockchip_i2s_dai_ops = {
304 .hw_params = rockchip_i2s_hw_params, 305 .hw_params = rockchip_i2s_hw_params,
305 .set_sysclk = rockchip_i2s_set_sysclk, 306 .set_sysclk = rockchip_i2s_set_sysclk,
@@ -308,7 +309,9 @@ static const struct snd_soc_dai_ops rockchip_i2s_dai_ops = {
308}; 309};
309 310
310static struct snd_soc_dai_driver rockchip_i2s_dai = { 311static struct snd_soc_dai_driver rockchip_i2s_dai = {
312 .probe = rockchip_i2s_dai_probe,
311 .playback = { 313 .playback = {
314 .stream_name = "Playback",
312 .channels_min = 2, 315 .channels_min = 2,
313 .channels_max = 8, 316 .channels_max = 8,
314 .rates = SNDRV_PCM_RATE_8000_192000, 317 .rates = SNDRV_PCM_RATE_8000_192000,
@@ -318,6 +321,7 @@ static struct snd_soc_dai_driver rockchip_i2s_dai = {
318 SNDRV_PCM_FMTBIT_S24_LE), 321 SNDRV_PCM_FMTBIT_S24_LE),
319 }, 322 },
320 .capture = { 323 .capture = {
324 .stream_name = "Capture",
321 .channels_min = 2, 325 .channels_min = 2,
322 .channels_max = 2, 326 .channels_max = 2,
323 .rates = SNDRV_PCM_RATE_8000_192000, 327 .rates = SNDRV_PCM_RATE_8000_192000,
@@ -361,6 +365,8 @@ static bool rockchip_i2s_rd_reg(struct device *dev, unsigned int reg)
361 case I2S_XFER: 365 case I2S_XFER:
362 case I2S_CLR: 366 case I2S_CLR:
363 case I2S_RXDR: 367 case I2S_RXDR:
368 case I2S_FIFOLR:
369 case I2S_INTSR:
364 return true; 370 return true;
365 default: 371 default:
366 return false; 372 return false;
@@ -370,8 +376,8 @@ static bool rockchip_i2s_rd_reg(struct device *dev, unsigned int reg)
370static bool rockchip_i2s_volatile_reg(struct device *dev, unsigned int reg) 376static bool rockchip_i2s_volatile_reg(struct device *dev, unsigned int reg)
371{ 377{
372 switch (reg) { 378 switch (reg) {
373 case I2S_FIFOLR:
374 case I2S_INTSR: 379 case I2S_INTSR:
380 case I2S_CLR:
375 return true; 381 return true;
376 default: 382 default:
377 return false; 383 return false;
@@ -381,8 +387,6 @@ static bool rockchip_i2s_volatile_reg(struct device *dev, unsigned int reg)
381static bool rockchip_i2s_precious_reg(struct device *dev, unsigned int reg) 387static bool rockchip_i2s_precious_reg(struct device *dev, unsigned int reg)
382{ 388{
383 switch (reg) { 389 switch (reg) {
384 case I2S_FIFOLR:
385 return true;
386 default: 390 default:
387 return false; 391 return false;
388 } 392 }
@@ -419,6 +423,11 @@ static int rockchip_i2s_probe(struct platform_device *pdev)
419 dev_err(&pdev->dev, "Can't retrieve i2s bus clock\n"); 423 dev_err(&pdev->dev, "Can't retrieve i2s bus clock\n");
420 return PTR_ERR(i2s->hclk); 424 return PTR_ERR(i2s->hclk);
421 } 425 }
426 ret = clk_prepare_enable(i2s->hclk);
427 if (ret) {
428 dev_err(i2s->dev, "hclock enable failed %d\n", ret);
429 return ret;
430 }
422 431
423 i2s->mclk = devm_clk_get(&pdev->dev, "i2s_clk"); 432 i2s->mclk = devm_clk_get(&pdev->dev, "i2s_clk");
424 if (IS_ERR(i2s->mclk)) { 433 if (IS_ERR(i2s->mclk)) {