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Diffstat (limited to 'sound/soc/codecs/tlv320dac33.c')
-rw-r--r--sound/soc/codecs/tlv320dac33.c543
1 files changed, 386 insertions, 157 deletions
diff --git a/sound/soc/codecs/tlv320dac33.c b/sound/soc/codecs/tlv320dac33.c
index d1e0e81ef30c..65adc77eada1 100644
--- a/sound/soc/codecs/tlv320dac33.c
+++ b/sound/soc/codecs/tlv320dac33.c
@@ -51,6 +51,20 @@
51 51
52#define LATENCY_TIME_MS 20 52#define LATENCY_TIME_MS 20
53 53
54#define MODE7_LTHR 10
55#define MODE7_UTHR (DAC33_BUFFER_SIZE_SAMPLES - 10)
56
57#define BURST_BASEFREQ_HZ 49152000
58
59#define SAMPLES_TO_US(rate, samples) \
60 (1000000000 / ((rate * 1000) / samples))
61
62#define US_TO_SAMPLES(rate, us) \
63 (rate / (1000000 / us))
64
65static void dac33_calculate_times(struct snd_pcm_substream *substream);
66static int dac33_prepare_chip(struct snd_pcm_substream *substream);
67
54static struct snd_soc_codec *tlv320dac33_codec; 68static struct snd_soc_codec *tlv320dac33_codec;
55 69
56enum dac33_state { 70enum dac33_state {
@@ -80,6 +94,7 @@ struct tlv320dac33_priv {
80 struct work_struct work; 94 struct work_struct work;
81 struct snd_soc_codec codec; 95 struct snd_soc_codec codec;
82 struct regulator_bulk_data supplies[DAC33_NUM_SUPPLIES]; 96 struct regulator_bulk_data supplies[DAC33_NUM_SUPPLIES];
97 struct snd_pcm_substream *substream;
83 int power_gpio; 98 int power_gpio;
84 int chip_power; 99 int chip_power;
85 int irq; 100 int irq;
@@ -93,6 +108,17 @@ struct tlv320dac33_priv {
93 enum dac33_fifo_modes fifo_mode;/* FIFO mode selection */ 108 enum dac33_fifo_modes fifo_mode;/* FIFO mode selection */
94 unsigned int nsample; /* burst read amount from host */ 109 unsigned int nsample; /* burst read amount from host */
95 u8 burst_bclkdiv; /* BCLK divider value in burst mode */ 110 u8 burst_bclkdiv; /* BCLK divider value in burst mode */
111 unsigned int burst_rate; /* Interface speed in Burst modes */
112
113 int keep_bclk; /* Keep the BCLK continuously running
114 * in FIFO modes */
115 spinlock_t lock;
116 unsigned long long t_stamp1; /* Time stamp for FIFO modes to */
117 unsigned long long t_stamp2; /* calculate the FIFO caused delay */
118
119 unsigned int mode1_us_burst; /* Time to burst read n number of
120 * samples */
121 unsigned int mode7_us_to_lthr; /* Time to reach lthr from uthr */
96 122
97 enum dac33_state state; 123 enum dac33_state state;
98}; 124};
@@ -166,7 +192,7 @@ static inline void dac33_write_reg_cache(struct snd_soc_codec *codec,
166static int dac33_read(struct snd_soc_codec *codec, unsigned int reg, 192static int dac33_read(struct snd_soc_codec *codec, unsigned int reg,
167 u8 *value) 193 u8 *value)
168{ 194{
169 struct tlv320dac33_priv *dac33 = codec->private_data; 195 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
170 int val; 196 int val;
171 197
172 *value = reg & 0xff; 198 *value = reg & 0xff;
@@ -191,7 +217,7 @@ static int dac33_read(struct snd_soc_codec *codec, unsigned int reg,
191static int dac33_write(struct snd_soc_codec *codec, unsigned int reg, 217static int dac33_write(struct snd_soc_codec *codec, unsigned int reg,
192 unsigned int value) 218 unsigned int value)
193{ 219{
194 struct tlv320dac33_priv *dac33 = codec->private_data; 220 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
195 u8 data[2]; 221 u8 data[2];
196 int ret = 0; 222 int ret = 0;
197 223
@@ -218,7 +244,7 @@ static int dac33_write(struct snd_soc_codec *codec, unsigned int reg,
218static int dac33_write_locked(struct snd_soc_codec *codec, unsigned int reg, 244static int dac33_write_locked(struct snd_soc_codec *codec, unsigned int reg,
219 unsigned int value) 245 unsigned int value)
220{ 246{
221 struct tlv320dac33_priv *dac33 = codec->private_data; 247 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
222 int ret; 248 int ret;
223 249
224 mutex_lock(&dac33->mutex); 250 mutex_lock(&dac33->mutex);
@@ -232,7 +258,7 @@ static int dac33_write_locked(struct snd_soc_codec *codec, unsigned int reg,
232static int dac33_write16(struct snd_soc_codec *codec, unsigned int reg, 258static int dac33_write16(struct snd_soc_codec *codec, unsigned int reg,
233 unsigned int value) 259 unsigned int value)
234{ 260{
235 struct tlv320dac33_priv *dac33 = codec->private_data; 261 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
236 u8 data[3]; 262 u8 data[3];
237 int ret = 0; 263 int ret = 0;
238 264
@@ -262,45 +288,47 @@ static int dac33_write16(struct snd_soc_codec *codec, unsigned int reg,
262 return ret; 288 return ret;
263} 289}
264 290
265static void dac33_restore_regs(struct snd_soc_codec *codec) 291static void dac33_init_chip(struct snd_soc_codec *codec)
266{ 292{
267 struct tlv320dac33_priv *dac33 = codec->private_data; 293 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
268 u8 *cache = codec->reg_cache;
269 u8 data[2];
270 int i, ret;
271 294
272 if (!dac33->chip_power) 295 if (unlikely(!dac33->chip_power))
273 return; 296 return;
274 297
275 for (i = DAC33_PWR_CTRL; i <= DAC33_INTP_CTRL_B; i++) { 298 /* 44-46: DAC Control Registers */
276 data[0] = i; 299 /* A : DAC sample rate Fsref/1.5 */
277 data[1] = cache[i]; 300 dac33_write(codec, DAC33_DAC_CTRL_A, DAC33_DACRATE(0));
278 /* Skip the read only registers */ 301 /* B : DAC src=normal, not muted */
279 if ((i >= DAC33_INT_OSC_STATUS && 302 dac33_write(codec, DAC33_DAC_CTRL_B, DAC33_DACSRCR_RIGHT |
280 i <= DAC33_INT_OSC_FREQ_RAT_READ_B) || 303 DAC33_DACSRCL_LEFT);
281 (i >= DAC33_FIFO_WPTR_MSB && i <= DAC33_FIFO_IRQ_FLAG) || 304 /* C : (defaults) */
282 i == DAC33_DAC_STATUS_FLAGS || 305 dac33_write(codec, DAC33_DAC_CTRL_C, 0x00);
283 i == DAC33_SRC_EST_REF_CLK_RATIO_A || 306
284 i == DAC33_SRC_EST_REF_CLK_RATIO_B) 307 /* 73 : volume soft stepping control,
285 continue; 308 clock source = internal osc (?) */
286 ret = codec->hw_write(codec->control_data, data, 2); 309 dac33_write(codec, DAC33_ANA_VOL_SOFT_STEP_CTRL, DAC33_VOLCLKEN);
287 if (ret != 2) 310
288 dev_err(codec->dev, "Write failed (%d)\n", ret); 311 dac33_write(codec, DAC33_PWR_CTRL, DAC33_PDNALLB);
289 } 312
290 for (i = DAC33_LDAC_PWR_CTRL; i <= DAC33_LINEL_TO_LLO_VOL; i++) { 313 /* Restore only selected registers (gains mostly) */
291 data[0] = i; 314 dac33_write(codec, DAC33_LDAC_DIG_VOL_CTRL,
292 data[1] = cache[i]; 315 dac33_read_reg_cache(codec, DAC33_LDAC_DIG_VOL_CTRL));
293 ret = codec->hw_write(codec->control_data, data, 2); 316 dac33_write(codec, DAC33_RDAC_DIG_VOL_CTRL,
294 if (ret != 2) 317 dac33_read_reg_cache(codec, DAC33_RDAC_DIG_VOL_CTRL));
295 dev_err(codec->dev, "Write failed (%d)\n", ret); 318
296 } 319 dac33_write(codec, DAC33_LINEL_TO_LLO_VOL,
297 for (i = DAC33_LINER_TO_RLO_VOL; i <= DAC33_OSC_TRIM; i++) { 320 dac33_read_reg_cache(codec, DAC33_LINEL_TO_LLO_VOL));
298 data[0] = i; 321 dac33_write(codec, DAC33_LINER_TO_RLO_VOL,
299 data[1] = cache[i]; 322 dac33_read_reg_cache(codec, DAC33_LINER_TO_RLO_VOL));
300 ret = codec->hw_write(codec->control_data, data, 2); 323}
301 if (ret != 2) 324
302 dev_err(codec->dev, "Write failed (%d)\n", ret); 325static inline void dac33_read_id(struct snd_soc_codec *codec)
303 } 326{
327 u8 reg;
328
329 dac33_read(codec, DAC33_DEVICE_ID_MSB, &reg);
330 dac33_read(codec, DAC33_DEVICE_ID_LSB, &reg);
331 dac33_read(codec, DAC33_DEVICE_REV_ID, &reg);
304} 332}
305 333
306static inline void dac33_soft_power(struct snd_soc_codec *codec, int power) 334static inline void dac33_soft_power(struct snd_soc_codec *codec, int power)
@@ -311,16 +339,25 @@ static inline void dac33_soft_power(struct snd_soc_codec *codec, int power)
311 if (power) 339 if (power)
312 reg |= DAC33_PDNALLB; 340 reg |= DAC33_PDNALLB;
313 else 341 else
314 reg &= ~DAC33_PDNALLB; 342 reg &= ~(DAC33_PDNALLB | DAC33_OSCPDNB |
343 DAC33_DACRPDNB | DAC33_DACLPDNB);
315 dac33_write(codec, DAC33_PWR_CTRL, reg); 344 dac33_write(codec, DAC33_PWR_CTRL, reg);
316} 345}
317 346
318static int dac33_hard_power(struct snd_soc_codec *codec, int power) 347static int dac33_hard_power(struct snd_soc_codec *codec, int power)
319{ 348{
320 struct tlv320dac33_priv *dac33 = codec->private_data; 349 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
321 int ret; 350 int ret = 0;
322 351
323 mutex_lock(&dac33->mutex); 352 mutex_lock(&dac33->mutex);
353
354 /* Safety check */
355 if (unlikely(power == dac33->chip_power)) {
356 dev_dbg(codec->dev, "Trying to set the same power state: %s\n",
357 power ? "ON" : "OFF");
358 goto exit;
359 }
360
324 if (power) { 361 if (power) {
325 ret = regulator_bulk_enable(ARRAY_SIZE(dac33->supplies), 362 ret = regulator_bulk_enable(ARRAY_SIZE(dac33->supplies),
326 dac33->supplies); 363 dac33->supplies);
@@ -334,11 +371,6 @@ static int dac33_hard_power(struct snd_soc_codec *codec, int power)
334 gpio_set_value(dac33->power_gpio, 1); 371 gpio_set_value(dac33->power_gpio, 1);
335 372
336 dac33->chip_power = 1; 373 dac33->chip_power = 1;
337
338 /* Restore registers */
339 dac33_restore_regs(codec);
340
341 dac33_soft_power(codec, 1);
342 } else { 374 } else {
343 dac33_soft_power(codec, 0); 375 dac33_soft_power(codec, 0);
344 if (dac33->power_gpio >= 0) 376 if (dac33->power_gpio >= 0)
@@ -360,11 +392,27 @@ exit:
360 return ret; 392 return ret;
361} 393}
362 394
395static int playback_event(struct snd_soc_dapm_widget *w,
396 struct snd_kcontrol *kcontrol, int event)
397{
398 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(w->codec);
399
400 switch (event) {
401 case SND_SOC_DAPM_PRE_PMU:
402 if (likely(dac33->substream)) {
403 dac33_calculate_times(dac33->substream);
404 dac33_prepare_chip(dac33->substream);
405 }
406 break;
407 }
408 return 0;
409}
410
363static int dac33_get_nsample(struct snd_kcontrol *kcontrol, 411static int dac33_get_nsample(struct snd_kcontrol *kcontrol,
364 struct snd_ctl_elem_value *ucontrol) 412 struct snd_ctl_elem_value *ucontrol)
365{ 413{
366 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 414 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
367 struct tlv320dac33_priv *dac33 = codec->private_data; 415 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
368 416
369 ucontrol->value.integer.value[0] = dac33->nsample; 417 ucontrol->value.integer.value[0] = dac33->nsample;
370 418
@@ -375,17 +423,21 @@ static int dac33_set_nsample(struct snd_kcontrol *kcontrol,
375 struct snd_ctl_elem_value *ucontrol) 423 struct snd_ctl_elem_value *ucontrol)
376{ 424{
377 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 425 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
378 struct tlv320dac33_priv *dac33 = codec->private_data; 426 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
379 int ret = 0; 427 int ret = 0;
380 428
381 if (dac33->nsample == ucontrol->value.integer.value[0]) 429 if (dac33->nsample == ucontrol->value.integer.value[0])
382 return 0; 430 return 0;
383 431
384 if (ucontrol->value.integer.value[0] < dac33->nsample_min || 432 if (ucontrol->value.integer.value[0] < dac33->nsample_min ||
385 ucontrol->value.integer.value[0] > dac33->nsample_max) 433 ucontrol->value.integer.value[0] > dac33->nsample_max) {
386 ret = -EINVAL; 434 ret = -EINVAL;
387 else 435 } else {
388 dac33->nsample = ucontrol->value.integer.value[0]; 436 dac33->nsample = ucontrol->value.integer.value[0];
437 /* Re calculate the burst time */
438 dac33->mode1_us_burst = SAMPLES_TO_US(dac33->burst_rate,
439 dac33->nsample);
440 }
389 441
390 return ret; 442 return ret;
391} 443}
@@ -394,7 +446,7 @@ static int dac33_get_fifo_mode(struct snd_kcontrol *kcontrol,
394 struct snd_ctl_elem_value *ucontrol) 446 struct snd_ctl_elem_value *ucontrol)
395{ 447{
396 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 448 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
397 struct tlv320dac33_priv *dac33 = codec->private_data; 449 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
398 450
399 ucontrol->value.integer.value[0] = dac33->fifo_mode; 451 ucontrol->value.integer.value[0] = dac33->fifo_mode;
400 452
@@ -405,7 +457,7 @@ static int dac33_set_fifo_mode(struct snd_kcontrol *kcontrol,
405 struct snd_ctl_elem_value *ucontrol) 457 struct snd_ctl_elem_value *ucontrol)
406{ 458{
407 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 459 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
408 struct tlv320dac33_priv *dac33 = codec->private_data; 460 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
409 int ret = 0; 461 int ret = 0;
410 462
411 if (dac33->fifo_mode == ucontrol->value.integer.value[0]) 463 if (dac33->fifo_mode == ucontrol->value.integer.value[0])
@@ -485,6 +537,8 @@ static const struct snd_soc_dapm_widget dac33_dapm_widgets[] = {
485 DAC33_OUT_AMP_PWR_CTRL, 6, 3, 3, 0), 537 DAC33_OUT_AMP_PWR_CTRL, 6, 3, 3, 0),
486 SND_SOC_DAPM_REG(snd_soc_dapm_mixer, "Output Right Amp Power", 538 SND_SOC_DAPM_REG(snd_soc_dapm_mixer, "Output Right Amp Power",
487 DAC33_OUT_AMP_PWR_CTRL, 4, 3, 3, 0), 539 DAC33_OUT_AMP_PWR_CTRL, 4, 3, 3, 0),
540
541 SND_SOC_DAPM_PRE("Prepare Playback", playback_event),
488}; 542};
489 543
490static const struct snd_soc_dapm_route audio_map[] = { 544static const struct snd_soc_dapm_route audio_map[] = {
@@ -527,18 +581,21 @@ static int dac33_set_bias_level(struct snd_soc_codec *codec,
527 break; 581 break;
528 case SND_SOC_BIAS_STANDBY: 582 case SND_SOC_BIAS_STANDBY:
529 if (codec->bias_level == SND_SOC_BIAS_OFF) { 583 if (codec->bias_level == SND_SOC_BIAS_OFF) {
584 /* Coming from OFF, switch on the codec */
530 ret = dac33_hard_power(codec, 1); 585 ret = dac33_hard_power(codec, 1);
531 if (ret != 0) 586 if (ret != 0)
532 return ret; 587 return ret;
533 }
534 588
535 dac33_soft_power(codec, 0); 589 dac33_init_chip(codec);
590 }
536 break; 591 break;
537 case SND_SOC_BIAS_OFF: 592 case SND_SOC_BIAS_OFF:
593 /* Do not power off, when the codec is already off */
594 if (codec->bias_level == SND_SOC_BIAS_OFF)
595 return 0;
538 ret = dac33_hard_power(codec, 0); 596 ret = dac33_hard_power(codec, 0);
539 if (ret != 0) 597 if (ret != 0)
540 return ret; 598 return ret;
541
542 break; 599 break;
543 } 600 }
544 codec->bias_level = level; 601 codec->bias_level = level;
@@ -555,13 +612,34 @@ static inline void dac33_prefill_handler(struct tlv320dac33_priv *dac33)
555 switch (dac33->fifo_mode) { 612 switch (dac33->fifo_mode) {
556 case DAC33_FIFO_MODE1: 613 case DAC33_FIFO_MODE1:
557 dac33_write16(codec, DAC33_NSAMPLE_MSB, 614 dac33_write16(codec, DAC33_NSAMPLE_MSB,
558 DAC33_THRREG(dac33->nsample)); 615 DAC33_THRREG(dac33->nsample + dac33->alarm_threshold));
616
617 /* Take the timestamps */
618 spin_lock_irq(&dac33->lock);
619 dac33->t_stamp2 = ktime_to_us(ktime_get());
620 dac33->t_stamp1 = dac33->t_stamp2;
621 spin_unlock_irq(&dac33->lock);
622
559 dac33_write16(codec, DAC33_PREFILL_MSB, 623 dac33_write16(codec, DAC33_PREFILL_MSB,
560 DAC33_THRREG(dac33->alarm_threshold)); 624 DAC33_THRREG(dac33->alarm_threshold));
625 /* Enable Alarm Threshold IRQ with a delay */
626 udelay(SAMPLES_TO_US(dac33->burst_rate,
627 dac33->alarm_threshold));
628 dac33_write(codec, DAC33_FIFO_IRQ_MASK, DAC33_MAT);
561 break; 629 break;
562 case DAC33_FIFO_MODE7: 630 case DAC33_FIFO_MODE7:
631 /* Take the timestamp */
632 spin_lock_irq(&dac33->lock);
633 dac33->t_stamp1 = ktime_to_us(ktime_get());
634 /* Move back the timestamp with drain time */
635 dac33->t_stamp1 -= dac33->mode7_us_to_lthr;
636 spin_unlock_irq(&dac33->lock);
637
563 dac33_write16(codec, DAC33_PREFILL_MSB, 638 dac33_write16(codec, DAC33_PREFILL_MSB,
564 DAC33_THRREG(10)); 639 DAC33_THRREG(MODE7_LTHR));
640
641 /* Enable Upper Threshold IRQ */
642 dac33_write(codec, DAC33_FIFO_IRQ_MASK, DAC33_MUT);
565 break; 643 break;
566 default: 644 default:
567 dev_warn(codec->dev, "Unhandled FIFO mode: %d\n", 645 dev_warn(codec->dev, "Unhandled FIFO mode: %d\n",
@@ -578,6 +656,11 @@ static inline void dac33_playback_handler(struct tlv320dac33_priv *dac33)
578 656
579 switch (dac33->fifo_mode) { 657 switch (dac33->fifo_mode) {
580 case DAC33_FIFO_MODE1: 658 case DAC33_FIFO_MODE1:
659 /* Take the timestamp */
660 spin_lock_irq(&dac33->lock);
661 dac33->t_stamp2 = ktime_to_us(ktime_get());
662 spin_unlock_irq(&dac33->lock);
663
581 dac33_write16(codec, DAC33_NSAMPLE_MSB, 664 dac33_write16(codec, DAC33_NSAMPLE_MSB,
582 DAC33_THRREG(dac33->nsample)); 665 DAC33_THRREG(dac33->nsample));
583 break; 666 break;
@@ -628,31 +711,17 @@ static void dac33_work(struct work_struct *work)
628static irqreturn_t dac33_interrupt_handler(int irq, void *dev) 711static irqreturn_t dac33_interrupt_handler(int irq, void *dev)
629{ 712{
630 struct snd_soc_codec *codec = dev; 713 struct snd_soc_codec *codec = dev;
631 struct tlv320dac33_priv *dac33 = codec->private_data; 714 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
632
633 queue_work(dac33->dac33_wq, &dac33->work);
634 715
635 return IRQ_HANDLED; 716 spin_lock(&dac33->lock);
636} 717 dac33->t_stamp1 = ktime_to_us(ktime_get());
718 spin_unlock(&dac33->lock);
637 719
638static void dac33_shutdown(struct snd_pcm_substream *substream, 720 /* Do not schedule the workqueue in Mode7 */
639 struct snd_soc_dai *dai) 721 if (dac33->fifo_mode != DAC33_FIFO_MODE7)
640{ 722 queue_work(dac33->dac33_wq, &dac33->work);
641 struct snd_soc_pcm_runtime *rtd = substream->private_data;
642 struct snd_soc_device *socdev = rtd->socdev;
643 struct snd_soc_codec *codec = socdev->card->codec;
644 struct tlv320dac33_priv *dac33 = codec->private_data;
645 unsigned int pwr_ctrl;
646 723
647 /* Stop pending workqueue */ 724 return IRQ_HANDLED;
648 if (dac33->fifo_mode)
649 cancel_work_sync(&dac33->work);
650
651 mutex_lock(&dac33->mutex);
652 pwr_ctrl = dac33_read_reg_cache(codec, DAC33_PWR_CTRL);
653 pwr_ctrl &= ~(DAC33_OSCPDNB | DAC33_DACRPDNB | DAC33_DACLPDNB);
654 dac33_write(codec, DAC33_PWR_CTRL, pwr_ctrl);
655 mutex_unlock(&dac33->mutex);
656} 725}
657 726
658static void dac33_oscwait(struct snd_soc_codec *codec) 727static void dac33_oscwait(struct snd_soc_codec *codec)
@@ -669,6 +738,31 @@ static void dac33_oscwait(struct snd_soc_codec *codec)
669 "internal oscillator calibration failed\n"); 738 "internal oscillator calibration failed\n");
670} 739}
671 740
741static int dac33_startup(struct snd_pcm_substream *substream,
742 struct snd_soc_dai *dai)
743{
744 struct snd_soc_pcm_runtime *rtd = substream->private_data;
745 struct snd_soc_device *socdev = rtd->socdev;
746 struct snd_soc_codec *codec = socdev->card->codec;
747 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
748
749 /* Stream started, save the substream pointer */
750 dac33->substream = substream;
751
752 return 0;
753}
754
755static void dac33_shutdown(struct snd_pcm_substream *substream,
756 struct snd_soc_dai *dai)
757{
758 struct snd_soc_pcm_runtime *rtd = substream->private_data;
759 struct snd_soc_device *socdev = rtd->socdev;
760 struct snd_soc_codec *codec = socdev->card->codec;
761 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
762
763 dac33->substream = NULL;
764}
765
672static int dac33_hw_params(struct snd_pcm_substream *substream, 766static int dac33_hw_params(struct snd_pcm_substream *substream,
673 struct snd_pcm_hw_params *params, 767 struct snd_pcm_hw_params *params,
674 struct snd_soc_dai *dai) 768 struct snd_soc_dai *dai)
@@ -715,7 +809,7 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream)
715 struct snd_soc_pcm_runtime *rtd = substream->private_data; 809 struct snd_soc_pcm_runtime *rtd = substream->private_data;
716 struct snd_soc_device *socdev = rtd->socdev; 810 struct snd_soc_device *socdev = rtd->socdev;
717 struct snd_soc_codec *codec = socdev->card->codec; 811 struct snd_soc_codec *codec = socdev->card->codec;
718 struct tlv320dac33_priv *dac33 = codec->private_data; 812 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
719 unsigned int oscset, ratioset, pwr_ctrl, reg_tmp; 813 unsigned int oscset, ratioset, pwr_ctrl, reg_tmp;
720 u8 aictrl_a, aictrl_b, fifoctrl_a; 814 u8 aictrl_a, aictrl_b, fifoctrl_a;
721 815
@@ -752,6 +846,17 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream)
752 } 846 }
753 847
754 mutex_lock(&dac33->mutex); 848 mutex_lock(&dac33->mutex);
849
850 if (!dac33->chip_power) {
851 /*
852 * Chip is not powered yet.
853 * Do the init in the dac33_set_bias_level later.
854 */
855 mutex_unlock(&dac33->mutex);
856 return 0;
857 }
858
859 dac33_soft_power(codec, 0);
755 dac33_soft_power(codec, 1); 860 dac33_soft_power(codec, 1);
756 861
757 reg_tmp = dac33_read_reg_cache(codec, DAC33_INT_OSC_CTRL); 862 reg_tmp = dac33_read_reg_cache(codec, DAC33_INT_OSC_CTRL);
@@ -799,11 +904,10 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream)
799 case DAC33_FIFO_MODE1: 904 case DAC33_FIFO_MODE1:
800 dac33_write(codec, DAC33_FIFO_IRQ_MODE_B, 905 dac33_write(codec, DAC33_FIFO_IRQ_MODE_B,
801 DAC33_ATM(DAC33_FIFO_IRQ_MODE_LEVEL)); 906 DAC33_ATM(DAC33_FIFO_IRQ_MODE_LEVEL));
802 dac33_write(codec, DAC33_FIFO_IRQ_MASK, DAC33_MAT);
803 break; 907 break;
804 case DAC33_FIFO_MODE7: 908 case DAC33_FIFO_MODE7:
805 /* Disable all interrupts */ 909 dac33_write(codec, DAC33_FIFO_IRQ_MODE_A,
806 dac33_write(codec, DAC33_FIFO_IRQ_MASK, 0); 910 DAC33_UTM(DAC33_FIFO_IRQ_MODE_LEVEL));
807 break; 911 break;
808 default: 912 default:
809 /* in FIFO bypass mode, the interrupts are not used */ 913 /* in FIFO bypass mode, the interrupts are not used */
@@ -822,7 +926,10 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream)
822 */ 926 */
823 fifoctrl_a &= ~DAC33_FBYPAS; 927 fifoctrl_a &= ~DAC33_FBYPAS;
824 fifoctrl_a &= ~DAC33_FAUTO; 928 fifoctrl_a &= ~DAC33_FAUTO;
825 aictrl_b &= ~DAC33_BCLKON; 929 if (dac33->keep_bclk)
930 aictrl_b |= DAC33_BCLKON;
931 else
932 aictrl_b &= ~DAC33_BCLKON;
826 break; 933 break;
827 case DAC33_FIFO_MODE7: 934 case DAC33_FIFO_MODE7:
828 /* 935 /*
@@ -833,7 +940,10 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream)
833 */ 940 */
834 fifoctrl_a &= ~DAC33_FBYPAS; 941 fifoctrl_a &= ~DAC33_FBYPAS;
835 fifoctrl_a |= DAC33_FAUTO; 942 fifoctrl_a |= DAC33_FAUTO;
836 aictrl_b &= ~DAC33_BCLKON; 943 if (dac33->keep_bclk)
944 aictrl_b |= DAC33_BCLKON;
945 else
946 aictrl_b &= ~DAC33_BCLKON;
837 break; 947 break;
838 default: 948 default:
839 /* 949 /*
@@ -875,10 +985,8 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream)
875 * Configure the threshold levels, and leave 10 sample space 985 * Configure the threshold levels, and leave 10 sample space
876 * at the bottom, and also at the top of the FIFO 986 * at the bottom, and also at the top of the FIFO
877 */ 987 */
878 dac33_write16(codec, DAC33_UTHR_MSB, 988 dac33_write16(codec, DAC33_UTHR_MSB, DAC33_THRREG(MODE7_UTHR));
879 DAC33_THRREG(DAC33_BUFFER_SIZE_SAMPLES - 10)); 989 dac33_write16(codec, DAC33_LTHR_MSB, DAC33_THRREG(MODE7_LTHR));
880 dac33_write16(codec, DAC33_LTHR_MSB,
881 DAC33_THRREG(10));
882 break; 990 break;
883 default: 991 default:
884 break; 992 break;
@@ -894,9 +1002,13 @@ static void dac33_calculate_times(struct snd_pcm_substream *substream)
894 struct snd_soc_pcm_runtime *rtd = substream->private_data; 1002 struct snd_soc_pcm_runtime *rtd = substream->private_data;
895 struct snd_soc_device *socdev = rtd->socdev; 1003 struct snd_soc_device *socdev = rtd->socdev;
896 struct snd_soc_codec *codec = socdev->card->codec; 1004 struct snd_soc_codec *codec = socdev->card->codec;
897 struct tlv320dac33_priv *dac33 = codec->private_data; 1005 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
898 unsigned int nsample_limit; 1006 unsigned int nsample_limit;
899 1007
1008 /* In bypass mode we don't need to calculate */
1009 if (!dac33->fifo_mode)
1010 return;
1011
900 /* Number of samples (16bit, stereo) in one period */ 1012 /* Number of samples (16bit, stereo) in one period */
901 dac33->nsample_min = snd_pcm_lib_period_bytes(substream) / 4; 1013 dac33->nsample_min = snd_pcm_lib_period_bytes(substream) / 4;
902 1014
@@ -930,15 +1042,24 @@ static void dac33_calculate_times(struct snd_pcm_substream *substream)
930 1042
931 if (dac33->nsample > dac33->nsample_max) 1043 if (dac33->nsample > dac33->nsample_max)
932 dac33->nsample = dac33->nsample_max; 1044 dac33->nsample = dac33->nsample_max;
933}
934 1045
935static int dac33_pcm_prepare(struct snd_pcm_substream *substream, 1046 switch (dac33->fifo_mode) {
936 struct snd_soc_dai *dai) 1047 case DAC33_FIFO_MODE1:
937{ 1048 dac33->mode1_us_burst = SAMPLES_TO_US(dac33->burst_rate,
938 dac33_calculate_times(substream); 1049 dac33->nsample);
939 dac33_prepare_chip(substream); 1050 dac33->t_stamp1 = 0;
1051 dac33->t_stamp2 = 0;
1052 break;
1053 case DAC33_FIFO_MODE7:
1054 dac33->mode7_us_to_lthr =
1055 SAMPLES_TO_US(substream->runtime->rate,
1056 MODE7_UTHR - MODE7_LTHR + 1);
1057 dac33->t_stamp1 = 0;
1058 break;
1059 default:
1060 break;
1061 }
940 1062
941 return 0;
942} 1063}
943 1064
944static int dac33_pcm_trigger(struct snd_pcm_substream *substream, int cmd, 1065static int dac33_pcm_trigger(struct snd_pcm_substream *substream, int cmd,
@@ -947,7 +1068,7 @@ static int dac33_pcm_trigger(struct snd_pcm_substream *substream, int cmd,
947 struct snd_soc_pcm_runtime *rtd = substream->private_data; 1068 struct snd_soc_pcm_runtime *rtd = substream->private_data;
948 struct snd_soc_device *socdev = rtd->socdev; 1069 struct snd_soc_device *socdev = rtd->socdev;
949 struct snd_soc_codec *codec = socdev->card->codec; 1070 struct snd_soc_codec *codec = socdev->card->codec;
950 struct tlv320dac33_priv *dac33 = codec->private_data; 1071 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
951 int ret = 0; 1072 int ret = 0;
952 1073
953 switch (cmd) { 1074 switch (cmd) {
@@ -974,11 +1095,156 @@ static int dac33_pcm_trigger(struct snd_pcm_substream *substream, int cmd,
974 return ret; 1095 return ret;
975} 1096}
976 1097
1098static snd_pcm_sframes_t dac33_dai_delay(
1099 struct snd_pcm_substream *substream,
1100 struct snd_soc_dai *dai)
1101{
1102 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1103 struct snd_soc_device *socdev = rtd->socdev;
1104 struct snd_soc_codec *codec = socdev->card->codec;
1105 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
1106 unsigned long long t0, t1, t_now;
1107 unsigned int time_delta;
1108 int samples_out, samples_in, samples;
1109 snd_pcm_sframes_t delay = 0;
1110
1111 switch (dac33->fifo_mode) {
1112 case DAC33_FIFO_BYPASS:
1113 break;
1114 case DAC33_FIFO_MODE1:
1115 spin_lock(&dac33->lock);
1116 t0 = dac33->t_stamp1;
1117 t1 = dac33->t_stamp2;
1118 spin_unlock(&dac33->lock);
1119 t_now = ktime_to_us(ktime_get());
1120
1121 /* We have not started to fill the FIFO yet, delay is 0 */
1122 if (!t1)
1123 goto out;
1124
1125 if (t0 > t1) {
1126 /*
1127 * Phase 1:
1128 * After Alarm threshold, and before nSample write
1129 */
1130 time_delta = t_now - t0;
1131 samples_out = time_delta ? US_TO_SAMPLES(
1132 substream->runtime->rate,
1133 time_delta) : 0;
1134
1135 if (likely(dac33->alarm_threshold > samples_out))
1136 delay = dac33->alarm_threshold - samples_out;
1137 else
1138 delay = 0;
1139 } else if ((t_now - t1) <= dac33->mode1_us_burst) {
1140 /*
1141 * Phase 2:
1142 * After nSample write (during burst operation)
1143 */
1144 time_delta = t_now - t0;
1145 samples_out = time_delta ? US_TO_SAMPLES(
1146 substream->runtime->rate,
1147 time_delta) : 0;
1148
1149 time_delta = t_now - t1;
1150 samples_in = time_delta ? US_TO_SAMPLES(
1151 dac33->burst_rate,
1152 time_delta) : 0;
1153
1154 samples = dac33->alarm_threshold;
1155 samples += (samples_in - samples_out);
1156
1157 if (likely(samples > 0))
1158 delay = samples;
1159 else
1160 delay = 0;
1161 } else {
1162 /*
1163 * Phase 3:
1164 * After burst operation, before next alarm threshold
1165 */
1166 time_delta = t_now - t0;
1167 samples_out = time_delta ? US_TO_SAMPLES(
1168 substream->runtime->rate,
1169 time_delta) : 0;
1170
1171 samples_in = dac33->nsample;
1172 samples = dac33->alarm_threshold;
1173 samples += (samples_in - samples_out);
1174
1175 if (likely(samples > 0))
1176 delay = samples > DAC33_BUFFER_SIZE_SAMPLES ?
1177 DAC33_BUFFER_SIZE_SAMPLES : samples;
1178 else
1179 delay = 0;
1180 }
1181 break;
1182 case DAC33_FIFO_MODE7:
1183 spin_lock(&dac33->lock);
1184 t0 = dac33->t_stamp1;
1185 spin_unlock(&dac33->lock);
1186 t_now = ktime_to_us(ktime_get());
1187
1188 /* We have not started to fill the FIFO yet, delay is 0 */
1189 if (!t0)
1190 goto out;
1191
1192 if (t_now <= t0) {
1193 /*
1194 * Either the timestamps are messed or equal. Report
1195 * maximum delay
1196 */
1197 delay = MODE7_UTHR;
1198 goto out;
1199 }
1200
1201 time_delta = t_now - t0;
1202 if (time_delta <= dac33->mode7_us_to_lthr) {
1203 /*
1204 * Phase 1:
1205 * After burst (draining phase)
1206 */
1207 samples_out = US_TO_SAMPLES(
1208 substream->runtime->rate,
1209 time_delta);
1210
1211 if (likely(MODE7_UTHR > samples_out))
1212 delay = MODE7_UTHR - samples_out;
1213 else
1214 delay = 0;
1215 } else {
1216 /*
1217 * Phase 2:
1218 * During burst operation
1219 */
1220 time_delta = time_delta - dac33->mode7_us_to_lthr;
1221
1222 samples_out = US_TO_SAMPLES(
1223 substream->runtime->rate,
1224 time_delta);
1225 samples_in = US_TO_SAMPLES(
1226 dac33->burst_rate,
1227 time_delta);
1228 delay = MODE7_LTHR + samples_in - samples_out;
1229
1230 if (unlikely(delay > MODE7_UTHR))
1231 delay = MODE7_UTHR;
1232 }
1233 break;
1234 default:
1235 dev_warn(codec->dev, "Unhandled FIFO mode: %d\n",
1236 dac33->fifo_mode);
1237 break;
1238 }
1239out:
1240 return delay;
1241}
1242
977static int dac33_set_dai_sysclk(struct snd_soc_dai *codec_dai, 1243static int dac33_set_dai_sysclk(struct snd_soc_dai *codec_dai,
978 int clk_id, unsigned int freq, int dir) 1244 int clk_id, unsigned int freq, int dir)
979{ 1245{
980 struct snd_soc_codec *codec = codec_dai->codec; 1246 struct snd_soc_codec *codec = codec_dai->codec;
981 struct tlv320dac33_priv *dac33 = codec->private_data; 1247 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
982 u8 ioc_reg, asrcb_reg; 1248 u8 ioc_reg, asrcb_reg;
983 1249
984 ioc_reg = dac33_read_reg_cache(codec, DAC33_INT_OSC_CTRL); 1250 ioc_reg = dac33_read_reg_cache(codec, DAC33_INT_OSC_CTRL);
@@ -1008,7 +1274,7 @@ static int dac33_set_dai_fmt(struct snd_soc_dai *codec_dai,
1008 unsigned int fmt) 1274 unsigned int fmt)
1009{ 1275{
1010 struct snd_soc_codec *codec = codec_dai->codec; 1276 struct snd_soc_codec *codec = codec_dai->codec;
1011 struct tlv320dac33_priv *dac33 = codec->private_data; 1277 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
1012 u8 aictrl_a, aictrl_b; 1278 u8 aictrl_a, aictrl_b;
1013 1279
1014 aictrl_a = dac33_read_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_A); 1280 aictrl_a = dac33_read_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_A);
@@ -1059,35 +1325,6 @@ static int dac33_set_dai_fmt(struct snd_soc_dai *codec_dai,
1059 return 0; 1325 return 0;
1060} 1326}
1061 1327
1062static void dac33_init_chip(struct snd_soc_codec *codec)
1063{
1064 /* 44-46: DAC Control Registers */
1065 /* A : DAC sample rate Fsref/1.5 */
1066 dac33_write(codec, DAC33_DAC_CTRL_A, DAC33_DACRATE(0));
1067 /* B : DAC src=normal, not muted */
1068 dac33_write(codec, DAC33_DAC_CTRL_B, DAC33_DACSRCR_RIGHT |
1069 DAC33_DACSRCL_LEFT);
1070 /* C : (defaults) */
1071 dac33_write(codec, DAC33_DAC_CTRL_C, 0x00);
1072
1073 /* 64-65 : L&R DAC power control
1074 Line In -> OUT 1V/V Gain, DAC -> OUT 4V/V Gain*/
1075 dac33_write(codec, DAC33_LDAC_PWR_CTRL, DAC33_LROUT_GAIN(2));
1076 dac33_write(codec, DAC33_RDAC_PWR_CTRL, DAC33_LROUT_GAIN(2));
1077
1078 /* 73 : volume soft stepping control,
1079 clock source = internal osc (?) */
1080 dac33_write(codec, DAC33_ANA_VOL_SOFT_STEP_CTRL, DAC33_VOLCLKEN);
1081
1082 /* 66 : LOP/LOM Modes */
1083 dac33_write(codec, DAC33_OUT_AMP_CM_CTRL, 0xff);
1084
1085 /* 68 : LOM inverted from LOP */
1086 dac33_write(codec, DAC33_OUT_AMP_CTRL, (3<<2));
1087
1088 dac33_write(codec, DAC33_PWR_CTRL, DAC33_PDNALLB);
1089}
1090
1091static int dac33_soc_probe(struct platform_device *pdev) 1328static int dac33_soc_probe(struct platform_device *pdev)
1092{ 1329{
1093 struct snd_soc_device *socdev = platform_get_drvdata(pdev); 1330 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
@@ -1099,12 +1336,7 @@ static int dac33_soc_probe(struct platform_device *pdev)
1099 1336
1100 codec = tlv320dac33_codec; 1337 codec = tlv320dac33_codec;
1101 socdev->card->codec = codec; 1338 socdev->card->codec = codec;
1102 dac33 = codec->private_data; 1339 dac33 = snd_soc_codec_get_drvdata(codec);
1103
1104 /* Power up the codec */
1105 dac33_hard_power(codec, 1);
1106 /* Set default configuration */
1107 dac33_init_chip(codec);
1108 1340
1109 /* register pcms */ 1341 /* register pcms */
1110 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); 1342 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
@@ -1122,12 +1354,6 @@ static int dac33_soc_probe(struct platform_device *pdev)
1122 1354
1123 dac33_add_widgets(codec); 1355 dac33_add_widgets(codec);
1124 1356
1125 /* power on device */
1126 dac33_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1127
1128 /* Bias level configuration has enabled regulator an extra time */
1129 regulator_bulk_disable(ARRAY_SIZE(dac33->supplies), dac33->supplies);
1130
1131 return 0; 1357 return 0;
1132 1358
1133pcm_err: 1359pcm_err:
@@ -1164,7 +1390,6 @@ static int dac33_soc_resume(struct platform_device *pdev)
1164 struct snd_soc_codec *codec = socdev->card->codec; 1390 struct snd_soc_codec *codec = socdev->card->codec;
1165 1391
1166 dac33_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 1392 dac33_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1167 dac33_set_bias_level(codec, codec->suspend_bias_level);
1168 1393
1169 return 0; 1394 return 0;
1170} 1395}
@@ -1182,10 +1407,11 @@ EXPORT_SYMBOL_GPL(soc_codec_dev_tlv320dac33);
1182#define DAC33_FORMATS SNDRV_PCM_FMTBIT_S16_LE 1407#define DAC33_FORMATS SNDRV_PCM_FMTBIT_S16_LE
1183 1408
1184static struct snd_soc_dai_ops dac33_dai_ops = { 1409static struct snd_soc_dai_ops dac33_dai_ops = {
1410 .startup = dac33_startup,
1185 .shutdown = dac33_shutdown, 1411 .shutdown = dac33_shutdown,
1186 .hw_params = dac33_hw_params, 1412 .hw_params = dac33_hw_params,
1187 .prepare = dac33_pcm_prepare,
1188 .trigger = dac33_pcm_trigger, 1413 .trigger = dac33_pcm_trigger,
1414 .delay = dac33_dai_delay,
1189 .set_sysclk = dac33_set_dai_sysclk, 1415 .set_sysclk = dac33_set_dai_sysclk,
1190 .set_fmt = dac33_set_dai_fmt, 1416 .set_fmt = dac33_set_dai_fmt,
1191}; 1417};
@@ -1221,11 +1447,12 @@ static int __devinit dac33_i2c_probe(struct i2c_client *client,
1221 return -ENOMEM; 1447 return -ENOMEM;
1222 1448
1223 codec = &dac33->codec; 1449 codec = &dac33->codec;
1224 codec->private_data = dac33; 1450 snd_soc_codec_set_drvdata(codec, dac33);
1225 codec->control_data = client; 1451 codec->control_data = client;
1226 1452
1227 mutex_init(&codec->mutex); 1453 mutex_init(&codec->mutex);
1228 mutex_init(&dac33->mutex); 1454 mutex_init(&dac33->mutex);
1455 spin_lock_init(&dac33->lock);
1229 INIT_LIST_HEAD(&codec->dapm_widgets); 1456 INIT_LIST_HEAD(&codec->dapm_widgets);
1230 INIT_LIST_HEAD(&codec->dapm_paths); 1457 INIT_LIST_HEAD(&codec->dapm_paths);
1231 1458
@@ -1236,6 +1463,7 @@ static int __devinit dac33_i2c_probe(struct i2c_client *client,
1236 codec->hw_write = (hw_write_t) i2c_master_send; 1463 codec->hw_write = (hw_write_t) i2c_master_send;
1237 codec->bias_level = SND_SOC_BIAS_OFF; 1464 codec->bias_level = SND_SOC_BIAS_OFF;
1238 codec->set_bias_level = dac33_set_bias_level; 1465 codec->set_bias_level = dac33_set_bias_level;
1466 codec->idle_bias_off = 1;
1239 codec->dai = &dac33_dai; 1467 codec->dai = &dac33_dai;
1240 codec->num_dai = 1; 1468 codec->num_dai = 1;
1241 codec->reg_cache_size = ARRAY_SIZE(dac33_reg); 1469 codec->reg_cache_size = ARRAY_SIZE(dac33_reg);
@@ -1250,8 +1478,12 @@ static int __devinit dac33_i2c_probe(struct i2c_client *client,
1250 1478
1251 dac33->power_gpio = pdata->power_gpio; 1479 dac33->power_gpio = pdata->power_gpio;
1252 dac33->burst_bclkdiv = pdata->burst_bclkdiv; 1480 dac33->burst_bclkdiv = pdata->burst_bclkdiv;
1481 /* Pre calculate the burst rate */
1482 dac33->burst_rate = BURST_BASEFREQ_HZ / dac33->burst_bclkdiv / 32;
1483 dac33->keep_bclk = pdata->keep_bclk;
1253 dac33->irq = client->irq; 1484 dac33->irq = client->irq;
1254 dac33->nsample = NSAMPLE_MAX; 1485 dac33->nsample = NSAMPLE_MAX;
1486 dac33->nsample_max = NSAMPLE_MAX;
1255 /* Disable FIFO use by default */ 1487 /* Disable FIFO use by default */
1256 dac33->fifo_mode = DAC33_FIFO_BYPASS; 1488 dac33->fifo_mode = DAC33_FIFO_BYPASS;
1257 1489
@@ -1272,8 +1504,6 @@ static int __devinit dac33_i2c_probe(struct i2c_client *client,
1272 goto error_gpio; 1504 goto error_gpio;
1273 } 1505 }
1274 gpio_direction_output(dac33->power_gpio, 0); 1506 gpio_direction_output(dac33->power_gpio, 0);
1275 } else {
1276 dac33->chip_power = 1;
1277 } 1507 }
1278 1508
1279 /* Check if the IRQ number is valid and request it */ 1509 /* Check if the IRQ number is valid and request it */
@@ -1311,12 +1541,14 @@ static int __devinit dac33_i2c_probe(struct i2c_client *client,
1311 goto err_get; 1541 goto err_get;
1312 } 1542 }
1313 1543
1314 ret = regulator_bulk_enable(ARRAY_SIZE(dac33->supplies), 1544 /* Read the tlv320dac33 ID registers */
1315 dac33->supplies); 1545 ret = dac33_hard_power(codec, 1);
1316 if (ret != 0) { 1546 if (ret != 0) {
1317 dev_err(codec->dev, "Failed to enable supplies: %d\n", ret); 1547 dev_err(codec->dev, "Failed to power up codec: %d\n", ret);
1318 goto err_enable; 1548 goto error_codec;
1319 } 1549 }
1550 dac33_read_id(codec);
1551 dac33_hard_power(codec, 0);
1320 1552
1321 ret = snd_soc_register_codec(codec); 1553 ret = snd_soc_register_codec(codec);
1322 if (ret != 0) { 1554 if (ret != 0) {
@@ -1331,14 +1563,9 @@ static int __devinit dac33_i2c_probe(struct i2c_client *client,
1331 goto error_codec; 1563 goto error_codec;
1332 } 1564 }
1333 1565
1334 /* Shut down the codec for now */
1335 dac33_hard_power(codec, 0);
1336
1337 return ret; 1566 return ret;
1338 1567
1339error_codec: 1568error_codec:
1340 regulator_bulk_disable(ARRAY_SIZE(dac33->supplies), dac33->supplies);
1341err_enable:
1342 regulator_bulk_free(ARRAY_SIZE(dac33->supplies), dac33->supplies); 1569 regulator_bulk_free(ARRAY_SIZE(dac33->supplies), dac33->supplies);
1343err_get: 1570err_get:
1344 if (dac33->irq >= 0) { 1571 if (dac33->irq >= 0) {
@@ -1362,7 +1589,9 @@ static int __devexit dac33_i2c_remove(struct i2c_client *client)
1362 struct tlv320dac33_priv *dac33; 1589 struct tlv320dac33_priv *dac33;
1363 1590
1364 dac33 = i2c_get_clientdata(client); 1591 dac33 = i2c_get_clientdata(client);
1365 dac33_hard_power(&dac33->codec, 0); 1592
1593 if (unlikely(dac33->chip_power))
1594 dac33_hard_power(&dac33->codec, 0);
1366 1595
1367 if (dac33->power_gpio >= 0) 1596 if (dac33->power_gpio >= 0)
1368 gpio_free(dac33->power_gpio); 1597 gpio_free(dac33->power_gpio);