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-rw-r--r--sound/pci/oxygen/Makefile3
-rw-r--r--sound/pci/oxygen/cs2000.h83
-rw-r--r--sound/pci/oxygen/hifier.c63
-rw-r--r--sound/pci/oxygen/oxygen.c250
-rw-r--r--sound/pci/oxygen/oxygen.h5
-rw-r--r--sound/pci/oxygen/oxygen_lib.c30
-rw-r--r--sound/pci/oxygen/oxygen_mixer.c52
-rw-r--r--sound/pci/oxygen/oxygen_pcm.c19
-rw-r--r--sound/pci/oxygen/virtuoso.c1110
-rw-r--r--sound/pci/oxygen/wm8766.h73
-rw-r--r--sound/pci/oxygen/wm8776.h177
-rw-r--r--sound/pci/oxygen/xonar.h52
-rw-r--r--sound/pci/oxygen/xonar_cs43xx.c437
-rw-r--r--sound/pci/oxygen/xonar_hdmi.c128
-rw-r--r--sound/pci/oxygen/xonar_lib.c132
-rw-r--r--sound/pci/oxygen/xonar_pcm179x.c1115
-rw-r--r--sound/pci/oxygen/xonar_wm87x6.c1021
17 files changed, 3559 insertions, 1191 deletions
diff --git a/sound/pci/oxygen/Makefile b/sound/pci/oxygen/Makefile
index 4ba07d42fd1d..acd8f15f7bff 100644
--- a/sound/pci/oxygen/Makefile
+++ b/sound/pci/oxygen/Makefile
@@ -1,7 +1,8 @@
1snd-oxygen-lib-objs := oxygen_io.o oxygen_lib.o oxygen_mixer.o oxygen_pcm.o 1snd-oxygen-lib-objs := oxygen_io.o oxygen_lib.o oxygen_mixer.o oxygen_pcm.o
2snd-hifier-objs := hifier.o 2snd-hifier-objs := hifier.o
3snd-oxygen-objs := oxygen.o 3snd-oxygen-objs := oxygen.o
4snd-virtuoso-objs := virtuoso.o 4snd-virtuoso-objs := virtuoso.o xonar_lib.o \
5 xonar_pcm179x.o xonar_cs43xx.o xonar_wm87x6.o xonar_hdmi.o
5 6
6obj-$(CONFIG_SND_OXYGEN_LIB) += snd-oxygen-lib.o 7obj-$(CONFIG_SND_OXYGEN_LIB) += snd-oxygen-lib.o
7obj-$(CONFIG_SND_HIFIER) += snd-hifier.o 8obj-$(CONFIG_SND_HIFIER) += snd-hifier.o
diff --git a/sound/pci/oxygen/cs2000.h b/sound/pci/oxygen/cs2000.h
new file mode 100644
index 000000000000..c3501bdb5edc
--- /dev/null
+++ b/sound/pci/oxygen/cs2000.h
@@ -0,0 +1,83 @@
1#ifndef CS2000_H_INCLUDED
2#define CS2000_H_INCLUDED
3
4#define CS2000_DEV_ID 0x01
5#define CS2000_DEV_CTRL 0x02
6#define CS2000_DEV_CFG_1 0x03
7#define CS2000_DEV_CFG_2 0x04
8#define CS2000_GLOBAL_CFG 0x05
9#define CS2000_RATIO_0 0x06 /* 32 bits, big endian */
10#define CS2000_RATIO_1 0x0a
11#define CS2000_RATIO_2 0x0e
12#define CS2000_RATIO_3 0x12
13#define CS2000_FUN_CFG_1 0x16
14#define CS2000_FUN_CFG_2 0x17
15#define CS2000_FUN_CFG_3 0x1e
16
17/* DEV_ID */
18#define CS2000_DEVICE_MASK 0xf8
19#define CS2000_REVISION_MASK 0x07
20
21/* DEV_CTRL */
22#define CS2000_UNLOCK 0x80
23#define CS2000_AUX_OUT_DIS 0x02
24#define CS2000_CLK_OUT_DIS 0x01
25
26/* DEV_CFG_1 */
27#define CS2000_R_MOD_SEL_MASK 0xe0
28#define CS2000_R_MOD_SEL_1 0x00
29#define CS2000_R_MOD_SEL_2 0x20
30#define CS2000_R_MOD_SEL_4 0x40
31#define CS2000_R_MOD_SEL_8 0x60
32#define CS2000_R_MOD_SEL_1_2 0x80
33#define CS2000_R_MOD_SEL_1_4 0xa0
34#define CS2000_R_MOD_SEL_1_8 0xc0
35#define CS2000_R_MOD_SEL_1_16 0xe0
36#define CS2000_R_SEL_MASK 0x18
37#define CS2000_R_SEL_SHIFT 3
38#define CS2000_AUX_OUT_SRC_MASK 0x06
39#define CS2000_AUX_OUT_SRC_REF_CLK 0x00
40#define CS2000_AUX_OUT_SRC_CLK_IN 0x02
41#define CS2000_AUX_OUT_SRC_CLK_OUT 0x04
42#define CS2000_AUX_OUT_SRC_PLL_LOCK 0x06
43#define CS2000_EN_DEV_CFG_1 0x01
44
45/* DEV_CFG_2 */
46#define CS2000_LOCK_CLK_MASK 0x06
47#define CS2000_LOCK_CLK_SHIFT 1
48#define CS2000_FRAC_N_SRC_MASK 0x01
49#define CS2000_FRAC_N_SRC_STATIC 0x00
50#define CS2000_FRAC_N_SRC_DYNAMIC 0x01
51
52/* GLOBAL_CFG */
53#define CS2000_FREEZE 0x08
54#define CS2000_EN_DEV_CFG_2 0x01
55
56/* FUN_CFG_1 */
57#define CS2000_CLK_SKIP_EN 0x80
58#define CS2000_AUX_LOCK_CFG_MASK 0x40
59#define CS2000_AUX_LOCK_CFG_PP_HIGH 0x00
60#define CS2000_AUX_LOCK_CFG_OD_LOW 0x40
61#define CS2000_REF_CLK_DIV_MASK 0x18
62#define CS2000_REF_CLK_DIV_4 0x00
63#define CS2000_REF_CLK_DIV_2 0x08
64#define CS2000_REF_CLK_DIV_1 0x10
65
66/* FUN_CFG_2 */
67#define CS2000_CLK_OUT_UNL 0x10
68#define CS2000_L_F_RATIO_CFG_MASK 0x08
69#define CS2000_L_F_RATIO_CFG_20_12 0x00
70#define CS2000_L_F_RATIO_CFG_12_20 0x08
71
72/* FUN_CFG_3 */
73#define CS2000_CLK_IN_BW_MASK 0x70
74#define CS2000_CLK_IN_BW_1 0x00
75#define CS2000_CLK_IN_BW_2 0x10
76#define CS2000_CLK_IN_BW_4 0x20
77#define CS2000_CLK_IN_BW_8 0x30
78#define CS2000_CLK_IN_BW_16 0x40
79#define CS2000_CLK_IN_BW_32 0x50
80#define CS2000_CLK_IN_BW_64 0x60
81#define CS2000_CLK_IN_BW_128 0x70
82
83#endif
diff --git a/sound/pci/oxygen/hifier.c b/sound/pci/oxygen/hifier.c
index 84ef13183419..5a87d683691f 100644
--- a/sound/pci/oxygen/hifier.c
+++ b/sound/pci/oxygen/hifier.c
@@ -17,6 +17,12 @@
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */ 18 */
19 19
20/*
21 * CMI8788:
22 *
23 * SPI 0 -> AK4396
24 */
25
20#include <linux/delay.h> 26#include <linux/delay.h>
21#include <linux/pci.h> 27#include <linux/pci.h>
22#include <sound/control.h> 28#include <sound/control.h>
@@ -42,7 +48,7 @@ MODULE_PARM_DESC(id, "ID string");
42module_param_array(enable, bool, NULL, 0444); 48module_param_array(enable, bool, NULL, 0444);
43MODULE_PARM_DESC(enable, "enable card"); 49MODULE_PARM_DESC(enable, "enable card");
44 50
45static struct pci_device_id hifier_ids[] __devinitdata = { 51static DEFINE_PCI_DEVICE_TABLE(hifier_ids) = {
46 { OXYGEN_PCI_SUBID(0x14c3, 0x1710) }, 52 { OXYGEN_PCI_SUBID(0x14c3, 0x1710) },
47 { OXYGEN_PCI_SUBID(0x14c3, 0x1711) }, 53 { OXYGEN_PCI_SUBID(0x14c3, 0x1711) },
48 { OXYGEN_PCI_SUBID_BROKEN_EEPROM }, 54 { OXYGEN_PCI_SUBID_BROKEN_EEPROM },
@@ -51,23 +57,28 @@ static struct pci_device_id hifier_ids[] __devinitdata = {
51MODULE_DEVICE_TABLE(pci, hifier_ids); 57MODULE_DEVICE_TABLE(pci, hifier_ids);
52 58
53struct hifier_data { 59struct hifier_data {
54 u8 ak4396_ctl2; 60 u8 ak4396_regs[5];
55}; 61};
56 62
57static void ak4396_write(struct oxygen *chip, u8 reg, u8 value) 63static void ak4396_write(struct oxygen *chip, u8 reg, u8 value)
58{ 64{
65 struct hifier_data *data = chip->model_data;
66
59 oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER | 67 oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
60 OXYGEN_SPI_DATA_LENGTH_2 | 68 OXYGEN_SPI_DATA_LENGTH_2 |
61 OXYGEN_SPI_CLOCK_160 | 69 OXYGEN_SPI_CLOCK_160 |
62 (0 << OXYGEN_SPI_CODEC_SHIFT) | 70 (0 << OXYGEN_SPI_CODEC_SHIFT) |
63 OXYGEN_SPI_CEN_LATCH_CLOCK_HI, 71 OXYGEN_SPI_CEN_LATCH_CLOCK_HI,
64 AK4396_WRITE | (reg << 8) | value); 72 AK4396_WRITE | (reg << 8) | value);
73 data->ak4396_regs[reg] = value;
65} 74}
66 75
67static void update_ak4396_volume(struct oxygen *chip) 76static void ak4396_write_cached(struct oxygen *chip, u8 reg, u8 value)
68{ 77{
69 ak4396_write(chip, AK4396_LCH_ATT, chip->dac_volume[0]); 78 struct hifier_data *data = chip->model_data;
70 ak4396_write(chip, AK4396_RCH_ATT, chip->dac_volume[1]); 79
80 if (value != data->ak4396_regs[reg])
81 ak4396_write(chip, reg, value);
71} 82}
72 83
73static void hifier_registers_init(struct oxygen *chip) 84static void hifier_registers_init(struct oxygen *chip)
@@ -75,16 +86,19 @@ static void hifier_registers_init(struct oxygen *chip)
75 struct hifier_data *data = chip->model_data; 86 struct hifier_data *data = chip->model_data;
76 87
77 ak4396_write(chip, AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN); 88 ak4396_write(chip, AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN);
78 ak4396_write(chip, AK4396_CONTROL_2, data->ak4396_ctl2); 89 ak4396_write(chip, AK4396_CONTROL_2,
90 data->ak4396_regs[AK4396_CONTROL_2]);
79 ak4396_write(chip, AK4396_CONTROL_3, AK4396_PCM); 91 ak4396_write(chip, AK4396_CONTROL_3, AK4396_PCM);
80 update_ak4396_volume(chip); 92 ak4396_write(chip, AK4396_LCH_ATT, chip->dac_volume[0]);
93 ak4396_write(chip, AK4396_RCH_ATT, chip->dac_volume[1]);
81} 94}
82 95
83static void hifier_init(struct oxygen *chip) 96static void hifier_init(struct oxygen *chip)
84{ 97{
85 struct hifier_data *data = chip->model_data; 98 struct hifier_data *data = chip->model_data;
86 99
87 data->ak4396_ctl2 = AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL; 100 data->ak4396_regs[AK4396_CONTROL_2] =
101 AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL;
88 hifier_registers_init(chip); 102 hifier_registers_init(chip);
89 103
90 snd_component_add(chip->card, "AK4396"); 104 snd_component_add(chip->card, "AK4396");
@@ -106,20 +120,29 @@ static void set_ak4396_params(struct oxygen *chip,
106 struct hifier_data *data = chip->model_data; 120 struct hifier_data *data = chip->model_data;
107 u8 value; 121 u8 value;
108 122
109 value = data->ak4396_ctl2 & ~AK4396_DFS_MASK; 123 value = data->ak4396_regs[AK4396_CONTROL_2] & ~AK4396_DFS_MASK;
110 if (params_rate(params) <= 54000) 124 if (params_rate(params) <= 54000)
111 value |= AK4396_DFS_NORMAL; 125 value |= AK4396_DFS_NORMAL;
112 else if (params_rate(params) <= 108000) 126 else if (params_rate(params) <= 108000)
113 value |= AK4396_DFS_DOUBLE; 127 value |= AK4396_DFS_DOUBLE;
114 else 128 else
115 value |= AK4396_DFS_QUAD; 129 value |= AK4396_DFS_QUAD;
116 data->ak4396_ctl2 = value;
117 130
118 msleep(1); /* wait for the new MCLK to become stable */ 131 msleep(1); /* wait for the new MCLK to become stable */
119 132
120 ak4396_write(chip, AK4396_CONTROL_1, AK4396_DIF_24_MSB); 133 if (value != data->ak4396_regs[AK4396_CONTROL_2]) {
121 ak4396_write(chip, AK4396_CONTROL_2, value); 134 ak4396_write(chip, AK4396_CONTROL_1,
122 ak4396_write(chip, AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN); 135 AK4396_DIF_24_MSB);
136 ak4396_write(chip, AK4396_CONTROL_2, value);
137 ak4396_write(chip, AK4396_CONTROL_1,
138 AK4396_DIF_24_MSB | AK4396_RSTN);
139 }
140}
141
142static void update_ak4396_volume(struct oxygen *chip)
143{
144 ak4396_write_cached(chip, AK4396_LCH_ATT, chip->dac_volume[0]);
145 ak4396_write_cached(chip, AK4396_RCH_ATT, chip->dac_volume[1]);
123} 146}
124 147
125static void update_ak4396_mute(struct oxygen *chip) 148static void update_ak4396_mute(struct oxygen *chip)
@@ -127,11 +150,10 @@ static void update_ak4396_mute(struct oxygen *chip)
127 struct hifier_data *data = chip->model_data; 150 struct hifier_data *data = chip->model_data;
128 u8 value; 151 u8 value;
129 152
130 value = data->ak4396_ctl2 & ~AK4396_SMUTE; 153 value = data->ak4396_regs[AK4396_CONTROL_2] & ~AK4396_SMUTE;
131 if (chip->dac_mute) 154 if (chip->dac_mute)
132 value |= AK4396_SMUTE; 155 value |= AK4396_SMUTE;
133 data->ak4396_ctl2 = value; 156 ak4396_write_cached(chip, AK4396_CONTROL_2, value);
134 ak4396_write(chip, AK4396_CONTROL_2, value);
135} 157}
136 158
137static void set_cs5340_params(struct oxygen *chip, 159static void set_cs5340_params(struct oxygen *chip,
@@ -141,21 +163,14 @@ static void set_cs5340_params(struct oxygen *chip,
141 163
142static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0); 164static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0);
143 165
144static int hifier_control_filter(struct snd_kcontrol_new *template)
145{
146 if (!strcmp(template->name, "Stereo Upmixing"))
147 return 1; /* stereo only - we don't need upmixing */
148 return 0;
149}
150
151static const struct oxygen_model model_hifier = { 166static const struct oxygen_model model_hifier = {
152 .shortname = "C-Media CMI8787", 167 .shortname = "C-Media CMI8787",
153 .longname = "C-Media Oxygen HD Audio", 168 .longname = "C-Media Oxygen HD Audio",
154 .chip = "CMI8788", 169 .chip = "CMI8788",
155 .init = hifier_init, 170 .init = hifier_init,
156 .control_filter = hifier_control_filter,
157 .cleanup = hifier_cleanup, 171 .cleanup = hifier_cleanup,
158 .resume = hifier_resume, 172 .resume = hifier_resume,
173 .get_i2s_mclk = oxygen_default_i2s_mclk,
159 .set_dac_params = set_ak4396_params, 174 .set_dac_params = set_ak4396_params,
160 .set_adc_params = set_cs5340_params, 175 .set_adc_params = set_cs5340_params,
161 .update_dac_volume = update_ak4396_volume, 176 .update_dac_volume = update_ak4396_volume,
diff --git a/sound/pci/oxygen/oxygen.c b/sound/pci/oxygen/oxygen.c
index 72db4c39007f..289cb4dacfc7 100644
--- a/sound/pci/oxygen/oxygen.c
+++ b/sound/pci/oxygen/oxygen.c
@@ -18,6 +18,8 @@
18 */ 18 */
19 19
20/* 20/*
21 * CMI8788:
22 *
21 * SPI 0 -> 1st AK4396 (front) 23 * SPI 0 -> 1st AK4396 (front)
22 * SPI 1 -> 2nd AK4396 (surround) 24 * SPI 1 -> 2nd AK4396 (surround)
23 * SPI 2 -> 3rd AK4396 (center/LFE) 25 * SPI 2 -> 3rd AK4396 (center/LFE)
@@ -27,6 +29,10 @@
27 * GPIO 0 -> DFS0 of AK5385 29 * GPIO 0 -> DFS0 of AK5385
28 * GPIO 1 -> DFS1 of AK5385 30 * GPIO 1 -> DFS1 of AK5385
29 * GPIO 8 -> enable headphone amplifier on HT-Omega models 31 * GPIO 8 -> enable headphone amplifier on HT-Omega models
32 *
33 * CM9780:
34 *
35 * GPO 0 -> route line-in (0) or AC97 output (1) to ADC input
30 */ 36 */
31 37
32#include <linux/delay.h> 38#include <linux/delay.h>
@@ -66,7 +72,7 @@ enum {
66 MODEL_CLARO_HALO, /* HT-Omega Claro halo */ 72 MODEL_CLARO_HALO, /* HT-Omega Claro halo */
67}; 73};
68 74
69static struct pci_device_id oxygen_ids[] __devinitdata = { 75static DEFINE_PCI_DEVICE_TABLE(oxygen_ids) = {
70 { OXYGEN_PCI_SUBID(0x10b0, 0x0216), .driver_data = MODEL_CMEDIA_REF }, 76 { OXYGEN_PCI_SUBID(0x10b0, 0x0216), .driver_data = MODEL_CMEDIA_REF },
71 { OXYGEN_PCI_SUBID(0x10b0, 0x0218), .driver_data = MODEL_CMEDIA_REF }, 77 { OXYGEN_PCI_SUBID(0x10b0, 0x0218), .driver_data = MODEL_CMEDIA_REF },
72 { OXYGEN_PCI_SUBID(0x10b0, 0x0219), .driver_data = MODEL_CMEDIA_REF }, 78 { OXYGEN_PCI_SUBID(0x10b0, 0x0219), .driver_data = MODEL_CMEDIA_REF },
@@ -91,8 +97,8 @@ MODULE_DEVICE_TABLE(pci, oxygen_ids);
91#define GPIO_CLARO_HP 0x0100 97#define GPIO_CLARO_HP 0x0100
92 98
93struct generic_data { 99struct generic_data {
94 u8 ak4396_ctl2; 100 u8 ak4396_regs[4][5];
95 u16 saved_wm8785_registers[2]; 101 u16 wm8785_regs[3];
96}; 102};
97 103
98static void ak4396_write(struct oxygen *chip, unsigned int codec, 104static void ak4396_write(struct oxygen *chip, unsigned int codec,
@@ -102,12 +108,24 @@ static void ak4396_write(struct oxygen *chip, unsigned int codec,
102 static const u8 codec_spi_map[4] = { 108 static const u8 codec_spi_map[4] = {
103 0, 1, 2, 4 109 0, 1, 2, 4
104 }; 110 };
111 struct generic_data *data = chip->model_data;
112
105 oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER | 113 oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
106 OXYGEN_SPI_DATA_LENGTH_2 | 114 OXYGEN_SPI_DATA_LENGTH_2 |
107 OXYGEN_SPI_CLOCK_160 | 115 OXYGEN_SPI_CLOCK_160 |
108 (codec_spi_map[codec] << OXYGEN_SPI_CODEC_SHIFT) | 116 (codec_spi_map[codec] << OXYGEN_SPI_CODEC_SHIFT) |
109 OXYGEN_SPI_CEN_LATCH_CLOCK_HI, 117 OXYGEN_SPI_CEN_LATCH_CLOCK_HI,
110 AK4396_WRITE | (reg << 8) | value); 118 AK4396_WRITE | (reg << 8) | value);
119 data->ak4396_regs[codec][reg] = value;
120}
121
122static void ak4396_write_cached(struct oxygen *chip, unsigned int codec,
123 u8 reg, u8 value)
124{
125 struct generic_data *data = chip->model_data;
126
127 if (value != data->ak4396_regs[codec][reg])
128 ak4396_write(chip, codec, reg, value);
111} 129}
112 130
113static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value) 131static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value)
@@ -120,20 +138,8 @@ static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value)
120 (3 << OXYGEN_SPI_CODEC_SHIFT) | 138 (3 << OXYGEN_SPI_CODEC_SHIFT) |
121 OXYGEN_SPI_CEN_LATCH_CLOCK_LO, 139 OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
122 (reg << 9) | value); 140 (reg << 9) | value);
123 if (reg < ARRAY_SIZE(data->saved_wm8785_registers)) 141 if (reg < ARRAY_SIZE(data->wm8785_regs))
124 data->saved_wm8785_registers[reg] = value; 142 data->wm8785_regs[reg] = value;
125}
126
127static void update_ak4396_volume(struct oxygen *chip)
128{
129 unsigned int i;
130
131 for (i = 0; i < 4; ++i) {
132 ak4396_write(chip, i,
133 AK4396_LCH_ATT, chip->dac_volume[i * 2]);
134 ak4396_write(chip, i,
135 AK4396_RCH_ATT, chip->dac_volume[i * 2 + 1]);
136 }
137} 143}
138 144
139static void ak4396_registers_init(struct oxygen *chip) 145static void ak4396_registers_init(struct oxygen *chip)
@@ -142,21 +148,25 @@ static void ak4396_registers_init(struct oxygen *chip)
142 unsigned int i; 148 unsigned int i;
143 149
144 for (i = 0; i < 4; ++i) { 150 for (i = 0; i < 4; ++i) {
145 ak4396_write(chip, i, 151 ak4396_write(chip, i, AK4396_CONTROL_1,
146 AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN); 152 AK4396_DIF_24_MSB | AK4396_RSTN);
147 ak4396_write(chip, i, 153 ak4396_write(chip, i, AK4396_CONTROL_2,
148 AK4396_CONTROL_2, data->ak4396_ctl2); 154 data->ak4396_regs[0][AK4396_CONTROL_2]);
149 ak4396_write(chip, i, 155 ak4396_write(chip, i, AK4396_CONTROL_3,
150 AK4396_CONTROL_3, AK4396_PCM); 156 AK4396_PCM);
157 ak4396_write(chip, i, AK4396_LCH_ATT,
158 chip->dac_volume[i * 2]);
159 ak4396_write(chip, i, AK4396_RCH_ATT,
160 chip->dac_volume[i * 2 + 1]);
151 } 161 }
152 update_ak4396_volume(chip);
153} 162}
154 163
155static void ak4396_init(struct oxygen *chip) 164static void ak4396_init(struct oxygen *chip)
156{ 165{
157 struct generic_data *data = chip->model_data; 166 struct generic_data *data = chip->model_data;
158 167
159 data->ak4396_ctl2 = AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL; 168 data->ak4396_regs[0][AK4396_CONTROL_2] =
169 AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL;
160 ak4396_registers_init(chip); 170 ak4396_registers_init(chip);
161 snd_component_add(chip->card, "AK4396"); 171 snd_component_add(chip->card, "AK4396");
162} 172}
@@ -173,17 +183,17 @@ static void wm8785_registers_init(struct oxygen *chip)
173 struct generic_data *data = chip->model_data; 183 struct generic_data *data = chip->model_data;
174 184
175 wm8785_write(chip, WM8785_R7, 0); 185 wm8785_write(chip, WM8785_R7, 0);
176 wm8785_write(chip, WM8785_R0, data->saved_wm8785_registers[0]); 186 wm8785_write(chip, WM8785_R0, data->wm8785_regs[0]);
177 wm8785_write(chip, WM8785_R1, data->saved_wm8785_registers[1]); 187 wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]);
178} 188}
179 189
180static void wm8785_init(struct oxygen *chip) 190static void wm8785_init(struct oxygen *chip)
181{ 191{
182 struct generic_data *data = chip->model_data; 192 struct generic_data *data = chip->model_data;
183 193
184 data->saved_wm8785_registers[0] = WM8785_MCR_SLAVE | 194 data->wm8785_regs[0] =
185 WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST; 195 WM8785_MCR_SLAVE | WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST;
186 data->saved_wm8785_registers[1] = WM8785_WL_24; 196 data->wm8785_regs[2] = WM8785_HPFR | WM8785_HPFL;
187 wm8785_registers_init(chip); 197 wm8785_registers_init(chip);
188 snd_component_add(chip->card, "WM8785"); 198 snd_component_add(chip->card, "WM8785");
189} 199}
@@ -264,24 +274,36 @@ static void set_ak4396_params(struct oxygen *chip,
264 unsigned int i; 274 unsigned int i;
265 u8 value; 275 u8 value;
266 276
267 value = data->ak4396_ctl2 & ~AK4396_DFS_MASK; 277 value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_DFS_MASK;
268 if (params_rate(params) <= 54000) 278 if (params_rate(params) <= 54000)
269 value |= AK4396_DFS_NORMAL; 279 value |= AK4396_DFS_NORMAL;
270 else if (params_rate(params) <= 108000) 280 else if (params_rate(params) <= 108000)
271 value |= AK4396_DFS_DOUBLE; 281 value |= AK4396_DFS_DOUBLE;
272 else 282 else
273 value |= AK4396_DFS_QUAD; 283 value |= AK4396_DFS_QUAD;
274 data->ak4396_ctl2 = value;
275 284
276 msleep(1); /* wait for the new MCLK to become stable */ 285 msleep(1); /* wait for the new MCLK to become stable */
277 286
287 if (value != data->ak4396_regs[0][AK4396_CONTROL_2]) {
288 for (i = 0; i < 4; ++i) {
289 ak4396_write(chip, i, AK4396_CONTROL_1,
290 AK4396_DIF_24_MSB);
291 ak4396_write(chip, i, AK4396_CONTROL_2, value);
292 ak4396_write(chip, i, AK4396_CONTROL_1,
293 AK4396_DIF_24_MSB | AK4396_RSTN);
294 }
295 }
296}
297
298static void update_ak4396_volume(struct oxygen *chip)
299{
300 unsigned int i;
301
278 for (i = 0; i < 4; ++i) { 302 for (i = 0; i < 4; ++i) {
279 ak4396_write(chip, i, 303 ak4396_write_cached(chip, i, AK4396_LCH_ATT,
280 AK4396_CONTROL_1, AK4396_DIF_24_MSB); 304 chip->dac_volume[i * 2]);
281 ak4396_write(chip, i, 305 ak4396_write_cached(chip, i, AK4396_RCH_ATT,
282 AK4396_CONTROL_2, value); 306 chip->dac_volume[i * 2 + 1]);
283 ak4396_write(chip, i,
284 AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN);
285 } 307 }
286} 308}
287 309
@@ -291,21 +313,19 @@ static void update_ak4396_mute(struct oxygen *chip)
291 unsigned int i; 313 unsigned int i;
292 u8 value; 314 u8 value;
293 315
294 value = data->ak4396_ctl2 & ~AK4396_SMUTE; 316 value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_SMUTE;
295 if (chip->dac_mute) 317 if (chip->dac_mute)
296 value |= AK4396_SMUTE; 318 value |= AK4396_SMUTE;
297 data->ak4396_ctl2 = value;
298 for (i = 0; i < 4; ++i) 319 for (i = 0; i < 4; ++i)
299 ak4396_write(chip, i, AK4396_CONTROL_2, value); 320 ak4396_write_cached(chip, i, AK4396_CONTROL_2, value);
300} 321}
301 322
302static void set_wm8785_params(struct oxygen *chip, 323static void set_wm8785_params(struct oxygen *chip,
303 struct snd_pcm_hw_params *params) 324 struct snd_pcm_hw_params *params)
304{ 325{
326 struct generic_data *data = chip->model_data;
305 unsigned int value; 327 unsigned int value;
306 328
307 wm8785_write(chip, WM8785_R7, 0);
308
309 value = WM8785_MCR_SLAVE | WM8785_FORMAT_LJUST; 329 value = WM8785_MCR_SLAVE | WM8785_FORMAT_LJUST;
310 if (params_rate(params) <= 48000) 330 if (params_rate(params) <= 48000)
311 value |= WM8785_OSR_SINGLE; 331 value |= WM8785_OSR_SINGLE;
@@ -313,13 +333,11 @@ static void set_wm8785_params(struct oxygen *chip,
313 value |= WM8785_OSR_DOUBLE; 333 value |= WM8785_OSR_DOUBLE;
314 else 334 else
315 value |= WM8785_OSR_QUAD; 335 value |= WM8785_OSR_QUAD;
316 wm8785_write(chip, WM8785_R0, value); 336 if (value != data->wm8785_regs[0]) {
317 337 wm8785_write(chip, WM8785_R7, 0);
318 if (snd_pcm_format_width(params_format(params)) <= 16) 338 wm8785_write(chip, WM8785_R0, value);
319 value = WM8785_WL_16; 339 wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]);
320 else 340 }
321 value = WM8785_WL_24;
322 wm8785_write(chip, WM8785_R1, value);
323} 341}
324 342
325static void set_ak5385_params(struct oxygen *chip, 343static void set_ak5385_params(struct oxygen *chip,
@@ -337,6 +355,134 @@ static void set_ak5385_params(struct oxygen *chip,
337 value, GPIO_AK5385_DFS_MASK); 355 value, GPIO_AK5385_DFS_MASK);
338} 356}
339 357
358static int rolloff_info(struct snd_kcontrol *ctl,
359 struct snd_ctl_elem_info *info)
360{
361 static const char *const names[2] = {
362 "Sharp Roll-off", "Slow Roll-off"
363 };
364
365 info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
366 info->count = 1;
367 info->value.enumerated.items = 2;
368 if (info->value.enumerated.item >= 2)
369 info->value.enumerated.item = 1;
370 strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
371 return 0;
372}
373
374static int rolloff_get(struct snd_kcontrol *ctl,
375 struct snd_ctl_elem_value *value)
376{
377 struct oxygen *chip = ctl->private_data;
378 struct generic_data *data = chip->model_data;
379
380 value->value.enumerated.item[0] =
381 (data->ak4396_regs[0][AK4396_CONTROL_2] & AK4396_SLOW) != 0;
382 return 0;
383}
384
385static int rolloff_put(struct snd_kcontrol *ctl,
386 struct snd_ctl_elem_value *value)
387{
388 struct oxygen *chip = ctl->private_data;
389 struct generic_data *data = chip->model_data;
390 unsigned int i;
391 int changed;
392 u8 reg;
393
394 mutex_lock(&chip->mutex);
395 reg = data->ak4396_regs[0][AK4396_CONTROL_2];
396 if (value->value.enumerated.item[0])
397 reg |= AK4396_SLOW;
398 else
399 reg &= ~AK4396_SLOW;
400 changed = reg != data->ak4396_regs[0][AK4396_CONTROL_2];
401 if (changed) {
402 for (i = 0; i < 4; ++i)
403 ak4396_write(chip, i, AK4396_CONTROL_2, reg);
404 }
405 mutex_unlock(&chip->mutex);
406 return changed;
407}
408
409static const struct snd_kcontrol_new rolloff_control = {
410 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
411 .name = "DAC Filter Playback Enum",
412 .info = rolloff_info,
413 .get = rolloff_get,
414 .put = rolloff_put,
415};
416
417static int hpf_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info)
418{
419 static const char *const names[2] = {
420 "None", "High-pass Filter"
421 };
422
423 info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
424 info->count = 1;
425 info->value.enumerated.items = 2;
426 if (info->value.enumerated.item >= 2)
427 info->value.enumerated.item = 1;
428 strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
429 return 0;
430}
431
432static int hpf_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
433{
434 struct oxygen *chip = ctl->private_data;
435 struct generic_data *data = chip->model_data;
436
437 value->value.enumerated.item[0] =
438 (data->wm8785_regs[WM8785_R2] & WM8785_HPFR) != 0;
439 return 0;
440}
441
442static int hpf_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
443{
444 struct oxygen *chip = ctl->private_data;
445 struct generic_data *data = chip->model_data;
446 unsigned int reg;
447 int changed;
448
449 mutex_lock(&chip->mutex);
450 reg = data->wm8785_regs[WM8785_R2] & ~(WM8785_HPFR | WM8785_HPFL);
451 if (value->value.enumerated.item[0])
452 reg |= WM8785_HPFR | WM8785_HPFL;
453 changed = reg != data->wm8785_regs[WM8785_R2];
454 if (changed)
455 wm8785_write(chip, WM8785_R2, reg);
456 mutex_unlock(&chip->mutex);
457 return changed;
458}
459
460static const struct snd_kcontrol_new hpf_control = {
461 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
462 .name = "ADC Filter Capture Enum",
463 .info = hpf_info,
464 .get = hpf_get,
465 .put = hpf_put,
466};
467
468static int generic_mixer_init(struct oxygen *chip)
469{
470 return snd_ctl_add(chip->card, snd_ctl_new1(&rolloff_control, chip));
471}
472
473static int generic_wm8785_mixer_init(struct oxygen *chip)
474{
475 int err;
476
477 err = generic_mixer_init(chip);
478 if (err < 0)
479 return err;
480 err = snd_ctl_add(chip->card, snd_ctl_new1(&hpf_control, chip));
481 if (err < 0)
482 return err;
483 return 0;
484}
485
340static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0); 486static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0);
341 487
342static const struct oxygen_model model_generic = { 488static const struct oxygen_model model_generic = {
@@ -344,8 +490,10 @@ static const struct oxygen_model model_generic = {
344 .longname = "C-Media Oxygen HD Audio", 490 .longname = "C-Media Oxygen HD Audio",
345 .chip = "CMI8788", 491 .chip = "CMI8788",
346 .init = generic_init, 492 .init = generic_init,
493 .mixer_init = generic_wm8785_mixer_init,
347 .cleanup = generic_cleanup, 494 .cleanup = generic_cleanup,
348 .resume = generic_resume, 495 .resume = generic_resume,
496 .get_i2s_mclk = oxygen_default_i2s_mclk,
349 .set_dac_params = set_ak4396_params, 497 .set_dac_params = set_ak4396_params,
350 .set_adc_params = set_wm8785_params, 498 .set_adc_params = set_wm8785_params,
351 .update_dac_volume = update_ak4396_volume, 499 .update_dac_volume = update_ak4396_volume,
@@ -374,6 +522,7 @@ static int __devinit get_oxygen_model(struct oxygen *chip,
374 switch (id->driver_data) { 522 switch (id->driver_data) {
375 case MODEL_MERIDIAN: 523 case MODEL_MERIDIAN:
376 chip->model.init = meridian_init; 524 chip->model.init = meridian_init;
525 chip->model.mixer_init = generic_mixer_init;
377 chip->model.resume = meridian_resume; 526 chip->model.resume = meridian_resume;
378 chip->model.set_adc_params = set_ak5385_params; 527 chip->model.set_adc_params = set_ak5385_params;
379 chip->model.device_config = PLAYBACK_0_TO_I2S | 528 chip->model.device_config = PLAYBACK_0_TO_I2S |
@@ -389,6 +538,7 @@ static int __devinit get_oxygen_model(struct oxygen *chip,
389 break; 538 break;
390 case MODEL_CLARO_HALO: 539 case MODEL_CLARO_HALO:
391 chip->model.init = claro_halo_init; 540 chip->model.init = claro_halo_init;
541 chip->model.mixer_init = generic_mixer_init;
392 chip->model.cleanup = claro_cleanup; 542 chip->model.cleanup = claro_cleanup;
393 chip->model.suspend = claro_suspend; 543 chip->model.suspend = claro_suspend;
394 chip->model.resume = claro_resume; 544 chip->model.resume = claro_resume;
diff --git a/sound/pci/oxygen/oxygen.h b/sound/pci/oxygen/oxygen.h
index bd615dbffadb..6147216af744 100644
--- a/sound/pci/oxygen/oxygen.h
+++ b/sound/pci/oxygen/oxygen.h
@@ -78,12 +78,15 @@ struct oxygen_model {
78 void (*resume)(struct oxygen *chip); 78 void (*resume)(struct oxygen *chip);
79 void (*pcm_hardware_filter)(unsigned int channel, 79 void (*pcm_hardware_filter)(unsigned int channel,
80 struct snd_pcm_hardware *hardware); 80 struct snd_pcm_hardware *hardware);
81 unsigned int (*get_i2s_mclk)(struct oxygen *chip, unsigned int channel,
82 struct snd_pcm_hw_params *hw_params);
81 void (*set_dac_params)(struct oxygen *chip, 83 void (*set_dac_params)(struct oxygen *chip,
82 struct snd_pcm_hw_params *params); 84 struct snd_pcm_hw_params *params);
83 void (*set_adc_params)(struct oxygen *chip, 85 void (*set_adc_params)(struct oxygen *chip,
84 struct snd_pcm_hw_params *params); 86 struct snd_pcm_hw_params *params);
85 void (*update_dac_volume)(struct oxygen *chip); 87 void (*update_dac_volume)(struct oxygen *chip);
86 void (*update_dac_mute)(struct oxygen *chip); 88 void (*update_dac_mute)(struct oxygen *chip);
89 void (*update_center_lfe_mix)(struct oxygen *chip, bool mixed);
87 void (*gpio_changed)(struct oxygen *chip); 90 void (*gpio_changed)(struct oxygen *chip);
88 void (*uart_input)(struct oxygen *chip); 91 void (*uart_input)(struct oxygen *chip);
89 void (*ac97_switch)(struct oxygen *chip, 92 void (*ac97_switch)(struct oxygen *chip,
@@ -162,6 +165,8 @@ void oxygen_update_spdif_source(struct oxygen *chip);
162/* oxygen_pcm.c */ 165/* oxygen_pcm.c */
163 166
164int oxygen_pcm_init(struct oxygen *chip); 167int oxygen_pcm_init(struct oxygen *chip);
168unsigned int oxygen_default_i2s_mclk(struct oxygen *chip, unsigned int channel,
169 struct snd_pcm_hw_params *hw_params);
165 170
166/* oxygen_io.c */ 171/* oxygen_io.c */
167 172
diff --git a/sound/pci/oxygen/oxygen_lib.c b/sound/pci/oxygen/oxygen_lib.c
index 9a8936e20744..fad03d64e3ad 100644
--- a/sound/pci/oxygen/oxygen_lib.c
+++ b/sound/pci/oxygen/oxygen_lib.c
@@ -21,6 +21,7 @@
21#include <linux/interrupt.h> 21#include <linux/interrupt.h>
22#include <linux/mutex.h> 22#include <linux/mutex.h>
23#include <linux/pci.h> 23#include <linux/pci.h>
24#include <linux/slab.h>
24#include <sound/ac97_codec.h> 25#include <sound/ac97_codec.h>
25#include <sound/asoundef.h> 26#include <sound/asoundef.h>
26#include <sound/core.h> 27#include <sound/core.h>
@@ -278,7 +279,11 @@ oxygen_search_pci_id(struct oxygen *chip, const struct pci_device_id ids[])
278static void oxygen_restore_eeprom(struct oxygen *chip, 279static void oxygen_restore_eeprom(struct oxygen *chip,
279 const struct pci_device_id *id) 280 const struct pci_device_id *id)
280{ 281{
281 if (oxygen_read_eeprom(chip, 0) != OXYGEN_EEPROM_ID) { 282 u16 eeprom_id;
283
284 eeprom_id = oxygen_read_eeprom(chip, 0);
285 if (eeprom_id != OXYGEN_EEPROM_ID &&
286 (eeprom_id != 0xffff || id->subdevice != 0x8788)) {
282 /* 287 /*
283 * This function gets called only when a known card model has 288 * This function gets called only when a known card model has
284 * been detected, i.e., we know there is a valid subsystem 289 * been detected, i.e., we know there is a valid subsystem
@@ -303,6 +308,28 @@ static void oxygen_restore_eeprom(struct oxygen *chip,
303 } 308 }
304} 309}
305 310
311static void pci_bridge_magic(void)
312{
313 struct pci_dev *pci = NULL;
314 u32 tmp;
315
316 for (;;) {
317 /* If there is any Pericom PI7C9X110 PCI-E/PCI bridge ... */
318 pci = pci_get_device(0x12d8, 0xe110, pci);
319 if (!pci)
320 break;
321 /*
322 * ... configure its secondary internal arbiter to park to
323 * the secondary port, instead of to the last master.
324 */
325 if (!pci_read_config_dword(pci, 0x40, &tmp)) {
326 tmp |= 1;
327 pci_write_config_dword(pci, 0x40, tmp);
328 }
329 /* Why? Try asking C-Media. */
330 }
331}
332
306static void oxygen_init(struct oxygen *chip) 333static void oxygen_init(struct oxygen *chip)
307{ 334{
308 unsigned int i; 335 unsigned int i;
@@ -581,6 +608,7 @@ int oxygen_pci_probe(struct pci_dev *pci, int index, char *id,
581 snd_card_set_dev(card, &pci->dev); 608 snd_card_set_dev(card, &pci->dev);
582 card->private_free = oxygen_card_free; 609 card->private_free = oxygen_card_free;
583 610
611 pci_bridge_magic();
584 oxygen_init(chip); 612 oxygen_init(chip);
585 chip->model.init(chip); 613 chip->model.init(chip);
586 614
diff --git a/sound/pci/oxygen/oxygen_mixer.c b/sound/pci/oxygen/oxygen_mixer.c
index 5401c547c4e3..f375b8a27862 100644
--- a/sound/pci/oxygen/oxygen_mixer.c
+++ b/sound/pci/oxygen/oxygen_mixer.c
@@ -99,11 +99,15 @@ static int dac_mute_put(struct snd_kcontrol *ctl,
99 99
100static int upmix_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info) 100static int upmix_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info)
101{ 101{
102 static const char *const names[3] = { 102 static const char *const names[5] = {
103 "Front", "Front+Surround", "Front+Surround+Back" 103 "Front",
104 "Front+Surround",
105 "Front+Surround+Back",
106 "Front+Surround+Center/LFE",
107 "Front+Surround+Center/LFE+Back",
104 }; 108 };
105 struct oxygen *chip = ctl->private_data; 109 struct oxygen *chip = ctl->private_data;
106 unsigned int count = 2 + (chip->model.dac_channels == 8); 110 unsigned int count = chip->model.update_center_lfe_mix ? 5 : 3;
107 111
108 info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 112 info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
109 info->count = 1; 113 info->count = 1;
@@ -127,7 +131,7 @@ static int upmix_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
127void oxygen_update_dac_routing(struct oxygen *chip) 131void oxygen_update_dac_routing(struct oxygen *chip)
128{ 132{
129 /* DAC 0: front, DAC 1: surround, DAC 2: center/LFE, DAC 3: back */ 133 /* DAC 0: front, DAC 1: surround, DAC 2: center/LFE, DAC 3: back */
130 static const unsigned int reg_values[3] = { 134 static const unsigned int reg_values[5] = {
131 /* stereo -> front */ 135 /* stereo -> front */
132 (0 << OXYGEN_PLAY_DAC0_SOURCE_SHIFT) | 136 (0 << OXYGEN_PLAY_DAC0_SOURCE_SHIFT) |
133 (1 << OXYGEN_PLAY_DAC1_SOURCE_SHIFT) | 137 (1 << OXYGEN_PLAY_DAC1_SOURCE_SHIFT) |
@@ -143,6 +147,16 @@ void oxygen_update_dac_routing(struct oxygen *chip)
143 (0 << OXYGEN_PLAY_DAC1_SOURCE_SHIFT) | 147 (0 << OXYGEN_PLAY_DAC1_SOURCE_SHIFT) |
144 (2 << OXYGEN_PLAY_DAC2_SOURCE_SHIFT) | 148 (2 << OXYGEN_PLAY_DAC2_SOURCE_SHIFT) |
145 (0 << OXYGEN_PLAY_DAC3_SOURCE_SHIFT), 149 (0 << OXYGEN_PLAY_DAC3_SOURCE_SHIFT),
150 /* stereo -> front+surround+center/LFE */
151 (0 << OXYGEN_PLAY_DAC0_SOURCE_SHIFT) |
152 (0 << OXYGEN_PLAY_DAC1_SOURCE_SHIFT) |
153 (0 << OXYGEN_PLAY_DAC2_SOURCE_SHIFT) |
154 (3 << OXYGEN_PLAY_DAC3_SOURCE_SHIFT),
155 /* stereo -> front+surround+center/LFE+back */
156 (0 << OXYGEN_PLAY_DAC0_SOURCE_SHIFT) |
157 (0 << OXYGEN_PLAY_DAC1_SOURCE_SHIFT) |
158 (0 << OXYGEN_PLAY_DAC2_SOURCE_SHIFT) |
159 (0 << OXYGEN_PLAY_DAC3_SOURCE_SHIFT),
146 }; 160 };
147 u8 channels; 161 u8 channels;
148 unsigned int reg_value; 162 unsigned int reg_value;
@@ -167,22 +181,23 @@ void oxygen_update_dac_routing(struct oxygen *chip)
167 OXYGEN_PLAY_DAC1_SOURCE_MASK | 181 OXYGEN_PLAY_DAC1_SOURCE_MASK |
168 OXYGEN_PLAY_DAC2_SOURCE_MASK | 182 OXYGEN_PLAY_DAC2_SOURCE_MASK |
169 OXYGEN_PLAY_DAC3_SOURCE_MASK); 183 OXYGEN_PLAY_DAC3_SOURCE_MASK);
184 if (chip->model.update_center_lfe_mix)
185 chip->model.update_center_lfe_mix(chip, chip->dac_routing > 2);
170} 186}
171 187
172static int upmix_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value) 188static int upmix_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
173{ 189{
174 struct oxygen *chip = ctl->private_data; 190 struct oxygen *chip = ctl->private_data;
175 unsigned int count = 2 + (chip->model.dac_channels == 8); 191 unsigned int count = chip->model.update_center_lfe_mix ? 5 : 3;
176 int changed; 192 int changed;
177 193
194 if (value->value.enumerated.item[0] >= count)
195 return -EINVAL;
178 mutex_lock(&chip->mutex); 196 mutex_lock(&chip->mutex);
179 changed = value->value.enumerated.item[0] != chip->dac_routing; 197 changed = value->value.enumerated.item[0] != chip->dac_routing;
180 if (changed) { 198 if (changed) {
181 chip->dac_routing = min(value->value.enumerated.item[0], 199 chip->dac_routing = value->value.enumerated.item[0];
182 count - 1);
183 spin_lock_irq(&chip->reg_lock);
184 oxygen_update_dac_routing(chip); 200 oxygen_update_dac_routing(chip);
185 spin_unlock_irq(&chip->reg_lock);
186 } 201 }
187 mutex_unlock(&chip->mutex); 202 mutex_unlock(&chip->mutex);
188 return changed; 203 return changed;
@@ -790,7 +805,7 @@ static const struct {
790 .controls = { 805 .controls = {
791 { 806 {
792 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 807 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
793 .name = "Analog Input Monitor Switch", 808 .name = "Analog Input Monitor Playback Switch",
794 .info = snd_ctl_boolean_mono_info, 809 .info = snd_ctl_boolean_mono_info,
795 .get = monitor_get, 810 .get = monitor_get,
796 .put = monitor_put, 811 .put = monitor_put,
@@ -798,7 +813,7 @@ static const struct {
798 }, 813 },
799 { 814 {
800 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 815 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
801 .name = "Analog Input Monitor Volume", 816 .name = "Analog Input Monitor Playback Volume",
802 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | 817 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
803 SNDRV_CTL_ELEM_ACCESS_TLV_READ, 818 SNDRV_CTL_ELEM_ACCESS_TLV_READ,
804 .info = monitor_volume_info, 819 .info = monitor_volume_info,
@@ -815,7 +830,7 @@ static const struct {
815 .controls = { 830 .controls = {
816 { 831 {
817 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 832 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
818 .name = "Analog Input Monitor Switch", 833 .name = "Analog Input Monitor Playback Switch",
819 .info = snd_ctl_boolean_mono_info, 834 .info = snd_ctl_boolean_mono_info,
820 .get = monitor_get, 835 .get = monitor_get,
821 .put = monitor_put, 836 .put = monitor_put,
@@ -823,7 +838,7 @@ static const struct {
823 }, 838 },
824 { 839 {
825 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 840 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
826 .name = "Analog Input Monitor Volume", 841 .name = "Analog Input Monitor Playback Volume",
827 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | 842 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
828 SNDRV_CTL_ELEM_ACCESS_TLV_READ, 843 SNDRV_CTL_ELEM_ACCESS_TLV_READ,
829 .info = monitor_volume_info, 844 .info = monitor_volume_info,
@@ -840,7 +855,7 @@ static const struct {
840 .controls = { 855 .controls = {
841 { 856 {
842 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 857 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
843 .name = "Analog Input Monitor Switch", 858 .name = "Analog Input Monitor Playback Switch",
844 .index = 1, 859 .index = 1,
845 .info = snd_ctl_boolean_mono_info, 860 .info = snd_ctl_boolean_mono_info,
846 .get = monitor_get, 861 .get = monitor_get,
@@ -849,7 +864,7 @@ static const struct {
849 }, 864 },
850 { 865 {
851 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 866 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
852 .name = "Analog Input Monitor Volume", 867 .name = "Analog Input Monitor Playback Volume",
853 .index = 1, 868 .index = 1,
854 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | 869 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
855 SNDRV_CTL_ELEM_ACCESS_TLV_READ, 870 SNDRV_CTL_ELEM_ACCESS_TLV_READ,
@@ -867,7 +882,7 @@ static const struct {
867 .controls = { 882 .controls = {
868 { 883 {
869 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 884 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
870 .name = "Digital Input Monitor Switch", 885 .name = "Digital Input Monitor Playback Switch",
871 .info = snd_ctl_boolean_mono_info, 886 .info = snd_ctl_boolean_mono_info,
872 .get = monitor_get, 887 .get = monitor_get,
873 .put = monitor_put, 888 .put = monitor_put,
@@ -875,7 +890,7 @@ static const struct {
875 }, 890 },
876 { 891 {
877 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 892 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
878 .name = "Digital Input Monitor Volume", 893 .name = "Digital Input Monitor Playback Volume",
879 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | 894 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
880 SNDRV_CTL_ELEM_ACCESS_TLV_READ, 895 SNDRV_CTL_ELEM_ACCESS_TLV_READ,
881 .info = monitor_volume_info, 896 .info = monitor_volume_info,
@@ -954,6 +969,9 @@ static int add_controls(struct oxygen *chip,
954 if (err == 1) 969 if (err == 1)
955 continue; 970 continue;
956 } 971 }
972 if (!strcmp(template.name, "Stereo Upmixing") &&
973 chip->model.dac_channels == 2)
974 continue;
957 if (!strcmp(template.name, "Master Playback Volume") && 975 if (!strcmp(template.name, "Master Playback Volume") &&
958 chip->model.dac_tlv) { 976 chip->model.dac_tlv) {
959 template.tlv.p = chip->model.dac_tlv; 977 template.tlv.p = chip->model.dac_tlv;
diff --git a/sound/pci/oxygen/oxygen_pcm.c b/sound/pci/oxygen/oxygen_pcm.c
index ef2345d82b86..9dff6954c397 100644
--- a/sound/pci/oxygen/oxygen_pcm.c
+++ b/sound/pci/oxygen/oxygen_pcm.c
@@ -271,13 +271,16 @@ static unsigned int oxygen_rate(struct snd_pcm_hw_params *hw_params)
271 } 271 }
272} 272}
273 273
274static unsigned int oxygen_i2s_mclk(struct snd_pcm_hw_params *hw_params) 274unsigned int oxygen_default_i2s_mclk(struct oxygen *chip,
275 unsigned int channel,
276 struct snd_pcm_hw_params *hw_params)
275{ 277{
276 if (params_rate(hw_params) <= 96000) 278 if (params_rate(hw_params) <= 96000)
277 return OXYGEN_I2S_MCLK_256; 279 return OXYGEN_I2S_MCLK_256;
278 else 280 else
279 return OXYGEN_I2S_MCLK_128; 281 return OXYGEN_I2S_MCLK_128;
280} 282}
283EXPORT_SYMBOL(oxygen_default_i2s_mclk);
281 284
282static unsigned int oxygen_i2s_bits(struct snd_pcm_hw_params *hw_params) 285static unsigned int oxygen_i2s_bits(struct snd_pcm_hw_params *hw_params)
283{ 286{
@@ -354,7 +357,7 @@ static int oxygen_rec_a_hw_params(struct snd_pcm_substream *substream,
354 OXYGEN_REC_FORMAT_A_MASK); 357 OXYGEN_REC_FORMAT_A_MASK);
355 oxygen_write16_masked(chip, OXYGEN_I2S_A_FORMAT, 358 oxygen_write16_masked(chip, OXYGEN_I2S_A_FORMAT,
356 oxygen_rate(hw_params) | 359 oxygen_rate(hw_params) |
357 oxygen_i2s_mclk(hw_params) | 360 chip->model.get_i2s_mclk(chip, PCM_A, hw_params) |
358 chip->model.adc_i2s_format | 361 chip->model.adc_i2s_format |
359 oxygen_i2s_bits(hw_params), 362 oxygen_i2s_bits(hw_params),
360 OXYGEN_I2S_RATE_MASK | 363 OXYGEN_I2S_RATE_MASK |
@@ -390,7 +393,8 @@ static int oxygen_rec_b_hw_params(struct snd_pcm_substream *substream,
390 if (!is_ac97) 393 if (!is_ac97)
391 oxygen_write16_masked(chip, OXYGEN_I2S_B_FORMAT, 394 oxygen_write16_masked(chip, OXYGEN_I2S_B_FORMAT,
392 oxygen_rate(hw_params) | 395 oxygen_rate(hw_params) |
393 oxygen_i2s_mclk(hw_params) | 396 chip->model.get_i2s_mclk(chip, PCM_B,
397 hw_params) |
394 chip->model.adc_i2s_format | 398 chip->model.adc_i2s_format |
395 oxygen_i2s_bits(hw_params), 399 oxygen_i2s_bits(hw_params),
396 OXYGEN_I2S_RATE_MASK | 400 OXYGEN_I2S_RATE_MASK |
@@ -435,6 +439,7 @@ static int oxygen_spdif_hw_params(struct snd_pcm_substream *substream,
435 if (err < 0) 439 if (err < 0)
436 return err; 440 return err;
437 441
442 mutex_lock(&chip->mutex);
438 spin_lock_irq(&chip->reg_lock); 443 spin_lock_irq(&chip->reg_lock);
439 oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL, 444 oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL,
440 OXYGEN_SPDIF_OUT_ENABLE); 445 OXYGEN_SPDIF_OUT_ENABLE);
@@ -446,6 +451,7 @@ static int oxygen_spdif_hw_params(struct snd_pcm_substream *substream,
446 OXYGEN_SPDIF_OUT_RATE_MASK); 451 OXYGEN_SPDIF_OUT_RATE_MASK);
447 oxygen_update_spdif_source(chip); 452 oxygen_update_spdif_source(chip);
448 spin_unlock_irq(&chip->reg_lock); 453 spin_unlock_irq(&chip->reg_lock);
454 mutex_unlock(&chip->mutex);
449 return 0; 455 return 0;
450} 456}
451 457
@@ -459,6 +465,7 @@ static int oxygen_multich_hw_params(struct snd_pcm_substream *substream,
459 if (err < 0) 465 if (err < 0)
460 return err; 466 return err;
461 467
468 mutex_lock(&chip->mutex);
462 spin_lock_irq(&chip->reg_lock); 469 spin_lock_irq(&chip->reg_lock);
463 oxygen_write8_masked(chip, OXYGEN_PLAY_CHANNELS, 470 oxygen_write8_masked(chip, OXYGEN_PLAY_CHANNELS,
464 oxygen_play_channels(hw_params), 471 oxygen_play_channels(hw_params),
@@ -469,18 +476,18 @@ static int oxygen_multich_hw_params(struct snd_pcm_substream *substream,
469 oxygen_write16_masked(chip, OXYGEN_I2S_MULTICH_FORMAT, 476 oxygen_write16_masked(chip, OXYGEN_I2S_MULTICH_FORMAT,
470 oxygen_rate(hw_params) | 477 oxygen_rate(hw_params) |
471 chip->model.dac_i2s_format | 478 chip->model.dac_i2s_format |
472 oxygen_i2s_mclk(hw_params) | 479 chip->model.get_i2s_mclk(chip, PCM_MULTICH,
480 hw_params) |
473 oxygen_i2s_bits(hw_params), 481 oxygen_i2s_bits(hw_params),
474 OXYGEN_I2S_RATE_MASK | 482 OXYGEN_I2S_RATE_MASK |
475 OXYGEN_I2S_FORMAT_MASK | 483 OXYGEN_I2S_FORMAT_MASK |
476 OXYGEN_I2S_MCLK_MASK | 484 OXYGEN_I2S_MCLK_MASK |
477 OXYGEN_I2S_BITS_MASK); 485 OXYGEN_I2S_BITS_MASK);
478 oxygen_update_dac_routing(chip);
479 oxygen_update_spdif_source(chip); 486 oxygen_update_spdif_source(chip);
480 spin_unlock_irq(&chip->reg_lock); 487 spin_unlock_irq(&chip->reg_lock);
481 488
482 mutex_lock(&chip->mutex);
483 chip->model.set_dac_params(chip, hw_params); 489 chip->model.set_dac_params(chip, hw_params);
490 oxygen_update_dac_routing(chip);
484 mutex_unlock(&chip->mutex); 491 mutex_unlock(&chip->mutex);
485 return 0; 492 return 0;
486} 493}
diff --git a/sound/pci/oxygen/virtuoso.c b/sound/pci/oxygen/virtuoso.c
index 6ebcb6bdd712..f03a2f2cffee 100644
--- a/sound/pci/oxygen/virtuoso.c
+++ b/sound/pci/oxygen/virtuoso.c
@@ -17,145 +17,12 @@
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */ 18 */
19 19
20/*
21 * Xonar D2/D2X
22 * ------------
23 *
24 * CMI8788:
25 *
26 * SPI 0 -> 1st PCM1796 (front)
27 * SPI 1 -> 2nd PCM1796 (surround)
28 * SPI 2 -> 3rd PCM1796 (center/LFE)
29 * SPI 4 -> 4th PCM1796 (back)
30 *
31 * GPIO 2 -> M0 of CS5381
32 * GPIO 3 -> M1 of CS5381
33 * GPIO 5 <- external power present (D2X only)
34 * GPIO 7 -> ALT
35 * GPIO 8 -> enable output to speakers
36 */
37
38/*
39 * Xonar D1/DX
40 * -----------
41 *
42 * CMI8788:
43 *
44 * I²C <-> CS4398 (front)
45 * <-> CS4362A (surround, center/LFE, back)
46 *
47 * GPI 0 <- external power present (DX only)
48 *
49 * GPIO 0 -> enable output to speakers
50 * GPIO 1 -> enable front panel I/O
51 * GPIO 2 -> M0 of CS5361
52 * GPIO 3 -> M1 of CS5361
53 * GPIO 8 -> route input jack to line-in (0) or mic-in (1)
54 *
55 * CS4398:
56 *
57 * AD0 <- 1
58 * AD1 <- 1
59 *
60 * CS4362A:
61 *
62 * AD0 <- 0
63 */
64
65/*
66 * Xonar HDAV1.3 (Deluxe)
67 * ----------------------
68 *
69 * CMI8788:
70 *
71 * I²C <-> PCM1796 (front)
72 *
73 * GPI 0 <- external power present
74 *
75 * GPIO 0 -> enable output to speakers
76 * GPIO 2 -> M0 of CS5381
77 * GPIO 3 -> M1 of CS5381
78 * GPIO 8 -> route input jack to line-in (0) or mic-in (1)
79 *
80 * TXD -> HDMI controller
81 * RXD <- HDMI controller
82 *
83 * PCM1796 front: AD1,0 <- 0,0
84 *
85 * no daughterboard
86 * ----------------
87 *
88 * GPIO 4 <- 1
89 *
90 * H6 daughterboard
91 * ----------------
92 *
93 * GPIO 4 <- 0
94 * GPIO 5 <- 0
95 *
96 * I²C <-> PCM1796 (surround)
97 * <-> PCM1796 (center/LFE)
98 * <-> PCM1796 (back)
99 *
100 * PCM1796 surround: AD1,0 <- 0,1
101 * PCM1796 center/LFE: AD1,0 <- 1,0
102 * PCM1796 back: AD1,0 <- 1,1
103 *
104 * unknown daughterboard
105 * ---------------------
106 *
107 * GPIO 4 <- 0
108 * GPIO 5 <- 1
109 *
110 * I²C <-> CS4362A (surround, center/LFE, back)
111 *
112 * CS4362A: AD0 <- 0
113 */
114
115/*
116 * Xonar Essence ST (Deluxe)/STX
117 * -----------------------------
118 *
119 * CMI8788:
120 *
121 * I²C <-> PCM1792A
122 *
123 * GPI 0 <- external power present
124 *
125 * GPIO 0 -> enable output to speakers
126 * GPIO 1 -> route HP to front panel (0) or rear jack (1)
127 * GPIO 2 -> M0 of CS5381
128 * GPIO 3 -> M1 of CS5381
129 * GPIO 7 -> route output to speaker jacks (0) or HP (1)
130 * GPIO 8 -> route input jack to line-in (0) or mic-in (1)
131 *
132 * PCM1792A:
133 *
134 * AD0 <- 0
135 *
136 * H6 daughterboard
137 * ----------------
138 *
139 * GPIO 4 <- 0
140 * GPIO 5 <- 0
141 */
142
143#include <linux/pci.h> 20#include <linux/pci.h>
144#include <linux/delay.h> 21#include <linux/delay.h>
145#include <linux/mutex.h>
146#include <sound/ac97_codec.h>
147#include <sound/asoundef.h>
148#include <sound/control.h>
149#include <sound/core.h> 22#include <sound/core.h>
150#include <sound/initval.h> 23#include <sound/initval.h>
151#include <sound/pcm.h> 24#include <sound/pcm.h>
152#include <sound/pcm_params.h> 25#include "xonar.h"
153#include <sound/tlv.h>
154#include "oxygen.h"
155#include "cm9780.h"
156#include "pcm1796.h"
157#include "cs4398.h"
158#include "cs4362a.h"
159 26
160MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>"); 27MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
161MODULE_DESCRIPTION("Asus AVx00 driver"); 28MODULE_DESCRIPTION("Asus AVx00 driver");
@@ -173,972 +40,31 @@ MODULE_PARM_DESC(id, "ID string");
173module_param_array(enable, bool, NULL, 0444); 40module_param_array(enable, bool, NULL, 0444);
174MODULE_PARM_DESC(enable, "enable card"); 41MODULE_PARM_DESC(enable, "enable card");
175 42
176enum { 43static DEFINE_PCI_DEVICE_TABLE(xonar_ids) = {
177 MODEL_D2, 44 { OXYGEN_PCI_SUBID(0x1043, 0x8269) },
178 MODEL_D2X, 45 { OXYGEN_PCI_SUBID(0x1043, 0x8275) },
179 MODEL_D1, 46 { OXYGEN_PCI_SUBID(0x1043, 0x82b7) },
180 MODEL_DX, 47 { OXYGEN_PCI_SUBID(0x1043, 0x8314) },
181 MODEL_HDAV, /* without daughterboard */ 48 { OXYGEN_PCI_SUBID(0x1043, 0x8327) },
182 MODEL_HDAV_H6, /* with H6 daughterboard */ 49 { OXYGEN_PCI_SUBID(0x1043, 0x834f) },
183 MODEL_ST, 50 { OXYGEN_PCI_SUBID(0x1043, 0x835c) },
184 MODEL_ST_H6, 51 { OXYGEN_PCI_SUBID(0x1043, 0x835d) },
185 MODEL_STX, 52 { OXYGEN_PCI_SUBID(0x1043, 0x838e) },
186};
187
188static struct pci_device_id xonar_ids[] __devinitdata = {
189 { OXYGEN_PCI_SUBID(0x1043, 0x8269), .driver_data = MODEL_D2 },
190 { OXYGEN_PCI_SUBID(0x1043, 0x8275), .driver_data = MODEL_DX },
191 { OXYGEN_PCI_SUBID(0x1043, 0x82b7), .driver_data = MODEL_D2X },
192 { OXYGEN_PCI_SUBID(0x1043, 0x8314), .driver_data = MODEL_HDAV },
193 { OXYGEN_PCI_SUBID(0x1043, 0x8327), .driver_data = MODEL_DX },
194 { OXYGEN_PCI_SUBID(0x1043, 0x834f), .driver_data = MODEL_D1 },
195 { OXYGEN_PCI_SUBID(0x1043, 0x835c), .driver_data = MODEL_STX },
196 { OXYGEN_PCI_SUBID(0x1043, 0x835d), .driver_data = MODEL_ST },
197 { OXYGEN_PCI_SUBID_BROKEN_EEPROM }, 53 { OXYGEN_PCI_SUBID_BROKEN_EEPROM },
198 { } 54 { }
199}; 55};
200MODULE_DEVICE_TABLE(pci, xonar_ids); 56MODULE_DEVICE_TABLE(pci, xonar_ids);
201 57
202
203#define GPIO_CS53x1_M_MASK 0x000c
204#define GPIO_CS53x1_M_SINGLE 0x0000
205#define GPIO_CS53x1_M_DOUBLE 0x0004
206#define GPIO_CS53x1_M_QUAD 0x0008
207
208#define GPIO_D2X_EXT_POWER 0x0020
209#define GPIO_D2_ALT 0x0080
210#define GPIO_D2_OUTPUT_ENABLE 0x0100
211
212#define GPI_DX_EXT_POWER 0x01
213#define GPIO_DX_OUTPUT_ENABLE 0x0001
214#define GPIO_DX_FRONT_PANEL 0x0002
215#define GPIO_DX_INPUT_ROUTE 0x0100
216
217#define GPIO_DB_MASK 0x0030
218#define GPIO_DB_H6 0x0000
219#define GPIO_DB_XX 0x0020
220
221#define GPIO_ST_HP_REAR 0x0002
222#define GPIO_ST_HP 0x0080
223
224#define I2C_DEVICE_PCM1796(i) (0x98 + ((i) << 1)) /* 10011, ADx=i, /W=0 */
225#define I2C_DEVICE_CS4398 0x9e /* 10011, AD1=1, AD0=1, /W=0 */
226#define I2C_DEVICE_CS4362A 0x30 /* 001100, AD0=0, /W=0 */
227
228struct xonar_data {
229 unsigned int anti_pop_delay;
230 unsigned int dacs;
231 u16 output_enable_bit;
232 u8 ext_power_reg;
233 u8 ext_power_int_reg;
234 u8 ext_power_bit;
235 u8 has_power;
236 u8 pcm1796_oversampling;
237 u8 cs4398_fm;
238 u8 cs4362a_fm;
239 u8 hdmi_params[5];
240};
241
242static void xonar_gpio_changed(struct oxygen *chip);
243
244static inline void pcm1796_write_spi(struct oxygen *chip, unsigned int codec,
245 u8 reg, u8 value)
246{
247 /* maps ALSA channel pair number to SPI output */
248 static const u8 codec_map[4] = {
249 0, 1, 2, 4
250 };
251 oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
252 OXYGEN_SPI_DATA_LENGTH_2 |
253 OXYGEN_SPI_CLOCK_160 |
254 (codec_map[codec] << OXYGEN_SPI_CODEC_SHIFT) |
255 OXYGEN_SPI_CEN_LATCH_CLOCK_HI,
256 (reg << 8) | value);
257}
258
259static inline void pcm1796_write_i2c(struct oxygen *chip, unsigned int codec,
260 u8 reg, u8 value)
261{
262 oxygen_write_i2c(chip, I2C_DEVICE_PCM1796(codec), reg, value);
263}
264
265static void pcm1796_write(struct oxygen *chip, unsigned int codec,
266 u8 reg, u8 value)
267{
268 if ((chip->model.function_flags & OXYGEN_FUNCTION_2WIRE_SPI_MASK) ==
269 OXYGEN_FUNCTION_SPI)
270 pcm1796_write_spi(chip, codec, reg, value);
271 else
272 pcm1796_write_i2c(chip, codec, reg, value);
273}
274
275static void cs4398_write(struct oxygen *chip, u8 reg, u8 value)
276{
277 oxygen_write_i2c(chip, I2C_DEVICE_CS4398, reg, value);
278}
279
280static void cs4362a_write(struct oxygen *chip, u8 reg, u8 value)
281{
282 oxygen_write_i2c(chip, I2C_DEVICE_CS4362A, reg, value);
283}
284
285static void hdmi_write_command(struct oxygen *chip, u8 command,
286 unsigned int count, const u8 *params)
287{
288 unsigned int i;
289 u8 checksum;
290
291 oxygen_write_uart(chip, 0xfb);
292 oxygen_write_uart(chip, 0xef);
293 oxygen_write_uart(chip, command);
294 oxygen_write_uart(chip, count);
295 for (i = 0; i < count; ++i)
296 oxygen_write_uart(chip, params[i]);
297 checksum = 0xfb + 0xef + command + count;
298 for (i = 0; i < count; ++i)
299 checksum += params[i];
300 oxygen_write_uart(chip, checksum);
301}
302
303static void xonar_enable_output(struct oxygen *chip)
304{
305 struct xonar_data *data = chip->model_data;
306
307 msleep(data->anti_pop_delay);
308 oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, data->output_enable_bit);
309}
310
311static void xonar_common_init(struct oxygen *chip)
312{
313 struct xonar_data *data = chip->model_data;
314
315 if (data->ext_power_reg) {
316 oxygen_set_bits8(chip, data->ext_power_int_reg,
317 data->ext_power_bit);
318 chip->interrupt_mask |= OXYGEN_INT_GPIO;
319 chip->model.gpio_changed = xonar_gpio_changed;
320 data->has_power = !!(oxygen_read8(chip, data->ext_power_reg)
321 & data->ext_power_bit);
322 }
323 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
324 GPIO_CS53x1_M_MASK | data->output_enable_bit);
325 oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
326 GPIO_CS53x1_M_SINGLE, GPIO_CS53x1_M_MASK);
327 oxygen_ac97_set_bits(chip, 0, CM9780_JACK, CM9780_FMIC2MIC);
328 xonar_enable_output(chip);
329}
330
331static void update_pcm1796_volume(struct oxygen *chip)
332{
333 struct xonar_data *data = chip->model_data;
334 unsigned int i;
335
336 for (i = 0; i < data->dacs; ++i) {
337 pcm1796_write(chip, i, 16, chip->dac_volume[i * 2]);
338 pcm1796_write(chip, i, 17, chip->dac_volume[i * 2 + 1]);
339 }
340}
341
342static void update_pcm1796_mute(struct oxygen *chip)
343{
344 struct xonar_data *data = chip->model_data;
345 unsigned int i;
346 u8 value;
347
348 value = PCM1796_DMF_DISABLED | PCM1796_FMT_24_LJUST | PCM1796_ATLD;
349 if (chip->dac_mute)
350 value |= PCM1796_MUTE;
351 for (i = 0; i < data->dacs; ++i)
352 pcm1796_write(chip, i, 18, value);
353}
354
355static void pcm1796_init(struct oxygen *chip)
356{
357 struct xonar_data *data = chip->model_data;
358 unsigned int i;
359
360 for (i = 0; i < data->dacs; ++i) {
361 pcm1796_write(chip, i, 19, PCM1796_FLT_SHARP | PCM1796_ATS_1);
362 pcm1796_write(chip, i, 20, data->pcm1796_oversampling);
363 pcm1796_write(chip, i, 21, 0);
364 }
365 update_pcm1796_mute(chip); /* set ATLD before ATL/ATR */
366 update_pcm1796_volume(chip);
367}
368
369static void xonar_d2_init(struct oxygen *chip)
370{
371 struct xonar_data *data = chip->model_data;
372
373 data->anti_pop_delay = 300;
374 data->dacs = 4;
375 data->output_enable_bit = GPIO_D2_OUTPUT_ENABLE;
376 data->pcm1796_oversampling = PCM1796_OS_64;
377
378 pcm1796_init(chip);
379
380 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_D2_ALT);
381 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_D2_ALT);
382
383 xonar_common_init(chip);
384
385 snd_component_add(chip->card, "PCM1796");
386 snd_component_add(chip->card, "CS5381");
387}
388
389static void xonar_d2x_init(struct oxygen *chip)
390{
391 struct xonar_data *data = chip->model_data;
392
393 data->ext_power_reg = OXYGEN_GPIO_DATA;
394 data->ext_power_int_reg = OXYGEN_GPIO_INTERRUPT_MASK;
395 data->ext_power_bit = GPIO_D2X_EXT_POWER;
396 oxygen_clear_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_D2X_EXT_POWER);
397
398 xonar_d2_init(chip);
399}
400
401static void update_cs4362a_volumes(struct oxygen *chip)
402{
403 u8 mute;
404
405 mute = chip->dac_mute ? CS4362A_MUTE : 0;
406 cs4362a_write(chip, 7, (127 - chip->dac_volume[2]) | mute);
407 cs4362a_write(chip, 8, (127 - chip->dac_volume[3]) | mute);
408 cs4362a_write(chip, 10, (127 - chip->dac_volume[4]) | mute);
409 cs4362a_write(chip, 11, (127 - chip->dac_volume[5]) | mute);
410 cs4362a_write(chip, 13, (127 - chip->dac_volume[6]) | mute);
411 cs4362a_write(chip, 14, (127 - chip->dac_volume[7]) | mute);
412}
413
414static void update_cs43xx_volume(struct oxygen *chip)
415{
416 cs4398_write(chip, 5, (127 - chip->dac_volume[0]) * 2);
417 cs4398_write(chip, 6, (127 - chip->dac_volume[1]) * 2);
418 update_cs4362a_volumes(chip);
419}
420
421static void update_cs43xx_mute(struct oxygen *chip)
422{
423 u8 reg;
424
425 reg = CS4398_MUTEP_LOW | CS4398_PAMUTE;
426 if (chip->dac_mute)
427 reg |= CS4398_MUTE_B | CS4398_MUTE_A;
428 cs4398_write(chip, 4, reg);
429 update_cs4362a_volumes(chip);
430}
431
432static void cs43xx_init(struct oxygen *chip)
433{
434 struct xonar_data *data = chip->model_data;
435
436 /* set CPEN (control port mode) and power down */
437 cs4398_write(chip, 8, CS4398_CPEN | CS4398_PDN);
438 cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN);
439 /* configure */
440 cs4398_write(chip, 2, data->cs4398_fm);
441 cs4398_write(chip, 3, CS4398_ATAPI_B_R | CS4398_ATAPI_A_L);
442 cs4398_write(chip, 7, CS4398_RMP_DN | CS4398_RMP_UP |
443 CS4398_ZERO_CROSS | CS4398_SOFT_RAMP);
444 cs4362a_write(chip, 0x02, CS4362A_DIF_LJUST);
445 cs4362a_write(chip, 0x03, CS4362A_MUTEC_6 | CS4362A_AMUTE |
446 CS4362A_RMP_UP | CS4362A_ZERO_CROSS | CS4362A_SOFT_RAMP);
447 cs4362a_write(chip, 0x04, CS4362A_RMP_DN | CS4362A_DEM_NONE);
448 cs4362a_write(chip, 0x05, 0);
449 cs4362a_write(chip, 0x06, data->cs4362a_fm);
450 cs4362a_write(chip, 0x09, data->cs4362a_fm);
451 cs4362a_write(chip, 0x0c, data->cs4362a_fm);
452 update_cs43xx_volume(chip);
453 update_cs43xx_mute(chip);
454 /* clear power down */
455 cs4398_write(chip, 8, CS4398_CPEN);
456 cs4362a_write(chip, 0x01, CS4362A_CPEN);
457}
458
459static void xonar_d1_init(struct oxygen *chip)
460{
461 struct xonar_data *data = chip->model_data;
462
463 data->anti_pop_delay = 800;
464 data->output_enable_bit = GPIO_DX_OUTPUT_ENABLE;
465 data->cs4398_fm = CS4398_FM_SINGLE | CS4398_DEM_NONE | CS4398_DIF_LJUST;
466 data->cs4362a_fm = CS4362A_FM_SINGLE |
467 CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L;
468
469 oxygen_write16(chip, OXYGEN_2WIRE_BUS_STATUS,
470 OXYGEN_2WIRE_LENGTH_8 |
471 OXYGEN_2WIRE_INTERRUPT_MASK |
472 OXYGEN_2WIRE_SPEED_FAST);
473
474 cs43xx_init(chip);
475
476 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
477 GPIO_DX_FRONT_PANEL | GPIO_DX_INPUT_ROUTE);
478 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA,
479 GPIO_DX_FRONT_PANEL | GPIO_DX_INPUT_ROUTE);
480
481 xonar_common_init(chip);
482
483 snd_component_add(chip->card, "CS4398");
484 snd_component_add(chip->card, "CS4362A");
485 snd_component_add(chip->card, "CS5361");
486}
487
488static void xonar_dx_init(struct oxygen *chip)
489{
490 struct xonar_data *data = chip->model_data;
491
492 data->ext_power_reg = OXYGEN_GPI_DATA;
493 data->ext_power_int_reg = OXYGEN_GPI_INTERRUPT_MASK;
494 data->ext_power_bit = GPI_DX_EXT_POWER;
495
496 xonar_d1_init(chip);
497}
498
499static void xonar_hdav_init(struct oxygen *chip)
500{
501 struct xonar_data *data = chip->model_data;
502 u8 param;
503
504 oxygen_write16(chip, OXYGEN_2WIRE_BUS_STATUS,
505 OXYGEN_2WIRE_LENGTH_8 |
506 OXYGEN_2WIRE_INTERRUPT_MASK |
507 OXYGEN_2WIRE_SPEED_FAST);
508
509 data->anti_pop_delay = 100;
510 data->dacs = chip->model.private_data == MODEL_HDAV_H6 ? 4 : 1;
511 data->output_enable_bit = GPIO_DX_OUTPUT_ENABLE;
512 data->ext_power_reg = OXYGEN_GPI_DATA;
513 data->ext_power_int_reg = OXYGEN_GPI_INTERRUPT_MASK;
514 data->ext_power_bit = GPI_DX_EXT_POWER;
515 data->pcm1796_oversampling = PCM1796_OS_64;
516
517 pcm1796_init(chip);
518
519 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_DX_INPUT_ROUTE);
520 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_DX_INPUT_ROUTE);
521
522 oxygen_reset_uart(chip);
523 param = 0;
524 hdmi_write_command(chip, 0x61, 1, &param);
525 param = 1;
526 hdmi_write_command(chip, 0x74, 1, &param);
527 data->hdmi_params[1] = IEC958_AES3_CON_FS_48000;
528 data->hdmi_params[4] = 1;
529 hdmi_write_command(chip, 0x54, 5, data->hdmi_params);
530
531 xonar_common_init(chip);
532
533 snd_component_add(chip->card, "PCM1796");
534 snd_component_add(chip->card, "CS5381");
535}
536
537static void xonar_st_init(struct oxygen *chip)
538{
539 struct xonar_data *data = chip->model_data;
540
541 oxygen_write16(chip, OXYGEN_2WIRE_BUS_STATUS,
542 OXYGEN_2WIRE_LENGTH_8 |
543 OXYGEN_2WIRE_INTERRUPT_MASK |
544 OXYGEN_2WIRE_SPEED_FAST);
545
546 if (chip->model.private_data == MODEL_ST_H6)
547 chip->model.dac_channels = 8;
548 data->anti_pop_delay = 100;
549 data->dacs = chip->model.private_data == MODEL_ST_H6 ? 4 : 1;
550 data->output_enable_bit = GPIO_DX_OUTPUT_ENABLE;
551 data->pcm1796_oversampling = PCM1796_OS_64;
552
553 pcm1796_init(chip);
554
555 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
556 GPIO_DX_INPUT_ROUTE | GPIO_ST_HP_REAR | GPIO_ST_HP);
557 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA,
558 GPIO_DX_INPUT_ROUTE | GPIO_ST_HP_REAR | GPIO_ST_HP);
559
560 xonar_common_init(chip);
561
562 snd_component_add(chip->card, "PCM1792A");
563 snd_component_add(chip->card, "CS5381");
564}
565
566static void xonar_stx_init(struct oxygen *chip)
567{
568 struct xonar_data *data = chip->model_data;
569
570 data->ext_power_reg = OXYGEN_GPI_DATA;
571 data->ext_power_int_reg = OXYGEN_GPI_INTERRUPT_MASK;
572 data->ext_power_bit = GPI_DX_EXT_POWER;
573
574 xonar_st_init(chip);
575}
576
577static void xonar_disable_output(struct oxygen *chip)
578{
579 struct xonar_data *data = chip->model_data;
580
581 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, data->output_enable_bit);
582}
583
584static void xonar_d2_cleanup(struct oxygen *chip)
585{
586 xonar_disable_output(chip);
587}
588
589static void xonar_d1_cleanup(struct oxygen *chip)
590{
591 xonar_disable_output(chip);
592 cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN);
593 oxygen_clear_bits8(chip, OXYGEN_FUNCTION, OXYGEN_FUNCTION_RESET_CODEC);
594}
595
596static void xonar_hdav_cleanup(struct oxygen *chip)
597{
598 u8 param = 0;
599
600 hdmi_write_command(chip, 0x74, 1, &param);
601 xonar_disable_output(chip);
602}
603
604static void xonar_st_cleanup(struct oxygen *chip)
605{
606 xonar_disable_output(chip);
607}
608
609static void xonar_d2_suspend(struct oxygen *chip)
610{
611 xonar_d2_cleanup(chip);
612}
613
614static void xonar_d1_suspend(struct oxygen *chip)
615{
616 xonar_d1_cleanup(chip);
617}
618
619static void xonar_hdav_suspend(struct oxygen *chip)
620{
621 xonar_hdav_cleanup(chip);
622 msleep(2);
623}
624
625static void xonar_st_suspend(struct oxygen *chip)
626{
627 xonar_st_cleanup(chip);
628}
629
630static void xonar_d2_resume(struct oxygen *chip)
631{
632 pcm1796_init(chip);
633 xonar_enable_output(chip);
634}
635
636static void xonar_d1_resume(struct oxygen *chip)
637{
638 oxygen_set_bits8(chip, OXYGEN_FUNCTION, OXYGEN_FUNCTION_RESET_CODEC);
639 msleep(1);
640 cs43xx_init(chip);
641 xonar_enable_output(chip);
642}
643
644static void xonar_hdav_resume(struct oxygen *chip)
645{
646 struct xonar_data *data = chip->model_data;
647 u8 param;
648
649 oxygen_reset_uart(chip);
650 param = 0;
651 hdmi_write_command(chip, 0x61, 1, &param);
652 param = 1;
653 hdmi_write_command(chip, 0x74, 1, &param);
654 hdmi_write_command(chip, 0x54, 5, data->hdmi_params);
655 pcm1796_init(chip);
656 xonar_enable_output(chip);
657}
658
659static void xonar_st_resume(struct oxygen *chip)
660{
661 pcm1796_init(chip);
662 xonar_enable_output(chip);
663}
664
665static void xonar_hdav_pcm_hardware_filter(unsigned int channel,
666 struct snd_pcm_hardware *hardware)
667{
668 if (channel == PCM_MULTICH) {
669 hardware->rates = SNDRV_PCM_RATE_44100 |
670 SNDRV_PCM_RATE_48000 |
671 SNDRV_PCM_RATE_96000 |
672 SNDRV_PCM_RATE_192000;
673 hardware->rate_min = 44100;
674 }
675}
676
677static void set_pcm1796_params(struct oxygen *chip,
678 struct snd_pcm_hw_params *params)
679{
680 struct xonar_data *data = chip->model_data;
681 unsigned int i;
682
683 data->pcm1796_oversampling =
684 params_rate(params) >= 96000 ? PCM1796_OS_32 : PCM1796_OS_64;
685 for (i = 0; i < data->dacs; ++i)
686 pcm1796_write(chip, i, 20, data->pcm1796_oversampling);
687}
688
689static void set_cs53x1_params(struct oxygen *chip,
690 struct snd_pcm_hw_params *params)
691{
692 unsigned int value;
693
694 if (params_rate(params) <= 54000)
695 value = GPIO_CS53x1_M_SINGLE;
696 else if (params_rate(params) <= 108000)
697 value = GPIO_CS53x1_M_DOUBLE;
698 else
699 value = GPIO_CS53x1_M_QUAD;
700 oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
701 value, GPIO_CS53x1_M_MASK);
702}
703
704static void set_cs43xx_params(struct oxygen *chip,
705 struct snd_pcm_hw_params *params)
706{
707 struct xonar_data *data = chip->model_data;
708
709 data->cs4398_fm = CS4398_DEM_NONE | CS4398_DIF_LJUST;
710 data->cs4362a_fm = CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L;
711 if (params_rate(params) <= 50000) {
712 data->cs4398_fm |= CS4398_FM_SINGLE;
713 data->cs4362a_fm |= CS4362A_FM_SINGLE;
714 } else if (params_rate(params) <= 100000) {
715 data->cs4398_fm |= CS4398_FM_DOUBLE;
716 data->cs4362a_fm |= CS4362A_FM_DOUBLE;
717 } else {
718 data->cs4398_fm |= CS4398_FM_QUAD;
719 data->cs4362a_fm |= CS4362A_FM_QUAD;
720 }
721 cs4398_write(chip, 2, data->cs4398_fm);
722 cs4362a_write(chip, 0x06, data->cs4362a_fm);
723 cs4362a_write(chip, 0x09, data->cs4362a_fm);
724 cs4362a_write(chip, 0x0c, data->cs4362a_fm);
725}
726
727static void set_hdmi_params(struct oxygen *chip,
728 struct snd_pcm_hw_params *params)
729{
730 struct xonar_data *data = chip->model_data;
731
732 data->hdmi_params[0] = 0; /* 1 = non-audio */
733 switch (params_rate(params)) {
734 case 44100:
735 data->hdmi_params[1] = IEC958_AES3_CON_FS_44100;
736 break;
737 case 48000:
738 data->hdmi_params[1] = IEC958_AES3_CON_FS_48000;
739 break;
740 default: /* 96000 */
741 data->hdmi_params[1] = IEC958_AES3_CON_FS_96000;
742 break;
743 case 192000:
744 data->hdmi_params[1] = IEC958_AES3_CON_FS_192000;
745 break;
746 }
747 data->hdmi_params[2] = params_channels(params) / 2 - 1;
748 if (params_format(params) == SNDRV_PCM_FORMAT_S16_LE)
749 data->hdmi_params[3] = 0;
750 else
751 data->hdmi_params[3] = 0xc0;
752 data->hdmi_params[4] = 1; /* ? */
753 hdmi_write_command(chip, 0x54, 5, data->hdmi_params);
754}
755
756static void set_hdav_params(struct oxygen *chip,
757 struct snd_pcm_hw_params *params)
758{
759 set_pcm1796_params(chip, params);
760 set_hdmi_params(chip, params);
761}
762
763static void xonar_gpio_changed(struct oxygen *chip)
764{
765 struct xonar_data *data = chip->model_data;
766 u8 has_power;
767
768 has_power = !!(oxygen_read8(chip, data->ext_power_reg)
769 & data->ext_power_bit);
770 if (has_power != data->has_power) {
771 data->has_power = has_power;
772 if (has_power) {
773 snd_printk(KERN_NOTICE "power restored\n");
774 } else {
775 snd_printk(KERN_CRIT
776 "Hey! Don't unplug the power cable!\n");
777 /* TODO: stop PCMs */
778 }
779 }
780}
781
782static void xonar_hdav_uart_input(struct oxygen *chip)
783{
784 if (chip->uart_input_count >= 2 &&
785 chip->uart_input[chip->uart_input_count - 2] == 'O' &&
786 chip->uart_input[chip->uart_input_count - 1] == 'K') {
787 printk(KERN_DEBUG "message from Xonar HDAV HDMI chip received:\n");
788 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
789 chip->uart_input, chip->uart_input_count);
790 chip->uart_input_count = 0;
791 }
792}
793
794static int gpio_bit_switch_get(struct snd_kcontrol *ctl,
795 struct snd_ctl_elem_value *value)
796{
797 struct oxygen *chip = ctl->private_data;
798 u16 bit = ctl->private_value;
799
800 value->value.integer.value[0] =
801 !!(oxygen_read16(chip, OXYGEN_GPIO_DATA) & bit);
802 return 0;
803}
804
805static int gpio_bit_switch_put(struct snd_kcontrol *ctl,
806 struct snd_ctl_elem_value *value)
807{
808 struct oxygen *chip = ctl->private_data;
809 u16 bit = ctl->private_value;
810 u16 old_bits, new_bits;
811 int changed;
812
813 spin_lock_irq(&chip->reg_lock);
814 old_bits = oxygen_read16(chip, OXYGEN_GPIO_DATA);
815 if (value->value.integer.value[0])
816 new_bits = old_bits | bit;
817 else
818 new_bits = old_bits & ~bit;
819 changed = new_bits != old_bits;
820 if (changed)
821 oxygen_write16(chip, OXYGEN_GPIO_DATA, new_bits);
822 spin_unlock_irq(&chip->reg_lock);
823 return changed;
824}
825
826static const struct snd_kcontrol_new alt_switch = {
827 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
828 .name = "Analog Loopback Switch",
829 .info = snd_ctl_boolean_mono_info,
830 .get = gpio_bit_switch_get,
831 .put = gpio_bit_switch_put,
832 .private_value = GPIO_D2_ALT,
833};
834
835static const struct snd_kcontrol_new front_panel_switch = {
836 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
837 .name = "Front Panel Switch",
838 .info = snd_ctl_boolean_mono_info,
839 .get = gpio_bit_switch_get,
840 .put = gpio_bit_switch_put,
841 .private_value = GPIO_DX_FRONT_PANEL,
842};
843
844static int st_output_switch_info(struct snd_kcontrol *ctl,
845 struct snd_ctl_elem_info *info)
846{
847 static const char *const names[3] = {
848 "Speakers", "Headphones", "FP Headphones"
849 };
850
851 info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
852 info->count = 1;
853 info->value.enumerated.items = 3;
854 if (info->value.enumerated.item >= 3)
855 info->value.enumerated.item = 2;
856 strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
857 return 0;
858}
859
860static int st_output_switch_get(struct snd_kcontrol *ctl,
861 struct snd_ctl_elem_value *value)
862{
863 struct oxygen *chip = ctl->private_data;
864 u16 gpio;
865
866 gpio = oxygen_read16(chip, OXYGEN_GPIO_DATA);
867 if (!(gpio & GPIO_ST_HP))
868 value->value.enumerated.item[0] = 0;
869 else if (gpio & GPIO_ST_HP_REAR)
870 value->value.enumerated.item[0] = 1;
871 else
872 value->value.enumerated.item[0] = 2;
873 return 0;
874}
875
876
877static int st_output_switch_put(struct snd_kcontrol *ctl,
878 struct snd_ctl_elem_value *value)
879{
880 struct oxygen *chip = ctl->private_data;
881 u16 gpio_old, gpio;
882
883 mutex_lock(&chip->mutex);
884 gpio_old = oxygen_read16(chip, OXYGEN_GPIO_DATA);
885 gpio = gpio_old;
886 switch (value->value.enumerated.item[0]) {
887 case 0:
888 gpio &= ~(GPIO_ST_HP | GPIO_ST_HP_REAR);
889 break;
890 case 1:
891 gpio |= GPIO_ST_HP | GPIO_ST_HP_REAR;
892 break;
893 case 2:
894 gpio = (gpio | GPIO_ST_HP) & ~GPIO_ST_HP_REAR;
895 break;
896 }
897 oxygen_write16(chip, OXYGEN_GPIO_DATA, gpio);
898 mutex_unlock(&chip->mutex);
899 return gpio != gpio_old;
900}
901
902static const struct snd_kcontrol_new st_output_switch = {
903 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
904 .name = "Analog Output",
905 .info = st_output_switch_info,
906 .get = st_output_switch_get,
907 .put = st_output_switch_put,
908};
909
910static void xonar_line_mic_ac97_switch(struct oxygen *chip,
911 unsigned int reg, unsigned int mute)
912{
913 if (reg == AC97_LINE) {
914 spin_lock_irq(&chip->reg_lock);
915 oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
916 mute ? GPIO_DX_INPUT_ROUTE : 0,
917 GPIO_DX_INPUT_ROUTE);
918 spin_unlock_irq(&chip->reg_lock);
919 }
920}
921
922static const DECLARE_TLV_DB_SCALE(pcm1796_db_scale, -6000, 50, 0);
923static const DECLARE_TLV_DB_SCALE(cs4362a_db_scale, -6000, 100, 0);
924
925static int xonar_d2_control_filter(struct snd_kcontrol_new *template)
926{
927 if (!strncmp(template->name, "CD Capture ", 11))
928 /* CD in is actually connected to the video in pin */
929 template->private_value ^= AC97_CD ^ AC97_VIDEO;
930 return 0;
931}
932
933static int xonar_d1_control_filter(struct snd_kcontrol_new *template)
934{
935 if (!strncmp(template->name, "CD Capture ", 11))
936 return 1; /* no CD input */
937 return 0;
938}
939
940static int xonar_st_control_filter(struct snd_kcontrol_new *template)
941{
942 if (!strncmp(template->name, "CD Capture ", 11))
943 return 1; /* no CD input */
944 if (!strcmp(template->name, "Stereo Upmixing"))
945 return 1; /* stereo only - we don't need upmixing */
946 return 0;
947}
948
949static int xonar_d2_mixer_init(struct oxygen *chip)
950{
951 return snd_ctl_add(chip->card, snd_ctl_new1(&alt_switch, chip));
952}
953
954static int xonar_d1_mixer_init(struct oxygen *chip)
955{
956 return snd_ctl_add(chip->card, snd_ctl_new1(&front_panel_switch, chip));
957}
958
959static int xonar_st_mixer_init(struct oxygen *chip)
960{
961 return snd_ctl_add(chip->card, snd_ctl_new1(&st_output_switch, chip));
962}
963
964static const struct oxygen_model model_xonar_d2 = {
965 .longname = "Asus Virtuoso 200",
966 .chip = "AV200",
967 .init = xonar_d2_init,
968 .control_filter = xonar_d2_control_filter,
969 .mixer_init = xonar_d2_mixer_init,
970 .cleanup = xonar_d2_cleanup,
971 .suspend = xonar_d2_suspend,
972 .resume = xonar_d2_resume,
973 .set_dac_params = set_pcm1796_params,
974 .set_adc_params = set_cs53x1_params,
975 .update_dac_volume = update_pcm1796_volume,
976 .update_dac_mute = update_pcm1796_mute,
977 .dac_tlv = pcm1796_db_scale,
978 .model_data_size = sizeof(struct xonar_data),
979 .device_config = PLAYBACK_0_TO_I2S |
980 PLAYBACK_1_TO_SPDIF |
981 CAPTURE_0_FROM_I2S_2 |
982 CAPTURE_1_FROM_SPDIF |
983 MIDI_OUTPUT |
984 MIDI_INPUT,
985 .dac_channels = 8,
986 .dac_volume_min = 255 - 2*60,
987 .dac_volume_max = 255,
988 .misc_flags = OXYGEN_MISC_MIDI,
989 .function_flags = OXYGEN_FUNCTION_SPI |
990 OXYGEN_FUNCTION_ENABLE_SPI_4_5,
991 .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
992 .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
993};
994
995static const struct oxygen_model model_xonar_d1 = {
996 .longname = "Asus Virtuoso 100",
997 .chip = "AV200",
998 .init = xonar_d1_init,
999 .control_filter = xonar_d1_control_filter,
1000 .mixer_init = xonar_d1_mixer_init,
1001 .cleanup = xonar_d1_cleanup,
1002 .suspend = xonar_d1_suspend,
1003 .resume = xonar_d1_resume,
1004 .set_dac_params = set_cs43xx_params,
1005 .set_adc_params = set_cs53x1_params,
1006 .update_dac_volume = update_cs43xx_volume,
1007 .update_dac_mute = update_cs43xx_mute,
1008 .ac97_switch = xonar_line_mic_ac97_switch,
1009 .dac_tlv = cs4362a_db_scale,
1010 .model_data_size = sizeof(struct xonar_data),
1011 .device_config = PLAYBACK_0_TO_I2S |
1012 PLAYBACK_1_TO_SPDIF |
1013 CAPTURE_0_FROM_I2S_2,
1014 .dac_channels = 8,
1015 .dac_volume_min = 127 - 60,
1016 .dac_volume_max = 127,
1017 .function_flags = OXYGEN_FUNCTION_2WIRE,
1018 .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
1019 .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
1020};
1021
1022static const struct oxygen_model model_xonar_hdav = {
1023 .longname = "Asus Virtuoso 200",
1024 .chip = "AV200",
1025 .init = xonar_hdav_init,
1026 .cleanup = xonar_hdav_cleanup,
1027 .suspend = xonar_hdav_suspend,
1028 .resume = xonar_hdav_resume,
1029 .pcm_hardware_filter = xonar_hdav_pcm_hardware_filter,
1030 .set_dac_params = set_hdav_params,
1031 .set_adc_params = set_cs53x1_params,
1032 .update_dac_volume = update_pcm1796_volume,
1033 .update_dac_mute = update_pcm1796_mute,
1034 .uart_input = xonar_hdav_uart_input,
1035 .ac97_switch = xonar_line_mic_ac97_switch,
1036 .dac_tlv = pcm1796_db_scale,
1037 .model_data_size = sizeof(struct xonar_data),
1038 .device_config = PLAYBACK_0_TO_I2S |
1039 PLAYBACK_1_TO_SPDIF |
1040 CAPTURE_0_FROM_I2S_2 |
1041 CAPTURE_1_FROM_SPDIF,
1042 .dac_channels = 8,
1043 .dac_volume_min = 255 - 2*60,
1044 .dac_volume_max = 255,
1045 .misc_flags = OXYGEN_MISC_MIDI,
1046 .function_flags = OXYGEN_FUNCTION_2WIRE,
1047 .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
1048 .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
1049};
1050
1051static const struct oxygen_model model_xonar_st = {
1052 .longname = "Asus Virtuoso 100",
1053 .chip = "AV200",
1054 .init = xonar_st_init,
1055 .control_filter = xonar_st_control_filter,
1056 .mixer_init = xonar_st_mixer_init,
1057 .cleanup = xonar_st_cleanup,
1058 .suspend = xonar_st_suspend,
1059 .resume = xonar_st_resume,
1060 .set_dac_params = set_pcm1796_params,
1061 .set_adc_params = set_cs53x1_params,
1062 .update_dac_volume = update_pcm1796_volume,
1063 .update_dac_mute = update_pcm1796_mute,
1064 .ac97_switch = xonar_line_mic_ac97_switch,
1065 .dac_tlv = pcm1796_db_scale,
1066 .model_data_size = sizeof(struct xonar_data),
1067 .device_config = PLAYBACK_0_TO_I2S |
1068 PLAYBACK_1_TO_SPDIF |
1069 CAPTURE_0_FROM_I2S_2,
1070 .dac_channels = 2,
1071 .dac_volume_min = 255 - 2*60,
1072 .dac_volume_max = 255,
1073 .function_flags = OXYGEN_FUNCTION_2WIRE,
1074 .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
1075 .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
1076};
1077
1078static int __devinit get_xonar_model(struct oxygen *chip, 58static int __devinit get_xonar_model(struct oxygen *chip,
1079 const struct pci_device_id *id) 59 const struct pci_device_id *id)
1080{ 60{
1081 static const struct oxygen_model *const models[] = { 61 if (get_xonar_pcm179x_model(chip, id) >= 0)
1082 [MODEL_D1] = &model_xonar_d1, 62 return 0;
1083 [MODEL_DX] = &model_xonar_d1, 63 if (get_xonar_cs43xx_model(chip, id) >= 0)
1084 [MODEL_D2] = &model_xonar_d2, 64 return 0;
1085 [MODEL_D2X] = &model_xonar_d2, 65 if (get_xonar_wm87x6_model(chip, id) >= 0)
1086 [MODEL_HDAV] = &model_xonar_hdav, 66 return 0;
1087 [MODEL_ST] = &model_xonar_st, 67 return -EINVAL;
1088 [MODEL_STX] = &model_xonar_st,
1089 };
1090 static const char *const names[] = {
1091 [MODEL_D1] = "Xonar D1",
1092 [MODEL_DX] = "Xonar DX",
1093 [MODEL_D2] = "Xonar D2",
1094 [MODEL_D2X] = "Xonar D2X",
1095 [MODEL_HDAV] = "Xonar HDAV1.3",
1096 [MODEL_HDAV_H6] = "Xonar HDAV1.3+H6",
1097 [MODEL_ST] = "Xonar Essence ST",
1098 [MODEL_ST_H6] = "Xonar Essence ST+H6",
1099 [MODEL_STX] = "Xonar Essence STX",
1100 };
1101 unsigned int model = id->driver_data;
1102
1103 if (model >= ARRAY_SIZE(models) || !models[model])
1104 return -EINVAL;
1105 chip->model = *models[model];
1106
1107 switch (model) {
1108 case MODEL_D2X:
1109 chip->model.init = xonar_d2x_init;
1110 break;
1111 case MODEL_DX:
1112 chip->model.init = xonar_dx_init;
1113 break;
1114 case MODEL_HDAV:
1115 oxygen_clear_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_DB_MASK);
1116 switch (oxygen_read16(chip, OXYGEN_GPIO_DATA) & GPIO_DB_MASK) {
1117 case GPIO_DB_H6:
1118 model = MODEL_HDAV_H6;
1119 break;
1120 case GPIO_DB_XX:
1121 snd_printk(KERN_ERR "unknown daughterboard\n");
1122 return -ENODEV;
1123 }
1124 break;
1125 case MODEL_ST:
1126 oxygen_clear_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_DB_MASK);
1127 switch (oxygen_read16(chip, OXYGEN_GPIO_DATA) & GPIO_DB_MASK) {
1128 case GPIO_DB_H6:
1129 model = MODEL_ST_H6;
1130 break;
1131 }
1132 break;
1133 case MODEL_STX:
1134 chip->model.init = xonar_stx_init;
1135 oxygen_clear_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_DB_MASK);
1136 break;
1137 }
1138
1139 chip->model.shortname = names[model];
1140 chip->model.private_data = model;
1141 return 0;
1142} 68}
1143 69
1144static int __devinit xonar_probe(struct pci_dev *pci, 70static int __devinit xonar_probe(struct pci_dev *pci,
diff --git a/sound/pci/oxygen/wm8766.h b/sound/pci/oxygen/wm8766.h
new file mode 100644
index 000000000000..e0e849a7eaeb
--- /dev/null
+++ b/sound/pci/oxygen/wm8766.h
@@ -0,0 +1,73 @@
1#ifndef WM8766_H_INCLUDED
2#define WM8766_H_INCLUDED
3
4#define WM8766_LDA1 0x00
5#define WM8766_RDA1 0x01
6#define WM8766_DAC_CTRL 0x02
7#define WM8766_INT_CTRL 0x03
8#define WM8766_LDA2 0x04
9#define WM8766_RDA2 0x05
10#define WM8766_LDA3 0x06
11#define WM8766_RDA3 0x07
12#define WM8766_MASTDA 0x08
13#define WM8766_DAC_CTRL2 0x09
14#define WM8766_DAC_CTRL3 0x0a
15#define WM8766_MUTE1 0x0c
16#define WM8766_MUTE2 0x0f
17#define WM8766_RESET 0x1f
18
19/* LDAx/RDAx/MASTDA */
20#define WM8766_ATT_MASK 0x0ff
21#define WM8766_UPDATE 0x100
22/* DAC_CTRL */
23#define WM8766_MUTEALL 0x001
24#define WM8766_DEEMPALL 0x002
25#define WM8766_PWDN 0x004
26#define WM8766_ATC 0x008
27#define WM8766_IZD 0x010
28#define WM8766_PL_LEFT_MASK 0x060
29#define WM8766_PL_LEFT_MUTE 0x000
30#define WM8766_PL_LEFT_LEFT 0x020
31#define WM8766_PL_LEFT_RIGHT 0x040
32#define WM8766_PL_LEFT_LRMIX 0x060
33#define WM8766_PL_RIGHT_MASK 0x180
34#define WM8766_PL_RIGHT_MUTE 0x000
35#define WM8766_PL_RIGHT_LEFT 0x080
36#define WM8766_PL_RIGHT_RIGHT 0x100
37#define WM8766_PL_RIGHT_LRMIX 0x180
38/* INT_CTRL */
39#define WM8766_FMT_MASK 0x003
40#define WM8766_FMT_RJUST 0x000
41#define WM8766_FMT_LJUST 0x001
42#define WM8766_FMT_I2S 0x002
43#define WM8766_FMT_DSP 0x003
44#define WM8766_LRP 0x004
45#define WM8766_BCP 0x008
46#define WM8766_IWL_MASK 0x030
47#define WM8766_IWL_16 0x000
48#define WM8766_IWL_20 0x010
49#define WM8766_IWL_24 0x020
50#define WM8766_IWL_32 0x030
51#define WM8766_PHASE_MASK 0x1c0
52/* DAC_CTRL2 */
53#define WM8766_ZCD 0x001
54#define WM8766_DZFM_MASK 0x006
55#define WM8766_DMUTE_MASK 0x038
56#define WM8766_DEEMP_MASK 0x1c0
57/* DAC_CTRL3 */
58#define WM8766_DACPD_MASK 0x00e
59#define WM8766_PWRDNALL 0x010
60#define WM8766_MS 0x020
61#define WM8766_RATE_MASK 0x1c0
62#define WM8766_RATE_128 0x000
63#define WM8766_RATE_192 0x040
64#define WM8766_RATE_256 0x080
65#define WM8766_RATE_384 0x0c0
66#define WM8766_RATE_512 0x100
67#define WM8766_RATE_768 0x140
68/* MUTE1 */
69#define WM8766_MPD1 0x040
70/* MUTE2 */
71#define WM8766_MPD2 0x020
72
73#endif
diff --git a/sound/pci/oxygen/wm8776.h b/sound/pci/oxygen/wm8776.h
new file mode 100644
index 000000000000..1a96f5615727
--- /dev/null
+++ b/sound/pci/oxygen/wm8776.h
@@ -0,0 +1,177 @@
1#ifndef WM8776_H_INCLUDED
2#define WM8776_H_INCLUDED
3
4/*
5 * the following register names are from:
6 * wm8776.h -- WM8776 ASoC driver
7 *
8 * Copyright 2009 Wolfson Microelectronics plc
9 *
10 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 */
16
17#define WM8776_HPLVOL 0x00
18#define WM8776_HPRVOL 0x01
19#define WM8776_HPMASTER 0x02
20#define WM8776_DACLVOL 0x03
21#define WM8776_DACRVOL 0x04
22#define WM8776_DACMASTER 0x05
23#define WM8776_PHASESWAP 0x06
24#define WM8776_DACCTRL1 0x07
25#define WM8776_DACMUTE 0x08
26#define WM8776_DACCTRL2 0x09
27#define WM8776_DACIFCTRL 0x0a
28#define WM8776_ADCIFCTRL 0x0b
29#define WM8776_MSTRCTRL 0x0c
30#define WM8776_PWRDOWN 0x0d
31#define WM8776_ADCLVOL 0x0e
32#define WM8776_ADCRVOL 0x0f
33#define WM8776_ALCCTRL1 0x10
34#define WM8776_ALCCTRL2 0x11
35#define WM8776_ALCCTRL3 0x12
36#define WM8776_NOISEGATE 0x13
37#define WM8776_LIMITER 0x14
38#define WM8776_ADCMUX 0x15
39#define WM8776_OUTMUX 0x16
40#define WM8776_RESET 0x17
41
42
43/* HPLVOL/HPRVOL/HPMASTER */
44#define WM8776_HPATT_MASK 0x07f
45#define WM8776_HPZCEN 0x080
46#define WM8776_UPDATE 0x100
47
48/* DACLVOL/DACRVOL/DACMASTER */
49#define WM8776_DATT_MASK 0x0ff
50/*#define WM8776_UPDATE 0x100*/
51
52/* PHASESWAP */
53#define WM8776_PH_MASK 0x003
54
55/* DACCTRL1 */
56#define WM8776_DZCEN 0x001
57#define WM8776_ATC 0x002
58#define WM8776_IZD 0x004
59#define WM8776_TOD 0x008
60#define WM8776_PL_LEFT_MASK 0x030
61#define WM8776_PL_LEFT_MUTE 0x000
62#define WM8776_PL_LEFT_LEFT 0x010
63#define WM8776_PL_LEFT_RIGHT 0x020
64#define WM8776_PL_LEFT_LRMIX 0x030
65#define WM8776_PL_RIGHT_MASK 0x0c0
66#define WM8776_PL_RIGHT_MUTE 0x000
67#define WM8776_PL_RIGHT_LEFT 0x040
68#define WM8776_PL_RIGHT_RIGHT 0x080
69#define WM8776_PL_RIGHT_LRMIX 0x0c0
70
71/* DACMUTE */
72#define WM8776_DMUTE 0x001
73
74/* DACCTRL2 */
75#define WM8776_DEEMPH 0x001
76#define WM8776_DZFM_MASK 0x006
77#define WM8776_DZFM_NONE 0x000
78#define WM8776_DZFM_LR 0x002
79#define WM8776_DZFM_BOTH 0x004
80#define WM8776_DZFM_EITHER 0x006
81
82/* DACIFCTRL */
83#define WM8776_DACFMT_MASK 0x003
84#define WM8776_DACFMT_RJUST 0x000
85#define WM8776_DACFMT_LJUST 0x001
86#define WM8776_DACFMT_I2S 0x002
87#define WM8776_DACFMT_DSP 0x003
88#define WM8776_DACLRP 0x004
89#define WM8776_DACBCP 0x008
90#define WM8776_DACWL_MASK 0x030
91#define WM8776_DACWL_16 0x000
92#define WM8776_DACWL_20 0x010
93#define WM8776_DACWL_24 0x020
94#define WM8776_DACWL_32 0x030
95
96/* ADCIFCTRL */
97#define WM8776_ADCFMT_MASK 0x003
98#define WM8776_ADCFMT_RJUST 0x000
99#define WM8776_ADCFMT_LJUST 0x001
100#define WM8776_ADCFMT_I2S 0x002
101#define WM8776_ADCFMT_DSP 0x003
102#define WM8776_ADCLRP 0x004
103#define WM8776_ADCBCP 0x008
104#define WM8776_ADCWL_MASK 0x030
105#define WM8776_ADCWL_16 0x000
106#define WM8776_ADCWL_20 0x010
107#define WM8776_ADCWL_24 0x020
108#define WM8776_ADCWL_32 0x030
109#define WM8776_ADCMCLK 0x040
110#define WM8776_ADCHPD 0x100
111
112/* MSTRCTRL */
113#define WM8776_ADCRATE_MASK 0x007
114#define WM8776_ADCRATE_256 0x002
115#define WM8776_ADCRATE_384 0x003
116#define WM8776_ADCRATE_512 0x004
117#define WM8776_ADCRATE_768 0x005
118#define WM8776_ADCOSR 0x008
119#define WM8776_DACRATE_MASK 0x070
120#define WM8776_DACRATE_128 0x000
121#define WM8776_DACRATE_192 0x010
122#define WM8776_DACRATE_256 0x020
123#define WM8776_DACRATE_384 0x030
124#define WM8776_DACRATE_512 0x040
125#define WM8776_DACRATE_768 0x050
126#define WM8776_DACMS 0x080
127#define WM8776_ADCMS 0x100
128
129/* PWRDOWN */
130#define WM8776_PDWN 0x001
131#define WM8776_ADCPD 0x002
132#define WM8776_DACPD 0x004
133#define WM8776_HPPD 0x008
134#define WM8776_AINPD 0x040
135
136/* ADCLVOL/ADCRVOL */
137#define WM8776_AGMASK 0x0ff
138#define WM8776_ZCA 0x100
139
140/* ALCCTRL1 */
141#define WM8776_LCT_MASK 0x00f
142#define WM8776_MAXGAIN_MASK 0x070
143#define WM8776_LCSEL_MASK 0x180
144#define WM8776_LCSEL_LIMITER 0x000
145#define WM8776_LCSEL_ALC_RIGHT 0x080
146#define WM8776_LCSEL_ALC_LEFT 0x100
147#define WM8776_LCSEL_ALC_STEREO 0x180
148
149/* ALCCTRL2 */
150#define WM8776_HLD_MASK 0x00f
151#define WM8776_ALCZC 0x080
152#define WM8776_LCEN 0x100
153
154/* ALCCTRL3 */
155#define WM8776_ATK_MASK 0x00f
156#define WM8776_DCY_MASK 0x0f0
157
158/* NOISEGATE */
159#define WM8776_NGAT 0x001
160#define WM8776_NGTH_MASK 0x01c
161
162/* LIMITER */
163#define WM8776_MAXATTEN_MASK 0x00f
164#define WM8776_TRANWIN_MASK 0x070
165
166/* ADCMUX */
167#define WM8776_AMX_MASK 0x01f
168#define WM8776_MUTERA 0x040
169#define WM8776_MUTELA 0x080
170#define WM8776_LRBOTH 0x100
171
172/* OUTMUX */
173#define WM8776_MX_DAC 0x001
174#define WM8776_MX_AUX 0x002
175#define WM8776_MX_BYPASS 0x004
176
177#endif
diff --git a/sound/pci/oxygen/xonar.h b/sound/pci/oxygen/xonar.h
new file mode 100644
index 000000000000..b35343b0a9a5
--- /dev/null
+++ b/sound/pci/oxygen/xonar.h
@@ -0,0 +1,52 @@
1#ifndef XONAR_H_INCLUDED
2#define XONAR_H_INCLUDED
3
4#include "oxygen.h"
5
6struct xonar_generic {
7 unsigned int anti_pop_delay;
8 u16 output_enable_bit;
9 u8 ext_power_reg;
10 u8 ext_power_int_reg;
11 u8 ext_power_bit;
12 u8 has_power;
13};
14
15struct xonar_hdmi {
16 u8 params[5];
17};
18
19/* generic helper functions */
20
21void xonar_enable_output(struct oxygen *chip);
22void xonar_disable_output(struct oxygen *chip);
23void xonar_init_ext_power(struct oxygen *chip);
24void xonar_init_cs53x1(struct oxygen *chip);
25void xonar_set_cs53x1_params(struct oxygen *chip,
26 struct snd_pcm_hw_params *params);
27int xonar_gpio_bit_switch_get(struct snd_kcontrol *ctl,
28 struct snd_ctl_elem_value *value);
29int xonar_gpio_bit_switch_put(struct snd_kcontrol *ctl,
30 struct snd_ctl_elem_value *value);
31
32/* model-specific card drivers */
33
34int get_xonar_pcm179x_model(struct oxygen *chip,
35 const struct pci_device_id *id);
36int get_xonar_cs43xx_model(struct oxygen *chip,
37 const struct pci_device_id *id);
38int get_xonar_wm87x6_model(struct oxygen *chip,
39 const struct pci_device_id *id);
40
41/* HDMI helper functions */
42
43void xonar_hdmi_init(struct oxygen *chip, struct xonar_hdmi *data);
44void xonar_hdmi_cleanup(struct oxygen *chip);
45void xonar_hdmi_resume(struct oxygen *chip, struct xonar_hdmi *hdmi);
46void xonar_hdmi_pcm_hardware_filter(unsigned int channel,
47 struct snd_pcm_hardware *hardware);
48void xonar_set_hdmi_params(struct oxygen *chip, struct xonar_hdmi *hdmi,
49 struct snd_pcm_hw_params *params);
50void xonar_hdmi_uart_input(struct oxygen *chip);
51
52#endif
diff --git a/sound/pci/oxygen/xonar_cs43xx.c b/sound/pci/oxygen/xonar_cs43xx.c
new file mode 100644
index 000000000000..7c4986b27f2b
--- /dev/null
+++ b/sound/pci/oxygen/xonar_cs43xx.c
@@ -0,0 +1,437 @@
1/*
2 * card driver for models with CS4398/CS4362A DACs (Xonar D1/DX)
3 *
4 * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
5 *
6 *
7 * This driver is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License, version 2.
9 *
10 * This driver is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this driver; if not, see <http://www.gnu.org/licenses/>.
17 */
18
19/*
20 * Xonar D1/DX
21 * -----------
22 *
23 * CMI8788:
24 *
25 * I²C <-> CS4398 (front)
26 * <-> CS4362A (surround, center/LFE, back)
27 *
28 * GPI 0 <- external power present (DX only)
29 *
30 * GPIO 0 -> enable output to speakers
31 * GPIO 1 -> enable front panel I/O
32 * GPIO 2 -> M0 of CS5361
33 * GPIO 3 -> M1 of CS5361
34 * GPIO 8 -> route input jack to line-in (0) or mic-in (1)
35 *
36 * CS4398:
37 *
38 * AD0 <- 1
39 * AD1 <- 1
40 *
41 * CS4362A:
42 *
43 * AD0 <- 0
44 *
45 * CM9780:
46 *
47 * GPO 0 -> route line-in (0) or AC97 output (1) to CS5361 input
48 */
49
50#include <linux/pci.h>
51#include <linux/delay.h>
52#include <sound/ac97_codec.h>
53#include <sound/control.h>
54#include <sound/core.h>
55#include <sound/pcm.h>
56#include <sound/pcm_params.h>
57#include <sound/tlv.h>
58#include "xonar.h"
59#include "cm9780.h"
60#include "cs4398.h"
61#include "cs4362a.h"
62
63#define GPI_EXT_POWER 0x01
64#define GPIO_D1_OUTPUT_ENABLE 0x0001
65#define GPIO_D1_FRONT_PANEL 0x0002
66#define GPIO_D1_INPUT_ROUTE 0x0100
67
68#define I2C_DEVICE_CS4398 0x9e /* 10011, AD1=1, AD0=1, /W=0 */
69#define I2C_DEVICE_CS4362A 0x30 /* 001100, AD0=0, /W=0 */
70
71struct xonar_cs43xx {
72 struct xonar_generic generic;
73 u8 cs4398_regs[8];
74 u8 cs4362a_regs[15];
75};
76
77static void cs4398_write(struct oxygen *chip, u8 reg, u8 value)
78{
79 struct xonar_cs43xx *data = chip->model_data;
80
81 oxygen_write_i2c(chip, I2C_DEVICE_CS4398, reg, value);
82 if (reg < ARRAY_SIZE(data->cs4398_regs))
83 data->cs4398_regs[reg] = value;
84}
85
86static void cs4398_write_cached(struct oxygen *chip, u8 reg, u8 value)
87{
88 struct xonar_cs43xx *data = chip->model_data;
89
90 if (value != data->cs4398_regs[reg])
91 cs4398_write(chip, reg, value);
92}
93
94static void cs4362a_write(struct oxygen *chip, u8 reg, u8 value)
95{
96 struct xonar_cs43xx *data = chip->model_data;
97
98 oxygen_write_i2c(chip, I2C_DEVICE_CS4362A, reg, value);
99 if (reg < ARRAY_SIZE(data->cs4362a_regs))
100 data->cs4362a_regs[reg] = value;
101}
102
103static void cs4362a_write_cached(struct oxygen *chip, u8 reg, u8 value)
104{
105 struct xonar_cs43xx *data = chip->model_data;
106
107 if (value != data->cs4362a_regs[reg])
108 cs4362a_write(chip, reg, value);
109}
110
111static void cs43xx_registers_init(struct oxygen *chip)
112{
113 struct xonar_cs43xx *data = chip->model_data;
114 unsigned int i;
115
116 /* set CPEN (control port mode) and power down */
117 cs4398_write(chip, 8, CS4398_CPEN | CS4398_PDN);
118 cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN);
119 /* configure */
120 cs4398_write(chip, 2, data->cs4398_regs[2]);
121 cs4398_write(chip, 3, CS4398_ATAPI_B_R | CS4398_ATAPI_A_L);
122 cs4398_write(chip, 4, data->cs4398_regs[4]);
123 cs4398_write(chip, 5, data->cs4398_regs[5]);
124 cs4398_write(chip, 6, data->cs4398_regs[6]);
125 cs4398_write(chip, 7, data->cs4398_regs[7]);
126 cs4362a_write(chip, 0x02, CS4362A_DIF_LJUST);
127 cs4362a_write(chip, 0x03, CS4362A_MUTEC_6 | CS4362A_AMUTE |
128 CS4362A_RMP_UP | CS4362A_ZERO_CROSS | CS4362A_SOFT_RAMP);
129 cs4362a_write(chip, 0x04, data->cs4362a_regs[0x04]);
130 cs4362a_write(chip, 0x05, 0);
131 for (i = 6; i <= 14; ++i)
132 cs4362a_write(chip, i, data->cs4362a_regs[i]);
133 /* clear power down */
134 cs4398_write(chip, 8, CS4398_CPEN);
135 cs4362a_write(chip, 0x01, CS4362A_CPEN);
136}
137
138static void xonar_d1_init(struct oxygen *chip)
139{
140 struct xonar_cs43xx *data = chip->model_data;
141
142 data->generic.anti_pop_delay = 800;
143 data->generic.output_enable_bit = GPIO_D1_OUTPUT_ENABLE;
144 data->cs4398_regs[2] =
145 CS4398_FM_SINGLE | CS4398_DEM_NONE | CS4398_DIF_LJUST;
146 data->cs4398_regs[4] = CS4398_MUTEP_LOW |
147 CS4398_MUTE_B | CS4398_MUTE_A | CS4398_PAMUTE;
148 data->cs4398_regs[5] = 60 * 2;
149 data->cs4398_regs[6] = 60 * 2;
150 data->cs4398_regs[7] = CS4398_RMP_DN | CS4398_RMP_UP |
151 CS4398_ZERO_CROSS | CS4398_SOFT_RAMP;
152 data->cs4362a_regs[4] = CS4362A_RMP_DN | CS4362A_DEM_NONE;
153 data->cs4362a_regs[6] = CS4362A_FM_SINGLE |
154 CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L;
155 data->cs4362a_regs[7] = 60 | CS4362A_MUTE;
156 data->cs4362a_regs[8] = 60 | CS4362A_MUTE;
157 data->cs4362a_regs[9] = data->cs4362a_regs[6];
158 data->cs4362a_regs[10] = 60 | CS4362A_MUTE;
159 data->cs4362a_regs[11] = 60 | CS4362A_MUTE;
160 data->cs4362a_regs[12] = data->cs4362a_regs[6];
161 data->cs4362a_regs[13] = 60 | CS4362A_MUTE;
162 data->cs4362a_regs[14] = 60 | CS4362A_MUTE;
163
164 oxygen_write16(chip, OXYGEN_2WIRE_BUS_STATUS,
165 OXYGEN_2WIRE_LENGTH_8 |
166 OXYGEN_2WIRE_INTERRUPT_MASK |
167 OXYGEN_2WIRE_SPEED_FAST);
168
169 cs43xx_registers_init(chip);
170
171 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
172 GPIO_D1_FRONT_PANEL | GPIO_D1_INPUT_ROUTE);
173 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA,
174 GPIO_D1_FRONT_PANEL | GPIO_D1_INPUT_ROUTE);
175
176 oxygen_ac97_set_bits(chip, 0, CM9780_JACK, CM9780_FMIC2MIC);
177
178 xonar_init_cs53x1(chip);
179 xonar_enable_output(chip);
180
181 snd_component_add(chip->card, "CS4398");
182 snd_component_add(chip->card, "CS4362A");
183 snd_component_add(chip->card, "CS5361");
184}
185
186static void xonar_dx_init(struct oxygen *chip)
187{
188 struct xonar_cs43xx *data = chip->model_data;
189
190 data->generic.ext_power_reg = OXYGEN_GPI_DATA;
191 data->generic.ext_power_int_reg = OXYGEN_GPI_INTERRUPT_MASK;
192 data->generic.ext_power_bit = GPI_EXT_POWER;
193 xonar_init_ext_power(chip);
194 xonar_d1_init(chip);
195}
196
197static void xonar_d1_cleanup(struct oxygen *chip)
198{
199 xonar_disable_output(chip);
200 cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN);
201 oxygen_clear_bits8(chip, OXYGEN_FUNCTION, OXYGEN_FUNCTION_RESET_CODEC);
202}
203
204static void xonar_d1_suspend(struct oxygen *chip)
205{
206 xonar_d1_cleanup(chip);
207}
208
209static void xonar_d1_resume(struct oxygen *chip)
210{
211 oxygen_set_bits8(chip, OXYGEN_FUNCTION, OXYGEN_FUNCTION_RESET_CODEC);
212 msleep(1);
213 cs43xx_registers_init(chip);
214 xonar_enable_output(chip);
215}
216
217static void set_cs43xx_params(struct oxygen *chip,
218 struct snd_pcm_hw_params *params)
219{
220 struct xonar_cs43xx *data = chip->model_data;
221 u8 cs4398_fm, cs4362a_fm;
222
223 if (params_rate(params) <= 50000) {
224 cs4398_fm = CS4398_FM_SINGLE;
225 cs4362a_fm = CS4362A_FM_SINGLE;
226 } else if (params_rate(params) <= 100000) {
227 cs4398_fm = CS4398_FM_DOUBLE;
228 cs4362a_fm = CS4362A_FM_DOUBLE;
229 } else {
230 cs4398_fm = CS4398_FM_QUAD;
231 cs4362a_fm = CS4362A_FM_QUAD;
232 }
233 cs4398_fm |= CS4398_DEM_NONE | CS4398_DIF_LJUST;
234 cs4398_write_cached(chip, 2, cs4398_fm);
235 cs4362a_fm |= data->cs4362a_regs[6] & ~CS4362A_FM_MASK;
236 cs4362a_write_cached(chip, 6, cs4362a_fm);
237 cs4362a_write_cached(chip, 12, cs4362a_fm);
238 cs4362a_fm &= CS4362A_FM_MASK;
239 cs4362a_fm |= data->cs4362a_regs[9] & ~CS4362A_FM_MASK;
240 cs4362a_write_cached(chip, 9, cs4362a_fm);
241}
242
243static void update_cs4362a_volumes(struct oxygen *chip)
244{
245 unsigned int i;
246 u8 mute;
247
248 mute = chip->dac_mute ? CS4362A_MUTE : 0;
249 for (i = 0; i < 6; ++i)
250 cs4362a_write_cached(chip, 7 + i + i / 2,
251 (127 - chip->dac_volume[2 + i]) | mute);
252}
253
254static void update_cs43xx_volume(struct oxygen *chip)
255{
256 cs4398_write_cached(chip, 5, (127 - chip->dac_volume[0]) * 2);
257 cs4398_write_cached(chip, 6, (127 - chip->dac_volume[1]) * 2);
258 update_cs4362a_volumes(chip);
259}
260
261static void update_cs43xx_mute(struct oxygen *chip)
262{
263 u8 reg;
264
265 reg = CS4398_MUTEP_LOW | CS4398_PAMUTE;
266 if (chip->dac_mute)
267 reg |= CS4398_MUTE_B | CS4398_MUTE_A;
268 cs4398_write_cached(chip, 4, reg);
269 update_cs4362a_volumes(chip);
270}
271
272static void update_cs43xx_center_lfe_mix(struct oxygen *chip, bool mixed)
273{
274 struct xonar_cs43xx *data = chip->model_data;
275 u8 reg;
276
277 reg = data->cs4362a_regs[9] & ~CS4362A_ATAPI_MASK;
278 if (mixed)
279 reg |= CS4362A_ATAPI_B_LR | CS4362A_ATAPI_A_LR;
280 else
281 reg |= CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L;
282 cs4362a_write_cached(chip, 9, reg);
283}
284
285static const struct snd_kcontrol_new front_panel_switch = {
286 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
287 .name = "Front Panel Switch",
288 .info = snd_ctl_boolean_mono_info,
289 .get = xonar_gpio_bit_switch_get,
290 .put = xonar_gpio_bit_switch_put,
291 .private_value = GPIO_D1_FRONT_PANEL,
292};
293
294static int rolloff_info(struct snd_kcontrol *ctl,
295 struct snd_ctl_elem_info *info)
296{
297 static const char *const names[2] = {
298 "Fast Roll-off", "Slow Roll-off"
299 };
300
301 info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
302 info->count = 1;
303 info->value.enumerated.items = 2;
304 if (info->value.enumerated.item >= 2)
305 info->value.enumerated.item = 1;
306 strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
307 return 0;
308}
309
310static int rolloff_get(struct snd_kcontrol *ctl,
311 struct snd_ctl_elem_value *value)
312{
313 struct oxygen *chip = ctl->private_data;
314 struct xonar_cs43xx *data = chip->model_data;
315
316 value->value.enumerated.item[0] =
317 (data->cs4398_regs[7] & CS4398_FILT_SEL) != 0;
318 return 0;
319}
320
321static int rolloff_put(struct snd_kcontrol *ctl,
322 struct snd_ctl_elem_value *value)
323{
324 struct oxygen *chip = ctl->private_data;
325 struct xonar_cs43xx *data = chip->model_data;
326 int changed;
327 u8 reg;
328
329 mutex_lock(&chip->mutex);
330 reg = data->cs4398_regs[7];
331 if (value->value.enumerated.item[0])
332 reg |= CS4398_FILT_SEL;
333 else
334 reg &= ~CS4398_FILT_SEL;
335 changed = reg != data->cs4398_regs[7];
336 if (changed) {
337 cs4398_write(chip, 7, reg);
338 if (reg & CS4398_FILT_SEL)
339 reg = data->cs4362a_regs[0x04] | CS4362A_FILT_SEL;
340 else
341 reg = data->cs4362a_regs[0x04] & ~CS4362A_FILT_SEL;
342 cs4362a_write(chip, 0x04, reg);
343 }
344 mutex_unlock(&chip->mutex);
345 return changed;
346}
347
348static const struct snd_kcontrol_new rolloff_control = {
349 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
350 .name = "DAC Filter Playback Enum",
351 .info = rolloff_info,
352 .get = rolloff_get,
353 .put = rolloff_put,
354};
355
356static void xonar_d1_line_mic_ac97_switch(struct oxygen *chip,
357 unsigned int reg, unsigned int mute)
358{
359 if (reg == AC97_LINE) {
360 spin_lock_irq(&chip->reg_lock);
361 oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
362 mute ? GPIO_D1_INPUT_ROUTE : 0,
363 GPIO_D1_INPUT_ROUTE);
364 spin_unlock_irq(&chip->reg_lock);
365 }
366}
367
368static const DECLARE_TLV_DB_SCALE(cs4362a_db_scale, -6000, 100, 0);
369
370static int xonar_d1_control_filter(struct snd_kcontrol_new *template)
371{
372 if (!strncmp(template->name, "CD Capture ", 11))
373 return 1; /* no CD input */
374 return 0;
375}
376
377static int xonar_d1_mixer_init(struct oxygen *chip)
378{
379 int err;
380
381 err = snd_ctl_add(chip->card, snd_ctl_new1(&front_panel_switch, chip));
382 if (err < 0)
383 return err;
384 err = snd_ctl_add(chip->card, snd_ctl_new1(&rolloff_control, chip));
385 if (err < 0)
386 return err;
387 return 0;
388}
389
390static const struct oxygen_model model_xonar_d1 = {
391 .longname = "Asus Virtuoso 100",
392 .chip = "AV200",
393 .init = xonar_d1_init,
394 .control_filter = xonar_d1_control_filter,
395 .mixer_init = xonar_d1_mixer_init,
396 .cleanup = xonar_d1_cleanup,
397 .suspend = xonar_d1_suspend,
398 .resume = xonar_d1_resume,
399 .get_i2s_mclk = oxygen_default_i2s_mclk,
400 .set_dac_params = set_cs43xx_params,
401 .set_adc_params = xonar_set_cs53x1_params,
402 .update_dac_volume = update_cs43xx_volume,
403 .update_dac_mute = update_cs43xx_mute,
404 .update_center_lfe_mix = update_cs43xx_center_lfe_mix,
405 .ac97_switch = xonar_d1_line_mic_ac97_switch,
406 .dac_tlv = cs4362a_db_scale,
407 .model_data_size = sizeof(struct xonar_cs43xx),
408 .device_config = PLAYBACK_0_TO_I2S |
409 PLAYBACK_1_TO_SPDIF |
410 CAPTURE_0_FROM_I2S_2,
411 .dac_channels = 8,
412 .dac_volume_min = 127 - 60,
413 .dac_volume_max = 127,
414 .function_flags = OXYGEN_FUNCTION_2WIRE,
415 .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
416 .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
417};
418
419int __devinit get_xonar_cs43xx_model(struct oxygen *chip,
420 const struct pci_device_id *id)
421{
422 switch (id->subdevice) {
423 case 0x834f:
424 chip->model = model_xonar_d1;
425 chip->model.shortname = "Xonar D1";
426 break;
427 case 0x8275:
428 case 0x8327:
429 chip->model = model_xonar_d1;
430 chip->model.shortname = "Xonar DX";
431 chip->model.init = xonar_dx_init;
432 break;
433 default:
434 return -EINVAL;
435 }
436 return 0;
437}
diff --git a/sound/pci/oxygen/xonar_hdmi.c b/sound/pci/oxygen/xonar_hdmi.c
new file mode 100644
index 000000000000..b12db1f1cea9
--- /dev/null
+++ b/sound/pci/oxygen/xonar_hdmi.c
@@ -0,0 +1,128 @@
1/*
2 * helper functions for HDMI models (Xonar HDAV1.3)
3 *
4 * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
5 *
6 *
7 * This driver is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License, version 2.
9 *
10 * This driver is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this driver; if not, see <http://www.gnu.org/licenses/>.
17 */
18
19#include <linux/pci.h>
20#include <linux/delay.h>
21#include <sound/asoundef.h>
22#include <sound/control.h>
23#include <sound/core.h>
24#include <sound/pcm.h>
25#include <sound/pcm_params.h>
26#include <sound/tlv.h>
27#include "xonar.h"
28
29static void hdmi_write_command(struct oxygen *chip, u8 command,
30 unsigned int count, const u8 *params)
31{
32 unsigned int i;
33 u8 checksum;
34
35 oxygen_write_uart(chip, 0xfb);
36 oxygen_write_uart(chip, 0xef);
37 oxygen_write_uart(chip, command);
38 oxygen_write_uart(chip, count);
39 for (i = 0; i < count; ++i)
40 oxygen_write_uart(chip, params[i]);
41 checksum = 0xfb + 0xef + command + count;
42 for (i = 0; i < count; ++i)
43 checksum += params[i];
44 oxygen_write_uart(chip, checksum);
45}
46
47static void xonar_hdmi_init_commands(struct oxygen *chip,
48 struct xonar_hdmi *hdmi)
49{
50 u8 param;
51
52 oxygen_reset_uart(chip);
53 param = 0;
54 hdmi_write_command(chip, 0x61, 1, &param);
55 param = 1;
56 hdmi_write_command(chip, 0x74, 1, &param);
57 hdmi_write_command(chip, 0x54, 5, hdmi->params);
58}
59
60void xonar_hdmi_init(struct oxygen *chip, struct xonar_hdmi *hdmi)
61{
62 hdmi->params[1] = IEC958_AES3_CON_FS_48000;
63 hdmi->params[4] = 1;
64 xonar_hdmi_init_commands(chip, hdmi);
65}
66
67void xonar_hdmi_cleanup(struct oxygen *chip)
68{
69 u8 param = 0;
70
71 hdmi_write_command(chip, 0x74, 1, &param);
72}
73
74void xonar_hdmi_resume(struct oxygen *chip, struct xonar_hdmi *hdmi)
75{
76 xonar_hdmi_init_commands(chip, hdmi);
77}
78
79void xonar_hdmi_pcm_hardware_filter(unsigned int channel,
80 struct snd_pcm_hardware *hardware)
81{
82 if (channel == PCM_MULTICH) {
83 hardware->rates = SNDRV_PCM_RATE_44100 |
84 SNDRV_PCM_RATE_48000 |
85 SNDRV_PCM_RATE_96000 |
86 SNDRV_PCM_RATE_192000;
87 hardware->rate_min = 44100;
88 }
89}
90
91void xonar_set_hdmi_params(struct oxygen *chip, struct xonar_hdmi *hdmi,
92 struct snd_pcm_hw_params *params)
93{
94 hdmi->params[0] = 0; /* 1 = non-audio */
95 switch (params_rate(params)) {
96 case 44100:
97 hdmi->params[1] = IEC958_AES3_CON_FS_44100;
98 break;
99 case 48000:
100 hdmi->params[1] = IEC958_AES3_CON_FS_48000;
101 break;
102 default: /* 96000 */
103 hdmi->params[1] = IEC958_AES3_CON_FS_96000;
104 break;
105 case 192000:
106 hdmi->params[1] = IEC958_AES3_CON_FS_192000;
107 break;
108 }
109 hdmi->params[2] = params_channels(params) / 2 - 1;
110 if (params_format(params) == SNDRV_PCM_FORMAT_S16_LE)
111 hdmi->params[3] = 0;
112 else
113 hdmi->params[3] = 0xc0;
114 hdmi->params[4] = 1; /* ? */
115 hdmi_write_command(chip, 0x54, 5, hdmi->params);
116}
117
118void xonar_hdmi_uart_input(struct oxygen *chip)
119{
120 if (chip->uart_input_count >= 2 &&
121 chip->uart_input[chip->uart_input_count - 2] == 'O' &&
122 chip->uart_input[chip->uart_input_count - 1] == 'K') {
123 printk(KERN_DEBUG "message from HDMI chip received:\n");
124 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
125 chip->uart_input, chip->uart_input_count);
126 chip->uart_input_count = 0;
127 }
128}
diff --git a/sound/pci/oxygen/xonar_lib.c b/sound/pci/oxygen/xonar_lib.c
new file mode 100644
index 000000000000..b3ff71316653
--- /dev/null
+++ b/sound/pci/oxygen/xonar_lib.c
@@ -0,0 +1,132 @@
1/*
2 * helper functions for Asus Xonar cards
3 *
4 * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
5 *
6 *
7 * This driver is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License, version 2.
9 *
10 * This driver is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this driver; if not, see <http://www.gnu.org/licenses/>.
17 */
18
19#include <linux/delay.h>
20#include <sound/core.h>
21#include <sound/control.h>
22#include <sound/pcm.h>
23#include <sound/pcm_params.h>
24#include "xonar.h"
25
26
27#define GPIO_CS53x1_M_MASK 0x000c
28#define GPIO_CS53x1_M_SINGLE 0x0000
29#define GPIO_CS53x1_M_DOUBLE 0x0004
30#define GPIO_CS53x1_M_QUAD 0x0008
31
32
33void xonar_enable_output(struct oxygen *chip)
34{
35 struct xonar_generic *data = chip->model_data;
36
37 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, data->output_enable_bit);
38 msleep(data->anti_pop_delay);
39 oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, data->output_enable_bit);
40}
41
42void xonar_disable_output(struct oxygen *chip)
43{
44 struct xonar_generic *data = chip->model_data;
45
46 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, data->output_enable_bit);
47}
48
49static void xonar_ext_power_gpio_changed(struct oxygen *chip)
50{
51 struct xonar_generic *data = chip->model_data;
52 u8 has_power;
53
54 has_power = !!(oxygen_read8(chip, data->ext_power_reg)
55 & data->ext_power_bit);
56 if (has_power != data->has_power) {
57 data->has_power = has_power;
58 if (has_power) {
59 snd_printk(KERN_NOTICE "power restored\n");
60 } else {
61 snd_printk(KERN_CRIT
62 "Hey! Don't unplug the power cable!\n");
63 /* TODO: stop PCMs */
64 }
65 }
66}
67
68void xonar_init_ext_power(struct oxygen *chip)
69{
70 struct xonar_generic *data = chip->model_data;
71
72 oxygen_set_bits8(chip, data->ext_power_int_reg,
73 data->ext_power_bit);
74 chip->interrupt_mask |= OXYGEN_INT_GPIO;
75 chip->model.gpio_changed = xonar_ext_power_gpio_changed;
76 data->has_power = !!(oxygen_read8(chip, data->ext_power_reg)
77 & data->ext_power_bit);
78}
79
80void xonar_init_cs53x1(struct oxygen *chip)
81{
82 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CS53x1_M_MASK);
83 oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
84 GPIO_CS53x1_M_SINGLE, GPIO_CS53x1_M_MASK);
85}
86
87void xonar_set_cs53x1_params(struct oxygen *chip,
88 struct snd_pcm_hw_params *params)
89{
90 unsigned int value;
91
92 if (params_rate(params) <= 54000)
93 value = GPIO_CS53x1_M_SINGLE;
94 else if (params_rate(params) <= 108000)
95 value = GPIO_CS53x1_M_DOUBLE;
96 else
97 value = GPIO_CS53x1_M_QUAD;
98 oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
99 value, GPIO_CS53x1_M_MASK);
100}
101
102int xonar_gpio_bit_switch_get(struct snd_kcontrol *ctl,
103 struct snd_ctl_elem_value *value)
104{
105 struct oxygen *chip = ctl->private_data;
106 u16 bit = ctl->private_value;
107
108 value->value.integer.value[0] =
109 !!(oxygen_read16(chip, OXYGEN_GPIO_DATA) & bit);
110 return 0;
111}
112
113int xonar_gpio_bit_switch_put(struct snd_kcontrol *ctl,
114 struct snd_ctl_elem_value *value)
115{
116 struct oxygen *chip = ctl->private_data;
117 u16 bit = ctl->private_value;
118 u16 old_bits, new_bits;
119 int changed;
120
121 spin_lock_irq(&chip->reg_lock);
122 old_bits = oxygen_read16(chip, OXYGEN_GPIO_DATA);
123 if (value->value.integer.value[0])
124 new_bits = old_bits | bit;
125 else
126 new_bits = old_bits & ~bit;
127 changed = new_bits != old_bits;
128 if (changed)
129 oxygen_write16(chip, OXYGEN_GPIO_DATA, new_bits);
130 spin_unlock_irq(&chip->reg_lock);
131 return changed;
132}
diff --git a/sound/pci/oxygen/xonar_pcm179x.c b/sound/pci/oxygen/xonar_pcm179x.c
new file mode 100644
index 000000000000..ba18fb546b4f
--- /dev/null
+++ b/sound/pci/oxygen/xonar_pcm179x.c
@@ -0,0 +1,1115 @@
1/*
2 * card driver for models with PCM1796 DACs (Xonar D2/D2X/HDAV1.3/ST/STX)
3 *
4 * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
5 *
6 *
7 * This driver is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License, version 2.
9 *
10 * This driver is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this driver; if not, see <http://www.gnu.org/licenses/>.
17 */
18
19/*
20 * Xonar D2/D2X
21 * ------------
22 *
23 * CMI8788:
24 *
25 * SPI 0 -> 1st PCM1796 (front)
26 * SPI 1 -> 2nd PCM1796 (surround)
27 * SPI 2 -> 3rd PCM1796 (center/LFE)
28 * SPI 4 -> 4th PCM1796 (back)
29 *
30 * GPIO 2 -> M0 of CS5381
31 * GPIO 3 -> M1 of CS5381
32 * GPIO 5 <- external power present (D2X only)
33 * GPIO 7 -> ALT
34 * GPIO 8 -> enable output to speakers
35 *
36 * CM9780:
37 *
38 * GPO 0 -> route line-in (0) or AC97 output (1) to CS5381 input
39 */
40
41/*
42 * Xonar HDAV1.3 (Deluxe)
43 * ----------------------
44 *
45 * CMI8788:
46 *
47 * I²C <-> PCM1796 (front)
48 *
49 * GPI 0 <- external power present
50 *
51 * GPIO 0 -> enable output to speakers
52 * GPIO 2 -> M0 of CS5381
53 * GPIO 3 -> M1 of CS5381
54 * GPIO 8 -> route input jack to line-in (0) or mic-in (1)
55 *
56 * TXD -> HDMI controller
57 * RXD <- HDMI controller
58 *
59 * PCM1796 front: AD1,0 <- 0,0
60 *
61 * CM9780:
62 *
63 * GPO 0 -> route line-in (0) or AC97 output (1) to CS5381 input
64 *
65 * no daughterboard
66 * ----------------
67 *
68 * GPIO 4 <- 1
69 *
70 * H6 daughterboard
71 * ----------------
72 *
73 * GPIO 4 <- 0
74 * GPIO 5 <- 0
75 *
76 * I²C <-> PCM1796 (surround)
77 * <-> PCM1796 (center/LFE)
78 * <-> PCM1796 (back)
79 *
80 * PCM1796 surround: AD1,0 <- 0,1
81 * PCM1796 center/LFE: AD1,0 <- 1,0
82 * PCM1796 back: AD1,0 <- 1,1
83 *
84 * unknown daughterboard
85 * ---------------------
86 *
87 * GPIO 4 <- 0
88 * GPIO 5 <- 1
89 *
90 * I²C <-> CS4362A (surround, center/LFE, back)
91 *
92 * CS4362A: AD0 <- 0
93 */
94
95/*
96 * Xonar Essence ST (Deluxe)/STX
97 * -----------------------------
98 *
99 * CMI8788:
100 *
101 * I²C <-> PCM1792A
102 * <-> CS2000 (ST only)
103 *
104 * ADC1 MCLK -> REF_CLK of CS2000 (ST only)
105 *
106 * GPI 0 <- external power present (STX only)
107 *
108 * GPIO 0 -> enable output to speakers
109 * GPIO 1 -> route HP to front panel (0) or rear jack (1)
110 * GPIO 2 -> M0 of CS5381
111 * GPIO 3 -> M1 of CS5381
112 * GPIO 7 -> route output to speaker jacks (0) or HP (1)
113 * GPIO 8 -> route input jack to line-in (0) or mic-in (1)
114 *
115 * PCM1792A:
116 *
117 * AD1,0 <- 0,0
118 * SCK <- CLK_OUT of CS2000 (ST only)
119 *
120 * CS2000:
121 *
122 * AD0 <- 0
123 *
124 * CM9780:
125 *
126 * GPO 0 -> route line-in (0) or AC97 output (1) to CS5381 input
127 *
128 * H6 daughterboard
129 * ----------------
130 *
131 * GPIO 4 <- 0
132 * GPIO 5 <- 0
133 */
134
135#include <linux/pci.h>
136#include <linux/delay.h>
137#include <linux/mutex.h>
138#include <sound/ac97_codec.h>
139#include <sound/control.h>
140#include <sound/core.h>
141#include <sound/pcm.h>
142#include <sound/pcm_params.h>
143#include <sound/tlv.h>
144#include "xonar.h"
145#include "cm9780.h"
146#include "pcm1796.h"
147#include "cs2000.h"
148
149
150#define GPIO_D2X_EXT_POWER 0x0020
151#define GPIO_D2_ALT 0x0080
152#define GPIO_D2_OUTPUT_ENABLE 0x0100
153
154#define GPI_EXT_POWER 0x01
155#define GPIO_INPUT_ROUTE 0x0100
156
157#define GPIO_HDAV_OUTPUT_ENABLE 0x0001
158
159#define GPIO_DB_MASK 0x0030
160#define GPIO_DB_H6 0x0000
161
162#define GPIO_ST_OUTPUT_ENABLE 0x0001
163#define GPIO_ST_HP_REAR 0x0002
164#define GPIO_ST_HP 0x0080
165
166#define I2C_DEVICE_PCM1796(i) (0x98 + ((i) << 1)) /* 10011, ii, /W=0 */
167#define I2C_DEVICE_CS2000 0x9c /* 100111, 0, /W=0 */
168
169#define PCM1796_REG_BASE 16
170
171
172struct xonar_pcm179x {
173 struct xonar_generic generic;
174 unsigned int dacs;
175 u8 pcm1796_regs[4][5];
176 unsigned int current_rate;
177 bool os_128;
178 bool hp_active;
179 s8 hp_gain_offset;
180 bool has_cs2000;
181 u8 cs2000_fun_cfg_1;
182};
183
184struct xonar_hdav {
185 struct xonar_pcm179x pcm179x;
186 struct xonar_hdmi hdmi;
187};
188
189
190static inline void pcm1796_write_spi(struct oxygen *chip, unsigned int codec,
191 u8 reg, u8 value)
192{
193 /* maps ALSA channel pair number to SPI output */
194 static const u8 codec_map[4] = {
195 0, 1, 2, 4
196 };
197 oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
198 OXYGEN_SPI_DATA_LENGTH_2 |
199 OXYGEN_SPI_CLOCK_160 |
200 (codec_map[codec] << OXYGEN_SPI_CODEC_SHIFT) |
201 OXYGEN_SPI_CEN_LATCH_CLOCK_HI,
202 (reg << 8) | value);
203}
204
205static inline void pcm1796_write_i2c(struct oxygen *chip, unsigned int codec,
206 u8 reg, u8 value)
207{
208 oxygen_write_i2c(chip, I2C_DEVICE_PCM1796(codec), reg, value);
209}
210
211static void pcm1796_write(struct oxygen *chip, unsigned int codec,
212 u8 reg, u8 value)
213{
214 struct xonar_pcm179x *data = chip->model_data;
215
216 if ((chip->model.function_flags & OXYGEN_FUNCTION_2WIRE_SPI_MASK) ==
217 OXYGEN_FUNCTION_SPI)
218 pcm1796_write_spi(chip, codec, reg, value);
219 else
220 pcm1796_write_i2c(chip, codec, reg, value);
221 if ((unsigned int)(reg - PCM1796_REG_BASE)
222 < ARRAY_SIZE(data->pcm1796_regs[codec]))
223 data->pcm1796_regs[codec][reg - PCM1796_REG_BASE] = value;
224}
225
226static void pcm1796_write_cached(struct oxygen *chip, unsigned int codec,
227 u8 reg, u8 value)
228{
229 struct xonar_pcm179x *data = chip->model_data;
230
231 if (value != data->pcm1796_regs[codec][reg - PCM1796_REG_BASE])
232 pcm1796_write(chip, codec, reg, value);
233}
234
235static void cs2000_write(struct oxygen *chip, u8 reg, u8 value)
236{
237 struct xonar_pcm179x *data = chip->model_data;
238
239 oxygen_write_i2c(chip, I2C_DEVICE_CS2000, reg, value);
240 if (reg == CS2000_FUN_CFG_1)
241 data->cs2000_fun_cfg_1 = value;
242}
243
244static void cs2000_write_cached(struct oxygen *chip, u8 reg, u8 value)
245{
246 struct xonar_pcm179x *data = chip->model_data;
247
248 if (reg != CS2000_FUN_CFG_1 ||
249 value != data->cs2000_fun_cfg_1)
250 cs2000_write(chip, reg, value);
251}
252
253static void pcm1796_registers_init(struct oxygen *chip)
254{
255 struct xonar_pcm179x *data = chip->model_data;
256 unsigned int i;
257 s8 gain_offset;
258
259 gain_offset = data->hp_active ? data->hp_gain_offset : 0;
260 for (i = 0; i < data->dacs; ++i) {
261 /* set ATLD before ATL/ATR */
262 pcm1796_write(chip, i, 18,
263 data->pcm1796_regs[0][18 - PCM1796_REG_BASE]);
264 pcm1796_write(chip, i, 16, chip->dac_volume[i * 2]
265 + gain_offset);
266 pcm1796_write(chip, i, 17, chip->dac_volume[i * 2 + 1]
267 + gain_offset);
268 pcm1796_write(chip, i, 19,
269 data->pcm1796_regs[0][19 - PCM1796_REG_BASE]);
270 pcm1796_write(chip, i, 20,
271 data->pcm1796_regs[0][20 - PCM1796_REG_BASE]);
272 pcm1796_write(chip, i, 21, 0);
273 }
274}
275
276static void pcm1796_init(struct oxygen *chip)
277{
278 struct xonar_pcm179x *data = chip->model_data;
279
280 data->pcm1796_regs[0][18 - PCM1796_REG_BASE] = PCM1796_MUTE |
281 PCM1796_DMF_DISABLED | PCM1796_FMT_24_LJUST | PCM1796_ATLD;
282 data->pcm1796_regs[0][19 - PCM1796_REG_BASE] =
283 PCM1796_FLT_SHARP | PCM1796_ATS_1;
284 data->pcm1796_regs[0][20 - PCM1796_REG_BASE] = PCM1796_OS_64;
285 pcm1796_registers_init(chip);
286 data->current_rate = 48000;
287}
288
289static void xonar_d2_init(struct oxygen *chip)
290{
291 struct xonar_pcm179x *data = chip->model_data;
292
293 data->generic.anti_pop_delay = 300;
294 data->generic.output_enable_bit = GPIO_D2_OUTPUT_ENABLE;
295 data->dacs = 4;
296
297 pcm1796_init(chip);
298
299 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_D2_ALT);
300 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_D2_ALT);
301
302 oxygen_ac97_set_bits(chip, 0, CM9780_JACK, CM9780_FMIC2MIC);
303
304 xonar_init_cs53x1(chip);
305 xonar_enable_output(chip);
306
307 snd_component_add(chip->card, "PCM1796");
308 snd_component_add(chip->card, "CS5381");
309}
310
311static void xonar_d2x_init(struct oxygen *chip)
312{
313 struct xonar_pcm179x *data = chip->model_data;
314
315 data->generic.ext_power_reg = OXYGEN_GPIO_DATA;
316 data->generic.ext_power_int_reg = OXYGEN_GPIO_INTERRUPT_MASK;
317 data->generic.ext_power_bit = GPIO_D2X_EXT_POWER;
318 oxygen_clear_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_D2X_EXT_POWER);
319 xonar_init_ext_power(chip);
320 xonar_d2_init(chip);
321}
322
323static void xonar_hdav_init(struct oxygen *chip)
324{
325 struct xonar_hdav *data = chip->model_data;
326
327 oxygen_write16(chip, OXYGEN_2WIRE_BUS_STATUS,
328 OXYGEN_2WIRE_LENGTH_8 |
329 OXYGEN_2WIRE_INTERRUPT_MASK |
330 OXYGEN_2WIRE_SPEED_FAST);
331
332 data->pcm179x.generic.anti_pop_delay = 100;
333 data->pcm179x.generic.output_enable_bit = GPIO_HDAV_OUTPUT_ENABLE;
334 data->pcm179x.generic.ext_power_reg = OXYGEN_GPI_DATA;
335 data->pcm179x.generic.ext_power_int_reg = OXYGEN_GPI_INTERRUPT_MASK;
336 data->pcm179x.generic.ext_power_bit = GPI_EXT_POWER;
337 data->pcm179x.dacs = chip->model.private_data ? 4 : 1;
338
339 pcm1796_init(chip);
340
341 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_INPUT_ROUTE);
342 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_INPUT_ROUTE);
343
344 xonar_init_cs53x1(chip);
345 xonar_init_ext_power(chip);
346 xonar_hdmi_init(chip, &data->hdmi);
347 xonar_enable_output(chip);
348
349 snd_component_add(chip->card, "PCM1796");
350 snd_component_add(chip->card, "CS5381");
351}
352
353static void xonar_st_init_i2c(struct oxygen *chip)
354{
355 oxygen_write16(chip, OXYGEN_2WIRE_BUS_STATUS,
356 OXYGEN_2WIRE_LENGTH_8 |
357 OXYGEN_2WIRE_INTERRUPT_MASK |
358 OXYGEN_2WIRE_SPEED_FAST);
359}
360
361static void xonar_st_init_common(struct oxygen *chip)
362{
363 struct xonar_pcm179x *data = chip->model_data;
364
365 data->generic.anti_pop_delay = 100;
366 data->generic.output_enable_bit = GPIO_ST_OUTPUT_ENABLE;
367 data->dacs = chip->model.private_data ? 4 : 1;
368 data->hp_gain_offset = 2*-18;
369
370 pcm1796_init(chip);
371
372 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
373 GPIO_INPUT_ROUTE | GPIO_ST_HP_REAR | GPIO_ST_HP);
374 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA,
375 GPIO_INPUT_ROUTE | GPIO_ST_HP_REAR | GPIO_ST_HP);
376
377 xonar_init_cs53x1(chip);
378 xonar_enable_output(chip);
379
380 snd_component_add(chip->card, "PCM1792A");
381 snd_component_add(chip->card, "CS5381");
382}
383
384static void cs2000_registers_init(struct oxygen *chip)
385{
386 struct xonar_pcm179x *data = chip->model_data;
387
388 cs2000_write(chip, CS2000_GLOBAL_CFG, CS2000_FREEZE);
389 cs2000_write(chip, CS2000_DEV_CTRL, 0);
390 cs2000_write(chip, CS2000_DEV_CFG_1,
391 CS2000_R_MOD_SEL_1 |
392 (0 << CS2000_R_SEL_SHIFT) |
393 CS2000_AUX_OUT_SRC_REF_CLK |
394 CS2000_EN_DEV_CFG_1);
395 cs2000_write(chip, CS2000_DEV_CFG_2,
396 (0 << CS2000_LOCK_CLK_SHIFT) |
397 CS2000_FRAC_N_SRC_STATIC);
398 cs2000_write(chip, CS2000_RATIO_0 + 0, 0x00); /* 1.0 */
399 cs2000_write(chip, CS2000_RATIO_0 + 1, 0x10);
400 cs2000_write(chip, CS2000_RATIO_0 + 2, 0x00);
401 cs2000_write(chip, CS2000_RATIO_0 + 3, 0x00);
402 cs2000_write(chip, CS2000_FUN_CFG_1, data->cs2000_fun_cfg_1);
403 cs2000_write(chip, CS2000_FUN_CFG_2, 0);
404 cs2000_write(chip, CS2000_GLOBAL_CFG, CS2000_EN_DEV_CFG_2);
405}
406
407static void xonar_st_init(struct oxygen *chip)
408{
409 struct xonar_pcm179x *data = chip->model_data;
410
411 data->has_cs2000 = 1;
412 data->cs2000_fun_cfg_1 = CS2000_REF_CLK_DIV_1;
413
414 oxygen_write16(chip, OXYGEN_I2S_A_FORMAT,
415 OXYGEN_RATE_48000 | OXYGEN_I2S_FORMAT_I2S |
416 OXYGEN_I2S_MCLK_128 | OXYGEN_I2S_BITS_16 |
417 OXYGEN_I2S_MASTER | OXYGEN_I2S_BCLK_64);
418
419 xonar_st_init_i2c(chip);
420 cs2000_registers_init(chip);
421 xonar_st_init_common(chip);
422
423 snd_component_add(chip->card, "CS2000");
424}
425
426static void xonar_stx_init(struct oxygen *chip)
427{
428 struct xonar_pcm179x *data = chip->model_data;
429
430 xonar_st_init_i2c(chip);
431 data->generic.ext_power_reg = OXYGEN_GPI_DATA;
432 data->generic.ext_power_int_reg = OXYGEN_GPI_INTERRUPT_MASK;
433 data->generic.ext_power_bit = GPI_EXT_POWER;
434 xonar_init_ext_power(chip);
435 xonar_st_init_common(chip);
436}
437
438static void xonar_d2_cleanup(struct oxygen *chip)
439{
440 xonar_disable_output(chip);
441}
442
443static void xonar_hdav_cleanup(struct oxygen *chip)
444{
445 xonar_hdmi_cleanup(chip);
446 xonar_disable_output(chip);
447 msleep(2);
448}
449
450static void xonar_st_cleanup(struct oxygen *chip)
451{
452 xonar_disable_output(chip);
453}
454
455static void xonar_d2_suspend(struct oxygen *chip)
456{
457 xonar_d2_cleanup(chip);
458}
459
460static void xonar_hdav_suspend(struct oxygen *chip)
461{
462 xonar_hdav_cleanup(chip);
463}
464
465static void xonar_st_suspend(struct oxygen *chip)
466{
467 xonar_st_cleanup(chip);
468}
469
470static void xonar_d2_resume(struct oxygen *chip)
471{
472 pcm1796_registers_init(chip);
473 xonar_enable_output(chip);
474}
475
476static void xonar_hdav_resume(struct oxygen *chip)
477{
478 struct xonar_hdav *data = chip->model_data;
479
480 pcm1796_registers_init(chip);
481 xonar_hdmi_resume(chip, &data->hdmi);
482 xonar_enable_output(chip);
483}
484
485static void xonar_stx_resume(struct oxygen *chip)
486{
487 pcm1796_registers_init(chip);
488 xonar_enable_output(chip);
489}
490
491static void xonar_st_resume(struct oxygen *chip)
492{
493 cs2000_registers_init(chip);
494 xonar_stx_resume(chip);
495}
496
497static unsigned int mclk_from_rate(struct oxygen *chip, unsigned int rate)
498{
499 struct xonar_pcm179x *data = chip->model_data;
500
501 if (rate <= 32000)
502 return OXYGEN_I2S_MCLK_512;
503 else if (rate <= 48000 && data->os_128)
504 return OXYGEN_I2S_MCLK_512;
505 else if (rate <= 96000)
506 return OXYGEN_I2S_MCLK_256;
507 else
508 return OXYGEN_I2S_MCLK_128;
509}
510
511static unsigned int get_pcm1796_i2s_mclk(struct oxygen *chip,
512 unsigned int channel,
513 struct snd_pcm_hw_params *params)
514{
515 if (channel == PCM_MULTICH)
516 return mclk_from_rate(chip, params_rate(params));
517 else
518 return oxygen_default_i2s_mclk(chip, channel, params);
519}
520
521static void update_pcm1796_oversampling(struct oxygen *chip)
522{
523 struct xonar_pcm179x *data = chip->model_data;
524 unsigned int i;
525 u8 reg;
526
527 if (data->current_rate <= 32000)
528 reg = PCM1796_OS_128;
529 else if (data->current_rate <= 48000 && data->os_128)
530 reg = PCM1796_OS_128;
531 else if (data->current_rate <= 96000 || data->os_128)
532 reg = PCM1796_OS_64;
533 else
534 reg = PCM1796_OS_32;
535 for (i = 0; i < data->dacs; ++i)
536 pcm1796_write_cached(chip, i, 20, reg);
537}
538
539static void set_pcm1796_params(struct oxygen *chip,
540 struct snd_pcm_hw_params *params)
541{
542 struct xonar_pcm179x *data = chip->model_data;
543
544 data->current_rate = params_rate(params);
545 update_pcm1796_oversampling(chip);
546}
547
548static void update_pcm1796_volume(struct oxygen *chip)
549{
550 struct xonar_pcm179x *data = chip->model_data;
551 unsigned int i;
552 s8 gain_offset;
553
554 gain_offset = data->hp_active ? data->hp_gain_offset : 0;
555 for (i = 0; i < data->dacs; ++i) {
556 pcm1796_write_cached(chip, i, 16, chip->dac_volume[i * 2]
557 + gain_offset);
558 pcm1796_write_cached(chip, i, 17, chip->dac_volume[i * 2 + 1]
559 + gain_offset);
560 }
561}
562
563static void update_pcm1796_mute(struct oxygen *chip)
564{
565 struct xonar_pcm179x *data = chip->model_data;
566 unsigned int i;
567 u8 value;
568
569 value = PCM1796_DMF_DISABLED | PCM1796_FMT_24_LJUST | PCM1796_ATLD;
570 if (chip->dac_mute)
571 value |= PCM1796_MUTE;
572 for (i = 0; i < data->dacs; ++i)
573 pcm1796_write_cached(chip, i, 18, value);
574}
575
576static void update_cs2000_rate(struct oxygen *chip, unsigned int rate)
577{
578 struct xonar_pcm179x *data = chip->model_data;
579 u8 rate_mclk, reg;
580
581 switch (rate) {
582 /* XXX Why is the I2S A MCLK half the actual I2S MCLK? */
583 case 32000:
584 rate_mclk = OXYGEN_RATE_32000 | OXYGEN_I2S_MCLK_256;
585 break;
586 case 44100:
587 if (data->os_128)
588 rate_mclk = OXYGEN_RATE_44100 | OXYGEN_I2S_MCLK_256;
589 else
590 rate_mclk = OXYGEN_RATE_44100 | OXYGEN_I2S_MCLK_128;
591 break;
592 default: /* 48000 */
593 if (data->os_128)
594 rate_mclk = OXYGEN_RATE_48000 | OXYGEN_I2S_MCLK_256;
595 else
596 rate_mclk = OXYGEN_RATE_48000 | OXYGEN_I2S_MCLK_128;
597 break;
598 case 64000:
599 rate_mclk = OXYGEN_RATE_32000 | OXYGEN_I2S_MCLK_256;
600 break;
601 case 88200:
602 rate_mclk = OXYGEN_RATE_44100 | OXYGEN_I2S_MCLK_256;
603 break;
604 case 96000:
605 rate_mclk = OXYGEN_RATE_48000 | OXYGEN_I2S_MCLK_256;
606 break;
607 case 176400:
608 rate_mclk = OXYGEN_RATE_44100 | OXYGEN_I2S_MCLK_256;
609 break;
610 case 192000:
611 rate_mclk = OXYGEN_RATE_48000 | OXYGEN_I2S_MCLK_256;
612 break;
613 }
614 oxygen_write16_masked(chip, OXYGEN_I2S_A_FORMAT, rate_mclk,
615 OXYGEN_I2S_RATE_MASK | OXYGEN_I2S_MCLK_MASK);
616 if ((rate_mclk & OXYGEN_I2S_MCLK_MASK) <= OXYGEN_I2S_MCLK_128)
617 reg = CS2000_REF_CLK_DIV_1;
618 else
619 reg = CS2000_REF_CLK_DIV_2;
620 cs2000_write_cached(chip, CS2000_FUN_CFG_1, reg);
621}
622
623static void set_st_params(struct oxygen *chip,
624 struct snd_pcm_hw_params *params)
625{
626 update_cs2000_rate(chip, params_rate(params));
627 set_pcm1796_params(chip, params);
628}
629
630static void set_hdav_params(struct oxygen *chip,
631 struct snd_pcm_hw_params *params)
632{
633 struct xonar_hdav *data = chip->model_data;
634
635 set_pcm1796_params(chip, params);
636 xonar_set_hdmi_params(chip, &data->hdmi, params);
637}
638
639static const struct snd_kcontrol_new alt_switch = {
640 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
641 .name = "Analog Loopback Switch",
642 .info = snd_ctl_boolean_mono_info,
643 .get = xonar_gpio_bit_switch_get,
644 .put = xonar_gpio_bit_switch_put,
645 .private_value = GPIO_D2_ALT,
646};
647
648static int rolloff_info(struct snd_kcontrol *ctl,
649 struct snd_ctl_elem_info *info)
650{
651 static const char *const names[2] = {
652 "Sharp Roll-off", "Slow Roll-off"
653 };
654
655 info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
656 info->count = 1;
657 info->value.enumerated.items = 2;
658 if (info->value.enumerated.item >= 2)
659 info->value.enumerated.item = 1;
660 strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
661 return 0;
662}
663
664static int rolloff_get(struct snd_kcontrol *ctl,
665 struct snd_ctl_elem_value *value)
666{
667 struct oxygen *chip = ctl->private_data;
668 struct xonar_pcm179x *data = chip->model_data;
669
670 value->value.enumerated.item[0] =
671 (data->pcm1796_regs[0][19 - PCM1796_REG_BASE] &
672 PCM1796_FLT_MASK) != PCM1796_FLT_SHARP;
673 return 0;
674}
675
676static int rolloff_put(struct snd_kcontrol *ctl,
677 struct snd_ctl_elem_value *value)
678{
679 struct oxygen *chip = ctl->private_data;
680 struct xonar_pcm179x *data = chip->model_data;
681 unsigned int i;
682 int changed;
683 u8 reg;
684
685 mutex_lock(&chip->mutex);
686 reg = data->pcm1796_regs[0][19 - PCM1796_REG_BASE];
687 reg &= ~PCM1796_FLT_MASK;
688 if (!value->value.enumerated.item[0])
689 reg |= PCM1796_FLT_SHARP;
690 else
691 reg |= PCM1796_FLT_SLOW;
692 changed = reg != data->pcm1796_regs[0][19 - PCM1796_REG_BASE];
693 if (changed) {
694 for (i = 0; i < data->dacs; ++i)
695 pcm1796_write(chip, i, 19, reg);
696 }
697 mutex_unlock(&chip->mutex);
698 return changed;
699}
700
701static const struct snd_kcontrol_new rolloff_control = {
702 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
703 .name = "DAC Filter Playback Enum",
704 .info = rolloff_info,
705 .get = rolloff_get,
706 .put = rolloff_put,
707};
708
709static int os_128_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info)
710{
711 static const char *const names[2] = { "64x", "128x" };
712
713 info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
714 info->count = 1;
715 info->value.enumerated.items = 2;
716 if (info->value.enumerated.item >= 2)
717 info->value.enumerated.item = 1;
718 strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
719 return 0;
720}
721
722static int os_128_get(struct snd_kcontrol *ctl,
723 struct snd_ctl_elem_value *value)
724{
725 struct oxygen *chip = ctl->private_data;
726 struct xonar_pcm179x *data = chip->model_data;
727
728 value->value.enumerated.item[0] = data->os_128;
729 return 0;
730}
731
732static int os_128_put(struct snd_kcontrol *ctl,
733 struct snd_ctl_elem_value *value)
734{
735 struct oxygen *chip = ctl->private_data;
736 struct xonar_pcm179x *data = chip->model_data;
737 int changed;
738
739 mutex_lock(&chip->mutex);
740 changed = value->value.enumerated.item[0] != data->os_128;
741 if (changed) {
742 data->os_128 = value->value.enumerated.item[0];
743 if (data->has_cs2000)
744 update_cs2000_rate(chip, data->current_rate);
745 oxygen_write16_masked(chip, OXYGEN_I2S_MULTICH_FORMAT,
746 mclk_from_rate(chip, data->current_rate),
747 OXYGEN_I2S_MCLK_MASK);
748 update_pcm1796_oversampling(chip);
749 }
750 mutex_unlock(&chip->mutex);
751 return changed;
752}
753
754static const struct snd_kcontrol_new os_128_control = {
755 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
756 .name = "DAC Oversampling Playback Enum",
757 .info = os_128_info,
758 .get = os_128_get,
759 .put = os_128_put,
760};
761
762static int st_output_switch_info(struct snd_kcontrol *ctl,
763 struct snd_ctl_elem_info *info)
764{
765 static const char *const names[3] = {
766 "Speakers", "Headphones", "FP Headphones"
767 };
768
769 info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
770 info->count = 1;
771 info->value.enumerated.items = 3;
772 if (info->value.enumerated.item >= 3)
773 info->value.enumerated.item = 2;
774 strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
775 return 0;
776}
777
778static int st_output_switch_get(struct snd_kcontrol *ctl,
779 struct snd_ctl_elem_value *value)
780{
781 struct oxygen *chip = ctl->private_data;
782 u16 gpio;
783
784 gpio = oxygen_read16(chip, OXYGEN_GPIO_DATA);
785 if (!(gpio & GPIO_ST_HP))
786 value->value.enumerated.item[0] = 0;
787 else if (gpio & GPIO_ST_HP_REAR)
788 value->value.enumerated.item[0] = 1;
789 else
790 value->value.enumerated.item[0] = 2;
791 return 0;
792}
793
794
795static int st_output_switch_put(struct snd_kcontrol *ctl,
796 struct snd_ctl_elem_value *value)
797{
798 struct oxygen *chip = ctl->private_data;
799 struct xonar_pcm179x *data = chip->model_data;
800 u16 gpio_old, gpio;
801
802 mutex_lock(&chip->mutex);
803 gpio_old = oxygen_read16(chip, OXYGEN_GPIO_DATA);
804 gpio = gpio_old;
805 switch (value->value.enumerated.item[0]) {
806 case 0:
807 gpio &= ~(GPIO_ST_HP | GPIO_ST_HP_REAR);
808 break;
809 case 1:
810 gpio |= GPIO_ST_HP | GPIO_ST_HP_REAR;
811 break;
812 case 2:
813 gpio = (gpio | GPIO_ST_HP) & ~GPIO_ST_HP_REAR;
814 break;
815 }
816 oxygen_write16(chip, OXYGEN_GPIO_DATA, gpio);
817 data->hp_active = gpio & GPIO_ST_HP;
818 update_pcm1796_volume(chip);
819 mutex_unlock(&chip->mutex);
820 return gpio != gpio_old;
821}
822
823static int st_hp_volume_offset_info(struct snd_kcontrol *ctl,
824 struct snd_ctl_elem_info *info)
825{
826 static const char *const names[3] = {
827 "< 64 ohms", "64-300 ohms", "300-600 ohms"
828 };
829
830 info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
831 info->count = 1;
832 info->value.enumerated.items = 3;
833 if (info->value.enumerated.item > 2)
834 info->value.enumerated.item = 2;
835 strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
836 return 0;
837}
838
839static int st_hp_volume_offset_get(struct snd_kcontrol *ctl,
840 struct snd_ctl_elem_value *value)
841{
842 struct oxygen *chip = ctl->private_data;
843 struct xonar_pcm179x *data = chip->model_data;
844
845 mutex_lock(&chip->mutex);
846 if (data->hp_gain_offset < 2*-6)
847 value->value.enumerated.item[0] = 0;
848 else if (data->hp_gain_offset < 0)
849 value->value.enumerated.item[0] = 1;
850 else
851 value->value.enumerated.item[0] = 2;
852 mutex_unlock(&chip->mutex);
853 return 0;
854}
855
856
857static int st_hp_volume_offset_put(struct snd_kcontrol *ctl,
858 struct snd_ctl_elem_value *value)
859{
860 static const s8 offsets[] = { 2*-18, 2*-6, 0 };
861 struct oxygen *chip = ctl->private_data;
862 struct xonar_pcm179x *data = chip->model_data;
863 s8 offset;
864 int changed;
865
866 if (value->value.enumerated.item[0] > 2)
867 return -EINVAL;
868 offset = offsets[value->value.enumerated.item[0]];
869 mutex_lock(&chip->mutex);
870 changed = offset != data->hp_gain_offset;
871 if (changed) {
872 data->hp_gain_offset = offset;
873 update_pcm1796_volume(chip);
874 }
875 mutex_unlock(&chip->mutex);
876 return changed;
877}
878
879static const struct snd_kcontrol_new st_controls[] = {
880 {
881 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
882 .name = "Analog Output",
883 .info = st_output_switch_info,
884 .get = st_output_switch_get,
885 .put = st_output_switch_put,
886 },
887 {
888 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
889 .name = "Headphones Impedance Playback Enum",
890 .info = st_hp_volume_offset_info,
891 .get = st_hp_volume_offset_get,
892 .put = st_hp_volume_offset_put,
893 },
894};
895
896static void xonar_line_mic_ac97_switch(struct oxygen *chip,
897 unsigned int reg, unsigned int mute)
898{
899 if (reg == AC97_LINE) {
900 spin_lock_irq(&chip->reg_lock);
901 oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
902 mute ? GPIO_INPUT_ROUTE : 0,
903 GPIO_INPUT_ROUTE);
904 spin_unlock_irq(&chip->reg_lock);
905 }
906}
907
908static const DECLARE_TLV_DB_SCALE(pcm1796_db_scale, -6000, 50, 0);
909
910static int xonar_d2_control_filter(struct snd_kcontrol_new *template)
911{
912 if (!strncmp(template->name, "CD Capture ", 11))
913 /* CD in is actually connected to the video in pin */
914 template->private_value ^= AC97_CD ^ AC97_VIDEO;
915 return 0;
916}
917
918static int xonar_st_control_filter(struct snd_kcontrol_new *template)
919{
920 if (!strncmp(template->name, "CD Capture ", 11))
921 return 1; /* no CD input */
922 return 0;
923}
924
925static int add_pcm1796_controls(struct oxygen *chip)
926{
927 int err;
928
929 err = snd_ctl_add(chip->card, snd_ctl_new1(&rolloff_control, chip));
930 if (err < 0)
931 return err;
932 err = snd_ctl_add(chip->card, snd_ctl_new1(&os_128_control, chip));
933 if (err < 0)
934 return err;
935 return 0;
936}
937
938static int xonar_d2_mixer_init(struct oxygen *chip)
939{
940 int err;
941
942 err = snd_ctl_add(chip->card, snd_ctl_new1(&alt_switch, chip));
943 if (err < 0)
944 return err;
945 err = add_pcm1796_controls(chip);
946 if (err < 0)
947 return err;
948 return 0;
949}
950
951static int xonar_hdav_mixer_init(struct oxygen *chip)
952{
953 return add_pcm1796_controls(chip);
954}
955
956static int xonar_st_mixer_init(struct oxygen *chip)
957{
958 unsigned int i;
959 int err;
960
961 for (i = 0; i < ARRAY_SIZE(st_controls); ++i) {
962 err = snd_ctl_add(chip->card,
963 snd_ctl_new1(&st_controls[i], chip));
964 if (err < 0)
965 return err;
966 }
967 err = add_pcm1796_controls(chip);
968 if (err < 0)
969 return err;
970 return 0;
971}
972
973static const struct oxygen_model model_xonar_d2 = {
974 .longname = "Asus Virtuoso 200",
975 .chip = "AV200",
976 .init = xonar_d2_init,
977 .control_filter = xonar_d2_control_filter,
978 .mixer_init = xonar_d2_mixer_init,
979 .cleanup = xonar_d2_cleanup,
980 .suspend = xonar_d2_suspend,
981 .resume = xonar_d2_resume,
982 .get_i2s_mclk = get_pcm1796_i2s_mclk,
983 .set_dac_params = set_pcm1796_params,
984 .set_adc_params = xonar_set_cs53x1_params,
985 .update_dac_volume = update_pcm1796_volume,
986 .update_dac_mute = update_pcm1796_mute,
987 .dac_tlv = pcm1796_db_scale,
988 .model_data_size = sizeof(struct xonar_pcm179x),
989 .device_config = PLAYBACK_0_TO_I2S |
990 PLAYBACK_1_TO_SPDIF |
991 CAPTURE_0_FROM_I2S_2 |
992 CAPTURE_1_FROM_SPDIF |
993 MIDI_OUTPUT |
994 MIDI_INPUT,
995 .dac_channels = 8,
996 .dac_volume_min = 255 - 2*60,
997 .dac_volume_max = 255,
998 .misc_flags = OXYGEN_MISC_MIDI,
999 .function_flags = OXYGEN_FUNCTION_SPI |
1000 OXYGEN_FUNCTION_ENABLE_SPI_4_5,
1001 .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
1002 .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
1003};
1004
1005static const struct oxygen_model model_xonar_hdav = {
1006 .longname = "Asus Virtuoso 200",
1007 .chip = "AV200",
1008 .init = xonar_hdav_init,
1009 .mixer_init = xonar_hdav_mixer_init,
1010 .cleanup = xonar_hdav_cleanup,
1011 .suspend = xonar_hdav_suspend,
1012 .resume = xonar_hdav_resume,
1013 .pcm_hardware_filter = xonar_hdmi_pcm_hardware_filter,
1014 .get_i2s_mclk = get_pcm1796_i2s_mclk,
1015 .set_dac_params = set_hdav_params,
1016 .set_adc_params = xonar_set_cs53x1_params,
1017 .update_dac_volume = update_pcm1796_volume,
1018 .update_dac_mute = update_pcm1796_mute,
1019 .uart_input = xonar_hdmi_uart_input,
1020 .ac97_switch = xonar_line_mic_ac97_switch,
1021 .dac_tlv = pcm1796_db_scale,
1022 .model_data_size = sizeof(struct xonar_hdav),
1023 .device_config = PLAYBACK_0_TO_I2S |
1024 PLAYBACK_1_TO_SPDIF |
1025 CAPTURE_0_FROM_I2S_2 |
1026 CAPTURE_1_FROM_SPDIF,
1027 .dac_channels = 8,
1028 .dac_volume_min = 255 - 2*60,
1029 .dac_volume_max = 255,
1030 .misc_flags = OXYGEN_MISC_MIDI,
1031 .function_flags = OXYGEN_FUNCTION_2WIRE,
1032 .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
1033 .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
1034};
1035
1036static const struct oxygen_model model_xonar_st = {
1037 .longname = "Asus Virtuoso 100",
1038 .chip = "AV200",
1039 .init = xonar_st_init,
1040 .control_filter = xonar_st_control_filter,
1041 .mixer_init = xonar_st_mixer_init,
1042 .cleanup = xonar_st_cleanup,
1043 .suspend = xonar_st_suspend,
1044 .resume = xonar_st_resume,
1045 .get_i2s_mclk = get_pcm1796_i2s_mclk,
1046 .set_dac_params = set_st_params,
1047 .set_adc_params = xonar_set_cs53x1_params,
1048 .update_dac_volume = update_pcm1796_volume,
1049 .update_dac_mute = update_pcm1796_mute,
1050 .ac97_switch = xonar_line_mic_ac97_switch,
1051 .dac_tlv = pcm1796_db_scale,
1052 .model_data_size = sizeof(struct xonar_pcm179x),
1053 .device_config = PLAYBACK_0_TO_I2S |
1054 PLAYBACK_1_TO_SPDIF |
1055 CAPTURE_0_FROM_I2S_2,
1056 .dac_channels = 2,
1057 .dac_volume_min = 255 - 2*60,
1058 .dac_volume_max = 255,
1059 .function_flags = OXYGEN_FUNCTION_2WIRE,
1060 .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
1061 .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
1062};
1063
1064int __devinit get_xonar_pcm179x_model(struct oxygen *chip,
1065 const struct pci_device_id *id)
1066{
1067 switch (id->subdevice) {
1068 case 0x8269:
1069 chip->model = model_xonar_d2;
1070 chip->model.shortname = "Xonar D2";
1071 break;
1072 case 0x82b7:
1073 chip->model = model_xonar_d2;
1074 chip->model.shortname = "Xonar D2X";
1075 chip->model.init = xonar_d2x_init;
1076 break;
1077 case 0x8314:
1078 chip->model = model_xonar_hdav;
1079 oxygen_clear_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_DB_MASK);
1080 switch (oxygen_read16(chip, OXYGEN_GPIO_DATA) & GPIO_DB_MASK) {
1081 default:
1082 chip->model.shortname = "Xonar HDAV1.3";
1083 break;
1084 case GPIO_DB_H6:
1085 chip->model.shortname = "Xonar HDAV1.3+H6";
1086 chip->model.private_data = 1;
1087 break;
1088 }
1089 break;
1090 case 0x835d:
1091 chip->model = model_xonar_st;
1092 oxygen_clear_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_DB_MASK);
1093 switch (oxygen_read16(chip, OXYGEN_GPIO_DATA) & GPIO_DB_MASK) {
1094 default:
1095 chip->model.shortname = "Xonar ST";
1096 break;
1097 case GPIO_DB_H6:
1098 chip->model.shortname = "Xonar ST+H6";
1099 chip->model.dac_channels = 8;
1100 chip->model.private_data = 1;
1101 break;
1102 }
1103 break;
1104 case 0x835c:
1105 chip->model = model_xonar_st;
1106 chip->model.shortname = "Xonar STX";
1107 chip->model.init = xonar_stx_init;
1108 chip->model.resume = xonar_stx_resume;
1109 chip->model.set_dac_params = set_pcm1796_params;
1110 break;
1111 default:
1112 return -EINVAL;
1113 }
1114 return 0;
1115}
diff --git a/sound/pci/oxygen/xonar_wm87x6.c b/sound/pci/oxygen/xonar_wm87x6.c
new file mode 100644
index 000000000000..dbc4b89d74e4
--- /dev/null
+++ b/sound/pci/oxygen/xonar_wm87x6.c
@@ -0,0 +1,1021 @@
1/*
2 * card driver for models with WM8776/WM8766 DACs (Xonar DS)
3 *
4 * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
5 *
6 *
7 * This driver is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License, version 2.
9 *
10 * This driver is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this driver; if not, see <http://www.gnu.org/licenses/>.
17 */
18
19/*
20 * Xonar DS
21 * --------
22 *
23 * CMI8788:
24 *
25 * SPI 0 -> WM8766 (surround, center/LFE, back)
26 * SPI 1 -> WM8776 (front, input)
27 *
28 * GPIO 4 <- headphone detect
29 * GPIO 6 -> route input jack to input 1/2 (1/0)
30 * GPIO 7 -> enable output to speakers
31 * GPIO 8 -> enable output to speakers
32 */
33
34#include <linux/pci.h>
35#include <linux/delay.h>
36#include <sound/control.h>
37#include <sound/core.h>
38#include <sound/pcm.h>
39#include <sound/pcm_params.h>
40#include <sound/tlv.h>
41#include "xonar.h"
42#include "wm8776.h"
43#include "wm8766.h"
44
45#define GPIO_DS_HP_DETECT 0x0010
46#define GPIO_DS_INPUT_ROUTE 0x0040
47#define GPIO_DS_OUTPUT_ENABLE 0x0180
48
49#define LC_CONTROL_LIMITER 0x40000000
50#define LC_CONTROL_ALC 0x20000000
51
52struct xonar_wm87x6 {
53 struct xonar_generic generic;
54 u16 wm8776_regs[0x17];
55 u16 wm8766_regs[0x10];
56 struct snd_kcontrol *lc_controls[13];
57};
58
59static void wm8776_write(struct oxygen *chip,
60 unsigned int reg, unsigned int value)
61{
62 struct xonar_wm87x6 *data = chip->model_data;
63
64 oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
65 OXYGEN_SPI_DATA_LENGTH_2 |
66 OXYGEN_SPI_CLOCK_160 |
67 (1 << OXYGEN_SPI_CODEC_SHIFT) |
68 OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
69 (reg << 9) | value);
70 if (reg < ARRAY_SIZE(data->wm8776_regs)) {
71 if (reg >= WM8776_HPLVOL && reg <= WM8776_DACMASTER)
72 value &= ~WM8776_UPDATE;
73 data->wm8776_regs[reg] = value;
74 }
75}
76
77static void wm8776_write_cached(struct oxygen *chip,
78 unsigned int reg, unsigned int value)
79{
80 struct xonar_wm87x6 *data = chip->model_data;
81
82 if (reg >= ARRAY_SIZE(data->wm8776_regs) ||
83 value != data->wm8776_regs[reg])
84 wm8776_write(chip, reg, value);
85}
86
87static void wm8766_write(struct oxygen *chip,
88 unsigned int reg, unsigned int value)
89{
90 struct xonar_wm87x6 *data = chip->model_data;
91
92 oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
93 OXYGEN_SPI_DATA_LENGTH_2 |
94 OXYGEN_SPI_CLOCK_160 |
95 (0 << OXYGEN_SPI_CODEC_SHIFT) |
96 OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
97 (reg << 9) | value);
98 if (reg < ARRAY_SIZE(data->wm8766_regs))
99 data->wm8766_regs[reg] = value;
100}
101
102static void wm8766_write_cached(struct oxygen *chip,
103 unsigned int reg, unsigned int value)
104{
105 struct xonar_wm87x6 *data = chip->model_data;
106
107 if (reg >= ARRAY_SIZE(data->wm8766_regs) ||
108 value != data->wm8766_regs[reg]) {
109 if ((reg >= WM8766_LDA1 && reg <= WM8766_RDA1) ||
110 (reg >= WM8766_LDA2 && reg <= WM8766_MASTDA))
111 value &= ~WM8766_UPDATE;
112 wm8766_write(chip, reg, value);
113 }
114}
115
116static void wm8776_registers_init(struct oxygen *chip)
117{
118 struct xonar_wm87x6 *data = chip->model_data;
119
120 wm8776_write(chip, WM8776_RESET, 0);
121 wm8776_write(chip, WM8776_DACCTRL1, WM8776_DZCEN |
122 WM8776_PL_LEFT_LEFT | WM8776_PL_RIGHT_RIGHT);
123 wm8776_write(chip, WM8776_DACMUTE, chip->dac_mute ? WM8776_DMUTE : 0);
124 wm8776_write(chip, WM8776_DACIFCTRL,
125 WM8776_DACFMT_LJUST | WM8776_DACWL_24);
126 wm8776_write(chip, WM8776_ADCIFCTRL,
127 data->wm8776_regs[WM8776_ADCIFCTRL]);
128 wm8776_write(chip, WM8776_MSTRCTRL, data->wm8776_regs[WM8776_MSTRCTRL]);
129 wm8776_write(chip, WM8776_PWRDOWN, data->wm8776_regs[WM8776_PWRDOWN]);
130 wm8776_write(chip, WM8776_HPLVOL, data->wm8776_regs[WM8776_HPLVOL]);
131 wm8776_write(chip, WM8776_HPRVOL, data->wm8776_regs[WM8776_HPRVOL] |
132 WM8776_UPDATE);
133 wm8776_write(chip, WM8776_ADCLVOL, data->wm8776_regs[WM8776_ADCLVOL]);
134 wm8776_write(chip, WM8776_ADCRVOL, data->wm8776_regs[WM8776_ADCRVOL]);
135 wm8776_write(chip, WM8776_ADCMUX, data->wm8776_regs[WM8776_ADCMUX]);
136 wm8776_write(chip, WM8776_DACLVOL, chip->dac_volume[0]);
137 wm8776_write(chip, WM8776_DACRVOL, chip->dac_volume[1] | WM8776_UPDATE);
138}
139
140static void wm8766_registers_init(struct oxygen *chip)
141{
142 wm8766_write(chip, WM8766_RESET, 0);
143 wm8766_write(chip, WM8766_INT_CTRL, WM8766_FMT_LJUST | WM8766_IWL_24);
144 wm8766_write(chip, WM8766_DAC_CTRL2,
145 WM8766_ZCD | (chip->dac_mute ? WM8766_DMUTE_MASK : 0));
146 wm8766_write(chip, WM8766_LDA1, chip->dac_volume[2]);
147 wm8766_write(chip, WM8766_RDA1, chip->dac_volume[3]);
148 wm8766_write(chip, WM8766_LDA2, chip->dac_volume[4]);
149 wm8766_write(chip, WM8766_RDA2, chip->dac_volume[5]);
150 wm8766_write(chip, WM8766_LDA3, chip->dac_volume[6]);
151 wm8766_write(chip, WM8766_RDA3, chip->dac_volume[7] | WM8766_UPDATE);
152}
153
154static void wm8776_init(struct oxygen *chip)
155{
156 struct xonar_wm87x6 *data = chip->model_data;
157
158 data->wm8776_regs[WM8776_HPLVOL] = (0x79 - 60) | WM8776_HPZCEN;
159 data->wm8776_regs[WM8776_HPRVOL] = (0x79 - 60) | WM8776_HPZCEN;
160 data->wm8776_regs[WM8776_ADCIFCTRL] =
161 WM8776_ADCFMT_LJUST | WM8776_ADCWL_24 | WM8776_ADCMCLK;
162 data->wm8776_regs[WM8776_MSTRCTRL] =
163 WM8776_ADCRATE_256 | WM8776_DACRATE_256;
164 data->wm8776_regs[WM8776_PWRDOWN] = WM8776_HPPD;
165 data->wm8776_regs[WM8776_ADCLVOL] = 0xa5 | WM8776_ZCA;
166 data->wm8776_regs[WM8776_ADCRVOL] = 0xa5 | WM8776_ZCA;
167 data->wm8776_regs[WM8776_ADCMUX] = 0x001;
168 wm8776_registers_init(chip);
169}
170
171static void xonar_ds_init(struct oxygen *chip)
172{
173 struct xonar_wm87x6 *data = chip->model_data;
174
175 data->generic.anti_pop_delay = 300;
176 data->generic.output_enable_bit = GPIO_DS_OUTPUT_ENABLE;
177
178 wm8776_init(chip);
179 wm8766_registers_init(chip);
180
181 oxygen_write16_masked(chip, OXYGEN_GPIO_CONTROL, GPIO_DS_INPUT_ROUTE,
182 GPIO_DS_HP_DETECT | GPIO_DS_INPUT_ROUTE);
183 oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, GPIO_DS_INPUT_ROUTE);
184 oxygen_set_bits16(chip, OXYGEN_GPIO_INTERRUPT_MASK, GPIO_DS_HP_DETECT);
185 chip->interrupt_mask |= OXYGEN_INT_GPIO;
186
187 xonar_enable_output(chip);
188
189 snd_component_add(chip->card, "WM8776");
190 snd_component_add(chip->card, "WM8766");
191}
192
193static void xonar_ds_cleanup(struct oxygen *chip)
194{
195 xonar_disable_output(chip);
196}
197
198static void xonar_ds_suspend(struct oxygen *chip)
199{
200 xonar_ds_cleanup(chip);
201}
202
203static void xonar_ds_resume(struct oxygen *chip)
204{
205 wm8776_registers_init(chip);
206 wm8766_registers_init(chip);
207 xonar_enable_output(chip);
208}
209
210static void wm8776_adc_hardware_filter(unsigned int channel,
211 struct snd_pcm_hardware *hardware)
212{
213 if (channel == PCM_A) {
214 hardware->rates = SNDRV_PCM_RATE_32000 |
215 SNDRV_PCM_RATE_44100 |
216 SNDRV_PCM_RATE_48000 |
217 SNDRV_PCM_RATE_64000 |
218 SNDRV_PCM_RATE_88200 |
219 SNDRV_PCM_RATE_96000;
220 hardware->rate_max = 96000;
221 }
222}
223
224static void set_wm87x6_dac_params(struct oxygen *chip,
225 struct snd_pcm_hw_params *params)
226{
227}
228
229static void set_wm8776_adc_params(struct oxygen *chip,
230 struct snd_pcm_hw_params *params)
231{
232 u16 reg;
233
234 reg = WM8776_ADCRATE_256 | WM8776_DACRATE_256;
235 if (params_rate(params) > 48000)
236 reg |= WM8776_ADCOSR;
237 wm8776_write_cached(chip, WM8776_MSTRCTRL, reg);
238}
239
240static void update_wm8776_volume(struct oxygen *chip)
241{
242 struct xonar_wm87x6 *data = chip->model_data;
243 u8 to_change;
244
245 if (chip->dac_volume[0] == chip->dac_volume[1]) {
246 if (chip->dac_volume[0] != data->wm8776_regs[WM8776_DACLVOL] ||
247 chip->dac_volume[1] != data->wm8776_regs[WM8776_DACRVOL]) {
248 wm8776_write(chip, WM8776_DACMASTER,
249 chip->dac_volume[0] | WM8776_UPDATE);
250 data->wm8776_regs[WM8776_DACLVOL] = chip->dac_volume[0];
251 data->wm8776_regs[WM8776_DACRVOL] = chip->dac_volume[0];
252 }
253 } else {
254 to_change = (chip->dac_volume[0] !=
255 data->wm8776_regs[WM8776_DACLVOL]) << 0;
256 to_change |= (chip->dac_volume[1] !=
257 data->wm8776_regs[WM8776_DACLVOL]) << 1;
258 if (to_change & 1)
259 wm8776_write(chip, WM8776_DACLVOL, chip->dac_volume[0] |
260 ((to_change & 2) ? 0 : WM8776_UPDATE));
261 if (to_change & 2)
262 wm8776_write(chip, WM8776_DACRVOL,
263 chip->dac_volume[1] | WM8776_UPDATE);
264 }
265}
266
267static void update_wm87x6_volume(struct oxygen *chip)
268{
269 static const u8 wm8766_regs[6] = {
270 WM8766_LDA1, WM8766_RDA1,
271 WM8766_LDA2, WM8766_RDA2,
272 WM8766_LDA3, WM8766_RDA3,
273 };
274 struct xonar_wm87x6 *data = chip->model_data;
275 unsigned int i;
276 u8 to_change;
277
278 update_wm8776_volume(chip);
279 if (chip->dac_volume[2] == chip->dac_volume[3] &&
280 chip->dac_volume[2] == chip->dac_volume[4] &&
281 chip->dac_volume[2] == chip->dac_volume[5] &&
282 chip->dac_volume[2] == chip->dac_volume[6] &&
283 chip->dac_volume[2] == chip->dac_volume[7]) {
284 to_change = 0;
285 for (i = 0; i < 6; ++i)
286 if (chip->dac_volume[2] !=
287 data->wm8766_regs[wm8766_regs[i]])
288 to_change = 1;
289 if (to_change) {
290 wm8766_write(chip, WM8766_MASTDA,
291 chip->dac_volume[2] | WM8766_UPDATE);
292 for (i = 0; i < 6; ++i)
293 data->wm8766_regs[wm8766_regs[i]] =
294 chip->dac_volume[2];
295 }
296 } else {
297 to_change = 0;
298 for (i = 0; i < 6; ++i)
299 to_change |= (chip->dac_volume[2 + i] !=
300 data->wm8766_regs[wm8766_regs[i]]) << i;
301 for (i = 0; i < 6; ++i)
302 if (to_change & (1 << i))
303 wm8766_write(chip, wm8766_regs[i],
304 chip->dac_volume[2 + i] |
305 ((to_change & (0x3e << i))
306 ? 0 : WM8766_UPDATE));
307 }
308}
309
310static void update_wm8776_mute(struct oxygen *chip)
311{
312 wm8776_write_cached(chip, WM8776_DACMUTE,
313 chip->dac_mute ? WM8776_DMUTE : 0);
314}
315
316static void update_wm87x6_mute(struct oxygen *chip)
317{
318 update_wm8776_mute(chip);
319 wm8766_write_cached(chip, WM8766_DAC_CTRL2, WM8766_ZCD |
320 (chip->dac_mute ? WM8766_DMUTE_MASK : 0));
321}
322
323static void xonar_ds_gpio_changed(struct oxygen *chip)
324{
325 u16 bits;
326
327 bits = oxygen_read16(chip, OXYGEN_GPIO_DATA);
328 snd_printk(KERN_INFO "HP detect: %d\n", !!(bits & GPIO_DS_HP_DETECT));
329}
330
331static int wm8776_bit_switch_get(struct snd_kcontrol *ctl,
332 struct snd_ctl_elem_value *value)
333{
334 struct oxygen *chip = ctl->private_data;
335 struct xonar_wm87x6 *data = chip->model_data;
336 u16 bit = ctl->private_value & 0xffff;
337 unsigned int reg_index = (ctl->private_value >> 16) & 0xff;
338 bool invert = (ctl->private_value >> 24) & 1;
339
340 value->value.integer.value[0] =
341 ((data->wm8776_regs[reg_index] & bit) != 0) ^ invert;
342 return 0;
343}
344
345static int wm8776_bit_switch_put(struct snd_kcontrol *ctl,
346 struct snd_ctl_elem_value *value)
347{
348 struct oxygen *chip = ctl->private_data;
349 struct xonar_wm87x6 *data = chip->model_data;
350 u16 bit = ctl->private_value & 0xffff;
351 u16 reg_value;
352 unsigned int reg_index = (ctl->private_value >> 16) & 0xff;
353 bool invert = (ctl->private_value >> 24) & 1;
354 int changed;
355
356 mutex_lock(&chip->mutex);
357 reg_value = data->wm8776_regs[reg_index] & ~bit;
358 if (value->value.integer.value[0] ^ invert)
359 reg_value |= bit;
360 changed = reg_value != data->wm8776_regs[reg_index];
361 if (changed)
362 wm8776_write(chip, reg_index, reg_value);
363 mutex_unlock(&chip->mutex);
364 return changed;
365}
366
367static int wm8776_field_enum_info(struct snd_kcontrol *ctl,
368 struct snd_ctl_elem_info *info)
369{
370 static const char *const hld[16] = {
371 "0 ms", "2.67 ms", "5.33 ms", "10.6 ms",
372 "21.3 ms", "42.7 ms", "85.3 ms", "171 ms",
373 "341 ms", "683 ms", "1.37 s", "2.73 s",
374 "5.46 s", "10.9 s", "21.8 s", "43.7 s",
375 };
376 static const char *const atk_lim[11] = {
377 "0.25 ms", "0.5 ms", "1 ms", "2 ms",
378 "4 ms", "8 ms", "16 ms", "32 ms",
379 "64 ms", "128 ms", "256 ms",
380 };
381 static const char *const atk_alc[11] = {
382 "8.40 ms", "16.8 ms", "33.6 ms", "67.2 ms",
383 "134 ms", "269 ms", "538 ms", "1.08 s",
384 "2.15 s", "4.3 s", "8.6 s",
385 };
386 static const char *const dcy_lim[11] = {
387 "1.2 ms", "2.4 ms", "4.8 ms", "9.6 ms",
388 "19.2 ms", "38.4 ms", "76.8 ms", "154 ms",
389 "307 ms", "614 ms", "1.23 s",
390 };
391 static const char *const dcy_alc[11] = {
392 "33.5 ms", "67.0 ms", "134 ms", "268 ms",
393 "536 ms", "1.07 s", "2.14 s", "4.29 s",
394 "8.58 s", "17.2 s", "34.3 s",
395 };
396 static const char *const tranwin[8] = {
397 "0 us", "62.5 us", "125 us", "250 us",
398 "500 us", "1 ms", "2 ms", "4 ms",
399 };
400 u8 max;
401 const char *const *names;
402
403 max = (ctl->private_value >> 12) & 0xf;
404 info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
405 info->count = 1;
406 info->value.enumerated.items = max + 1;
407 if (info->value.enumerated.item > max)
408 info->value.enumerated.item = max;
409 switch ((ctl->private_value >> 24) & 0x1f) {
410 case WM8776_ALCCTRL2:
411 names = hld;
412 break;
413 case WM8776_ALCCTRL3:
414 if (((ctl->private_value >> 20) & 0xf) == 0) {
415 if (ctl->private_value & LC_CONTROL_LIMITER)
416 names = atk_lim;
417 else
418 names = atk_alc;
419 } else {
420 if (ctl->private_value & LC_CONTROL_LIMITER)
421 names = dcy_lim;
422 else
423 names = dcy_alc;
424 }
425 break;
426 case WM8776_LIMITER:
427 names = tranwin;
428 break;
429 default:
430 return -ENXIO;
431 }
432 strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
433 return 0;
434}
435
436static int wm8776_field_volume_info(struct snd_kcontrol *ctl,
437 struct snd_ctl_elem_info *info)
438{
439 info->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
440 info->count = 1;
441 info->value.integer.min = (ctl->private_value >> 8) & 0xf;
442 info->value.integer.max = (ctl->private_value >> 12) & 0xf;
443 return 0;
444}
445
446static void wm8776_field_set_from_ctl(struct snd_kcontrol *ctl)
447{
448 struct oxygen *chip = ctl->private_data;
449 struct xonar_wm87x6 *data = chip->model_data;
450 unsigned int value, reg_index, mode;
451 u8 min, max, shift;
452 u16 mask, reg_value;
453 bool invert;
454
455 if ((data->wm8776_regs[WM8776_ALCCTRL1] & WM8776_LCSEL_MASK) ==
456 WM8776_LCSEL_LIMITER)
457 mode = LC_CONTROL_LIMITER;
458 else
459 mode = LC_CONTROL_ALC;
460 if (!(ctl->private_value & mode))
461 return;
462
463 value = ctl->private_value & 0xf;
464 min = (ctl->private_value >> 8) & 0xf;
465 max = (ctl->private_value >> 12) & 0xf;
466 mask = (ctl->private_value >> 16) & 0xf;
467 shift = (ctl->private_value >> 20) & 0xf;
468 reg_index = (ctl->private_value >> 24) & 0x1f;
469 invert = (ctl->private_value >> 29) & 0x1;
470
471 if (invert)
472 value = max - (value - min);
473 reg_value = data->wm8776_regs[reg_index];
474 reg_value &= ~(mask << shift);
475 reg_value |= value << shift;
476 wm8776_write_cached(chip, reg_index, reg_value);
477}
478
479static int wm8776_field_set(struct snd_kcontrol *ctl, unsigned int value)
480{
481 struct oxygen *chip = ctl->private_data;
482 u8 min, max;
483 int changed;
484
485 min = (ctl->private_value >> 8) & 0xf;
486 max = (ctl->private_value >> 12) & 0xf;
487 if (value < min || value > max)
488 return -EINVAL;
489 mutex_lock(&chip->mutex);
490 changed = value != (ctl->private_value & 0xf);
491 if (changed) {
492 ctl->private_value = (ctl->private_value & ~0xf) | value;
493 wm8776_field_set_from_ctl(ctl);
494 }
495 mutex_unlock(&chip->mutex);
496 return changed;
497}
498
499static int wm8776_field_enum_get(struct snd_kcontrol *ctl,
500 struct snd_ctl_elem_value *value)
501{
502 value->value.enumerated.item[0] = ctl->private_value & 0xf;
503 return 0;
504}
505
506static int wm8776_field_volume_get(struct snd_kcontrol *ctl,
507 struct snd_ctl_elem_value *value)
508{
509 value->value.integer.value[0] = ctl->private_value & 0xf;
510 return 0;
511}
512
513static int wm8776_field_enum_put(struct snd_kcontrol *ctl,
514 struct snd_ctl_elem_value *value)
515{
516 return wm8776_field_set(ctl, value->value.enumerated.item[0]);
517}
518
519static int wm8776_field_volume_put(struct snd_kcontrol *ctl,
520 struct snd_ctl_elem_value *value)
521{
522 return wm8776_field_set(ctl, value->value.integer.value[0]);
523}
524
525static int wm8776_hp_vol_info(struct snd_kcontrol *ctl,
526 struct snd_ctl_elem_info *info)
527{
528 info->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
529 info->count = 2;
530 info->value.integer.min = 0x79 - 60;
531 info->value.integer.max = 0x7f;
532 return 0;
533}
534
535static int wm8776_hp_vol_get(struct snd_kcontrol *ctl,
536 struct snd_ctl_elem_value *value)
537{
538 struct oxygen *chip = ctl->private_data;
539 struct xonar_wm87x6 *data = chip->model_data;
540
541 mutex_lock(&chip->mutex);
542 value->value.integer.value[0] =
543 data->wm8776_regs[WM8776_HPLVOL] & WM8776_HPATT_MASK;
544 value->value.integer.value[1] =
545 data->wm8776_regs[WM8776_HPRVOL] & WM8776_HPATT_MASK;
546 mutex_unlock(&chip->mutex);
547 return 0;
548}
549
550static int wm8776_hp_vol_put(struct snd_kcontrol *ctl,
551 struct snd_ctl_elem_value *value)
552{
553 struct oxygen *chip = ctl->private_data;
554 struct xonar_wm87x6 *data = chip->model_data;
555 u8 to_update;
556
557 mutex_lock(&chip->mutex);
558 to_update = (value->value.integer.value[0] !=
559 (data->wm8776_regs[WM8776_HPLVOL] & WM8776_HPATT_MASK))
560 << 0;
561 to_update |= (value->value.integer.value[1] !=
562 (data->wm8776_regs[WM8776_HPRVOL] & WM8776_HPATT_MASK))
563 << 1;
564 if (value->value.integer.value[0] == value->value.integer.value[1]) {
565 if (to_update) {
566 wm8776_write(chip, WM8776_HPMASTER,
567 value->value.integer.value[0] |
568 WM8776_HPZCEN | WM8776_UPDATE);
569 data->wm8776_regs[WM8776_HPLVOL] =
570 value->value.integer.value[0] | WM8776_HPZCEN;
571 data->wm8776_regs[WM8776_HPRVOL] =
572 value->value.integer.value[0] | WM8776_HPZCEN;
573 }
574 } else {
575 if (to_update & 1)
576 wm8776_write(chip, WM8776_HPLVOL,
577 value->value.integer.value[0] |
578 WM8776_HPZCEN |
579 ((to_update & 2) ? 0 : WM8776_UPDATE));
580 if (to_update & 2)
581 wm8776_write(chip, WM8776_HPRVOL,
582 value->value.integer.value[1] |
583 WM8776_HPZCEN | WM8776_UPDATE);
584 }
585 mutex_unlock(&chip->mutex);
586 return to_update != 0;
587}
588
589static int wm8776_input_mux_get(struct snd_kcontrol *ctl,
590 struct snd_ctl_elem_value *value)
591{
592 struct oxygen *chip = ctl->private_data;
593 struct xonar_wm87x6 *data = chip->model_data;
594 unsigned int mux_bit = ctl->private_value;
595
596 value->value.integer.value[0] =
597 !!(data->wm8776_regs[WM8776_ADCMUX] & mux_bit);
598 return 0;
599}
600
601static int wm8776_input_mux_put(struct snd_kcontrol *ctl,
602 struct snd_ctl_elem_value *value)
603{
604 struct oxygen *chip = ctl->private_data;
605 struct xonar_wm87x6 *data = chip->model_data;
606 unsigned int mux_bit = ctl->private_value;
607 u16 reg;
608 int changed;
609
610 mutex_lock(&chip->mutex);
611 reg = data->wm8776_regs[WM8776_ADCMUX];
612 if (value->value.integer.value[0]) {
613 reg &= ~0x003;
614 reg |= mux_bit;
615 } else
616 reg &= ~mux_bit;
617 changed = reg != data->wm8776_regs[WM8776_ADCMUX];
618 if (changed) {
619 oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
620 reg & 1 ? GPIO_DS_INPUT_ROUTE : 0,
621 GPIO_DS_INPUT_ROUTE);
622 wm8776_write(chip, WM8776_ADCMUX, reg);
623 }
624 mutex_unlock(&chip->mutex);
625 return changed;
626}
627
628static int wm8776_input_vol_info(struct snd_kcontrol *ctl,
629 struct snd_ctl_elem_info *info)
630{
631 info->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
632 info->count = 2;
633 info->value.integer.min = 0xa5;
634 info->value.integer.max = 0xff;
635 return 0;
636}
637
638static int wm8776_input_vol_get(struct snd_kcontrol *ctl,
639 struct snd_ctl_elem_value *value)
640{
641 struct oxygen *chip = ctl->private_data;
642 struct xonar_wm87x6 *data = chip->model_data;
643
644 mutex_lock(&chip->mutex);
645 value->value.integer.value[0] =
646 data->wm8776_regs[WM8776_ADCLVOL] & WM8776_AGMASK;
647 value->value.integer.value[1] =
648 data->wm8776_regs[WM8776_ADCRVOL] & WM8776_AGMASK;
649 mutex_unlock(&chip->mutex);
650 return 0;
651}
652
653static int wm8776_input_vol_put(struct snd_kcontrol *ctl,
654 struct snd_ctl_elem_value *value)
655{
656 struct oxygen *chip = ctl->private_data;
657 struct xonar_wm87x6 *data = chip->model_data;
658 int changed = 0;
659
660 mutex_lock(&chip->mutex);
661 changed = (value->value.integer.value[0] !=
662 (data->wm8776_regs[WM8776_ADCLVOL] & WM8776_AGMASK)) ||
663 (value->value.integer.value[1] !=
664 (data->wm8776_regs[WM8776_ADCRVOL] & WM8776_AGMASK));
665 wm8776_write_cached(chip, WM8776_ADCLVOL,
666 value->value.integer.value[0] | WM8776_ZCA);
667 wm8776_write_cached(chip, WM8776_ADCRVOL,
668 value->value.integer.value[1] | WM8776_ZCA);
669 mutex_unlock(&chip->mutex);
670 return changed;
671}
672
673static int wm8776_level_control_info(struct snd_kcontrol *ctl,
674 struct snd_ctl_elem_info *info)
675{
676 static const char *const names[3] = {
677 "None", "Peak Limiter", "Automatic Level Control"
678 };
679 info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
680 info->count = 1;
681 info->value.enumerated.items = 3;
682 if (info->value.enumerated.item >= 3)
683 info->value.enumerated.item = 2;
684 strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
685 return 0;
686}
687
688static int wm8776_level_control_get(struct snd_kcontrol *ctl,
689 struct snd_ctl_elem_value *value)
690{
691 struct oxygen *chip = ctl->private_data;
692 struct xonar_wm87x6 *data = chip->model_data;
693
694 if (!(data->wm8776_regs[WM8776_ALCCTRL2] & WM8776_LCEN))
695 value->value.enumerated.item[0] = 0;
696 else if ((data->wm8776_regs[WM8776_ALCCTRL1] & WM8776_LCSEL_MASK) ==
697 WM8776_LCSEL_LIMITER)
698 value->value.enumerated.item[0] = 1;
699 else
700 value->value.enumerated.item[0] = 2;
701 return 0;
702}
703
704static void activate_control(struct oxygen *chip,
705 struct snd_kcontrol *ctl, unsigned int mode)
706{
707 unsigned int access;
708
709 if (ctl->private_value & mode)
710 access = 0;
711 else
712 access = SNDRV_CTL_ELEM_ACCESS_INACTIVE;
713 if ((ctl->vd[0].access & SNDRV_CTL_ELEM_ACCESS_INACTIVE) != access) {
714 ctl->vd[0].access ^= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
715 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
716 }
717}
718
719static int wm8776_level_control_put(struct snd_kcontrol *ctl,
720 struct snd_ctl_elem_value *value)
721{
722 struct oxygen *chip = ctl->private_data;
723 struct xonar_wm87x6 *data = chip->model_data;
724 unsigned int mode = 0, i;
725 u16 ctrl1, ctrl2;
726 int changed;
727
728 if (value->value.enumerated.item[0] >= 3)
729 return -EINVAL;
730 mutex_lock(&chip->mutex);
731 changed = value->value.enumerated.item[0] != ctl->private_value;
732 if (changed) {
733 ctl->private_value = value->value.enumerated.item[0];
734 ctrl1 = data->wm8776_regs[WM8776_ALCCTRL1];
735 ctrl2 = data->wm8776_regs[WM8776_ALCCTRL2];
736 switch (value->value.enumerated.item[0]) {
737 default:
738 wm8776_write_cached(chip, WM8776_ALCCTRL2,
739 ctrl2 & ~WM8776_LCEN);
740 break;
741 case 1:
742 wm8776_write_cached(chip, WM8776_ALCCTRL1,
743 (ctrl1 & ~WM8776_LCSEL_MASK) |
744 WM8776_LCSEL_LIMITER);
745 wm8776_write_cached(chip, WM8776_ALCCTRL2,
746 ctrl2 | WM8776_LCEN);
747 mode = LC_CONTROL_LIMITER;
748 break;
749 case 2:
750 wm8776_write_cached(chip, WM8776_ALCCTRL1,
751 (ctrl1 & ~WM8776_LCSEL_MASK) |
752 WM8776_LCSEL_ALC_STEREO);
753 wm8776_write_cached(chip, WM8776_ALCCTRL2,
754 ctrl2 | WM8776_LCEN);
755 mode = LC_CONTROL_ALC;
756 break;
757 }
758 for (i = 0; i < ARRAY_SIZE(data->lc_controls); ++i)
759 activate_control(chip, data->lc_controls[i], mode);
760 }
761 mutex_unlock(&chip->mutex);
762 return changed;
763}
764
765static int hpf_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info)
766{
767 static const char *const names[2] = {
768 "None", "High-pass Filter"
769 };
770
771 info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
772 info->count = 1;
773 info->value.enumerated.items = 2;
774 if (info->value.enumerated.item >= 2)
775 info->value.enumerated.item = 1;
776 strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
777 return 0;
778}
779
780static int hpf_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
781{
782 struct oxygen *chip = ctl->private_data;
783 struct xonar_wm87x6 *data = chip->model_data;
784
785 value->value.enumerated.item[0] =
786 !(data->wm8776_regs[WM8776_ADCIFCTRL] & WM8776_ADCHPD);
787 return 0;
788}
789
790static int hpf_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
791{
792 struct oxygen *chip = ctl->private_data;
793 struct xonar_wm87x6 *data = chip->model_data;
794 unsigned int reg;
795 int changed;
796
797 mutex_lock(&chip->mutex);
798 reg = data->wm8776_regs[WM8776_ADCIFCTRL] & ~WM8776_ADCHPD;
799 if (!value->value.enumerated.item[0])
800 reg |= WM8776_ADCHPD;
801 changed = reg != data->wm8776_regs[WM8776_ADCIFCTRL];
802 if (changed)
803 wm8776_write(chip, WM8776_ADCIFCTRL, reg);
804 mutex_unlock(&chip->mutex);
805 return changed;
806}
807
808#define WM8776_BIT_SWITCH(xname, reg, bit, invert, flags) { \
809 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
810 .name = xname, \
811 .info = snd_ctl_boolean_mono_info, \
812 .get = wm8776_bit_switch_get, \
813 .put = wm8776_bit_switch_put, \
814 .private_value = ((reg) << 16) | (bit) | ((invert) << 24) | (flags), \
815}
816#define _WM8776_FIELD_CTL(xname, reg, shift, initval, min, max, mask, flags) \
817 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
818 .name = xname, \
819 .private_value = (initval) | ((min) << 8) | ((max) << 12) | \
820 ((mask) << 16) | ((shift) << 20) | ((reg) << 24) | (flags)
821#define WM8776_FIELD_CTL_ENUM(xname, reg, shift, init, min, max, mask, flags) {\
822 _WM8776_FIELD_CTL(xname " Capture Enum", \
823 reg, shift, init, min, max, mask, flags), \
824 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
825 SNDRV_CTL_ELEM_ACCESS_INACTIVE, \
826 .info = wm8776_field_enum_info, \
827 .get = wm8776_field_enum_get, \
828 .put = wm8776_field_enum_put, \
829}
830#define WM8776_FIELD_CTL_VOLUME(a, b, c, d, e, f, g, h, tlv_p) { \
831 _WM8776_FIELD_CTL(a " Capture Volume", b, c, d, e, f, g, h), \
832 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
833 SNDRV_CTL_ELEM_ACCESS_INACTIVE | \
834 SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
835 .info = wm8776_field_volume_info, \
836 .get = wm8776_field_volume_get, \
837 .put = wm8776_field_volume_put, \
838 .tlv = { .p = tlv_p }, \
839}
840
841static const DECLARE_TLV_DB_SCALE(wm87x6_dac_db_scale, -6000, 50, 0);
842static const DECLARE_TLV_DB_SCALE(wm8776_adc_db_scale, -2100, 50, 0);
843static const DECLARE_TLV_DB_SCALE(wm8776_hp_db_scale, -6000, 100, 0);
844static const DECLARE_TLV_DB_SCALE(wm8776_lct_db_scale, -1600, 100, 0);
845static const DECLARE_TLV_DB_SCALE(wm8776_maxgain_db_scale, 0, 400, 0);
846static const DECLARE_TLV_DB_SCALE(wm8776_ngth_db_scale, -7800, 600, 0);
847static const DECLARE_TLV_DB_SCALE(wm8776_maxatten_lim_db_scale, -1200, 100, 0);
848static const DECLARE_TLV_DB_SCALE(wm8776_maxatten_alc_db_scale, -2100, 400, 0);
849
850static const struct snd_kcontrol_new ds_controls[] = {
851 {
852 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
853 .name = "Headphone Playback Volume",
854 .info = wm8776_hp_vol_info,
855 .get = wm8776_hp_vol_get,
856 .put = wm8776_hp_vol_put,
857 .tlv = { .p = wm8776_hp_db_scale },
858 },
859 WM8776_BIT_SWITCH("Headphone Playback Switch",
860 WM8776_PWRDOWN, WM8776_HPPD, 1, 0),
861 {
862 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
863 .name = "Input Capture Volume",
864 .info = wm8776_input_vol_info,
865 .get = wm8776_input_vol_get,
866 .put = wm8776_input_vol_put,
867 .tlv = { .p = wm8776_adc_db_scale },
868 },
869 {
870 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
871 .name = "Line Capture Switch",
872 .info = snd_ctl_boolean_mono_info,
873 .get = wm8776_input_mux_get,
874 .put = wm8776_input_mux_put,
875 .private_value = 1 << 0,
876 },
877 {
878 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
879 .name = "Mic Capture Switch",
880 .info = snd_ctl_boolean_mono_info,
881 .get = wm8776_input_mux_get,
882 .put = wm8776_input_mux_put,
883 .private_value = 1 << 1,
884 },
885 WM8776_BIT_SWITCH("Aux", WM8776_ADCMUX, 1 << 2, 0, 0),
886 {
887 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
888 .name = "ADC Filter Capture Enum",
889 .info = hpf_info,
890 .get = hpf_get,
891 .put = hpf_put,
892 },
893 {
894 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
895 .name = "Level Control Capture Enum",
896 .info = wm8776_level_control_info,
897 .get = wm8776_level_control_get,
898 .put = wm8776_level_control_put,
899 .private_value = 0,
900 },
901};
902static const struct snd_kcontrol_new lc_controls[] = {
903 WM8776_FIELD_CTL_VOLUME("Limiter Threshold",
904 WM8776_ALCCTRL1, 0, 11, 0, 15, 0xf,
905 LC_CONTROL_LIMITER, wm8776_lct_db_scale),
906 WM8776_FIELD_CTL_ENUM("Limiter Attack Time",
907 WM8776_ALCCTRL3, 0, 2, 0, 10, 0xf,
908 LC_CONTROL_LIMITER),
909 WM8776_FIELD_CTL_ENUM("Limiter Decay Time",
910 WM8776_ALCCTRL3, 4, 3, 0, 10, 0xf,
911 LC_CONTROL_LIMITER),
912 WM8776_FIELD_CTL_ENUM("Limiter Transient Window",
913 WM8776_LIMITER, 4, 2, 0, 7, 0x7,
914 LC_CONTROL_LIMITER),
915 WM8776_FIELD_CTL_VOLUME("Limiter Maximum Attenuation",
916 WM8776_LIMITER, 0, 6, 3, 12, 0xf,
917 LC_CONTROL_LIMITER,
918 wm8776_maxatten_lim_db_scale),
919 WM8776_FIELD_CTL_VOLUME("ALC Target Level",
920 WM8776_ALCCTRL1, 0, 11, 0, 15, 0xf,
921 LC_CONTROL_ALC, wm8776_lct_db_scale),
922 WM8776_FIELD_CTL_ENUM("ALC Attack Time",
923 WM8776_ALCCTRL3, 0, 2, 0, 10, 0xf,
924 LC_CONTROL_ALC),
925 WM8776_FIELD_CTL_ENUM("ALC Decay Time",
926 WM8776_ALCCTRL3, 4, 3, 0, 10, 0xf,
927 LC_CONTROL_ALC),
928 WM8776_FIELD_CTL_VOLUME("ALC Maximum Gain",
929 WM8776_ALCCTRL1, 4, 7, 1, 7, 0x7,
930 LC_CONTROL_ALC, wm8776_maxgain_db_scale),
931 WM8776_FIELD_CTL_VOLUME("ALC Maximum Attenuation",
932 WM8776_LIMITER, 0, 10, 10, 15, 0xf,
933 LC_CONTROL_ALC, wm8776_maxatten_alc_db_scale),
934 WM8776_FIELD_CTL_ENUM("ALC Hold Time",
935 WM8776_ALCCTRL2, 0, 0, 0, 15, 0xf,
936 LC_CONTROL_ALC),
937 WM8776_BIT_SWITCH("Noise Gate Capture Switch",
938 WM8776_NOISEGATE, WM8776_NGAT, 0,
939 LC_CONTROL_ALC),
940 WM8776_FIELD_CTL_VOLUME("Noise Gate Threshold",
941 WM8776_NOISEGATE, 2, 0, 0, 7, 0x7,
942 LC_CONTROL_ALC, wm8776_ngth_db_scale),
943};
944
945static int xonar_ds_control_filter(struct snd_kcontrol_new *template)
946{
947 if (!strncmp(template->name, "CD Capture ", 11))
948 return 1; /* no CD input */
949 return 0;
950}
951
952static int xonar_ds_mixer_init(struct oxygen *chip)
953{
954 struct xonar_wm87x6 *data = chip->model_data;
955 unsigned int i;
956 struct snd_kcontrol *ctl;
957 int err;
958
959 for (i = 0; i < ARRAY_SIZE(ds_controls); ++i) {
960 ctl = snd_ctl_new1(&ds_controls[i], chip);
961 if (!ctl)
962 return -ENOMEM;
963 err = snd_ctl_add(chip->card, ctl);
964 if (err < 0)
965 return err;
966 }
967 BUILD_BUG_ON(ARRAY_SIZE(lc_controls) != ARRAY_SIZE(data->lc_controls));
968 for (i = 0; i < ARRAY_SIZE(lc_controls); ++i) {
969 ctl = snd_ctl_new1(&lc_controls[i], chip);
970 if (!ctl)
971 return -ENOMEM;
972 err = snd_ctl_add(chip->card, ctl);
973 if (err < 0)
974 return err;
975 data->lc_controls[i] = ctl;
976 }
977 return 0;
978}
979
980static const struct oxygen_model model_xonar_ds = {
981 .shortname = "Xonar DS",
982 .longname = "Asus Virtuoso 200",
983 .chip = "AV200",
984 .init = xonar_ds_init,
985 .control_filter = xonar_ds_control_filter,
986 .mixer_init = xonar_ds_mixer_init,
987 .cleanup = xonar_ds_cleanup,
988 .suspend = xonar_ds_suspend,
989 .resume = xonar_ds_resume,
990 .pcm_hardware_filter = wm8776_adc_hardware_filter,
991 .get_i2s_mclk = oxygen_default_i2s_mclk,
992 .set_dac_params = set_wm87x6_dac_params,
993 .set_adc_params = set_wm8776_adc_params,
994 .update_dac_volume = update_wm87x6_volume,
995 .update_dac_mute = update_wm87x6_mute,
996 .gpio_changed = xonar_ds_gpio_changed,
997 .dac_tlv = wm87x6_dac_db_scale,
998 .model_data_size = sizeof(struct xonar_wm87x6),
999 .device_config = PLAYBACK_0_TO_I2S |
1000 PLAYBACK_1_TO_SPDIF |
1001 CAPTURE_0_FROM_I2S_1,
1002 .dac_channels = 8,
1003 .dac_volume_min = 255 - 2*60,
1004 .dac_volume_max = 255,
1005 .function_flags = OXYGEN_FUNCTION_SPI,
1006 .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
1007 .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
1008};
1009
1010int __devinit get_xonar_wm87x6_model(struct oxygen *chip,
1011 const struct pci_device_id *id)
1012{
1013 switch (id->subdevice) {
1014 case 0x838e:
1015 chip->model = model_xonar_ds;
1016 break;
1017 default:
1018 return -EINVAL;
1019 }
1020 return 0;
1021}
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-15 17:06:27 -0400