diff options
Diffstat (limited to 'sound/pci/hda/hda_intel.c')
-rw-r--r-- | sound/pci/hda/hda_intel.c | 185 |
1 files changed, 122 insertions, 63 deletions
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index 6517f589d01d..cec68152dcb1 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c | |||
@@ -60,10 +60,14 @@ static int bdl_pos_adj[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1}; | |||
60 | static int probe_mask[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1}; | 60 | static int probe_mask[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1}; |
61 | static int probe_only[SNDRV_CARDS]; | 61 | static int probe_only[SNDRV_CARDS]; |
62 | static int single_cmd; | 62 | static int single_cmd; |
63 | static int enable_msi; | 63 | static int enable_msi = -1; |
64 | #ifdef CONFIG_SND_HDA_PATCH_LOADER | 64 | #ifdef CONFIG_SND_HDA_PATCH_LOADER |
65 | static char *patch[SNDRV_CARDS]; | 65 | static char *patch[SNDRV_CARDS]; |
66 | #endif | 66 | #endif |
67 | #ifdef CONFIG_SND_HDA_INPUT_BEEP | ||
68 | static int beep_mode[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = | ||
69 | CONFIG_SND_HDA_INPUT_BEEP_MODE}; | ||
70 | #endif | ||
67 | 71 | ||
68 | module_param_array(index, int, NULL, 0444); | 72 | module_param_array(index, int, NULL, 0444); |
69 | MODULE_PARM_DESC(index, "Index value for Intel HD audio interface."); | 73 | MODULE_PARM_DESC(index, "Index value for Intel HD audio interface."); |
@@ -91,6 +95,11 @@ MODULE_PARM_DESC(enable_msi, "Enable Message Signaled Interrupt (MSI)"); | |||
91 | module_param_array(patch, charp, NULL, 0444); | 95 | module_param_array(patch, charp, NULL, 0444); |
92 | MODULE_PARM_DESC(patch, "Patch file for Intel HD audio interface."); | 96 | MODULE_PARM_DESC(patch, "Patch file for Intel HD audio interface."); |
93 | #endif | 97 | #endif |
98 | #ifdef CONFIG_SND_HDA_INPUT_BEEP | ||
99 | module_param_array(beep_mode, int, NULL, 0444); | ||
100 | MODULE_PARM_DESC(beep_mode, "Select HDA Beep registration mode " | ||
101 | "(0=off, 1=on, 2=mute switch on/off) (default=1)."); | ||
102 | #endif | ||
94 | 103 | ||
95 | #ifdef CONFIG_SND_HDA_POWER_SAVE | 104 | #ifdef CONFIG_SND_HDA_POWER_SAVE |
96 | static int power_save = CONFIG_SND_HDA_POWER_SAVE_DEFAULT; | 105 | static int power_save = CONFIG_SND_HDA_POWER_SAVE_DEFAULT; |
@@ -116,6 +125,7 @@ MODULE_SUPPORTED_DEVICE("{{Intel, ICH6}," | |||
116 | "{Intel, ICH9}," | 125 | "{Intel, ICH9}," |
117 | "{Intel, ICH10}," | 126 | "{Intel, ICH10}," |
118 | "{Intel, PCH}," | 127 | "{Intel, PCH}," |
128 | "{Intel, CPT}," | ||
119 | "{Intel, SCH}," | 129 | "{Intel, SCH}," |
120 | "{ATI, SB450}," | 130 | "{ATI, SB450}," |
121 | "{ATI, SB600}," | 131 | "{ATI, SB600}," |
@@ -250,8 +260,6 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 }; | |||
250 | #define AZX_MAX_FRAG 32 | 260 | #define AZX_MAX_FRAG 32 |
251 | /* max buffer size - no h/w limit, you can increase as you like */ | 261 | /* max buffer size - no h/w limit, you can increase as you like */ |
252 | #define AZX_MAX_BUF_SIZE (1024*1024*1024) | 262 | #define AZX_MAX_BUF_SIZE (1024*1024*1024) |
253 | /* max number of PCM devics per card */ | ||
254 | #define AZX_MAX_PCMS 8 | ||
255 | 263 | ||
256 | /* RIRB int mask: overrun[2], response[0] */ | 264 | /* RIRB int mask: overrun[2], response[0] */ |
257 | #define RIRB_INT_RESPONSE 0x01 | 265 | #define RIRB_INT_RESPONSE 0x01 |
@@ -259,7 +267,8 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 }; | |||
259 | #define RIRB_INT_MASK 0x05 | 267 | #define RIRB_INT_MASK 0x05 |
260 | 268 | ||
261 | /* STATESTS int mask: S3,SD2,SD1,SD0 */ | 269 | /* STATESTS int mask: S3,SD2,SD1,SD0 */ |
262 | #define AZX_MAX_CODECS 4 | 270 | #define AZX_MAX_CODECS 8 |
271 | #define AZX_DEFAULT_CODECS 4 | ||
263 | #define STATESTS_INT_MASK ((1 << AZX_MAX_CODECS) - 1) | 272 | #define STATESTS_INT_MASK ((1 << AZX_MAX_CODECS) - 1) |
264 | 273 | ||
265 | /* SD_CTL bits */ | 274 | /* SD_CTL bits */ |
@@ -347,6 +356,7 @@ struct azx_dev { | |||
347 | */ | 356 | */ |
348 | unsigned char stream_tag; /* assigned stream */ | 357 | unsigned char stream_tag; /* assigned stream */ |
349 | unsigned char index; /* stream index */ | 358 | unsigned char index; /* stream index */ |
359 | int device; /* last device number assigned to */ | ||
350 | 360 | ||
351 | unsigned int opened :1; | 361 | unsigned int opened :1; |
352 | unsigned int running :1; | 362 | unsigned int running :1; |
@@ -398,12 +408,13 @@ struct azx { | |||
398 | struct azx_dev *azx_dev; | 408 | struct azx_dev *azx_dev; |
399 | 409 | ||
400 | /* PCM */ | 410 | /* PCM */ |
401 | struct snd_pcm *pcm[AZX_MAX_PCMS]; | 411 | struct snd_pcm *pcm[HDA_MAX_PCMS]; |
402 | 412 | ||
403 | /* HD codec */ | 413 | /* HD codec */ |
404 | unsigned short codec_mask; | 414 | unsigned short codec_mask; |
405 | int codec_probe_mask; /* copied from probe_mask option */ | 415 | int codec_probe_mask; /* copied from probe_mask option */ |
406 | struct hda_bus *bus; | 416 | struct hda_bus *bus; |
417 | unsigned int beep_mode; | ||
407 | 418 | ||
408 | /* CORB/RIRB */ | 419 | /* CORB/RIRB */ |
409 | struct azx_rb corb; | 420 | struct azx_rb corb; |
@@ -415,6 +426,7 @@ struct azx { | |||
415 | 426 | ||
416 | /* flags */ | 427 | /* flags */ |
417 | int position_fix; | 428 | int position_fix; |
429 | int poll_count; | ||
418 | unsigned int running :1; | 430 | unsigned int running :1; |
419 | unsigned int initialized :1; | 431 | unsigned int initialized :1; |
420 | unsigned int single_cmd :1; | 432 | unsigned int single_cmd :1; |
@@ -437,6 +449,7 @@ struct azx { | |||
437 | /* driver types */ | 449 | /* driver types */ |
438 | enum { | 450 | enum { |
439 | AZX_DRIVER_ICH, | 451 | AZX_DRIVER_ICH, |
452 | AZX_DRIVER_PCH, | ||
440 | AZX_DRIVER_SCH, | 453 | AZX_DRIVER_SCH, |
441 | AZX_DRIVER_ATI, | 454 | AZX_DRIVER_ATI, |
442 | AZX_DRIVER_ATIHDMI, | 455 | AZX_DRIVER_ATIHDMI, |
@@ -451,6 +464,7 @@ enum { | |||
451 | 464 | ||
452 | static char *driver_short_names[] __devinitdata = { | 465 | static char *driver_short_names[] __devinitdata = { |
453 | [AZX_DRIVER_ICH] = "HDA Intel", | 466 | [AZX_DRIVER_ICH] = "HDA Intel", |
467 | [AZX_DRIVER_PCH] = "HDA Intel PCH", | ||
454 | [AZX_DRIVER_SCH] = "HDA Intel MID", | 468 | [AZX_DRIVER_SCH] = "HDA Intel MID", |
455 | [AZX_DRIVER_ATI] = "HDA ATI SB", | 469 | [AZX_DRIVER_ATI] = "HDA ATI SB", |
456 | [AZX_DRIVER_ATIHDMI] = "HDA ATI HDMI", | 470 | [AZX_DRIVER_ATIHDMI] = "HDA ATI HDMI", |
@@ -495,7 +509,7 @@ static char *driver_short_names[] __devinitdata = { | |||
495 | #define get_azx_dev(substream) (substream->runtime->private_data) | 509 | #define get_azx_dev(substream) (substream->runtime->private_data) |
496 | 510 | ||
497 | static int azx_acquire_irq(struct azx *chip, int do_disconnect); | 511 | static int azx_acquire_irq(struct azx *chip, int do_disconnect); |
498 | 512 | static int azx_send_cmd(struct hda_bus *bus, unsigned int val); | |
499 | /* | 513 | /* |
500 | * Interface for HD codec | 514 | * Interface for HD codec |
501 | */ | 515 | */ |
@@ -653,11 +667,12 @@ static unsigned int azx_rirb_get_response(struct hda_bus *bus, | |||
653 | { | 667 | { |
654 | struct azx *chip = bus->private_data; | 668 | struct azx *chip = bus->private_data; |
655 | unsigned long timeout; | 669 | unsigned long timeout; |
670 | int do_poll = 0; | ||
656 | 671 | ||
657 | again: | 672 | again: |
658 | timeout = jiffies + msecs_to_jiffies(1000); | 673 | timeout = jiffies + msecs_to_jiffies(1000); |
659 | for (;;) { | 674 | for (;;) { |
660 | if (chip->polling_mode) { | 675 | if (chip->polling_mode || do_poll) { |
661 | spin_lock_irq(&chip->reg_lock); | 676 | spin_lock_irq(&chip->reg_lock); |
662 | azx_update_rirb(chip); | 677 | azx_update_rirb(chip); |
663 | spin_unlock_irq(&chip->reg_lock); | 678 | spin_unlock_irq(&chip->reg_lock); |
@@ -665,6 +680,9 @@ static unsigned int azx_rirb_get_response(struct hda_bus *bus, | |||
665 | if (!chip->rirb.cmds[addr]) { | 680 | if (!chip->rirb.cmds[addr]) { |
666 | smp_rmb(); | 681 | smp_rmb(); |
667 | bus->rirb_error = 0; | 682 | bus->rirb_error = 0; |
683 | |||
684 | if (!do_poll) | ||
685 | chip->poll_count = 0; | ||
668 | return chip->rirb.res[addr]; /* the last value */ | 686 | return chip->rirb.res[addr]; /* the last value */ |
669 | } | 687 | } |
670 | if (time_after(jiffies, timeout)) | 688 | if (time_after(jiffies, timeout)) |
@@ -677,6 +695,24 @@ static unsigned int azx_rirb_get_response(struct hda_bus *bus, | |||
677 | } | 695 | } |
678 | } | 696 | } |
679 | 697 | ||
698 | if (!chip->polling_mode && chip->poll_count < 2) { | ||
699 | snd_printdd(SFX "azx_get_response timeout, " | ||
700 | "polling the codec once: last cmd=0x%08x\n", | ||
701 | chip->last_cmd[addr]); | ||
702 | do_poll = 1; | ||
703 | chip->poll_count++; | ||
704 | goto again; | ||
705 | } | ||
706 | |||
707 | |||
708 | if (!chip->polling_mode) { | ||
709 | snd_printk(KERN_WARNING SFX "azx_get_response timeout, " | ||
710 | "switching to polling mode: last cmd=0x%08x\n", | ||
711 | chip->last_cmd[addr]); | ||
712 | chip->polling_mode = 1; | ||
713 | goto again; | ||
714 | } | ||
715 | |||
680 | if (chip->msi) { | 716 | if (chip->msi) { |
681 | snd_printk(KERN_WARNING SFX "No response from codec, " | 717 | snd_printk(KERN_WARNING SFX "No response from codec, " |
682 | "disabling MSI: last cmd=0x%08x\n", | 718 | "disabling MSI: last cmd=0x%08x\n", |
@@ -692,14 +728,6 @@ static unsigned int azx_rirb_get_response(struct hda_bus *bus, | |||
692 | goto again; | 728 | goto again; |
693 | } | 729 | } |
694 | 730 | ||
695 | if (!chip->polling_mode) { | ||
696 | snd_printk(KERN_WARNING SFX "azx_get_response timeout, " | ||
697 | "switching to polling mode: last cmd=0x%08x\n", | ||
698 | chip->last_cmd[addr]); | ||
699 | chip->polling_mode = 1; | ||
700 | goto again; | ||
701 | } | ||
702 | |||
703 | if (chip->probing) { | 731 | if (chip->probing) { |
704 | /* If this critical timeout happens during the codec probing | 732 | /* If this critical timeout happens during the codec probing |
705 | * phase, this is likely an access to a non-existing codec | 733 | * phase, this is likely an access to a non-existing codec |
@@ -942,8 +970,8 @@ static void azx_stream_start(struct azx *chip, struct azx_dev *azx_dev) | |||
942 | azx_dev->insufficient = 1; | 970 | azx_dev->insufficient = 1; |
943 | 971 | ||
944 | /* enable SIE */ | 972 | /* enable SIE */ |
945 | azx_writeb(chip, INTCTL, | 973 | azx_writel(chip, INTCTL, |
946 | azx_readb(chip, INTCTL) | (1 << azx_dev->index)); | 974 | azx_readl(chip, INTCTL) | (1 << azx_dev->index)); |
947 | /* set DMA start and interrupt mask */ | 975 | /* set DMA start and interrupt mask */ |
948 | azx_sd_writeb(azx_dev, SD_CTL, azx_sd_readb(azx_dev, SD_CTL) | | 976 | azx_sd_writeb(azx_dev, SD_CTL, azx_sd_readb(azx_dev, SD_CTL) | |
949 | SD_CTL_DMA_START | SD_INT_MASK); | 977 | SD_CTL_DMA_START | SD_INT_MASK); |
@@ -962,8 +990,8 @@ static void azx_stream_stop(struct azx *chip, struct azx_dev *azx_dev) | |||
962 | { | 990 | { |
963 | azx_stream_clear(chip, azx_dev); | 991 | azx_stream_clear(chip, azx_dev); |
964 | /* disable SIE */ | 992 | /* disable SIE */ |
965 | azx_writeb(chip, INTCTL, | 993 | azx_writel(chip, INTCTL, |
966 | azx_readb(chip, INTCTL) & ~(1 << azx_dev->index)); | 994 | azx_readl(chip, INTCTL) & ~(1 << azx_dev->index)); |
967 | } | 995 | } |
968 | 996 | ||
969 | 997 | ||
@@ -1039,6 +1067,7 @@ static void azx_init_pci(struct azx *chip) | |||
1039 | 0x01, NVIDIA_HDA_ENABLE_COHBIT); | 1067 | 0x01, NVIDIA_HDA_ENABLE_COHBIT); |
1040 | break; | 1068 | break; |
1041 | case AZX_DRIVER_SCH: | 1069 | case AZX_DRIVER_SCH: |
1070 | case AZX_DRIVER_PCH: | ||
1042 | pci_read_config_word(chip->pci, INTEL_SCH_HDA_DEVC, &snoop); | 1071 | pci_read_config_word(chip->pci, INTEL_SCH_HDA_DEVC, &snoop); |
1043 | if (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP) { | 1072 | if (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP) { |
1044 | pci_write_config_word(chip->pci, INTEL_SCH_HDA_DEVC, | 1073 | pci_write_config_word(chip->pci, INTEL_SCH_HDA_DEVC, |
@@ -1324,7 +1353,7 @@ static void azx_bus_reset(struct hda_bus *bus) | |||
1324 | if (chip->initialized) { | 1353 | if (chip->initialized) { |
1325 | int i; | 1354 | int i; |
1326 | 1355 | ||
1327 | for (i = 0; i < AZX_MAX_PCMS; i++) | 1356 | for (i = 0; i < HDA_MAX_PCMS; i++) |
1328 | snd_pcm_suspend_all(chip->pcm[i]); | 1357 | snd_pcm_suspend_all(chip->pcm[i]); |
1329 | snd_hda_suspend(chip->bus); | 1358 | snd_hda_suspend(chip->bus); |
1330 | snd_hda_resume(chip->bus); | 1359 | snd_hda_resume(chip->bus); |
@@ -1339,6 +1368,7 @@ static void azx_bus_reset(struct hda_bus *bus) | |||
1339 | 1368 | ||
1340 | /* number of codec slots for each chipset: 0 = default slots (i.e. 4) */ | 1369 | /* number of codec slots for each chipset: 0 = default slots (i.e. 4) */ |
1341 | static unsigned int azx_max_codecs[AZX_NUM_DRIVERS] __devinitdata = { | 1370 | static unsigned int azx_max_codecs[AZX_NUM_DRIVERS] __devinitdata = { |
1371 | [AZX_DRIVER_NVIDIA] = 8, | ||
1342 | [AZX_DRIVER_TERA] = 1, | 1372 | [AZX_DRIVER_TERA] = 1, |
1343 | }; | 1373 | }; |
1344 | 1374 | ||
@@ -1371,7 +1401,7 @@ static int __devinit azx_codec_create(struct azx *chip, const char *model) | |||
1371 | codecs = 0; | 1401 | codecs = 0; |
1372 | max_slots = azx_max_codecs[chip->driver_type]; | 1402 | max_slots = azx_max_codecs[chip->driver_type]; |
1373 | if (!max_slots) | 1403 | if (!max_slots) |
1374 | max_slots = AZX_MAX_CODECS; | 1404 | max_slots = AZX_DEFAULT_CODECS; |
1375 | 1405 | ||
1376 | /* First try to probe all given codec slots */ | 1406 | /* First try to probe all given codec slots */ |
1377 | for (c = 0; c < max_slots; c++) { | 1407 | for (c = 0; c < max_slots; c++) { |
@@ -1386,7 +1416,7 @@ static int __devinit azx_codec_create(struct azx *chip, const char *model) | |||
1386 | chip->codec_mask &= ~(1 << c); | 1416 | chip->codec_mask &= ~(1 << c); |
1387 | /* More badly, accessing to a non-existing | 1417 | /* More badly, accessing to a non-existing |
1388 | * codec often screws up the controller chip, | 1418 | * codec often screws up the controller chip, |
1389 | * and distrubs the further communications. | 1419 | * and disturbs the further communications. |
1390 | * Thus if an error occurs during probing, | 1420 | * Thus if an error occurs during probing, |
1391 | * better to reset the controller chip to | 1421 | * better to reset the controller chip to |
1392 | * get back to the sanity state. | 1422 | * get back to the sanity state. |
@@ -1404,6 +1434,7 @@ static int __devinit azx_codec_create(struct azx *chip, const char *model) | |||
1404 | err = snd_hda_codec_new(chip->bus, c, &codec); | 1434 | err = snd_hda_codec_new(chip->bus, c, &codec); |
1405 | if (err < 0) | 1435 | if (err < 0) |
1406 | continue; | 1436 | continue; |
1437 | codec->beep_mode = chip->beep_mode; | ||
1407 | codecs++; | 1438 | codecs++; |
1408 | } | 1439 | } |
1409 | } | 1440 | } |
@@ -1430,10 +1461,13 @@ static int __devinit azx_codec_configure(struct azx *chip) | |||
1430 | */ | 1461 | */ |
1431 | 1462 | ||
1432 | /* assign a stream for the PCM */ | 1463 | /* assign a stream for the PCM */ |
1433 | static inline struct azx_dev *azx_assign_device(struct azx *chip, int stream) | 1464 | static inline struct azx_dev * |
1465 | azx_assign_device(struct azx *chip, struct snd_pcm_substream *substream) | ||
1434 | { | 1466 | { |
1435 | int dev, i, nums; | 1467 | int dev, i, nums; |
1436 | if (stream == SNDRV_PCM_STREAM_PLAYBACK) { | 1468 | struct azx_dev *res = NULL; |
1469 | |||
1470 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { | ||
1437 | dev = chip->playback_index_offset; | 1471 | dev = chip->playback_index_offset; |
1438 | nums = chip->playback_streams; | 1472 | nums = chip->playback_streams; |
1439 | } else { | 1473 | } else { |
@@ -1442,10 +1476,15 @@ static inline struct azx_dev *azx_assign_device(struct azx *chip, int stream) | |||
1442 | } | 1476 | } |
1443 | for (i = 0; i < nums; i++, dev++) | 1477 | for (i = 0; i < nums; i++, dev++) |
1444 | if (!chip->azx_dev[dev].opened) { | 1478 | if (!chip->azx_dev[dev].opened) { |
1445 | chip->azx_dev[dev].opened = 1; | 1479 | res = &chip->azx_dev[dev]; |
1446 | return &chip->azx_dev[dev]; | 1480 | if (res->device == substream->pcm->device) |
1481 | break; | ||
1447 | } | 1482 | } |
1448 | return NULL; | 1483 | if (res) { |
1484 | res->opened = 1; | ||
1485 | res->device = substream->pcm->device; | ||
1486 | } | ||
1487 | return res; | ||
1449 | } | 1488 | } |
1450 | 1489 | ||
1451 | /* release the assigned stream */ | 1490 | /* release the assigned stream */ |
@@ -1494,7 +1533,7 @@ static int azx_pcm_open(struct snd_pcm_substream *substream) | |||
1494 | int err; | 1533 | int err; |
1495 | 1534 | ||
1496 | mutex_lock(&chip->open_mutex); | 1535 | mutex_lock(&chip->open_mutex); |
1497 | azx_dev = azx_assign_device(chip, substream->stream); | 1536 | azx_dev = azx_assign_device(chip, substream); |
1498 | if (azx_dev == NULL) { | 1537 | if (azx_dev == NULL) { |
1499 | mutex_unlock(&chip->open_mutex); | 1538 | mutex_unlock(&chip->open_mutex); |
1500 | return -EBUSY; | 1539 | return -EBUSY; |
@@ -1858,6 +1897,9 @@ static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev) | |||
1858 | 1897 | ||
1859 | if (!bdl_pos_adj[chip->dev_index]) | 1898 | if (!bdl_pos_adj[chip->dev_index]) |
1860 | return 1; /* no delayed ack */ | 1899 | return 1; /* no delayed ack */ |
1900 | if (WARN_ONCE(!azx_dev->period_bytes, | ||
1901 | "hda-intel: zero azx_dev->period_bytes")) | ||
1902 | return 0; /* this shouldn't happen! */ | ||
1861 | if (pos % azx_dev->period_bytes > azx_dev->period_bytes / 2) | 1903 | if (pos % azx_dev->period_bytes > azx_dev->period_bytes / 2) |
1862 | return 0; /* NG - it's below the period boundary */ | 1904 | return 0; /* NG - it's below the period boundary */ |
1863 | return 1; /* OK, it's fine */ | 1905 | return 1; /* OK, it's fine */ |
@@ -1945,7 +1987,7 @@ azx_attach_pcm_stream(struct hda_bus *bus, struct hda_codec *codec, | |||
1945 | int pcm_dev = cpcm->device; | 1987 | int pcm_dev = cpcm->device; |
1946 | int s, err; | 1988 | int s, err; |
1947 | 1989 | ||
1948 | if (pcm_dev >= AZX_MAX_PCMS) { | 1990 | if (pcm_dev >= HDA_MAX_PCMS) { |
1949 | snd_printk(KERN_ERR SFX "Invalid PCM device number %d\n", | 1991 | snd_printk(KERN_ERR SFX "Invalid PCM device number %d\n", |
1950 | pcm_dev); | 1992 | pcm_dev); |
1951 | return -EINVAL; | 1993 | return -EINVAL; |
@@ -2023,7 +2065,7 @@ static int azx_acquire_irq(struct azx *chip, int do_disconnect) | |||
2023 | { | 2065 | { |
2024 | if (request_irq(chip->pci->irq, azx_interrupt, | 2066 | if (request_irq(chip->pci->irq, azx_interrupt, |
2025 | chip->msi ? 0 : IRQF_SHARED, | 2067 | chip->msi ? 0 : IRQF_SHARED, |
2026 | "HDA Intel", chip)) { | 2068 | "hda_intel", chip)) { |
2027 | printk(KERN_ERR "hda-intel: unable to grab IRQ %d, " | 2069 | printk(KERN_ERR "hda-intel: unable to grab IRQ %d, " |
2028 | "disabling device\n", chip->pci->irq); | 2070 | "disabling device\n", chip->pci->irq); |
2029 | if (do_disconnect) | 2071 | if (do_disconnect) |
@@ -2071,7 +2113,8 @@ static void azx_power_notify(struct hda_bus *bus) | |||
2071 | } | 2113 | } |
2072 | if (power_on) | 2114 | if (power_on) |
2073 | azx_init_chip(chip); | 2115 | azx_init_chip(chip); |
2074 | else if (chip->running && power_save_controller) | 2116 | else if (chip->running && power_save_controller && |
2117 | !bus->power_keep_link_on) | ||
2075 | azx_stop_chip(chip); | 2118 | azx_stop_chip(chip); |
2076 | } | 2119 | } |
2077 | #endif /* CONFIG_SND_HDA_POWER_SAVE */ | 2120 | #endif /* CONFIG_SND_HDA_POWER_SAVE */ |
@@ -2100,7 +2143,7 @@ static int azx_suspend(struct pci_dev *pci, pm_message_t state) | |||
2100 | 2143 | ||
2101 | snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); | 2144 | snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); |
2102 | azx_clear_irq_pending(chip); | 2145 | azx_clear_irq_pending(chip); |
2103 | for (i = 0; i < AZX_MAX_PCMS; i++) | 2146 | for (i = 0; i < HDA_MAX_PCMS; i++) |
2104 | snd_pcm_suspend_all(chip->pcm[i]); | 2147 | snd_pcm_suspend_all(chip->pcm[i]); |
2105 | if (chip->initialized) | 2148 | if (chip->initialized) |
2106 | snd_hda_suspend(chip->bus); | 2149 | snd_hda_suspend(chip->bus); |
@@ -2154,6 +2197,7 @@ static int azx_resume(struct pci_dev *pci) | |||
2154 | static int azx_halt(struct notifier_block *nb, unsigned long event, void *buf) | 2197 | static int azx_halt(struct notifier_block *nb, unsigned long event, void *buf) |
2155 | { | 2198 | { |
2156 | struct azx *chip = container_of(nb, struct azx, reboot_notifier); | 2199 | struct azx *chip = container_of(nb, struct azx, reboot_notifier); |
2200 | snd_hda_bus_reboot_notify(chip->bus); | ||
2157 | azx_stop_chip(chip); | 2201 | azx_stop_chip(chip); |
2158 | return NOTIFY_OK; | 2202 | return NOTIFY_OK; |
2159 | } | 2203 | } |
@@ -2221,7 +2265,16 @@ static int azx_dev_free(struct snd_device *device) | |||
2221 | static struct snd_pci_quirk position_fix_list[] __devinitdata = { | 2265 | static struct snd_pci_quirk position_fix_list[] __devinitdata = { |
2222 | SND_PCI_QUIRK(0x1028, 0x01cc, "Dell D820", POS_FIX_LPIB), | 2266 | SND_PCI_QUIRK(0x1028, 0x01cc, "Dell D820", POS_FIX_LPIB), |
2223 | SND_PCI_QUIRK(0x1028, 0x01de, "Dell Precision 390", POS_FIX_LPIB), | 2267 | SND_PCI_QUIRK(0x1028, 0x01de, "Dell Precision 390", POS_FIX_LPIB), |
2268 | SND_PCI_QUIRK(0x1028, 0x01f6, "Dell Latitude 131L", POS_FIX_LPIB), | ||
2269 | SND_PCI_QUIRK(0x103c, 0x306d, "HP dv3", POS_FIX_LPIB), | ||
2270 | SND_PCI_QUIRK(0x1106, 0x3288, "ASUS M2V-MX SE", POS_FIX_LPIB), | ||
2224 | SND_PCI_QUIRK(0x1043, 0x813d, "ASUS P5AD2", POS_FIX_LPIB), | 2271 | SND_PCI_QUIRK(0x1043, 0x813d, "ASUS P5AD2", POS_FIX_LPIB), |
2272 | SND_PCI_QUIRK(0x1458, 0xa022, "ga-ma770-ud3", POS_FIX_LPIB), | ||
2273 | SND_PCI_QUIRK(0x1462, 0x1002, "MSI Wind U115", POS_FIX_LPIB), | ||
2274 | SND_PCI_QUIRK(0x1565, 0x820f, "Biostar Microtech", POS_FIX_LPIB), | ||
2275 | SND_PCI_QUIRK(0x1565, 0x8218, "Biostar Microtech", POS_FIX_LPIB), | ||
2276 | SND_PCI_QUIRK(0x8086, 0x2503, "DG965OT AAD63733-203", POS_FIX_LPIB), | ||
2277 | SND_PCI_QUIRK(0x8086, 0xd601, "eMachines T5212", POS_FIX_LPIB), | ||
2225 | {} | 2278 | {} |
2226 | }; | 2279 | }; |
2227 | 2280 | ||
@@ -2304,11 +2357,14 @@ static void __devinit check_probe_mask(struct azx *chip, int dev) | |||
2304 | } | 2357 | } |
2305 | 2358 | ||
2306 | /* | 2359 | /* |
2307 | * white-list for enable_msi | 2360 | * white/black-list for enable_msi |
2308 | */ | 2361 | */ |
2309 | static struct snd_pci_quirk msi_white_list[] __devinitdata = { | 2362 | static struct snd_pci_quirk msi_black_list[] __devinitdata = { |
2310 | SND_PCI_QUIRK(0x103c, 0x30f7, "HP Pavilion dv4t-1300", 1), | 2363 | SND_PCI_QUIRK(0x1043, 0x81f2, "ASUS", 0), /* Athlon64 X2 + nvidia */ |
2311 | SND_PCI_QUIRK(0x103c, 0x3607, "HP Compa CQ40", 1), | 2364 | SND_PCI_QUIRK(0x1043, 0x81f6, "ASUS", 0), /* nvidia */ |
2365 | SND_PCI_QUIRK(0x1043, 0x822d, "ASUS", 0), /* Athlon64 X2 + nvidia MCP55 */ | ||
2366 | SND_PCI_QUIRK(0x1849, 0x0888, "ASRock", 0), /* Athlon64 X2 + nvidia */ | ||
2367 | SND_PCI_QUIRK(0xa0a0, 0x0575, "Aopen MZ915-M", 0), /* ICH6 */ | ||
2312 | {} | 2368 | {} |
2313 | }; | 2369 | }; |
2314 | 2370 | ||
@@ -2316,15 +2372,24 @@ static void __devinit check_msi(struct azx *chip) | |||
2316 | { | 2372 | { |
2317 | const struct snd_pci_quirk *q; | 2373 | const struct snd_pci_quirk *q; |
2318 | 2374 | ||
2319 | chip->msi = enable_msi; | 2375 | if (enable_msi >= 0) { |
2320 | if (chip->msi) | 2376 | chip->msi = !!enable_msi; |
2321 | return; | 2377 | return; |
2322 | q = snd_pci_quirk_lookup(chip->pci, msi_white_list); | 2378 | } |
2379 | chip->msi = 1; /* enable MSI as default */ | ||
2380 | q = snd_pci_quirk_lookup(chip->pci, msi_black_list); | ||
2323 | if (q) { | 2381 | if (q) { |
2324 | printk(KERN_INFO | 2382 | printk(KERN_INFO |
2325 | "hda_intel: msi for device %04x:%04x set to %d\n", | 2383 | "hda_intel: msi for device %04x:%04x set to %d\n", |
2326 | q->subvendor, q->subdevice, q->value); | 2384 | q->subvendor, q->subdevice, q->value); |
2327 | chip->msi = q->value; | 2385 | chip->msi = q->value; |
2386 | return; | ||
2387 | } | ||
2388 | |||
2389 | /* NVidia chipsets seem to cause troubles with MSI */ | ||
2390 | if (chip->driver_type == AZX_DRIVER_NVIDIA) { | ||
2391 | printk(KERN_INFO "hda_intel: Disable MSI for Nvidia chipset\n"); | ||
2392 | chip->msi = 0; | ||
2328 | } | 2393 | } |
2329 | } | 2394 | } |
2330 | 2395 | ||
@@ -2374,6 +2439,7 @@ static int __devinit azx_create(struct snd_card *card, struct pci_dev *pci, | |||
2374 | if (bdl_pos_adj[dev] < 0) { | 2439 | if (bdl_pos_adj[dev] < 0) { |
2375 | switch (chip->driver_type) { | 2440 | switch (chip->driver_type) { |
2376 | case AZX_DRIVER_ICH: | 2441 | case AZX_DRIVER_ICH: |
2442 | case AZX_DRIVER_PCH: | ||
2377 | bdl_pos_adj[dev] = 1; | 2443 | bdl_pos_adj[dev] = 1; |
2378 | break; | 2444 | break; |
2379 | default: | 2445 | default: |
@@ -2436,6 +2502,11 @@ static int __devinit azx_create(struct snd_card *card, struct pci_dev *pci, | |||
2436 | } | 2502 | } |
2437 | } | 2503 | } |
2438 | 2504 | ||
2505 | /* disable 64bit DMA address for Teradici */ | ||
2506 | /* it does not work with device 6549:1200 subsys e4a2:040b */ | ||
2507 | if (chip->driver_type == AZX_DRIVER_TERA) | ||
2508 | gcap &= ~ICH6_GCAP_64OK; | ||
2509 | |||
2439 | /* allow 64bit DMA address if supported by H/W */ | 2510 | /* allow 64bit DMA address if supported by H/W */ |
2440 | if ((gcap & ICH6_GCAP_64OK) && !pci_set_dma_mask(pci, DMA_BIT_MASK(64))) | 2511 | if ((gcap & ICH6_GCAP_64OK) && !pci_set_dma_mask(pci, DMA_BIT_MASK(64))) |
2441 | pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(64)); | 2512 | pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(64)); |
@@ -2578,6 +2649,10 @@ static int __devinit azx_probe(struct pci_dev *pci, | |||
2578 | goto out_free; | 2649 | goto out_free; |
2579 | card->private_data = chip; | 2650 | card->private_data = chip; |
2580 | 2651 | ||
2652 | #ifdef CONFIG_SND_HDA_INPUT_BEEP | ||
2653 | chip->beep_mode = beep_mode[dev]; | ||
2654 | #endif | ||
2655 | |||
2581 | /* create codec instances */ | 2656 | /* create codec instances */ |
2582 | err = azx_codec_create(chip, model[dev]); | 2657 | err = azx_codec_create(chip, model[dev]); |
2583 | if (err < 0) | 2658 | if (err < 0) |
@@ -2630,7 +2705,7 @@ static void __devexit azx_remove(struct pci_dev *pci) | |||
2630 | } | 2705 | } |
2631 | 2706 | ||
2632 | /* PCI IDs */ | 2707 | /* PCI IDs */ |
2633 | static struct pci_device_id azx_ids[] = { | 2708 | static DEFINE_PCI_DEVICE_TABLE(azx_ids) = { |
2634 | /* ICH 6..10 */ | 2709 | /* ICH 6..10 */ |
2635 | { PCI_DEVICE(0x8086, 0x2668), .driver_data = AZX_DRIVER_ICH }, | 2710 | { PCI_DEVICE(0x8086, 0x2668), .driver_data = AZX_DRIVER_ICH }, |
2636 | { PCI_DEVICE(0x8086, 0x27d8), .driver_data = AZX_DRIVER_ICH }, | 2711 | { PCI_DEVICE(0x8086, 0x27d8), .driver_data = AZX_DRIVER_ICH }, |
@@ -2643,6 +2718,9 @@ static struct pci_device_id azx_ids[] = { | |||
2643 | { PCI_DEVICE(0x8086, 0x3a6e), .driver_data = AZX_DRIVER_ICH }, | 2718 | { PCI_DEVICE(0x8086, 0x3a6e), .driver_data = AZX_DRIVER_ICH }, |
2644 | /* PCH */ | 2719 | /* PCH */ |
2645 | { PCI_DEVICE(0x8086, 0x3b56), .driver_data = AZX_DRIVER_ICH }, | 2720 | { PCI_DEVICE(0x8086, 0x3b56), .driver_data = AZX_DRIVER_ICH }, |
2721 | { PCI_DEVICE(0x8086, 0x3b57), .driver_data = AZX_DRIVER_ICH }, | ||
2722 | /* CPT */ | ||
2723 | { PCI_DEVICE(0x8086, 0x1c20), .driver_data = AZX_DRIVER_PCH }, | ||
2646 | /* SCH */ | 2724 | /* SCH */ |
2647 | { PCI_DEVICE(0x8086, 0x811b), .driver_data = AZX_DRIVER_SCH }, | 2725 | { PCI_DEVICE(0x8086, 0x811b), .driver_data = AZX_DRIVER_SCH }, |
2648 | /* ATI SB 450/600 */ | 2726 | /* ATI SB 450/600 */ |
@@ -2670,29 +2748,10 @@ static struct pci_device_id azx_ids[] = { | |||
2670 | /* ULI M5461 */ | 2748 | /* ULI M5461 */ |
2671 | { PCI_DEVICE(0x10b9, 0x5461), .driver_data = AZX_DRIVER_ULI }, | 2749 | { PCI_DEVICE(0x10b9, 0x5461), .driver_data = AZX_DRIVER_ULI }, |
2672 | /* NVIDIA MCP */ | 2750 | /* NVIDIA MCP */ |
2673 | { PCI_DEVICE(0x10de, 0x026c), .driver_data = AZX_DRIVER_NVIDIA }, | 2751 | { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID), |
2674 | { PCI_DEVICE(0x10de, 0x0371), .driver_data = AZX_DRIVER_NVIDIA }, | 2752 | .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8, |
2675 | { PCI_DEVICE(0x10de, 0x03e4), .driver_data = AZX_DRIVER_NVIDIA }, | 2753 | .class_mask = 0xffffff, |
2676 | { PCI_DEVICE(0x10de, 0x03f0), .driver_data = AZX_DRIVER_NVIDIA }, | 2754 | .driver_data = AZX_DRIVER_NVIDIA }, |
2677 | { PCI_DEVICE(0x10de, 0x044a), .driver_data = AZX_DRIVER_NVIDIA }, | ||
2678 | { PCI_DEVICE(0x10de, 0x044b), .driver_data = AZX_DRIVER_NVIDIA }, | ||
2679 | { PCI_DEVICE(0x10de, 0x055c), .driver_data = AZX_DRIVER_NVIDIA }, | ||
2680 | { PCI_DEVICE(0x10de, 0x055d), .driver_data = AZX_DRIVER_NVIDIA }, | ||
2681 | { PCI_DEVICE(0x10de, 0x0590), .driver_data = AZX_DRIVER_NVIDIA }, | ||
2682 | { PCI_DEVICE(0x10de, 0x0774), .driver_data = AZX_DRIVER_NVIDIA }, | ||
2683 | { PCI_DEVICE(0x10de, 0x0775), .driver_data = AZX_DRIVER_NVIDIA }, | ||
2684 | { PCI_DEVICE(0x10de, 0x0776), .driver_data = AZX_DRIVER_NVIDIA }, | ||
2685 | { PCI_DEVICE(0x10de, 0x0777), .driver_data = AZX_DRIVER_NVIDIA }, | ||
2686 | { PCI_DEVICE(0x10de, 0x07fc), .driver_data = AZX_DRIVER_NVIDIA }, | ||
2687 | { PCI_DEVICE(0x10de, 0x07fd), .driver_data = AZX_DRIVER_NVIDIA }, | ||
2688 | { PCI_DEVICE(0x10de, 0x0ac0), .driver_data = AZX_DRIVER_NVIDIA }, | ||
2689 | { PCI_DEVICE(0x10de, 0x0ac1), .driver_data = AZX_DRIVER_NVIDIA }, | ||
2690 | { PCI_DEVICE(0x10de, 0x0ac2), .driver_data = AZX_DRIVER_NVIDIA }, | ||
2691 | { PCI_DEVICE(0x10de, 0x0ac3), .driver_data = AZX_DRIVER_NVIDIA }, | ||
2692 | { PCI_DEVICE(0x10de, 0x0d94), .driver_data = AZX_DRIVER_NVIDIA }, | ||
2693 | { PCI_DEVICE(0x10de, 0x0d95), .driver_data = AZX_DRIVER_NVIDIA }, | ||
2694 | { PCI_DEVICE(0x10de, 0x0d96), .driver_data = AZX_DRIVER_NVIDIA }, | ||
2695 | { PCI_DEVICE(0x10de, 0x0d97), .driver_data = AZX_DRIVER_NVIDIA }, | ||
2696 | /* Teradici */ | 2755 | /* Teradici */ |
2697 | { PCI_DEVICE(0x6549, 0x1200), .driver_data = AZX_DRIVER_TERA }, | 2756 | { PCI_DEVICE(0x6549, 0x1200), .driver_data = AZX_DRIVER_TERA }, |
2698 | /* Creative X-Fi (CA0110-IBG) */ | 2757 | /* Creative X-Fi (CA0110-IBG) */ |