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-rw-r--r--sound/pci/hda/hda_codec.h566
1 files changed, 6 insertions, 560 deletions
diff --git a/sound/pci/hda/hda_codec.h b/sound/pci/hda/hda_codec.h
index 7aa9870040c1..2b5d19e48a27 100644
--- a/sound/pci/hda/hda_codec.h
+++ b/sound/pci/hda/hda_codec.h
@@ -25,552 +25,7 @@
25#include <sound/control.h> 25#include <sound/control.h>
26#include <sound/pcm.h> 26#include <sound/pcm.h>
27#include <sound/hwdep.h> 27#include <sound/hwdep.h>
28 28#include <sound/hda_verbs.h>
29/*
30 * nodes
31 */
32#define AC_NODE_ROOT 0x00
33
34/*
35 * function group types
36 */
37enum {
38 AC_GRP_AUDIO_FUNCTION = 0x01,
39 AC_GRP_MODEM_FUNCTION = 0x02,
40};
41
42/*
43 * widget types
44 */
45enum {
46 AC_WID_AUD_OUT, /* Audio Out */
47 AC_WID_AUD_IN, /* Audio In */
48 AC_WID_AUD_MIX, /* Audio Mixer */
49 AC_WID_AUD_SEL, /* Audio Selector */
50 AC_WID_PIN, /* Pin Complex */
51 AC_WID_POWER, /* Power */
52 AC_WID_VOL_KNB, /* Volume Knob */
53 AC_WID_BEEP, /* Beep Generator */
54 AC_WID_VENDOR = 0x0f /* Vendor specific */
55};
56
57/*
58 * GET verbs
59 */
60#define AC_VERB_GET_STREAM_FORMAT 0x0a00
61#define AC_VERB_GET_AMP_GAIN_MUTE 0x0b00
62#define AC_VERB_GET_PROC_COEF 0x0c00
63#define AC_VERB_GET_COEF_INDEX 0x0d00
64#define AC_VERB_PARAMETERS 0x0f00
65#define AC_VERB_GET_CONNECT_SEL 0x0f01
66#define AC_VERB_GET_CONNECT_LIST 0x0f02
67#define AC_VERB_GET_PROC_STATE 0x0f03
68#define AC_VERB_GET_SDI_SELECT 0x0f04
69#define AC_VERB_GET_POWER_STATE 0x0f05
70#define AC_VERB_GET_CONV 0x0f06
71#define AC_VERB_GET_PIN_WIDGET_CONTROL 0x0f07
72#define AC_VERB_GET_UNSOLICITED_RESPONSE 0x0f08
73#define AC_VERB_GET_PIN_SENSE 0x0f09
74#define AC_VERB_GET_BEEP_CONTROL 0x0f0a
75#define AC_VERB_GET_EAPD_BTLENABLE 0x0f0c
76#define AC_VERB_GET_DIGI_CONVERT_1 0x0f0d
77#define AC_VERB_GET_DIGI_CONVERT_2 0x0f0e /* unused */
78#define AC_VERB_GET_VOLUME_KNOB_CONTROL 0x0f0f
79/* f10-f1a: GPIO */
80#define AC_VERB_GET_GPIO_DATA 0x0f15
81#define AC_VERB_GET_GPIO_MASK 0x0f16
82#define AC_VERB_GET_GPIO_DIRECTION 0x0f17
83#define AC_VERB_GET_GPIO_WAKE_MASK 0x0f18
84#define AC_VERB_GET_GPIO_UNSOLICITED_RSP_MASK 0x0f19
85#define AC_VERB_GET_GPIO_STICKY_MASK 0x0f1a
86#define AC_VERB_GET_CONFIG_DEFAULT 0x0f1c
87/* f20: AFG/MFG */
88#define AC_VERB_GET_SUBSYSTEM_ID 0x0f20
89#define AC_VERB_GET_CVT_CHAN_COUNT 0x0f2d
90#define AC_VERB_GET_HDMI_DIP_SIZE 0x0f2e
91#define AC_VERB_GET_HDMI_ELDD 0x0f2f
92#define AC_VERB_GET_HDMI_DIP_INDEX 0x0f30
93#define AC_VERB_GET_HDMI_DIP_DATA 0x0f31
94#define AC_VERB_GET_HDMI_DIP_XMIT 0x0f32
95#define AC_VERB_GET_HDMI_CP_CTRL 0x0f33
96#define AC_VERB_GET_HDMI_CHAN_SLOT 0x0f34
97#define AC_VERB_GET_DEVICE_SEL 0xf35
98#define AC_VERB_GET_DEVICE_LIST 0xf36
99
100/*
101 * SET verbs
102 */
103#define AC_VERB_SET_STREAM_FORMAT 0x200
104#define AC_VERB_SET_AMP_GAIN_MUTE 0x300
105#define AC_VERB_SET_PROC_COEF 0x400
106#define AC_VERB_SET_COEF_INDEX 0x500
107#define AC_VERB_SET_CONNECT_SEL 0x701
108#define AC_VERB_SET_PROC_STATE 0x703
109#define AC_VERB_SET_SDI_SELECT 0x704
110#define AC_VERB_SET_POWER_STATE 0x705
111#define AC_VERB_SET_CHANNEL_STREAMID 0x706
112#define AC_VERB_SET_PIN_WIDGET_CONTROL 0x707
113#define AC_VERB_SET_UNSOLICITED_ENABLE 0x708
114#define AC_VERB_SET_PIN_SENSE 0x709
115#define AC_VERB_SET_BEEP_CONTROL 0x70a
116#define AC_VERB_SET_EAPD_BTLENABLE 0x70c
117#define AC_VERB_SET_DIGI_CONVERT_1 0x70d
118#define AC_VERB_SET_DIGI_CONVERT_2 0x70e
119#define AC_VERB_SET_VOLUME_KNOB_CONTROL 0x70f
120#define AC_VERB_SET_GPIO_DATA 0x715
121#define AC_VERB_SET_GPIO_MASK 0x716
122#define AC_VERB_SET_GPIO_DIRECTION 0x717
123#define AC_VERB_SET_GPIO_WAKE_MASK 0x718
124#define AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK 0x719
125#define AC_VERB_SET_GPIO_STICKY_MASK 0x71a
126#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_0 0x71c
127#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_1 0x71d
128#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_2 0x71e
129#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_3 0x71f
130#define AC_VERB_SET_EAPD 0x788
131#define AC_VERB_SET_CODEC_RESET 0x7ff
132#define AC_VERB_SET_CVT_CHAN_COUNT 0x72d
133#define AC_VERB_SET_HDMI_DIP_INDEX 0x730
134#define AC_VERB_SET_HDMI_DIP_DATA 0x731
135#define AC_VERB_SET_HDMI_DIP_XMIT 0x732
136#define AC_VERB_SET_HDMI_CP_CTRL 0x733
137#define AC_VERB_SET_HDMI_CHAN_SLOT 0x734
138#define AC_VERB_SET_DEVICE_SEL 0x735
139
140/*
141 * Parameter IDs
142 */
143#define AC_PAR_VENDOR_ID 0x00
144#define AC_PAR_SUBSYSTEM_ID 0x01
145#define AC_PAR_REV_ID 0x02
146#define AC_PAR_NODE_COUNT 0x04
147#define AC_PAR_FUNCTION_TYPE 0x05
148#define AC_PAR_AUDIO_FG_CAP 0x08
149#define AC_PAR_AUDIO_WIDGET_CAP 0x09
150#define AC_PAR_PCM 0x0a
151#define AC_PAR_STREAM 0x0b
152#define AC_PAR_PIN_CAP 0x0c
153#define AC_PAR_AMP_IN_CAP 0x0d
154#define AC_PAR_CONNLIST_LEN 0x0e
155#define AC_PAR_POWER_STATE 0x0f
156#define AC_PAR_PROC_CAP 0x10
157#define AC_PAR_GPIO_CAP 0x11
158#define AC_PAR_AMP_OUT_CAP 0x12
159#define AC_PAR_VOL_KNB_CAP 0x13
160#define AC_PAR_DEVLIST_LEN 0x15
161#define AC_PAR_HDMI_LPCM_CAP 0x20
162
163/*
164 * AC_VERB_PARAMETERS results (32bit)
165 */
166
167/* Function Group Type */
168#define AC_FGT_TYPE (0xff<<0)
169#define AC_FGT_TYPE_SHIFT 0
170#define AC_FGT_UNSOL_CAP (1<<8)
171
172/* Audio Function Group Capabilities */
173#define AC_AFG_OUT_DELAY (0xf<<0)
174#define AC_AFG_IN_DELAY (0xf<<8)
175#define AC_AFG_BEEP_GEN (1<<16)
176
177/* Audio Widget Capabilities */
178#define AC_WCAP_STEREO (1<<0) /* stereo I/O */
179#define AC_WCAP_IN_AMP (1<<1) /* AMP-in present */
180#define AC_WCAP_OUT_AMP (1<<2) /* AMP-out present */
181#define AC_WCAP_AMP_OVRD (1<<3) /* AMP-parameter override */
182#define AC_WCAP_FORMAT_OVRD (1<<4) /* format override */
183#define AC_WCAP_STRIPE (1<<5) /* stripe */
184#define AC_WCAP_PROC_WID (1<<6) /* Proc Widget */
185#define AC_WCAP_UNSOL_CAP (1<<7) /* Unsol capable */
186#define AC_WCAP_CONN_LIST (1<<8) /* connection list */
187#define AC_WCAP_DIGITAL (1<<9) /* digital I/O */
188#define AC_WCAP_POWER (1<<10) /* power control */
189#define AC_WCAP_LR_SWAP (1<<11) /* L/R swap */
190#define AC_WCAP_CP_CAPS (1<<12) /* content protection */
191#define AC_WCAP_CHAN_CNT_EXT (7<<13) /* channel count ext */
192#define AC_WCAP_DELAY (0xf<<16)
193#define AC_WCAP_DELAY_SHIFT 16
194#define AC_WCAP_TYPE (0xf<<20)
195#define AC_WCAP_TYPE_SHIFT 20
196
197/* supported PCM rates and bits */
198#define AC_SUPPCM_RATES (0xfff << 0)
199#define AC_SUPPCM_BITS_8 (1<<16)
200#define AC_SUPPCM_BITS_16 (1<<17)
201#define AC_SUPPCM_BITS_20 (1<<18)
202#define AC_SUPPCM_BITS_24 (1<<19)
203#define AC_SUPPCM_BITS_32 (1<<20)
204
205/* supported PCM stream format */
206#define AC_SUPFMT_PCM (1<<0)
207#define AC_SUPFMT_FLOAT32 (1<<1)
208#define AC_SUPFMT_AC3 (1<<2)
209
210/* GP I/O count */
211#define AC_GPIO_IO_COUNT (0xff<<0)
212#define AC_GPIO_O_COUNT (0xff<<8)
213#define AC_GPIO_O_COUNT_SHIFT 8
214#define AC_GPIO_I_COUNT (0xff<<16)
215#define AC_GPIO_I_COUNT_SHIFT 16
216#define AC_GPIO_UNSOLICITED (1<<30)
217#define AC_GPIO_WAKE (1<<31)
218
219/* Converter stream, channel */
220#define AC_CONV_CHANNEL (0xf<<0)
221#define AC_CONV_STREAM (0xf<<4)
222#define AC_CONV_STREAM_SHIFT 4
223
224/* Input converter SDI select */
225#define AC_SDI_SELECT (0xf<<0)
226
227/* stream format id */
228#define AC_FMT_CHAN_SHIFT 0
229#define AC_FMT_CHAN_MASK (0x0f << 0)
230#define AC_FMT_BITS_SHIFT 4
231#define AC_FMT_BITS_MASK (7 << 4)
232#define AC_FMT_BITS_8 (0 << 4)
233#define AC_FMT_BITS_16 (1 << 4)
234#define AC_FMT_BITS_20 (2 << 4)
235#define AC_FMT_BITS_24 (3 << 4)
236#define AC_FMT_BITS_32 (4 << 4)
237#define AC_FMT_DIV_SHIFT 8
238#define AC_FMT_DIV_MASK (7 << 8)
239#define AC_FMT_MULT_SHIFT 11
240#define AC_FMT_MULT_MASK (7 << 11)
241#define AC_FMT_BASE_SHIFT 14
242#define AC_FMT_BASE_48K (0 << 14)
243#define AC_FMT_BASE_44K (1 << 14)
244#define AC_FMT_TYPE_SHIFT 15
245#define AC_FMT_TYPE_PCM (0 << 15)
246#define AC_FMT_TYPE_NON_PCM (1 << 15)
247
248/* Unsolicited response control */
249#define AC_UNSOL_TAG (0x3f<<0)
250#define AC_UNSOL_ENABLED (1<<7)
251#define AC_USRSP_EN AC_UNSOL_ENABLED
252
253/* Unsolicited responses */
254#define AC_UNSOL_RES_TAG (0x3f<<26)
255#define AC_UNSOL_RES_TAG_SHIFT 26
256#define AC_UNSOL_RES_SUBTAG (0x1f<<21)
257#define AC_UNSOL_RES_SUBTAG_SHIFT 21
258#define AC_UNSOL_RES_DE (0x3f<<15) /* Device Entry
259 * (for DP1.2 MST)
260 */
261#define AC_UNSOL_RES_DE_SHIFT 15
262#define AC_UNSOL_RES_IA (1<<2) /* Inactive (for DP1.2 MST) */
263#define AC_UNSOL_RES_ELDV (1<<1) /* ELD Data valid (for HDMI) */
264#define AC_UNSOL_RES_PD (1<<0) /* pinsense detect */
265#define AC_UNSOL_RES_CP_STATE (1<<1) /* content protection */
266#define AC_UNSOL_RES_CP_READY (1<<0) /* content protection */
267
268/* Pin widget capabilies */
269#define AC_PINCAP_IMP_SENSE (1<<0) /* impedance sense capable */
270#define AC_PINCAP_TRIG_REQ (1<<1) /* trigger required */
271#define AC_PINCAP_PRES_DETECT (1<<2) /* presence detect capable */
272#define AC_PINCAP_HP_DRV (1<<3) /* headphone drive capable */
273#define AC_PINCAP_OUT (1<<4) /* output capable */
274#define AC_PINCAP_IN (1<<5) /* input capable */
275#define AC_PINCAP_BALANCE (1<<6) /* balanced I/O capable */
276/* Note: This LR_SWAP pincap is defined in the Realtek ALC883 specification,
277 * but is marked reserved in the Intel HDA specification.
278 */
279#define AC_PINCAP_LR_SWAP (1<<7) /* L/R swap */
280/* Note: The same bit as LR_SWAP is newly defined as HDMI capability
281 * in HD-audio specification
282 */
283#define AC_PINCAP_HDMI (1<<7) /* HDMI pin */
284#define AC_PINCAP_DP (1<<24) /* DisplayPort pin, can
285 * coexist with AC_PINCAP_HDMI
286 */
287#define AC_PINCAP_VREF (0x37<<8)
288#define AC_PINCAP_VREF_SHIFT 8
289#define AC_PINCAP_EAPD (1<<16) /* EAPD capable */
290#define AC_PINCAP_HBR (1<<27) /* High Bit Rate */
291/* Vref status (used in pin cap) */
292#define AC_PINCAP_VREF_HIZ (1<<0) /* Hi-Z */
293#define AC_PINCAP_VREF_50 (1<<1) /* 50% */
294#define AC_PINCAP_VREF_GRD (1<<2) /* ground */
295#define AC_PINCAP_VREF_80 (1<<4) /* 80% */
296#define AC_PINCAP_VREF_100 (1<<5) /* 100% */
297
298/* Amplifier capabilities */
299#define AC_AMPCAP_OFFSET (0x7f<<0) /* 0dB offset */
300#define AC_AMPCAP_OFFSET_SHIFT 0
301#define AC_AMPCAP_NUM_STEPS (0x7f<<8) /* number of steps */
302#define AC_AMPCAP_NUM_STEPS_SHIFT 8
303#define AC_AMPCAP_STEP_SIZE (0x7f<<16) /* step size 0-32dB
304 * in 0.25dB
305 */
306#define AC_AMPCAP_STEP_SIZE_SHIFT 16
307#define AC_AMPCAP_MUTE (1<<31) /* mute capable */
308#define AC_AMPCAP_MUTE_SHIFT 31
309
310/* driver-specific amp-caps: using bits 24-30 */
311#define AC_AMPCAP_MIN_MUTE (1 << 30) /* min-volume = mute */
312
313/* Connection list */
314#define AC_CLIST_LENGTH (0x7f<<0)
315#define AC_CLIST_LONG (1<<7)
316
317/* Supported power status */
318#define AC_PWRST_D0SUP (1<<0)
319#define AC_PWRST_D1SUP (1<<1)
320#define AC_PWRST_D2SUP (1<<2)
321#define AC_PWRST_D3SUP (1<<3)
322#define AC_PWRST_D3COLDSUP (1<<4)
323#define AC_PWRST_S3D3COLDSUP (1<<29)
324#define AC_PWRST_CLKSTOP (1<<30)
325#define AC_PWRST_EPSS (1U<<31)
326
327/* Power state values */
328#define AC_PWRST_SETTING (0xf<<0)
329#define AC_PWRST_ACTUAL (0xf<<4)
330#define AC_PWRST_ACTUAL_SHIFT 4
331#define AC_PWRST_D0 0x00
332#define AC_PWRST_D1 0x01
333#define AC_PWRST_D2 0x02
334#define AC_PWRST_D3 0x03
335#define AC_PWRST_ERROR (1<<8)
336#define AC_PWRST_CLK_STOP_OK (1<<9)
337#define AC_PWRST_SETTING_RESET (1<<10)
338
339/* Processing capabilies */
340#define AC_PCAP_BENIGN (1<<0)
341#define AC_PCAP_NUM_COEF (0xff<<8)
342#define AC_PCAP_NUM_COEF_SHIFT 8
343
344/* Volume knobs capabilities */
345#define AC_KNBCAP_NUM_STEPS (0x7f<<0)
346#define AC_KNBCAP_DELTA (1<<7)
347
348/* HDMI LPCM capabilities */
349#define AC_LPCMCAP_48K_CP_CHNS (0x0f<<0) /* max channels w/ CP-on */
350#define AC_LPCMCAP_48K_NO_CHNS (0x0f<<4) /* max channels w/o CP-on */
351#define AC_LPCMCAP_48K_20BIT (1<<8) /* 20b bitrate supported */
352#define AC_LPCMCAP_48K_24BIT (1<<9) /* 24b bitrate supported */
353#define AC_LPCMCAP_96K_CP_CHNS (0x0f<<10) /* max channels w/ CP-on */
354#define AC_LPCMCAP_96K_NO_CHNS (0x0f<<14) /* max channels w/o CP-on */
355#define AC_LPCMCAP_96K_20BIT (1<<18) /* 20b bitrate supported */
356#define AC_LPCMCAP_96K_24BIT (1<<19) /* 24b bitrate supported */
357#define AC_LPCMCAP_192K_CP_CHNS (0x0f<<20) /* max channels w/ CP-on */
358#define AC_LPCMCAP_192K_NO_CHNS (0x0f<<24) /* max channels w/o CP-on */
359#define AC_LPCMCAP_192K_20BIT (1<<28) /* 20b bitrate supported */
360#define AC_LPCMCAP_192K_24BIT (1<<29) /* 24b bitrate supported */
361#define AC_LPCMCAP_44K (1<<30) /* 44.1kHz support */
362#define AC_LPCMCAP_44K_MS (1<<31) /* 44.1kHz-multiplies support */
363
364/* Display pin's device list length */
365#define AC_DEV_LIST_LEN_MASK 0x3f
366#define AC_MAX_DEV_LIST_LEN 64
367
368/*
369 * Control Parameters
370 */
371
372/* Amp gain/mute */
373#define AC_AMP_MUTE (1<<7)
374#define AC_AMP_GAIN (0x7f)
375#define AC_AMP_GET_INDEX (0xf<<0)
376
377#define AC_AMP_GET_LEFT (1<<13)
378#define AC_AMP_GET_RIGHT (0<<13)
379#define AC_AMP_GET_OUTPUT (1<<15)
380#define AC_AMP_GET_INPUT (0<<15)
381
382#define AC_AMP_SET_INDEX (0xf<<8)
383#define AC_AMP_SET_INDEX_SHIFT 8
384#define AC_AMP_SET_RIGHT (1<<12)
385#define AC_AMP_SET_LEFT (1<<13)
386#define AC_AMP_SET_INPUT (1<<14)
387#define AC_AMP_SET_OUTPUT (1<<15)
388
389/* DIGITAL1 bits */
390#define AC_DIG1_ENABLE (1<<0)
391#define AC_DIG1_V (1<<1)
392#define AC_DIG1_VCFG (1<<2)
393#define AC_DIG1_EMPHASIS (1<<3)
394#define AC_DIG1_COPYRIGHT (1<<4)
395#define AC_DIG1_NONAUDIO (1<<5)
396#define AC_DIG1_PROFESSIONAL (1<<6)
397#define AC_DIG1_LEVEL (1<<7)
398
399/* DIGITAL2 bits */
400#define AC_DIG2_CC (0x7f<<0)
401
402/* DIGITAL3 bits */
403#define AC_DIG3_ICT (0xf<<0)
404#define AC_DIG3_KAE (1<<7)
405
406/* Pin widget control - 8bit */
407#define AC_PINCTL_EPT (0x3<<0)
408#define AC_PINCTL_EPT_NATIVE 0
409#define AC_PINCTL_EPT_HBR 3
410#define AC_PINCTL_VREFEN (0x7<<0)
411#define AC_PINCTL_VREF_HIZ 0 /* Hi-Z */
412#define AC_PINCTL_VREF_50 1 /* 50% */
413#define AC_PINCTL_VREF_GRD 2 /* ground */
414#define AC_PINCTL_VREF_80 4 /* 80% */
415#define AC_PINCTL_VREF_100 5 /* 100% */
416#define AC_PINCTL_IN_EN (1<<5)
417#define AC_PINCTL_OUT_EN (1<<6)
418#define AC_PINCTL_HP_EN (1<<7)
419
420/* Pin sense - 32bit */
421#define AC_PINSENSE_IMPEDANCE_MASK (0x7fffffff)
422#define AC_PINSENSE_PRESENCE (1<<31)
423#define AC_PINSENSE_ELDV (1<<30) /* ELD valid (HDMI) */
424
425/* EAPD/BTL enable - 32bit */
426#define AC_EAPDBTL_BALANCED (1<<0)
427#define AC_EAPDBTL_EAPD (1<<1)
428#define AC_EAPDBTL_LR_SWAP (1<<2)
429
430/* HDMI ELD data */
431#define AC_ELDD_ELD_VALID (1<<31)
432#define AC_ELDD_ELD_DATA 0xff
433
434/* HDMI DIP size */
435#define AC_DIPSIZE_ELD_BUF (1<<3) /* ELD buf size of packet size */
436#define AC_DIPSIZE_PACK_IDX (0x07<<0) /* packet index */
437
438/* HDMI DIP index */
439#define AC_DIPIDX_PACK_IDX (0x07<<5) /* packet idnex */
440#define AC_DIPIDX_BYTE_IDX (0x1f<<0) /* byte index */
441
442/* HDMI DIP xmit (transmit) control */
443#define AC_DIPXMIT_MASK (0x3<<6)
444#define AC_DIPXMIT_DISABLE (0x0<<6) /* disable xmit */
445#define AC_DIPXMIT_ONCE (0x2<<6) /* xmit once then disable */
446#define AC_DIPXMIT_BEST (0x3<<6) /* best effort */
447
448/* HDMI content protection (CP) control */
449#define AC_CPCTRL_CES (1<<9) /* current encryption state */
450#define AC_CPCTRL_READY (1<<8) /* ready bit */
451#define AC_CPCTRL_SUBTAG (0x1f<<3) /* subtag for unsol-resp */
452#define AC_CPCTRL_STATE (3<<0) /* current CP request state */
453
454/* Converter channel <-> HDMI slot mapping */
455#define AC_CVTMAP_HDMI_SLOT (0xf<<0) /* HDMI slot number */
456#define AC_CVTMAP_CHAN (0xf<<4) /* converter channel number */
457
458/* configuration default - 32bit */
459#define AC_DEFCFG_SEQUENCE (0xf<<0)
460#define AC_DEFCFG_DEF_ASSOC (0xf<<4)
461#define AC_DEFCFG_ASSOC_SHIFT 4
462#define AC_DEFCFG_MISC (0xf<<8)
463#define AC_DEFCFG_MISC_SHIFT 8
464#define AC_DEFCFG_MISC_NO_PRESENCE (1<<0)
465#define AC_DEFCFG_COLOR (0xf<<12)
466#define AC_DEFCFG_COLOR_SHIFT 12
467#define AC_DEFCFG_CONN_TYPE (0xf<<16)
468#define AC_DEFCFG_CONN_TYPE_SHIFT 16
469#define AC_DEFCFG_DEVICE (0xf<<20)
470#define AC_DEFCFG_DEVICE_SHIFT 20
471#define AC_DEFCFG_LOCATION (0x3f<<24)
472#define AC_DEFCFG_LOCATION_SHIFT 24
473#define AC_DEFCFG_PORT_CONN (0x3<<30)
474#define AC_DEFCFG_PORT_CONN_SHIFT 30
475
476/* Display pin's device list entry */
477#define AC_DE_PD (1<<0)
478#define AC_DE_ELDV (1<<1)
479#define AC_DE_IA (1<<2)
480
481/* device device types (0x0-0xf) */
482enum {
483 AC_JACK_LINE_OUT,
484 AC_JACK_SPEAKER,
485 AC_JACK_HP_OUT,
486 AC_JACK_CD,
487 AC_JACK_SPDIF_OUT,
488 AC_JACK_DIG_OTHER_OUT,
489 AC_JACK_MODEM_LINE_SIDE,
490 AC_JACK_MODEM_HAND_SIDE,
491 AC_JACK_LINE_IN,
492 AC_JACK_AUX,
493 AC_JACK_MIC_IN,
494 AC_JACK_TELEPHONY,
495 AC_JACK_SPDIF_IN,
496 AC_JACK_DIG_OTHER_IN,
497 AC_JACK_OTHER = 0xf,
498};
499
500/* jack connection types (0x0-0xf) */
501enum {
502 AC_JACK_CONN_UNKNOWN,
503 AC_JACK_CONN_1_8,
504 AC_JACK_CONN_1_4,
505 AC_JACK_CONN_ATAPI,
506 AC_JACK_CONN_RCA,
507 AC_JACK_CONN_OPTICAL,
508 AC_JACK_CONN_OTHER_DIGITAL,
509 AC_JACK_CONN_OTHER_ANALOG,
510 AC_JACK_CONN_DIN,
511 AC_JACK_CONN_XLR,
512 AC_JACK_CONN_RJ11,
513 AC_JACK_CONN_COMB,
514 AC_JACK_CONN_OTHER = 0xf,
515};
516
517/* jack colors (0x0-0xf) */
518enum {
519 AC_JACK_COLOR_UNKNOWN,
520 AC_JACK_COLOR_BLACK,
521 AC_JACK_COLOR_GREY,
522 AC_JACK_COLOR_BLUE,
523 AC_JACK_COLOR_GREEN,
524 AC_JACK_COLOR_RED,
525 AC_JACK_COLOR_ORANGE,
526 AC_JACK_COLOR_YELLOW,
527 AC_JACK_COLOR_PURPLE,
528 AC_JACK_COLOR_PINK,
529 AC_JACK_COLOR_WHITE = 0xe,
530 AC_JACK_COLOR_OTHER,
531};
532
533/* Jack location (0x0-0x3f) */
534/* common case */
535enum {
536 AC_JACK_LOC_NONE,
537 AC_JACK_LOC_REAR,
538 AC_JACK_LOC_FRONT,
539 AC_JACK_LOC_LEFT,
540 AC_JACK_LOC_RIGHT,
541 AC_JACK_LOC_TOP,
542 AC_JACK_LOC_BOTTOM,
543};
544/* bits 4-5 */
545enum {
546 AC_JACK_LOC_EXTERNAL = 0x00,
547 AC_JACK_LOC_INTERNAL = 0x10,
548 AC_JACK_LOC_SEPARATE = 0x20,
549 AC_JACK_LOC_OTHER = 0x30,
550};
551enum {
552 /* external on primary chasis */
553 AC_JACK_LOC_REAR_PANEL = 0x07,
554 AC_JACK_LOC_DRIVE_BAY,
555 /* internal */
556 AC_JACK_LOC_RISER = 0x17,
557 AC_JACK_LOC_HDMI,
558 AC_JACK_LOC_ATAPI,
559 /* others */
560 AC_JACK_LOC_MOBILE_IN = 0x37,
561 AC_JACK_LOC_MOBILE_OUT,
562};
563
564/* Port connectivity (0-3) */
565enum {
566 AC_JACK_PORT_COMPLEX,
567 AC_JACK_PORT_NONE,
568 AC_JACK_PORT_FIXED,
569 AC_JACK_PORT_BOTH,
570};
571
572/* max. codec address */
573#define HDA_MAX_CODEC_ADDRESS 0x0f
574 29
575/* 30/*
576 * generic arrays 31 * generic arrays
@@ -673,6 +128,7 @@ struct hda_bus {
673 128
674 /* codec linked list */ 129 /* codec linked list */
675 struct list_head codec_list; 130 struct list_head codec_list;
131 unsigned int num_codecs;
676 /* link caddr -> codec */ 132 /* link caddr -> codec */
677 struct hda_codec *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1]; 133 struct hda_codec *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1];
678 134
@@ -834,6 +290,7 @@ struct hda_codec {
834 /* detected preset */ 290 /* detected preset */
835 const struct hda_codec_preset *preset; 291 const struct hda_codec_preset *preset;
836 struct module *owner; 292 struct module *owner;
293 int (*parser)(struct hda_codec *codec);
837 const char *vendor_name; /* codec vendor name */ 294 const char *vendor_name; /* codec vendor name */
838 const char *chip_name; /* codec chip name */ 295 const char *chip_name; /* codec chip name */
839 const char *modelname; /* model name for preset */ 296 const char *modelname; /* model name for preset */
@@ -907,7 +364,7 @@ struct hda_codec {
907#ifdef CONFIG_PM 364#ifdef CONFIG_PM
908 unsigned int power_on :1; /* current (global) power-state */ 365 unsigned int power_on :1; /* current (global) power-state */
909 unsigned int d3_stop_clk:1; /* support D3 operation without BCLK */ 366 unsigned int d3_stop_clk:1; /* support D3 operation without BCLK */
910 unsigned int pm_down_notified:1; /* PM notified to controller */ 367 unsigned int pm_up_notified:1; /* PM notified to controller */
911 unsigned int in_pm:1; /* suspend/resume being performed */ 368 unsigned int in_pm:1; /* suspend/resume being performed */
912 int power_transition; /* power-state in transition */ 369 int power_transition; /* power-state in transition */
913 int power_count; /* current (global) power refcount */ 370 int power_count; /* current (global) power refcount */
@@ -936,6 +393,8 @@ struct hda_codec {
936 struct snd_array jacks; 393 struct snd_array jacks;
937#endif 394#endif
938 395
396 int depop_delay; /* depop delay in ms, -1 for default delay time */
397
939 /* fix-up list */ 398 /* fix-up list */
940 int fixup_id; 399 int fixup_id;
941 const struct hda_fixup *fixup_list; 400 const struct hda_fixup *fixup_list;
@@ -1222,19 +681,6 @@ snd_hda_codec_load_dsp_cleanup(struct hda_codec *codec,
1222 struct snd_dma_buffer *dmab) {} 681 struct snd_dma_buffer *dmab) {}
1223#endif 682#endif
1224 683
1225/*
1226 * Codec modularization
1227 */
1228
1229/* Export symbols only for communication with codec drivers;
1230 * When built in kernel, all HD-audio drivers are supposed to be statically
1231 * linked to the kernel. Thus, the symbols don't have to (or shouldn't) be
1232 * exported unless it's built as a module.
1233 */
1234#ifdef MODULE
1235#define EXPORT_SYMBOL_HDA(sym) EXPORT_SYMBOL_GPL(sym) 684#define EXPORT_SYMBOL_HDA(sym) EXPORT_SYMBOL_GPL(sym)
1236#else
1237#define EXPORT_SYMBOL_HDA(sym)
1238#endif
1239 685
1240#endif /* __SOUND_HDA_CODEC_H */ 686#endif /* __SOUND_HDA_CODEC_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-27 02:18:03 -0500