litmus-rt.git - The LITMUS^RT kernel.

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Diffstat (limited to 'security/selinux/include/avc.h')

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/* * GPIO driver for the ACCES 104-IDI-48 family * Copyright (C) 2015 William Breathitt Gray * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License, version 2, as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * General Public License for more details. * * This driver supports the following ACCES devices: 104-IDI-48A, * 104-IDI-48AC, 104-IDI-48B, and 104-IDI-48BC. */ #include <linux/bitmap.h> #include <linux/bitops.h> #include <linux/device.h> #include <linux/errno.h> #include <linux/gpio/driver.h> #include <linux/io.h> #include <linux/ioport.h> #include <linux/interrupt.h> #include <linux/irqdesc.h> #include <linux/isa.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/moduleparam.h> #include <linux/spinlock.h> #define IDI_48_EXTENT 8 #define MAX_NUM_IDI_48 max_num_isa_dev(IDI_48_EXTENT) static unsigned int base[MAX_NUM_IDI_48]; static unsigned int num_idi_48; module_param_hw_array(base, uint, ioport, &num_idi_48, 0); MODULE_PARM_DESC(base, "ACCES 104-IDI-48 base addresses"); static unsigned int irq[MAX_NUM_IDI_48]; module_param_hw_array(irq, uint, irq, NULL, 0); MODULE_PARM_DESC(irq, "ACCES 104-IDI-48 interrupt line numbers"); /** * struct idi_48_gpio - GPIO device private data structure * @chip: instance of the gpio_chip * @lock: synchronization lock to prevent I/O race conditions * @ack_lock: synchronization lock to prevent IRQ handler race conditions * @irq_mask: input bits affected by interrupts * @base: base port address of the GPIO device * @cos_enb: Change-Of-State IRQ enable boundaries mask */ struct idi_48_gpio { struct gpio_chip chip; raw_spinlock_t lock; spinlock_t ack_lock; unsigned char irq_mask[6]; unsigned base; unsigned char cos_enb; }; static int idi_48_gpio_get_direction(struct gpio_chip *chip, unsigned offset) { return 1; } static int idi_48_gpio_direction_input(struct gpio_chip *chip, unsigned offset) { return 0; } static int idi_48_gpio_get(struct gpio_chip *chip, unsigned offset) { struct idi_48_gpio *const idi48gpio = gpiochip_get_data(chip); unsigned i; const unsigned register_offset[6] = { 0, 1, 2, 4, 5, 6 }; unsigned base_offset; unsigned mask; for (i = 0; i < 48; i += 8) if (offset < i + 8) { base_offset = register_offset[i / 8]; mask = BIT(offset - i); return !!(inb(idi48gpio->base + base_offset) & mask); } /* The following line should never execute since offset < 48 */ return 0; } static int idi_48_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct idi_48_gpio *const idi48gpio = gpiochip_get_data(chip); size_t i; static const size_t ports[] = { 0, 1, 2, 4, 5, 6 }; const unsigned int gpio_reg_size = 8; unsigned int bits_offset; size_t word_index; unsigned int word_offset; unsigned long word_mask; const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0); unsigned long port_state; /* clear bits array to a clean slate */ bitmap_zero(bits, chip->ngpio); /* get bits are evaluated a gpio port register at a time */ for (i = 0; i < ARRAY_SIZE(ports); i++) { /* gpio offset in bits array */ bits_offset = i * gpio_reg_size; /* word index for bits array */ word_index = BIT_WORD(bits_offset); /* gpio offset within current word of bits array */ word_offset = bits_offset % BITS_PER_LONG; /* mask of get bits for current gpio within current word */ word_mask = mask[word_index] & (port_mask << word_offset); if (!word_mask) { /* no get bits in this port so skip to next one */ continue; } /* read bits from current gpio port */ port_state = inb(idi48gpio->base + ports[i]); /* store acquired bits at respective bits array offset */ bits[word_index] |= (port_state << word_offset) & word_mask; } return 0; } static void idi_48_irq_ack(struct irq_data *data) { } static void idi_48_irq_mask(struct irq_data *data) { struct gpio_chip *chip = irq_data_get_irq_chip_data(data); struct idi_48_gpio *const idi48gpio = gpiochip_get_data(chip); const unsigned offset = irqd_to_hwirq(data); unsigned i; unsigned mask; unsigned boundary; unsigned long flags; for (i = 0; i < 48; i += 8) if (offset < i + 8) { mask = BIT(offset - i); boundary = i / 8; idi48gpio->irq_mask[boundary] &= ~mask; if (!idi48gpio->irq_mask[boundary]) { idi48gpio->cos_enb &= ~BIT(boundary); raw_spin_lock_irqsave(&idi48gpio->lock, flags); outb(idi48gpio->cos_enb, idi48gpio->base + 7); raw_spin_unlock_irqrestore(&idi48gpio->lock, flags); } return;


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