diff options
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/test_bpf.c | 1224 |
1 files changed, 1224 insertions, 0 deletions
diff --git a/lib/test_bpf.c b/lib/test_bpf.c index 9f25dc127330..3603ebcd5d65 100644 --- a/lib/test_bpf.c +++ b/lib/test_bpf.c | |||
| @@ -89,6 +89,467 @@ static struct bpf_test tests[] = { | |||
| 89 | { { 2, 10 }, { 3, 20 }, { 4, 30 } }, | 89 | { { 2, 10 }, { 3, 20 }, { 4, 30 } }, |
| 90 | }, | 90 | }, |
| 91 | { | 91 | { |
| 92 | "TXA", | ||
| 93 | .insns = { | ||
| 94 | BPF_STMT(BPF_LDX | BPF_LEN, 0), | ||
| 95 | BPF_STMT(BPF_MISC | BPF_TXA, 0), | ||
| 96 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_X, 0), | ||
| 97 | BPF_STMT(BPF_RET | BPF_A, 0) /* A == len * 2 */ | ||
| 98 | }, | ||
| 99 | SKB, | ||
| 100 | { 10, 20, 30, 40, 50 }, | ||
| 101 | { { 1, 2 }, { 3, 6 }, { 4, 8 } }, | ||
| 102 | }, | ||
| 103 | { | ||
| 104 | "ADD_SUB_MUL_K", | ||
| 105 | .insns = { | ||
| 106 | BPF_STMT(BPF_LD | BPF_IMM, 1), | ||
| 107 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_K, 2), | ||
| 108 | BPF_STMT(BPF_LDX | BPF_IMM, 3), | ||
| 109 | BPF_STMT(BPF_ALU | BPF_SUB | BPF_X, 0), | ||
| 110 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_K, 0xffffffff), | ||
| 111 | BPF_STMT(BPF_ALU | BPF_MUL | BPF_K, 3), | ||
| 112 | BPF_STMT(BPF_RET | BPF_A, 0) | ||
| 113 | }, | ||
| 114 | 0, | ||
| 115 | { }, | ||
| 116 | { { 0, 0xfffffffd } } | ||
| 117 | }, | ||
| 118 | { | ||
| 119 | "DIV_KX", | ||
| 120 | .insns = { | ||
| 121 | BPF_STMT(BPF_LD | BPF_IMM, 8), | ||
| 122 | BPF_STMT(BPF_ALU | BPF_DIV | BPF_K, 2), | ||
| 123 | BPF_STMT(BPF_MISC | BPF_TAX, 0), | ||
| 124 | BPF_STMT(BPF_LD | BPF_IMM, 0xffffffff), | ||
| 125 | BPF_STMT(BPF_ALU | BPF_DIV | BPF_X, 0), | ||
| 126 | BPF_STMT(BPF_MISC | BPF_TAX, 0), | ||
| 127 | BPF_STMT(BPF_LD | BPF_IMM, 0xffffffff), | ||
| 128 | BPF_STMT(BPF_ALU | BPF_DIV | BPF_K, 0x70000000), | ||
| 129 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_X, 0), | ||
| 130 | BPF_STMT(BPF_RET | BPF_A, 0) | ||
| 131 | }, | ||
| 132 | 0, | ||
| 133 | { }, | ||
| 134 | { { 0, 0x40000001 } } | ||
| 135 | }, | ||
| 136 | { | ||
| 137 | "AND_OR_LSH_K", | ||
| 138 | .insns = { | ||
| 139 | BPF_STMT(BPF_LD | BPF_IMM, 0xff), | ||
| 140 | BPF_STMT(BPF_ALU | BPF_AND | BPF_K, 0xf0), | ||
| 141 | BPF_STMT(BPF_ALU | BPF_LSH | BPF_K, 27), | ||
| 142 | BPF_STMT(BPF_MISC | BPF_TAX, 0), | ||
| 143 | BPF_STMT(BPF_LD | BPF_IMM, 0xf), | ||
| 144 | BPF_STMT(BPF_ALU | BPF_OR | BPF_K, 0xf0), | ||
| 145 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_X, 0), | ||
| 146 | BPF_STMT(BPF_RET | BPF_A, 0) | ||
| 147 | }, | ||
| 148 | 0, | ||
| 149 | { }, | ||
| 150 | { { 0, 0x800000ff }, { 1, 0x800000ff } }, | ||
| 151 | }, | ||
| 152 | { | ||
| 153 | "LD_IND", | ||
| 154 | .insns = { | ||
| 155 | BPF_STMT(BPF_LDX | BPF_LEN, 0), | ||
| 156 | BPF_STMT(BPF_LD | BPF_H | BPF_IND, MAX_K), | ||
| 157 | BPF_STMT(BPF_RET | BPF_K, 1) | ||
| 158 | }, | ||
| 159 | SKB, | ||
| 160 | { }, | ||
| 161 | { { 1, 0 }, { 10, 0 }, { 60, 0 } }, | ||
| 162 | }, | ||
| 163 | { | ||
| 164 | "LD_ABS", | ||
| 165 | .insns = { | ||
| 166 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, 1000), | ||
| 167 | BPF_STMT(BPF_RET | BPF_K, 1) | ||
| 168 | }, | ||
| 169 | SKB, | ||
| 170 | { }, | ||
| 171 | { { 1, 0 }, { 10, 0 }, { 60, 0 } }, | ||
| 172 | }, | ||
| 173 | { | ||
| 174 | "LD_ABS_LL", | ||
| 175 | .insns = { | ||
| 176 | BPF_STMT(BPF_LD | BPF_B | BPF_ABS, SKF_LL_OFF), | ||
| 177 | BPF_STMT(BPF_MISC | BPF_TAX, 0), | ||
| 178 | BPF_STMT(BPF_LD | BPF_B | BPF_ABS, SKF_LL_OFF + 1), | ||
| 179 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_X, 0), | ||
| 180 | BPF_STMT(BPF_RET | BPF_A, 0) | ||
| 181 | }, | ||
| 182 | SKB, | ||
| 183 | { 1, 2, 3 }, | ||
| 184 | { { 1, 0 }, { 2, 3 } }, | ||
| 185 | }, | ||
| 186 | { | ||
| 187 | "LD_IND_LL", | ||
| 188 | .insns = { | ||
| 189 | BPF_STMT(BPF_LD | BPF_IMM, SKF_LL_OFF - 1), | ||
| 190 | BPF_STMT(BPF_LDX | BPF_LEN, 0), | ||
| 191 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_X, 0), | ||
| 192 | BPF_STMT(BPF_MISC | BPF_TAX, 0), | ||
| 193 | BPF_STMT(BPF_LD | BPF_B | BPF_IND, 0), | ||
| 194 | BPF_STMT(BPF_RET | BPF_A, 0) | ||
| 195 | }, | ||
| 196 | SKB, | ||
| 197 | { 1, 2, 3, 0xff }, | ||
| 198 | { { 1, 1 }, { 3, 3 }, { 4, 0xff } }, | ||
| 199 | }, | ||
| 200 | { | ||
| 201 | "LD_ABS_NET", | ||
| 202 | .insns = { | ||
| 203 | BPF_STMT(BPF_LD | BPF_B | BPF_ABS, SKF_NET_OFF), | ||
| 204 | BPF_STMT(BPF_MISC | BPF_TAX, 0), | ||
| 205 | BPF_STMT(BPF_LD | BPF_B | BPF_ABS, SKF_NET_OFF + 1), | ||
| 206 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_X, 0), | ||
| 207 | BPF_STMT(BPF_RET | BPF_A, 0) | ||
| 208 | }, | ||
| 209 | SKB, | ||
| 210 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3 }, | ||
| 211 | { { 15, 0 }, { 16, 3 } }, | ||
| 212 | }, | ||
| 213 | { | ||
| 214 | "LD_IND_NET", | ||
| 215 | .insns = { | ||
| 216 | BPF_STMT(BPF_LD | BPF_IMM, SKF_NET_OFF - 15), | ||
| 217 | BPF_STMT(BPF_LDX | BPF_LEN, 0), | ||
| 218 | BPF_STMT(BPF_ALU | BPF_ADD | BPF_X, 0), | ||
| 219 | BPF_STMT(BPF_MISC | BPF_TAX, 0), | ||
| 220 | BPF_STMT(BPF_LD | BPF_B | BPF_IND, 0), | ||
| 221 | BPF_STMT(BPF_RET | BPF_A, 0) | ||
| 222 | }, | ||
| 223 | SKB, | ||
| 224 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3 }, | ||
| 225 | { { 14, 0 }, { 15, 1 }, { 17, 3 } }, | ||
| 226 | }, | ||
| 227 | { | ||
| 228 | "LD_PKTTYPE", | ||
| 229 | .insns = { | ||
| 230 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, | ||
| 231 | SKF_AD_OFF + SKF_AD_PKTTYPE), | ||
| 232 | BPF_JUMP(BPF_JMP | BPF_JEQ | BPF_K, SKB_TYPE, 1, 0), | ||
| 233 | BPF_STMT(BPF_RET | BPF_K, 1), | ||
| 234 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, | ||
| 235 | SKF_AD_OFF + SKF_AD_PKTTYPE), | ||
| 236 | BPF_JUMP(BPF_JMP | BPF_JEQ | BPF_K, SKB_TYPE, 1, 0), | ||
| 237 | BPF_STMT(BPF_RET | BPF_K, 1), | ||
| 238 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, | ||
| 239 | SKF_AD_OFF + SKF_AD_PKTTYPE), | ||
| 240 | BPF_JUMP(BPF_JMP | BPF_JEQ | BPF_K, SKB_TYPE, 1, 0), | ||
| 241 | BPF_STMT(BPF_RET | BPF_K, 1), | ||
| 242 | BPF_STMT(BPF_RET | BPF_A, 0) | ||
| 243 | }, | ||
| 244 | SKB, | ||
| 245 | { }, | ||
| 246 | { { 1, 3 }, { 10, 3 } }, | ||
| 247 | }, | ||
| 248 | { | ||
| 249 | "LD_MARK", | ||
| 250 | .insns = { | ||
| 251 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, | ||
| 252 | SKF_AD_OFF + SKF_AD_MARK), | ||
| 253 | BPF_STMT(BPF_RET | BPF_A, 0) | ||
| 254 | }, | ||
| 255 | SKB, | ||
| 256 | { }, | ||
| 257 | { { 1, SKB_MARK}, { 10, SKB_MARK} }, | ||
| 258 | }, | ||
| 259 | { | ||
| 260 | "LD_RXHASH", | ||
| 261 | .insns = { | ||
| 262 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, | ||
| 263 | SKF_AD_OFF + SKF_AD_RXHASH), | ||
| 264 | BPF_STMT(BPF_RET | BPF_A, 0) | ||
| 265 | }, | ||
| 266 | SKB, | ||
| 267 | { }, | ||
| 268 | { { 1, SKB_HASH}, { 10, SKB_HASH} }, | ||
| 269 | }, | ||
| 270 | { | ||
| 271 | "LD_QUEUE", | ||
| 272 | .insns = { | ||
| 273 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, | ||
| 274 | SKF_AD_OFF + SKF_AD_QUEUE), | ||
| 275 | BPF_STMT(BPF_RET | BPF_A, 0) | ||
| 276 | }, | ||
| 277 | SKB, | ||
| 278 | { }, | ||
| 279 | { { 1, SKB_QUEUE_MAP }, { 10, SKB_QUEUE_MAP } }, | ||
| 280 | }, | ||
| 281 | { | ||
| 282 | "LD_PROTOCOL", | ||
| 283 | .insns = { | ||
| 284 | BPF_STMT(BPF_LD | BPF_B | BPF_ABS, 1), | ||
| 285 | BPF_JUMP(BPF_JMP | BPF_JEQ | BPF_K, 20, 1, 0), | ||
| 286 | BPF_STMT(BPF_RET | BPF_K, 0), | ||
| 287 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, | ||
| 288 | SKF_AD_OFF + SKF_AD_PROTOCOL), | ||
| 289 | BPF_STMT(BPF_MISC | BPF_TAX, 0), | ||
| 290 | BPF_STMT(BPF_LD | BPF_B | BPF_ABS, 2), | ||
| 291 | BPF_JUMP(BPF_JMP | BPF_JEQ | BPF_K, 30, 1, 0), | ||
| 292 | BPF_STMT(BPF_RET | BPF_K, 0), | ||
| 293 | BPF_STMT(BPF_MISC | BPF_TXA, 0), | ||
| 294 | BPF_STMT(BPF_RET | BPF_A, 0) | ||
| 295 | }, | ||
| 296 | SKB, | ||
| 297 | { 10, 20, 30 }, | ||
| 298 | { { 10, ETH_P_IP }, { 100, ETH_P_IP } }, | ||
| 299 | }, | ||
| 300 | { | ||
| 301 | "LD_VLAN_TAG", | ||
| 302 | .insns = { | ||
| 303 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, | ||
| 304 | SKF_AD_OFF + SKF_AD_VLAN_TAG), | ||
| 305 | BPF_STMT(BPF_RET | BPF_A, 0) | ||
| 306 | }, | ||
| 307 | SKB, | ||
| 308 | { }, | ||
| 309 | { | ||
| 310 | { 1, SKB_VLAN_TCI & ~VLAN_TAG_PRESENT }, | ||
| 311 | { 10, SKB_VLAN_TCI & ~VLAN_TAG_PRESENT } | ||
| 312 | }, | ||
| 313 | }, | ||
| 314 | { | ||
| 315 | "LD_VLAN_TAG_PRESENT", | ||
| 316 | .insns = { | ||
| 317 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, | ||
| 318 | SKF_AD_OFF + SKF_AD_VLAN_TAG_PRESENT), | ||
| 319 | BPF_STMT(BPF_RET | BPF_A, 0) | ||
| 320 | }, | ||
| 321 | SKB, | ||
| 322 | { }, | ||
| 323 | { | ||
| 324 | { 1, !!(SKB_VLAN_TCI & VLAN_TAG_PRESENT) }, | ||
| 325 | { 10, !!(SKB_VLAN_TCI & VLAN_TAG_PRESENT) } | ||
| 326 | }, | ||
| 327 | }, | ||
| 328 | { | ||
| 329 | "LD_IFINDEX", | ||
| 330 | .insns = { | ||
| 331 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, | ||
| 332 | SKF_AD_OFF + SKF_AD_IFINDEX), | ||
| 333 | BPF_STMT(BPF_RET | BPF_A, 0) | ||
| 334 | }, | ||
| 335 | SKB, | ||
| 336 | { }, | ||
| 337 | { { 1, SKB_DEV_IFINDEX }, { 10, SKB_DEV_IFINDEX } }, | ||
| 338 | }, | ||
| 339 | { | ||
| 340 | "LD_HATYPE", | ||
| 341 | .insns = { | ||
| 342 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, | ||
| 343 | SKF_AD_OFF + SKF_AD_HATYPE), | ||
| 344 | BPF_STMT(BPF_RET | BPF_A, 0) | ||
| 345 | }, | ||
| 346 | SKB, | ||
| 347 | { }, | ||
| 348 | { { 1, SKB_DEV_TYPE }, { 10, SKB_DEV_TYPE } }, | ||
| 349 | }, | ||
| 350 | { | ||
| 351 | "LD_CPU", | ||
| 352 | .insns = { | ||
| 353 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, | ||
| 354 | SKF_AD_OFF + SKF_AD_CPU), | ||
| 355 | BPF_STMT(BPF_MISC | BPF_TAX, 0), | ||
| 356 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, | ||
| 357 | SKF_AD_OFF + SKF_AD_CPU), | ||
| 358 | BPF_STMT(BPF_ALU | BPF_SUB | BPF_X, 0), | ||
| 359 | BPF_STMT(BPF_RET | BPF_A, 0) | ||
| 360 | }, | ||
| 361 | SKB, | ||
| 362 | { }, | ||
| 363 | { { 1, 0 }, { 10, 0 } }, | ||
| 364 | }, | ||
| 365 | { | ||
| 366 | "LD_NLATTR", | ||
| 367 | .insns = { | ||
| 368 | BPF_STMT(BPF_LDX | BPF_IMM, 1), | ||
| 369 | BPF_STMT(BPF_MISC | BPF_TXA, 0), | ||
| 370 | BPF_STMT(BPF_LDX | BPF_IMM, 3), | ||
| 371 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, | ||
| 372 | SKF_AD_OFF + SKF_AD_NLATTR), | ||
| 373 | BPF_STMT(BPF_RET | BPF_A, 0) | ||
| 374 | }, | ||
| 375 | SKB, | ||
| 376 | { 0xff, 4, 0, 2, 0, 4, 0, 3, 0 }, | ||
| 377 | { { 4, 0 }, { 20, 5 } }, | ||
| 378 | }, | ||
| 379 | { | ||
| 380 | "LD_NLATTR_NEST", | ||
| 381 | .insns = { | ||
| 382 | BPF_STMT(BPF_LD | BPF_IMM, 1), | ||
| 383 | BPF_STMT(BPF_LDX | BPF_IMM, 3), | ||
| 384 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, | ||
| 385 | SKF_AD_OFF + SKF_AD_NLATTR_NEST), | ||
| 386 | BPF_STMT(BPF_LD | BPF_IMM, 1), | ||
| 387 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, | ||
| 388 | SKF_AD_OFF + SKF_AD_NLATTR_NEST), | ||
| 389 | BPF_STMT(BPF_LD | BPF_IMM, 1), | ||
| 390 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, | ||
| 391 | SKF_AD_OFF + SKF_AD_NLATTR_NEST), | ||
| 392 | BPF_STMT(BPF_LD | BPF_IMM, 1), | ||
| 393 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, | ||
| 394 | SKF_AD_OFF + SKF_AD_NLATTR_NEST), | ||
| 395 | BPF_STMT(BPF_LD | BPF_IMM, 1), | ||
| 396 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, | ||
| 397 | SKF_AD_OFF + SKF_AD_NLATTR_NEST), | ||
| 398 | BPF_STMT(BPF_LD | BPF_IMM, 1), | ||
| 399 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, | ||
| 400 | SKF_AD_OFF + SKF_AD_NLATTR_NEST), | ||
| 401 | BPF_STMT(BPF_LD | BPF_IMM, 1), | ||
| 402 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, | ||
| 403 | SKF_AD_OFF + SKF_AD_NLATTR_NEST), | ||
| 404 | BPF_STMT(BPF_LD | BPF_IMM, 1), | ||
| 405 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, | ||
| 406 | SKF_AD_OFF + SKF_AD_NLATTR_NEST), | ||
| 407 | BPF_STMT(BPF_RET | BPF_A, 0) | ||
| 408 | }, | ||
| 409 | SKB, | ||
| 410 | { 0xff, 12, 0, 1, 0, 4, 0, 2, 0, 4, 0, 3, 0 }, | ||
| 411 | { { 4, 0 }, { 20, 9 } }, | ||
| 412 | }, | ||
| 413 | { | ||
| 414 | "LD_PAYLOAD_OFF", | ||
| 415 | .insns = { | ||
| 416 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, | ||
| 417 | SKF_AD_OFF + SKF_AD_PAY_OFFSET), | ||
| 418 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, | ||
| 419 | SKF_AD_OFF + SKF_AD_PAY_OFFSET), | ||
| 420 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, | ||
| 421 | SKF_AD_OFF + SKF_AD_PAY_OFFSET), | ||
| 422 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, | ||
| 423 | SKF_AD_OFF + SKF_AD_PAY_OFFSET), | ||
| 424 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, | ||
| 425 | SKF_AD_OFF + SKF_AD_PAY_OFFSET), | ||
| 426 | BPF_STMT(BPF_RET | BPF_A, 0) | ||
| 427 | }, | ||
| 428 | SKB, | ||
| 429 | /* 00:00:00:00:00:00 > 00:00:00:00:00:00, ethtype IPv4 (0x0800), | ||
| 430 | * length 98: 127.0.0.1 > 127.0.0.1: ICMP echo request, | ||
| 431 | * id 9737, seq 1, length 64 | ||
| 432 | */ | ||
| 433 | { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 434 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
| 435 | 0x08, 0x00, | ||
| 436 | 0x45, 0x00, 0x00, 0x54, 0xac, 0x8b, 0x40, 0x00, 0x40, | ||
| 437 | 0x01, 0x90, 0x1b, 0x7f, 0x00, 0x00, 0x01 }, | ||
| 438 | { { 30, 0 }, { 100, 42 } }, | ||
| 439 | }, | ||
| 440 | { | ||
| 441 | "LD_ANC_XOR", | ||
| 442 | .insns = { | ||
| 443 | BPF_STMT(BPF_LD | BPF_IMM, 10), | ||
| 444 | BPF_STMT(BPF_LDX | BPF_IMM, 300), | ||
| 445 | BPF_STMT(BPF_LD | BPF_W | BPF_ABS, | ||
| 446 | SKF_AD_OFF + SKF_AD_ALU_XOR_X), | ||
| 447 | BPF_STMT(BPF_RET | BPF_A, 0) | ||
| 448 | }, | ||
| 449 | SKB, | ||
| 450 | { }, | ||
| 451 | { { 4, 10 ^ 300 }, { 20, 10 ^ 300 } }, | ||
| 452 | }, | ||
| 453 | { | ||
| 454 | "SPILL_FILL", | ||
| 455 | .insns = { | ||
| 456 | BPF_STMT(BPF_LDX | BPF_LEN, 0), | ||
| 457 | BPF_STMT(BPF_LD | BPF_IMM, 2), | ||
| 458 | BPF_STMT(BPF_ALU | BPF_RSH, 1), | ||
| 459 | BPF_STMT(BPF_ALU | BPF_XOR | BPF_X, 0), | ||
| 460 | BPF_STMT(BPF_ST, 1), /* M1 = 1 ^ len */ | ||
| 461 | BPF_STMT(BPF_ALU | BPF_XOR | BPF_K, 0x80000000), | ||
| 462 | BPF_STMT(BPF_ST, 2), /* M2 = 1 ^ len ^ 0x80000000 */ | ||
| 463 | BPF_STMT(BPF_STX, 15), /* M3 = len */ | ||
| 464 | BPF_STMT(BPF_LDX | BPF_MEM, 1), | ||
| 465 | BPF_STMT(BPF_LD | BPF_MEM, 2), | ||
| 466 | BPF_STMT(BPF_ALU | BPF_XOR | BPF_X, 0), | ||
| 467 | BPF_STMT(BPF_LDX | BPF_MEM, 15), | ||
| 468 | BPF_STMT(BPF_ALU | BPF_XOR | BPF_X, 0), | ||
| 469 | BPF_STMT(BPF_RET | BPF_A, 0) | ||
| 470 | }, | ||
| 471 | SKB, | ||
| 472 | { }, | ||
| 473 | { { 1, 0x80000001 }, { 2, 0x80000002 }, { 60, 0x80000000 ^ 60 } } | ||
| 474 | }, | ||
| 475 | { | ||
| 476 | "JEQ", | ||
| 477 | .insns = { | ||
| 478 | BPF_STMT(BPF_LDX | BPF_LEN, 0), | ||
| 479 | BPF_STMT(BPF_LD | BPF_B | BPF_ABS, 2), | ||
| 480 | BPF_JUMP(BPF_JMP | BPF_JEQ | BPF_X, 0, 0, 1), | ||
| 481 | BPF_STMT(BPF_RET | BPF_K, 1), | ||
| 482 | BPF_STMT(BPF_RET | BPF_K, MAX_K) | ||
| 483 | }, | ||
| 484 | SKB, | ||
| 485 | { 3, 3, 3, 3, 3 }, | ||
| 486 | { { 1, 0 }, { 3, 1 }, { 4, MAX_K } }, | ||
| 487 | }, | ||
| 488 | { | ||
| 489 | "JGT", | ||
| 490 | .insns = { | ||
| 491 | BPF_STMT(BPF_LDX | BPF_LEN, 0), | ||
| 492 | BPF_STMT(BPF_LD | BPF_B | BPF_ABS, 2), | ||
| 493 | BPF_JUMP(BPF_JMP | BPF_JGT | BPF_X, 0, 0, 1), | ||
| 494 | BPF_STMT(BPF_RET | BPF_K, 1), | ||
| 495 | BPF_STMT(BPF_RET | BPF_K, MAX_K) | ||
| 496 | }, | ||
| 497 | SKB, | ||
| 498 | { 4, 4, 4, 3, 3 }, | ||
| 499 | { { 2, 0 }, { 3, 1 }, { 4, MAX_K } }, | ||
| 500 | }, | ||
| 501 | { | ||
| 502 | "JGE", | ||
| 503 | .insns = { | ||
| 504 | BPF_STMT(BPF_LDX | BPF_LEN, 0), | ||
| 505 | BPF_STMT(BPF_LD | BPF_B | BPF_IND, MAX_K), | ||
| 506 | BPF_JUMP(BPF_JMP | BPF_JGE | BPF_K, 1, 1, 0), | ||
| 507 | BPF_STMT(BPF_RET | BPF_K, 10), | ||
| 508 | BPF_JUMP(BPF_JMP | BPF_JGE | BPF_K, 2, 1, 0), | ||
| 509 | BPF_STMT(BPF_RET | BPF_K, 20), | ||
| 510 | BPF_JUMP(BPF_JMP | BPF_JGE | BPF_K, 3, 1, 0), | ||
| 511 | BPF_STMT(BPF_RET | BPF_K, 30), | ||
| 512 | BPF_JUMP(BPF_JMP | BPF_JGE | BPF_K, 4, 1, 0), | ||
| 513 | BPF_STMT(BPF_RET | BPF_K, 40), | ||
| 514 | BPF_STMT(BPF_RET | BPF_K, MAX_K) | ||
| 515 | }, | ||
| 516 | SKB, | ||
| 517 | { 1, 2, 3, 4, 5 }, | ||
| 518 | { { 1, 20 }, { 3, 40 }, { 5, MAX_K } }, | ||
| 519 | }, | ||
| 520 | { | ||
| 521 | "JSET", | ||
| 522 | .insns = { | ||
| 523 | BPF_JUMP(BPF_JMP | BPF_JA, 0, 0, 0), | ||
| 524 | BPF_JUMP(BPF_JMP | BPF_JA, 1, 1, 1), | ||
| 525 | BPF_JUMP(BPF_JMP | BPF_JA, 0, 0, 0), | ||
| 526 | BPF_JUMP(BPF_JMP | BPF_JA, 0, 0, 0), | ||
| 527 | BPF_STMT(BPF_LDX | BPF_LEN, 0), | ||
| 528 | BPF_STMT(BPF_MISC | BPF_TXA, 0), | ||
| 529 | BPF_STMT(BPF_ALU | BPF_SUB | BPF_K, 4), | ||
| 530 | BPF_STMT(BPF_MISC | BPF_TAX, 0), | ||
| 531 | BPF_STMT(BPF_LD | BPF_W | BPF_IND, 0), | ||
| 532 | BPF_JUMP(BPF_JMP | BPF_JSET | BPF_K, 1, 0, 1), | ||
| 533 | BPF_STMT(BPF_RET | BPF_K, 10), | ||
| 534 | BPF_JUMP(BPF_JMP | BPF_JSET | BPF_K, 0x80000000, 0, 1), | ||
| 535 | BPF_STMT(BPF_RET | BPF_K, 20), | ||
| 536 | BPF_JUMP(BPF_JMP | BPF_JSET | BPF_K, 0xffffff, 1, 0), | ||
| 537 | BPF_STMT(BPF_RET | BPF_K, 30), | ||
| 538 | BPF_JUMP(BPF_JMP | BPF_JSET | BPF_K, 0xffffff, 1, 0), | ||
| 539 | BPF_STMT(BPF_RET | BPF_K, 30), | ||
| 540 | BPF_JUMP(BPF_JMP | BPF_JSET | BPF_K, 0xffffff, 1, 0), | ||
| 541 | BPF_STMT(BPF_RET | BPF_K, 30), | ||
| 542 | BPF_JUMP(BPF_JMP | BPF_JSET | BPF_K, 0xffffff, 1, 0), | ||
| 543 | BPF_STMT(BPF_RET | BPF_K, 30), | ||
| 544 | BPF_JUMP(BPF_JMP | BPF_JSET | BPF_K, 0xffffff, 1, 0), | ||
| 545 | BPF_STMT(BPF_RET | BPF_K, 30), | ||
| 546 | BPF_STMT(BPF_RET | BPF_K, MAX_K) | ||
| 547 | }, | ||
| 548 | SKB, | ||
| 549 | { 0, 0xAA, 0x55, 1 }, | ||
| 550 | { { 4, 10 }, { 5, 20 }, { 6, MAX_K } }, | ||
| 551 | }, | ||
| 552 | { | ||
| 92 | "tcpdump port 22", | 553 | "tcpdump port 22", |
| 93 | .insns = { | 554 | .insns = { |
| 94 | { 0x28, 0, 0, 0x0000000c }, | 555 | { 0x28, 0, 0, 0x0000000c }, |
| @@ -134,6 +595,725 @@ static struct bpf_test tests[] = { | |||
| 134 | { { 10, 0 }, { 30, 0 }, { 100, 65535 } }, | 595 | { { 10, 0 }, { 30, 0 }, { 100, 65535 } }, |
| 135 | }, | 596 | }, |
| 136 | { | 597 | { |
| 598 | "tcpdump complex", | ||
| 599 | .insns = { | ||
| 600 | /* tcpdump -nei eth0 'tcp port 22 and (((ip[2:2] - | ||
| 601 | * ((ip[0]&0xf)<<2)) - ((tcp[12]&0xf0)>>2)) != 0) and | ||
| 602 | * (len > 115 or len < 30000000000)' -d | ||
| 603 | */ | ||
| 604 | { 0x28, 0, 0, 0x0000000c }, | ||
| 605 | { 0x15, 30, 0, 0x000086dd }, | ||
| 606 | { 0x15, 0, 29, 0x00000800 }, | ||
| 607 | { 0x30, 0, 0, 0x00000017 }, | ||
| 608 | { 0x15, 0, 27, 0x00000006 }, | ||
| 609 | { 0x28, 0, 0, 0x00000014 }, | ||
| 610 | { 0x45, 25, 0, 0x00001fff }, | ||
| 611 | { 0xb1, 0, 0, 0x0000000e }, | ||
| 612 | { 0x48, 0, 0, 0x0000000e }, | ||
| 613 | { 0x15, 2, 0, 0x00000016 }, | ||
| 614 | { 0x48, 0, 0, 0x00000010 }, | ||
| 615 | { 0x15, 0, 20, 0x00000016 }, | ||
| 616 | { 0x28, 0, 0, 0x00000010 }, | ||
| 617 | { 0x02, 0, 0, 0x00000001 }, | ||
| 618 | { 0x30, 0, 0, 0x0000000e }, | ||
| 619 | { 0x54, 0, 0, 0x0000000f }, | ||
| 620 | { 0x64, 0, 0, 0x00000002 }, | ||
| 621 | { 0x07, 0, 0, 0x00000005 }, | ||
| 622 | { 0x60, 0, 0, 0x00000001 }, | ||
| 623 | { 0x1c, 0, 0, 0x00000000 }, | ||
| 624 | { 0x02, 0, 0, 0x00000005 }, | ||
| 625 | { 0xb1, 0, 0, 0x0000000e }, | ||
| 626 | { 0x50, 0, 0, 0x0000001a }, | ||
| 627 | { 0x54, 0, 0, 0x000000f0 }, | ||
| 628 | { 0x74, 0, 0, 0x00000002 }, | ||
| 629 | { 0x07, 0, 0, 0x00000009 }, | ||
| 630 | { 0x60, 0, 0, 0x00000005 }, | ||
| 631 | { 0x1d, 4, 0, 0x00000000 }, | ||
| 632 | { 0x80, 0, 0, 0x00000000 }, | ||
| 633 | { 0x25, 1, 0, 0x00000073 }, | ||
| 634 | { 0x35, 1, 0, 0xfc23ac00 }, | ||
| 635 | { 0x06, 0, 0, 0x0000ffff }, | ||
| 636 | { 0x06, 0, 0, 0x00000000 }, | ||
| 637 | }, | ||
| 638 | SKB, | ||
| 639 | { 0x10, 0xbf, 0x48, 0xd6, 0x43, 0xd6, | ||
| 640 | 0x3c, 0x07, 0x54, 0x43, 0xe5, 0x76, | ||
| 641 | 0x08, 0x00, | ||
| 642 | 0x45, 0x10, 0x00, 0x64, 0x75, 0xb5, | ||
| 643 | 0x40, 0x00, 0x40, 0x06, 0xad, 0x2e, /* IP header */ | ||
| 644 | 0x0a, 0x01, 0x01, 0x95, /* ip src */ | ||
| 645 | 0x0a, 0x01, 0x02, 0x0a, /* ip dst */ | ||
| 646 | 0xc2, 0x24, | ||
| 647 | 0x00, 0x16 /* dst port */ }, | ||
| 648 | { { 10, 0 }, { 30, 0 }, { 100, 65535 } }, | ||
| 649 | }, | ||
| 650 | { | ||
| 651 | "RET_A", | ||
| 652 | .insns = { | ||
| 653 | /* check that unitialized X and A contain zeros */ | ||
| 654 | BPF_STMT(BPF_MISC | BPF_TXA, 0), | ||
| 655 | BPF_STMT(BPF_RET | BPF_A, 0) | ||
| 656 | }, | ||
| 657 | SKB, | ||
| 658 | {}, | ||
| 659 | { {1, 0}, {2, 0} }, | ||
| 660 | }, | ||
| 661 | { | ||
| 662 | "INT: ADD trivial", | ||
| 663 | .insns_int = { | ||
| 664 | BPF_ALU64_IMM(BPF_MOV, R1, 1), | ||
| 665 | BPF_ALU64_IMM(BPF_ADD, R1, 2), | ||
| 666 | BPF_ALU64_IMM(BPF_MOV, R2, 3), | ||
| 667 | BPF_ALU64_REG(BPF_SUB, R1, R2), | ||
| 668 | BPF_ALU64_IMM(BPF_ADD, R1, -1), | ||
| 669 | BPF_ALU64_IMM(BPF_MUL, R1, 3), | ||
| 670 | BPF_ALU64_REG(BPF_MOV, R0, R1), | ||
| 671 | BPF_EXIT_INSN(), | ||
| 672 | }, | ||
| 673 | SKB_INT, | ||
| 674 | { }, | ||
| 675 | { { 0, 0xfffffffd } } | ||
| 676 | }, | ||
| 677 | { | ||
| 678 | "INT: MUL_X", | ||
| 679 | .insns_int = { | ||
| 680 | BPF_ALU64_IMM(BPF_MOV, R0, -1), | ||
| 681 | BPF_ALU64_IMM(BPF_MOV, R1, -1), | ||
| 682 | BPF_ALU64_IMM(BPF_MOV, R2, 3), | ||
| 683 | BPF_ALU64_REG(BPF_MUL, R1, R2), | ||
| 684 | BPF_JMP_IMM(BPF_JEQ, R1, 0xfffffffd, 1), | ||
| 685 | BPF_EXIT_INSN(), | ||
| 686 | BPF_ALU64_IMM(BPF_MOV, R0, 1), | ||
| 687 | BPF_EXIT_INSN(), | ||
| 688 | }, | ||
| 689 | SKB_INT, | ||
| 690 | { }, | ||
| 691 | { { 0, 1 } } | ||
| 692 | }, | ||
| 693 | { | ||
| 694 | "INT: MUL_X2", | ||
| 695 | .insns_int = { | ||
| 696 | BPF_ALU32_IMM(BPF_MOV, R0, -1), | ||
| 697 | BPF_ALU32_IMM(BPF_MOV, R1, -1), | ||
| 698 | BPF_ALU32_IMM(BPF_MOV, R2, 3), | ||
| 699 | BPF_ALU64_REG(BPF_MUL, R1, R2), | ||
| 700 | BPF_ALU64_IMM(BPF_RSH, R1, 8), | ||
| 701 | BPF_JMP_IMM(BPF_JEQ, R1, 0x2ffffff, 1), | ||
| 702 | BPF_EXIT_INSN(), | ||
| 703 | BPF_ALU32_IMM(BPF_MOV, R0, 1), | ||
| 704 | BPF_EXIT_INSN(), | ||
| 705 | }, | ||
| 706 | SKB_INT, | ||
| 707 | { }, | ||
| 708 | { { 0, 1 } } | ||
| 709 | }, | ||
| 710 | { | ||
| 711 | "INT: MUL32_X", | ||
| 712 | .insns_int = { | ||
| 713 | BPF_ALU32_IMM(BPF_MOV, R0, -1), | ||
| 714 | BPF_ALU64_IMM(BPF_MOV, R1, -1), | ||
| 715 | BPF_ALU32_IMM(BPF_MOV, R2, 3), | ||
| 716 | BPF_ALU32_REG(BPF_MUL, R1, R2), | ||
| 717 | BPF_ALU64_IMM(BPF_RSH, R1, 8), | ||
| 718 | BPF_JMP_IMM(BPF_JEQ, R1, 0xffffff, 1), | ||
| 719 | BPF_EXIT_INSN(), | ||
| 720 | BPF_ALU32_IMM(BPF_MOV, R0, 1), | ||
| 721 | BPF_EXIT_INSN(), | ||
| 722 | }, | ||
| 723 | SKB_INT, | ||
| 724 | { }, | ||
| 725 | { { 0, 1 } } | ||
| 726 | }, | ||
| 727 | { | ||
| 728 | /* Have to test all register combinations, since | ||
| 729 | * JITing of different registers will produce | ||
| 730 | * different asm code. | ||
| 731 | */ | ||
| 732 | "INT: ADD 64-bit", | ||
| 733 | .insns_int = { | ||
| 734 | BPF_ALU64_IMM(BPF_MOV, R0, 0), | ||
| 735 | BPF_ALU64_IMM(BPF_MOV, R1, 1), | ||
| 736 | BPF_ALU64_IMM(BPF_MOV, R2, 2), | ||
| 737 | BPF_ALU64_IMM(BPF_MOV, R3, 3), | ||
| 738 | BPF_ALU64_IMM(BPF_MOV, R4, 4), | ||
| 739 | BPF_ALU64_IMM(BPF_MOV, R5, 5), | ||
| 740 | BPF_ALU64_IMM(BPF_MOV, R6, 6), | ||
| 741 | BPF_ALU64_IMM(BPF_MOV, R7, 7), | ||
| 742 | BPF_ALU64_IMM(BPF_MOV, R8, 8), | ||
| 743 | BPF_ALU64_IMM(BPF_MOV, R9, 9), | ||
| 744 | BPF_ALU64_IMM(BPF_ADD, R0, 20), | ||
| 745 | BPF_ALU64_IMM(BPF_ADD, R1, 20), | ||
| 746 | BPF_ALU64_IMM(BPF_ADD, R2, 20), | ||
| 747 | BPF_ALU64_IMM(BPF_ADD, R3, 20), | ||
| 748 | BPF_ALU64_IMM(BPF_ADD, R4, 20), | ||
| 749 | BPF_ALU64_IMM(BPF_ADD, R5, 20), | ||
| 750 | BPF_ALU64_IMM(BPF_ADD, R6, 20), | ||
| 751 | BPF_ALU64_IMM(BPF_ADD, R7, 20), | ||
| 752 | BPF_ALU64_IMM(BPF_ADD, R8, 20), | ||
| 753 | BPF_ALU64_IMM(BPF_ADD, R9, 20), | ||
| 754 | BPF_ALU64_IMM(BPF_SUB, R0, 10), | ||
| 755 | BPF_ALU64_IMM(BPF_SUB, R1, 10), | ||
| 756 | BPF_ALU64_IMM(BPF_SUB, R2, 10), | ||
| 757 | BPF_ALU64_IMM(BPF_SUB, R3, 10), | ||
| 758 | BPF_ALU64_IMM(BPF_SUB, R4, 10), | ||
| 759 | BPF_ALU64_IMM(BPF_SUB, R5, 10), | ||
| 760 | BPF_ALU64_IMM(BPF_SUB, R6, 10), | ||
| 761 | BPF_ALU64_IMM(BPF_SUB, R7, 10), | ||
| 762 | BPF_ALU64_IMM(BPF_SUB, R8, 10), | ||
| 763 | BPF_ALU64_IMM(BPF_SUB, R9, 10), | ||
| 764 | BPF_ALU64_REG(BPF_ADD, R0, R0), | ||
| 765 | BPF_ALU64_REG(BPF_ADD, R0, R1), | ||
| 766 | BPF_ALU64_REG(BPF_ADD, R0, R2), | ||
| 767 | BPF_ALU64_REG(BPF_ADD, R0, R3), | ||
| 768 | BPF_ALU64_REG(BPF_ADD, R0, R4), | ||
| 769 | BPF_ALU64_REG(BPF_ADD, R0, R5), | ||
| 770 | BPF_ALU64_REG(BPF_ADD, R0, R6), | ||
| 771 | BPF_ALU64_REG(BPF_ADD, R0, R7), | ||
| 772 | BPF_ALU64_REG(BPF_ADD, R0, R8), | ||
| 773 | BPF_ALU64_REG(BPF_ADD, R0, R9), /* R0 == 155 */ | ||
| 774 | BPF_JMP_IMM(BPF_JEQ, R0, 155, 1), | ||
| 775 | BPF_EXIT_INSN(), | ||
| 776 | BPF_ALU64_REG(BPF_ADD, R1, R0), | ||
| 777 | BPF_ALU64_REG(BPF_ADD, R1, R1), | ||
| 778 | BPF_ALU64_REG(BPF_ADD, R1, R2), | ||
| 779 | BPF_ALU64_REG(BPF_ADD, R1, R3), | ||
| 780 | BPF_ALU64_REG(BPF_ADD, R1, R4), | ||
| 781 | BPF_ALU64_REG(BPF_ADD, R1, R5), | ||
| 782 | BPF_ALU64_REG(BPF_ADD, R1, R6), | ||
| 783 | BPF_ALU64_REG(BPF_ADD, R1, R7), | ||
| 784 | BPF_ALU64_REG(BPF_ADD, R1, R8), | ||
| 785 | BPF_ALU64_REG(BPF_ADD, R1, R9), /* R1 == 456 */ | ||
| 786 | BPF_JMP_IMM(BPF_JEQ, R1, 456, 1), | ||
| 787 | BPF_EXIT_INSN(), | ||
| 788 | BPF_ALU64_REG(BPF_ADD, R2, R0), | ||
| 789 | BPF_ALU64_REG(BPF_ADD, R2, R1), | ||
| 790 | BPF_ALU64_REG(BPF_ADD, R2, R2), | ||
| 791 | BPF_ALU64_REG(BPF_ADD, R2, R3), | ||
| 792 | BPF_ALU64_REG(BPF_ADD, R2, R4), | ||
| 793 | BPF_ALU64_REG(BPF_ADD, R2, R5), | ||
| 794 | BPF_ALU64_REG(BPF_ADD, R2, R6), | ||
| 795 | BPF_ALU64_REG(BPF_ADD, R2, R7), | ||
| 796 | BPF_ALU64_REG(BPF_ADD, R2, R8), | ||
| 797 | BPF_ALU64_REG(BPF_ADD, R2, R9), /* R2 == 1358 */ | ||
| 798 | BPF_JMP_IMM(BPF_JEQ, R2, 1358, 1), | ||
| 799 | BPF_EXIT_INSN(), | ||
| 800 | BPF_ALU64_REG(BPF_ADD, R3, R0), | ||
| 801 | BPF_ALU64_REG(BPF_ADD, R3, R1), | ||
| 802 | BPF_ALU64_REG(BPF_ADD, R3, R2), | ||
| 803 | BPF_ALU64_REG(BPF_ADD, R3, R3), | ||
| 804 | BPF_ALU64_REG(BPF_ADD, R3, R4), | ||
| 805 | BPF_ALU64_REG(BPF_ADD, R3, R5), | ||
| 806 | BPF_ALU64_REG(BPF_ADD, R3, R6), | ||
| 807 | BPF_ALU64_REG(BPF_ADD, R3, R7), | ||
| 808 | BPF_ALU64_REG(BPF_ADD, R3, R8), | ||
| 809 | BPF_ALU64_REG(BPF_ADD, R3, R9), /* R3 == 4063 */ | ||
| 810 | BPF_JMP_IMM(BPF_JEQ, R3, 4063, 1), | ||
| 811 | BPF_EXIT_INSN(), | ||
| 812 | BPF_ALU64_REG(BPF_ADD, R4, R0), | ||
| 813 | BPF_ALU64_REG(BPF_ADD, R4, R1), | ||
| 814 | BPF_ALU64_REG(BPF_ADD, R4, R2), | ||
| 815 | BPF_ALU64_REG(BPF_ADD, R4, R3), | ||
| 816 | BPF_ALU64_REG(BPF_ADD, R4, R4), | ||
| 817 | BPF_ALU64_REG(BPF_ADD, R4, R5), | ||
| 818 | BPF_ALU64_REG(BPF_ADD, R4, R6), | ||
| 819 | BPF_ALU64_REG(BPF_ADD, R4, R7), | ||
| 820 | BPF_ALU64_REG(BPF_ADD, R4, R8), | ||
| 821 | BPF_ALU64_REG(BPF_ADD, R4, R9), /* R4 == 12177 */ | ||
| 822 | BPF_JMP_IMM(BPF_JEQ, R4, 12177, 1), | ||
| 823 | BPF_EXIT_INSN(), | ||
| 824 | BPF_ALU64_REG(BPF_ADD, R5, R0), | ||
| 825 | BPF_ALU64_REG(BPF_ADD, R5, R1), | ||
| 826 | BPF_ALU64_REG(BPF_ADD, R5, R2), | ||
| 827 | BPF_ALU64_REG(BPF_ADD, R5, R3), | ||
| 828 | BPF_ALU64_REG(BPF_ADD, R5, R4), | ||
| 829 | BPF_ALU64_REG(BPF_ADD, R5, R5), | ||
| 830 | BPF_ALU64_REG(BPF_ADD, R5, R6), | ||
| 831 | BPF_ALU64_REG(BPF_ADD, R5, R7), | ||
| 832 | BPF_ALU64_REG(BPF_ADD, R5, R8), | ||
| 833 | BPF_ALU64_REG(BPF_ADD, R5, R9), /* R5 == 36518 */ | ||
| 834 | BPF_JMP_IMM(BPF_JEQ, R5, 36518, 1), | ||
| 835 | BPF_EXIT_INSN(), | ||
| 836 | BPF_ALU64_REG(BPF_ADD, R6, R0), | ||
| 837 | BPF_ALU64_REG(BPF_ADD, R6, R1), | ||
| 838 | BPF_ALU64_REG(BPF_ADD, R6, R2), | ||
| 839 | BPF_ALU64_REG(BPF_ADD, R6, R3), | ||
| 840 | BPF_ALU64_REG(BPF_ADD, R6, R4), | ||
| 841 | BPF_ALU64_REG(BPF_ADD, R6, R5), | ||
| 842 | BPF_ALU64_REG(BPF_ADD, R6, R6), | ||
| 843 | BPF_ALU64_REG(BPF_ADD, R6, R7), | ||
| 844 | BPF_ALU64_REG(BPF_ADD, R6, R8), | ||
| 845 | BPF_ALU64_REG(BPF_ADD, R6, R9), /* R6 == 109540 */ | ||
| 846 | BPF_JMP_IMM(BPF_JEQ, R6, 109540, 1), | ||
| 847 | BPF_EXIT_INSN(), | ||
| 848 | BPF_ALU64_REG(BPF_ADD, R7, R0), | ||
| 849 | BPF_ALU64_REG(BPF_ADD, R7, R1), | ||
| 850 | BPF_ALU64_REG(BPF_ADD, R7, R2), | ||
| 851 | BPF_ALU64_REG(BPF_ADD, R7, R3), | ||
| 852 | BPF_ALU64_REG(BPF_ADD, R7, R4), | ||
| 853 | BPF_ALU64_REG(BPF_ADD, R7, R5), | ||
| 854 | BPF_ALU64_REG(BPF_ADD, R7, R6), | ||
| 855 | BPF_ALU64_REG(BPF_ADD, R7, R7), | ||
| 856 | BPF_ALU64_REG(BPF_ADD, R7, R8), | ||
| 857 | BPF_ALU64_REG(BPF_ADD, R7, R9), /* R7 == 328605 */ | ||
| 858 | BPF_JMP_IMM(BPF_JEQ, R7, 328605, 1), | ||
| 859 | BPF_EXIT_INSN(), | ||
| 860 | BPF_ALU64_REG(BPF_ADD, R8, R0), | ||
| 861 | BPF_ALU64_REG(BPF_ADD, R8, R1), | ||
| 862 | BPF_ALU64_REG(BPF_ADD, R8, R2), | ||
| 863 | BPF_ALU64_REG(BPF_ADD, R8, R3), | ||
| 864 | BPF_ALU64_REG(BPF_ADD, R8, R4), | ||
| 865 | BPF_ALU64_REG(BPF_ADD, R8, R5), | ||
| 866 | BPF_ALU64_REG(BPF_ADD, R8, R6), | ||
| 867 | BPF_ALU64_REG(BPF_ADD, R8, R7), | ||
| 868 | BPF_ALU64_REG(BPF_ADD, R8, R8), | ||
| 869 | BPF_ALU64_REG(BPF_ADD, R8, R9), /* R8 == 985799 */ | ||
| 870 | BPF_JMP_IMM(BPF_JEQ, R8, 985799, 1), | ||
| 871 | BPF_EXIT_INSN(), | ||
| 872 | BPF_ALU64_REG(BPF_ADD, R9, R0), | ||
| 873 | BPF_ALU64_REG(BPF_ADD, R9, R1), | ||
| 874 | BPF_ALU64_REG(BPF_ADD, R9, R2), | ||
| 875 | BPF_ALU64_REG(BPF_ADD, R9, R3), | ||
| 876 | BPF_ALU64_REG(BPF_ADD, R9, R4), | ||
| 877 | BPF_ALU64_REG(BPF_ADD, R9, R5), | ||
| 878 | BPF_ALU64_REG(BPF_ADD, R9, R6), | ||
| 879 | BPF_ALU64_REG(BPF_ADD, R9, R7), | ||
| 880 | BPF_ALU64_REG(BPF_ADD, R9, R8), | ||
| 881 | BPF_ALU64_REG(BPF_ADD, R9, R9), /* R9 == 2957380 */ | ||
| 882 | BPF_ALU64_REG(BPF_MOV, R0, R9), | ||
| 883 | BPF_EXIT_INSN(), | ||
| 884 | }, | ||
| 885 | SKB_INT, | ||
| 886 | { }, | ||
| 887 | { { 0, 2957380 } } | ||
| 888 | }, | ||
| 889 | { | ||
| 890 | "INT: ADD 32-bit", | ||
| 891 | .insns_int = { | ||
| 892 | BPF_ALU32_IMM(BPF_MOV, R0, 20), | ||
| 893 | BPF_ALU32_IMM(BPF_MOV, R1, 1), | ||
| 894 | BPF_ALU32_IMM(BPF_MOV, R2, 2), | ||
| 895 | BPF_ALU32_IMM(BPF_MOV, R3, 3), | ||
| 896 | BPF_ALU32_IMM(BPF_MOV, R4, 4), | ||
| 897 | BPF_ALU32_IMM(BPF_MOV, R5, 5), | ||
| 898 | BPF_ALU32_IMM(BPF_MOV, R6, 6), | ||
| 899 | BPF_ALU32_IMM(BPF_MOV, R7, 7), | ||
| 900 | BPF_ALU32_IMM(BPF_MOV, R8, 8), | ||
| 901 | BPF_ALU32_IMM(BPF_MOV, R9, 9), | ||
| 902 | BPF_ALU64_IMM(BPF_ADD, R1, 10), | ||
| 903 | BPF_ALU64_IMM(BPF_ADD, R2, 10), | ||
| 904 | BPF_ALU64_IMM(BPF_ADD, R3, 10), | ||
| 905 | BPF_ALU64_IMM(BPF_ADD, R4, 10), | ||
| 906 | BPF_ALU64_IMM(BPF_ADD, R5, 10), | ||
| 907 | BPF_ALU64_IMM(BPF_ADD, R6, 10), | ||
| 908 | BPF_ALU64_IMM(BPF_ADD, R7, 10), | ||
| 909 | BPF_ALU64_IMM(BPF_ADD, R8, 10), | ||
| 910 | BPF_ALU64_IMM(BPF_ADD, R9, 10), | ||
| 911 | BPF_ALU32_REG(BPF_ADD, R0, R1), | ||
| 912 | BPF_ALU32_REG(BPF_ADD, R0, R2), | ||
| 913 | BPF_ALU32_REG(BPF_ADD, R0, R3), | ||
| 914 | BPF_ALU32_REG(BPF_ADD, R0, R4), | ||
| 915 | BPF_ALU32_REG(BPF_ADD, R0, R5), | ||
| 916 | BPF_ALU32_REG(BPF_ADD, R0, R6), | ||
| 917 | BPF_ALU32_REG(BPF_ADD, R0, R7), | ||
| 918 | BPF_ALU32_REG(BPF_ADD, R0, R8), | ||
| 919 | BPF_ALU32_REG(BPF_ADD, R0, R9), /* R0 == 155 */ | ||
| 920 | BPF_JMP_IMM(BPF_JEQ, R0, 155, 1), | ||
| 921 | BPF_EXIT_INSN(), | ||
| 922 | BPF_ALU32_REG(BPF_ADD, R1, R0), | ||
| 923 | BPF_ALU32_REG(BPF_ADD, R1, R1), | ||
| 924 | BPF_ALU32_REG(BPF_ADD, R1, R2), | ||
| 925 | BPF_ALU32_REG(BPF_ADD, R1, R3), | ||
| 926 | BPF_ALU32_REG(BPF_ADD, R1, R4), | ||
| 927 | BPF_ALU32_REG(BPF_ADD, R1, R5), | ||
| 928 | BPF_ALU32_REG(BPF_ADD, R1, R6), | ||
| 929 | BPF_ALU32_REG(BPF_ADD, R1, R7), | ||
| 930 | BPF_ALU32_REG(BPF_ADD, R1, R8), | ||
| 931 | BPF_ALU32_REG(BPF_ADD, R1, R9), /* R1 == 456 */ | ||
| 932 | BPF_JMP_IMM(BPF_JEQ, R1, 456, 1), | ||
| 933 | BPF_EXIT_INSN(), | ||
| 934 | BPF_ALU32_REG(BPF_ADD, R2, R0), | ||
| 935 | BPF_ALU32_REG(BPF_ADD, R2, R1), | ||
| 936 | BPF_ALU32_REG(BPF_ADD, R2, R2), | ||
| 937 | BPF_ALU32_REG(BPF_ADD, R2, R3), | ||
| 938 | BPF_ALU32_REG(BPF_ADD, R2, R4), | ||
| 939 | BPF_ALU32_REG(BPF_ADD, R2, R5), | ||
| 940 | BPF_ALU32_REG(BPF_ADD, R2, R6), | ||
| 941 | BPF_ALU32_REG(BPF_ADD, R2, R7), | ||
| 942 | BPF_ALU32_REG(BPF_ADD, R2, R8), | ||
| 943 | BPF_ALU32_REG(BPF_ADD, R2, R9), /* R2 == 1358 */ | ||
| 944 | BPF_JMP_IMM(BPF_JEQ, R2, 1358, 1), | ||
| 945 | BPF_EXIT_INSN(), | ||
| 946 | BPF_ALU32_REG(BPF_ADD, R3, R0), | ||
| 947 | BPF_ALU32_REG(BPF_ADD, R3, R1), | ||
| 948 | BPF_ALU32_REG(BPF_ADD, R3, R2), | ||
| 949 | BPF_ALU32_REG(BPF_ADD, R3, R3), | ||
| 950 | BPF_ALU32_REG(BPF_ADD, R3, R4), | ||
| 951 | BPF_ALU32_REG(BPF_ADD, R3, R5), | ||
| 952 | BPF_ALU32_REG(BPF_ADD, R3, R6), | ||
| 953 | BPF_ALU32_REG(BPF_ADD, R3, R7), | ||
| 954 | BPF_ALU32_REG(BPF_ADD, R3, R8), | ||
| 955 | BPF_ALU32_REG(BPF_ADD, R3, R9), /* R3 == 4063 */ | ||
| 956 | BPF_JMP_IMM(BPF_JEQ, R3, 4063, 1), | ||
| 957 | BPF_EXIT_INSN(), | ||
| 958 | BPF_ALU32_REG(BPF_ADD, R4, R0), | ||
| 959 | BPF_ALU32_REG(BPF_ADD, R4, R1), | ||
| 960 | BPF_ALU32_REG(BPF_ADD, R4, R2), | ||
| 961 | BPF_ALU32_REG(BPF_ADD, R4, R3), | ||
| 962 | BPF_ALU32_REG(BPF_ADD, R4, R4), | ||
| 963 | BPF_ALU32_REG(BPF_ADD, R4, R5), | ||
| 964 | BPF_ALU32_REG(BPF_ADD, R4, R6), | ||
| 965 | BPF_ALU32_REG(BPF_ADD, R4, R7), | ||
| 966 | BPF_ALU32_REG(BPF_ADD, R4, R8), | ||
| 967 | BPF_ALU32_REG(BPF_ADD, R4, R9), /* R4 == 12177 */ | ||
| 968 | BPF_JMP_IMM(BPF_JEQ, R4, 12177, 1), | ||
| 969 | BPF_EXIT_INSN(), | ||
| 970 | BPF_ALU32_REG(BPF_ADD, R5, R0), | ||
| 971 | BPF_ALU32_REG(BPF_ADD, R5, R1), | ||
| 972 | BPF_ALU32_REG(BPF_ADD, R5, R2), | ||
| 973 | BPF_ALU32_REG(BPF_ADD, R5, R3), | ||
| 974 | BPF_ALU32_REG(BPF_ADD, R5, R4), | ||
| 975 | BPF_ALU32_REG(BPF_ADD, R5, R5), | ||
| 976 | BPF_ALU32_REG(BPF_ADD, R5, R6), | ||
| 977 | BPF_ALU32_REG(BPF_ADD, R5, R7), | ||
| 978 | BPF_ALU32_REG(BPF_ADD, R5, R8), | ||
| 979 | BPF_ALU32_REG(BPF_ADD, R5, R9), /* R5 == 36518 */ | ||
| 980 | BPF_JMP_IMM(BPF_JEQ, R5, 36518, 1), | ||
| 981 | BPF_EXIT_INSN(), | ||
| 982 | BPF_ALU32_REG(BPF_ADD, R6, R0), | ||
| 983 | BPF_ALU32_REG(BPF_ADD, R6, R1), | ||
| 984 | BPF_ALU32_REG(BPF_ADD, R6, R2), | ||
| 985 | BPF_ALU32_REG(BPF_ADD, R6, R3), | ||
| 986 | BPF_ALU32_REG(BPF_ADD, R6, R4), | ||
| 987 | BPF_ALU32_REG(BPF_ADD, R6, R5), | ||
| 988 | BPF_ALU32_REG(BPF_ADD, R6, R6), | ||
| 989 | BPF_ALU32_REG(BPF_ADD, R6, R7), | ||
| 990 | BPF_ALU32_REG(BPF_ADD, R6, R8), | ||
| 991 | BPF_ALU32_REG(BPF_ADD, R6, R9), /* R6 == 109540 */ | ||
| 992 | BPF_JMP_IMM(BPF_JEQ, R6, 109540, 1), | ||
| 993 | BPF_EXIT_INSN(), | ||
| 994 | BPF_ALU32_REG(BPF_ADD, R7, R0), | ||
| 995 | BPF_ALU32_REG(BPF_ADD, R7, R1), | ||
| 996 | BPF_ALU32_REG(BPF_ADD, R7, R2), | ||
| 997 | BPF_ALU32_REG(BPF_ADD, R7, R3), | ||
| 998 | BPF_ALU32_REG(BPF_ADD, R7, R4), | ||
| 999 | BPF_ALU32_REG(BPF_ADD, R7, R5), | ||
| 1000 | BPF_ALU32_REG(BPF_ADD, R7, R6), | ||
| 1001 | BPF_ALU32_REG(BPF_ADD, R7, R7), | ||
| 1002 | BPF_ALU32_REG(BPF_ADD, R7, R8), | ||
| 1003 | BPF_ALU32_REG(BPF_ADD, R7, R9), /* R7 == 328605 */ | ||
| 1004 | BPF_JMP_IMM(BPF_JEQ, R7, 328605, 1), | ||
| 1005 | BPF_EXIT_INSN(), | ||
| 1006 | BPF_ALU32_REG(BPF_ADD, R8, R0), | ||
| 1007 | BPF_ALU32_REG(BPF_ADD, R8, R1), | ||
| 1008 | BPF_ALU32_REG(BPF_ADD, R8, R2), | ||
| 1009 | BPF_ALU32_REG(BPF_ADD, R8, R3), | ||
| 1010 | BPF_ALU32_REG(BPF_ADD, R8, R4), | ||
| 1011 | BPF_ALU32_REG(BPF_ADD, R8, R5), | ||
| 1012 | BPF_ALU32_REG(BPF_ADD, R8, R6), | ||
| 1013 | BPF_ALU32_REG(BPF_ADD, R8, R7), | ||
| 1014 | BPF_ALU32_REG(BPF_ADD, R8, R8), | ||
| 1015 | BPF_ALU32_REG(BPF_ADD, R8, R9), /* R8 == 985799 */ | ||
| 1016 | BPF_JMP_IMM(BPF_JEQ, R8, 985799, 1), | ||
| 1017 | BPF_EXIT_INSN(), | ||
| 1018 | BPF_ALU32_REG(BPF_ADD, R9, R0), | ||
| 1019 | BPF_ALU32_REG(BPF_ADD, R9, R1), | ||
| 1020 | BPF_ALU32_REG(BPF_ADD, R9, R2), | ||
| 1021 | BPF_ALU32_REG(BPF_ADD, R9, R3), | ||
| 1022 | BPF_ALU32_REG(BPF_ADD, R9, R4), | ||
| 1023 | BPF_ALU32_REG(BPF_ADD, R9, R5), | ||
| 1024 | BPF_ALU32_REG(BPF_ADD, R9, R6), | ||
| 1025 | BPF_ALU32_REG(BPF_ADD, R9, R7), | ||
| 1026 | BPF_ALU32_REG(BPF_ADD, R9, R8), | ||
| 1027 | BPF_ALU32_REG(BPF_ADD, R9, R9), /* R9 == 2957380 */ | ||
| 1028 | BPF_ALU32_REG(BPF_MOV, R0, R9), | ||
| 1029 | BPF_EXIT_INSN(), | ||
| 1030 | }, | ||
| 1031 | SKB_INT, | ||
| 1032 | { }, | ||
| 1033 | { { 0, 2957380 } } | ||
| 1034 | }, | ||
| 1035 | { /* Mainly checking JIT here. */ | ||
| 1036 | "INT: SUB", | ||
| 1037 | .insns_int = { | ||
| 1038 | BPF_ALU64_IMM(BPF_MOV, R0, 0), | ||
| 1039 | BPF_ALU64_IMM(BPF_MOV, R1, 1), | ||
| 1040 | BPF_ALU64_IMM(BPF_MOV, R2, 2), | ||
| 1041 | BPF_ALU64_IMM(BPF_MOV, R3, 3), | ||
| 1042 | BPF_ALU64_IMM(BPF_MOV, R4, 4), | ||
| 1043 | BPF_ALU64_IMM(BPF_MOV, R5, 5), | ||
| 1044 | BPF_ALU64_IMM(BPF_MOV, R6, 6), | ||
| 1045 | BPF_ALU64_IMM(BPF_MOV, R7, 7), | ||
| 1046 | BPF_ALU64_IMM(BPF_MOV, R8, 8), | ||
| 1047 | BPF_ALU64_IMM(BPF_MOV, R9, 9), | ||
| 1048 | BPF_ALU64_REG(BPF_SUB, R0, R0), | ||
| 1049 | BPF_ALU64_REG(BPF_SUB, R0, R1), | ||
| 1050 | BPF_ALU64_REG(BPF_SUB, R0, R2), | ||
| 1051 | BPF_ALU64_REG(BPF_SUB, R0, R3), | ||
| 1052 | BPF_ALU64_REG(BPF_SUB, R0, R4), | ||
| 1053 | BPF_ALU64_REG(BPF_SUB, R0, R5), | ||
| 1054 | BPF_ALU64_REG(BPF_SUB, R0, R6), | ||
| 1055 | BPF_ALU64_REG(BPF_SUB, R0, R7), | ||
| 1056 | BPF_ALU64_REG(BPF_SUB, R0, R8), | ||
| 1057 | BPF_ALU64_REG(BPF_SUB, R0, R9), | ||
| 1058 | BPF_ALU64_IMM(BPF_SUB, R0, 10), | ||
| 1059 | BPF_JMP_IMM(BPF_JEQ, R0, -55, 1), | ||
| 1060 | BPF_EXIT_INSN(), | ||
| 1061 | BPF_ALU64_REG(BPF_SUB, R1, R0), | ||
| 1062 | BPF_ALU64_REG(BPF_SUB, R1, R2), | ||
| 1063 | BPF_ALU64_REG(BPF_SUB, R1, R3), | ||
| 1064 | BPF_ALU64_REG(BPF_SUB, R1, R4), | ||
| 1065 | BPF_ALU64_REG(BPF_SUB, R1, R5), | ||
| 1066 | BPF_ALU64_REG(BPF_SUB, R1, R6), | ||
| 1067 | BPF_ALU64_REG(BPF_SUB, R1, R7), | ||
| 1068 | BPF_ALU64_REG(BPF_SUB, R1, R8), | ||
| 1069 | BPF_ALU64_REG(BPF_SUB, R1, R9), | ||
| 1070 | BPF_ALU64_IMM(BPF_SUB, R1, 10), | ||
| 1071 | BPF_ALU64_REG(BPF_SUB, R2, R0), | ||
| 1072 | BPF_ALU64_REG(BPF_SUB, R2, R1), | ||
| 1073 | BPF_ALU64_REG(BPF_SUB, R2, R3), | ||
| 1074 | BPF_ALU64_REG(BPF_SUB, R2, R4), | ||
| 1075 | BPF_ALU64_REG(BPF_SUB, R2, R5), | ||
| 1076 | BPF_ALU64_REG(BPF_SUB, R2, R6), | ||
| 1077 | BPF_ALU64_REG(BPF_SUB, R2, R7), | ||
| 1078 | BPF_ALU64_REG(BPF_SUB, R2, R8), | ||
| 1079 | BPF_ALU64_REG(BPF_SUB, R2, R9), | ||
| 1080 | BPF_ALU64_IMM(BPF_SUB, R2, 10), | ||
| 1081 | BPF_ALU64_REG(BPF_SUB, R3, R0), | ||
| 1082 | BPF_ALU64_REG(BPF_SUB, R3, R1), | ||
| 1083 | BPF_ALU64_REG(BPF_SUB, R3, R2), | ||
| 1084 | BPF_ALU64_REG(BPF_SUB, R3, R4), | ||
| 1085 | BPF_ALU64_REG(BPF_SUB, R3, R5), | ||
| 1086 | BPF_ALU64_REG(BPF_SUB, R3, R6), | ||
| 1087 | BPF_ALU64_REG(BPF_SUB, R3, R7), | ||
| 1088 | BPF_ALU64_REG(BPF_SUB, R3, R8), | ||
| 1089 | BPF_ALU64_REG(BPF_SUB, R3, R9), | ||
| 1090 | BPF_ALU64_IMM(BPF_SUB, R3, 10), | ||
| 1091 | BPF_ALU64_REG(BPF_SUB, R4, R0), | ||
| 1092 | BPF_ALU64_REG(BPF_SUB, R4, R1), | ||
| 1093 | BPF_ALU64_REG(BPF_SUB, R4, R2), | ||
| 1094 | BPF_ALU64_REG(BPF_SUB, R4, R3), | ||
| 1095 | BPF_ALU64_REG(BPF_SUB, R4, R5), | ||
| 1096 | BPF_ALU64_REG(BPF_SUB, R4, R6), | ||
| 1097 | BPF_ALU64_REG(BPF_SUB, R4, R7), | ||
| 1098 | BPF_ALU64_REG(BPF_SUB, R4, R8), | ||
| 1099 | BPF_ALU64_REG(BPF_SUB, R4, R9), | ||
| 1100 | BPF_ALU64_IMM(BPF_SUB, R4, 10), | ||
| 1101 | BPF_ALU64_REG(BPF_SUB, R5, R0), | ||
| 1102 | BPF_ALU64_REG(BPF_SUB, R5, R1), | ||
| 1103 | BPF_ALU64_REG(BPF_SUB, R5, R2), | ||
| 1104 | BPF_ALU64_REG(BPF_SUB, R5, R3), | ||
| 1105 | BPF_ALU64_REG(BPF_SUB, R5, R4), | ||
| 1106 | BPF_ALU64_REG(BPF_SUB, R5, R6), | ||
| 1107 | BPF_ALU64_REG(BPF_SUB, R5, R7), | ||
| 1108 | BPF_ALU64_REG(BPF_SUB, R5, R8), | ||
| 1109 | BPF_ALU64_REG(BPF_SUB, R5, R9), | ||
| 1110 | BPF_ALU64_IMM(BPF_SUB, R5, 10), | ||
| 1111 | BPF_ALU64_REG(BPF_SUB, R6, R0), | ||
| 1112 | BPF_ALU64_REG(BPF_SUB, R6, R1), | ||
| 1113 | BPF_ALU64_REG(BPF_SUB, R6, R2), | ||
| 1114 | BPF_ALU64_REG(BPF_SUB, R6, R3), | ||
| 1115 | BPF_ALU64_REG(BPF_SUB, R6, R4), | ||
| 1116 | BPF_ALU64_REG(BPF_SUB, R6, R5), | ||
| 1117 | BPF_ALU64_REG(BPF_SUB, R6, R7), | ||
| 1118 | BPF_ALU64_REG(BPF_SUB, R6, R8), | ||
| 1119 | BPF_ALU64_REG(BPF_SUB, R6, R9), | ||
| 1120 | BPF_ALU64_IMM(BPF_SUB, R6, 10), | ||
| 1121 | BPF_ALU64_REG(BPF_SUB, R7, R0), | ||
| 1122 | BPF_ALU64_REG(BPF_SUB, R7, R1), | ||
| 1123 | BPF_ALU64_REG(BPF_SUB, R7, R2), | ||
| 1124 | BPF_ALU64_REG(BPF_SUB, R7, R3), | ||
| 1125 | BPF_ALU64_REG(BPF_SUB, R7, R4), | ||
| 1126 | BPF_ALU64_REG(BPF_SUB, R7, R5), | ||
| 1127 | BPF_ALU64_REG(BPF_SUB, R7, R6), | ||
| 1128 | BPF_ALU64_REG(BPF_SUB, R7, R8), | ||
| 1129 | BPF_ALU64_REG(BPF_SUB, R7, R9), | ||
| 1130 | BPF_ALU64_IMM(BPF_SUB, R7, 10), | ||
| 1131 | BPF_ALU64_REG(BPF_SUB, R8, R0), | ||
| 1132 | BPF_ALU64_REG(BPF_SUB, R8, R1), | ||
| 1133 | BPF_ALU64_REG(BPF_SUB, R8, R2), | ||
| 1134 | BPF_ALU64_REG(BPF_SUB, R8, R3), | ||
| 1135 | BPF_ALU64_REG(BPF_SUB, R8, R4), | ||
| 1136 | BPF_ALU64_REG(BPF_SUB, R8, R5), | ||
| 1137 | BPF_ALU64_REG(BPF_SUB, R8, R6), | ||
| 1138 | BPF_ALU64_REG(BPF_SUB, R8, R7), | ||
| 1139 | BPF_ALU64_REG(BPF_SUB, R8, R9), | ||
| 1140 | BPF_ALU64_IMM(BPF_SUB, R8, 10), | ||
| 1141 | BPF_ALU64_REG(BPF_SUB, R9, R0), | ||
| 1142 | BPF_ALU64_REG(BPF_SUB, R9, R1), | ||
| 1143 | BPF_ALU64_REG(BPF_SUB, R9, R2), | ||
| 1144 | BPF_ALU64_REG(BPF_SUB, R9, R3), | ||
| 1145 | BPF_ALU64_REG(BPF_SUB, R9, R4), | ||
| 1146 | BPF_ALU64_REG(BPF_SUB, R9, R5), | ||
| 1147 | BPF_ALU64_REG(BPF_SUB, R9, R6), | ||
| 1148 | BPF_ALU64_REG(BPF_SUB, R9, R7), | ||
| 1149 | BPF_ALU64_REG(BPF_SUB, R9, R8), | ||
| 1150 | BPF_ALU64_IMM(BPF_SUB, R9, 10), | ||
| 1151 | BPF_ALU64_IMM(BPF_SUB, R0, 10), | ||
| 1152 | BPF_ALU64_IMM(BPF_NEG, R0, 0), | ||
| 1153 | BPF_ALU64_REG(BPF_SUB, R0, R1), | ||
| 1154 | BPF_ALU64_REG(BPF_SUB, R0, R2), | ||
| 1155 | BPF_ALU64_REG(BPF_SUB, R0, R3), | ||
| 1156 | BPF_ALU64_REG(BPF_SUB, R0, R4), | ||
| 1157 | BPF_ALU64_REG(BPF_SUB, R0, R5), | ||
| 1158 | BPF_ALU64_REG(BPF_SUB, R0, R6), | ||
| 1159 | BPF_ALU64_REG(BPF_SUB, R0, R7), | ||
| 1160 | BPF_ALU64_REG(BPF_SUB, R0, R8), | ||
| 1161 | BPF_ALU64_REG(BPF_SUB, R0, R9), | ||
| 1162 | BPF_EXIT_INSN(), | ||
| 1163 | }, | ||
| 1164 | SKB_INT, | ||
| 1165 | { }, | ||
| 1166 | { { 0, 11 } } | ||
| 1167 | }, | ||
| 1168 | { /* Mainly checking JIT here. */ | ||
| 1169 | "INT: XOR", | ||
| 1170 | .insns_int = { | ||
| 1171 | BPF_ALU64_REG(BPF_SUB, R0, R0), | ||
| 1172 | BPF_ALU64_REG(BPF_XOR, R1, R1), | ||
| 1173 | BPF_JMP_REG(BPF_JEQ, R0, R1, 1), | ||
| 1174 | BPF_EXIT_INSN(), | ||
| 1175 | BPF_ALU64_IMM(BPF_MOV, R0, 10), | ||
| 1176 | BPF_ALU64_IMM(BPF_MOV, R1, -1), | ||
| 1177 | BPF_ALU64_REG(BPF_SUB, R1, R1), | ||
| 1178 | BPF_ALU64_REG(BPF_XOR, R2, R2), | ||
| 1179 | BPF_JMP_REG(BPF_JEQ, R1, R2, 1), | ||
| 1180 | BPF_EXIT_INSN(), | ||
| 1181 | BPF_ALU64_REG(BPF_SUB, R2, R2), | ||
| 1182 | BPF_ALU64_REG(BPF_XOR, R3, R3), | ||
| 1183 | BPF_ALU64_IMM(BPF_MOV, R0, 10), | ||
| 1184 | BPF_ALU64_IMM(BPF_MOV, R1, -1), | ||
| 1185 | BPF_JMP_REG(BPF_JEQ, R2, R3, 1), | ||
| 1186 | BPF_EXIT_INSN(), | ||
| 1187 | BPF_ALU64_REG(BPF_SUB, R3, R3), | ||
| 1188 | BPF_ALU64_REG(BPF_XOR, R4, R4), | ||
| 1189 | BPF_ALU64_IMM(BPF_MOV, R2, 1), | ||
| 1190 | BPF_ALU64_IMM(BPF_MOV, R5, -1), | ||
| 1191 | BPF_JMP_REG(BPF_JEQ, R3, R4, 1), | ||
| 1192 | BPF_EXIT_INSN(), | ||
| 1193 | BPF_ALU64_REG(BPF_SUB, R4, R4), | ||
| 1194 | BPF_ALU64_REG(BPF_XOR, R5, R5), | ||
| 1195 | BPF_ALU64_IMM(BPF_MOV, R3, 1), | ||
| 1196 | BPF_ALU64_IMM(BPF_MOV, R7, -1), | ||
| 1197 | BPF_JMP_REG(BPF_JEQ, R5, R4, 1), | ||
| 1198 | BPF_EXIT_INSN(), | ||
| 1199 | BPF_ALU64_IMM(BPF_MOV, R5, 1), | ||
| 1200 | BPF_ALU64_REG(BPF_SUB, R5, R5), | ||
| 1201 | BPF_ALU64_REG(BPF_XOR, R6, R6), | ||
| 1202 | BPF_ALU64_IMM(BPF_MOV, R1, 1), | ||
| 1203 | BPF_ALU64_IMM(BPF_MOV, R8, -1), | ||
| 1204 | BPF_JMP_REG(BPF_JEQ, R5, R6, 1), | ||
| 1205 | BPF_EXIT_INSN(), | ||
| 1206 | BPF_ALU64_REG(BPF_SUB, R6, R6), | ||
| 1207 | BPF_ALU64_REG(BPF_XOR, R7, R7), | ||
| 1208 | BPF_JMP_REG(BPF_JEQ, R7, R6, 1), | ||
| 1209 | BPF_EXIT_INSN(), | ||
| 1210 | BPF_ALU64_REG(BPF_SUB, R7, R7), | ||
| 1211 | BPF_ALU64_REG(BPF_XOR, R8, R8), | ||
| 1212 | BPF_JMP_REG(BPF_JEQ, R7, R8, 1), | ||
| 1213 | BPF_EXIT_INSN(), | ||
| 1214 | BPF_ALU64_REG(BPF_SUB, R8, R8), | ||
| 1215 | BPF_ALU64_REG(BPF_XOR, R9, R9), | ||
| 1216 | BPF_JMP_REG(BPF_JEQ, R9, R8, 1), | ||
| 1217 | BPF_EXIT_INSN(), | ||
| 1218 | BPF_ALU64_REG(BPF_SUB, R9, R9), | ||
| 1219 | BPF_ALU64_REG(BPF_XOR, R0, R0), | ||
| 1220 | BPF_JMP_REG(BPF_JEQ, R9, R0, 1), | ||
| 1221 | BPF_EXIT_INSN(), | ||
| 1222 | BPF_ALU64_REG(BPF_SUB, R1, R1), | ||
| 1223 | BPF_ALU64_REG(BPF_XOR, R0, R0), | ||
| 1224 | BPF_JMP_REG(BPF_JEQ, R9, R0, 2), | ||
| 1225 | BPF_ALU64_IMM(BPF_MOV, R0, 0), | ||
| 1226 | BPF_EXIT_INSN(), | ||
| 1227 | BPF_ALU64_IMM(BPF_MOV, R0, 1), | ||
| 1228 | BPF_EXIT_INSN(), | ||
| 1229 | }, | ||
| 1230 | SKB_INT, | ||
| 1231 | { }, | ||
| 1232 | { { 0, 1 } } | ||
| 1233 | }, | ||
| 1234 | { /* Mainly checking JIT here. */ | ||
| 1235 | "INT: MUL", | ||
| 1236 | .insns_int = { | ||
| 1237 | BPF_ALU64_IMM(BPF_MOV, R0, 11), | ||
| 1238 | BPF_ALU64_IMM(BPF_MOV, R1, 1), | ||
| 1239 | BPF_ALU64_IMM(BPF_MOV, R2, 2), | ||
| 1240 | BPF_ALU64_IMM(BPF_MOV, R3, 3), | ||
| 1241 | BPF_ALU64_IMM(BPF_MOV, R4, 4), | ||
| 1242 | BPF_ALU64_IMM(BPF_MOV, R5, 5), | ||
| 1243 | BPF_ALU64_IMM(BPF_MOV, R6, 6), | ||
| 1244 | BPF_ALU64_IMM(BPF_MOV, R7, 7), | ||
| 1245 | BPF_ALU64_IMM(BPF_MOV, R8, 8), | ||
| 1246 | BPF_ALU64_IMM(BPF_MOV, R9, 9), | ||
| 1247 | BPF_ALU64_REG(BPF_MUL, R0, R0), | ||
| 1248 | BPF_ALU64_REG(BPF_MUL, R0, R1), | ||
| 1249 | BPF_ALU64_REG(BPF_MUL, R0, R2), | ||
| 1250 | BPF_ALU64_REG(BPF_MUL, R0, R3), | ||
| 1251 | BPF_ALU64_REG(BPF_MUL, R0, R4), | ||
| 1252 | BPF_ALU64_REG(BPF_MUL, R0, R5), | ||
| 1253 | BPF_ALU64_REG(BPF_MUL, R0, R6), | ||
| 1254 | BPF_ALU64_REG(BPF_MUL, R0, R7), | ||
| 1255 | BPF_ALU64_REG(BPF_MUL, R0, R8), | ||
| 1256 | BPF_ALU64_REG(BPF_MUL, R0, R9), | ||
| 1257 | BPF_ALU64_IMM(BPF_MUL, R0, 10), | ||
| 1258 | BPF_JMP_IMM(BPF_JEQ, R0, 439084800, 1), | ||
| 1259 | BPF_EXIT_INSN(), | ||
| 1260 | BPF_ALU64_REG(BPF_MUL, R1, R0), | ||
| 1261 | BPF_ALU64_REG(BPF_MUL, R1, R2), | ||
| 1262 | BPF_ALU64_REG(BPF_MUL, R1, R3), | ||
| 1263 | BPF_ALU64_REG(BPF_MUL, R1, R4), | ||
| 1264 | BPF_ALU64_REG(BPF_MUL, R1, R5), | ||
| 1265 | BPF_ALU64_REG(BPF_MUL, R1, R6), | ||
| 1266 | BPF_ALU64_REG(BPF_MUL, R1, R7), | ||
| 1267 | BPF_ALU64_REG(BPF_MUL, R1, R8), | ||
| 1268 | BPF_ALU64_REG(BPF_MUL, R1, R9), | ||
| 1269 | BPF_ALU64_IMM(BPF_MUL, R1, 10), | ||
| 1270 | BPF_ALU64_REG(BPF_MOV, R2, R1), | ||
| 1271 | BPF_ALU64_IMM(BPF_RSH, R2, 32), | ||
| 1272 | BPF_JMP_IMM(BPF_JEQ, R2, 0x5a924, 1), | ||
| 1273 | BPF_EXIT_INSN(), | ||
| 1274 | BPF_ALU64_IMM(BPF_LSH, R1, 32), | ||
| 1275 | BPF_ALU64_IMM(BPF_ARSH, R1, 32), | ||
| 1276 | BPF_JMP_IMM(BPF_JEQ, R1, 0xebb90000, 1), | ||
| 1277 | BPF_EXIT_INSN(), | ||
| 1278 | BPF_ALU64_REG(BPF_MUL, R2, R0), | ||
| 1279 | BPF_ALU64_REG(BPF_MUL, R2, R1), | ||
| 1280 | BPF_ALU64_REG(BPF_MUL, R2, R3), | ||
| 1281 | BPF_ALU64_REG(BPF_MUL, R2, R4), | ||
| 1282 | BPF_ALU64_REG(BPF_MUL, R2, R5), | ||
| 1283 | BPF_ALU64_REG(BPF_MUL, R2, R6), | ||
| 1284 | BPF_ALU64_REG(BPF_MUL, R2, R7), | ||
| 1285 | BPF_ALU64_REG(BPF_MUL, R2, R8), | ||
| 1286 | BPF_ALU64_REG(BPF_MUL, R2, R9), | ||
| 1287 | BPF_ALU64_IMM(BPF_MUL, R2, 10), | ||
| 1288 | BPF_ALU64_IMM(BPF_RSH, R2, 32), | ||
| 1289 | BPF_ALU64_REG(BPF_MOV, R0, R2), | ||
| 1290 | BPF_EXIT_INSN(), | ||
| 1291 | }, | ||
| 1292 | SKB_INT, | ||
| 1293 | { }, | ||
| 1294 | { { 0, 0x35d97ef2 } } | ||
| 1295 | }, | ||
| 1296 | { | ||
| 1297 | "INT: ALU MIX", | ||
| 1298 | .insns_int = { | ||
| 1299 | BPF_ALU64_IMM(BPF_MOV, R0, 11), | ||
| 1300 | BPF_ALU64_IMM(BPF_ADD, R0, -1), | ||
| 1301 | BPF_ALU64_IMM(BPF_MOV, R2, 2), | ||
| 1302 | BPF_ALU64_IMM(BPF_XOR, R2, 3), | ||
| 1303 | BPF_ALU64_REG(BPF_DIV, R0, R2), | ||
| 1304 | BPF_JMP_IMM(BPF_JEQ, R0, 10, 1), | ||
| 1305 | BPF_EXIT_INSN(), | ||
| 1306 | BPF_ALU64_IMM(BPF_MOD, R0, 3), | ||
| 1307 | BPF_JMP_IMM(BPF_JEQ, R0, 1, 1), | ||
| 1308 | BPF_EXIT_INSN(), | ||
| 1309 | BPF_ALU64_IMM(BPF_MOV, R0, -1), | ||
| 1310 | BPF_EXIT_INSN(), | ||
| 1311 | }, | ||
| 1312 | SKB_INT, | ||
| 1313 | { }, | ||
| 1314 | { { 0, -1 } } | ||
| 1315 | }, | ||
| 1316 | { | ||
| 137 | "INT: DIV + ABS", | 1317 | "INT: DIV + ABS", |
| 138 | .insns_int = { | 1318 | .insns_int = { |
| 139 | BPF_ALU64_REG(BPF_MOV, R6, R1), | 1319 | BPF_ALU64_REG(BPF_MOV, R6, R1), |
| @@ -151,6 +1331,19 @@ static struct bpf_test tests[] = { | |||
| 151 | { { 4, 0 }, { 5, 10 } } | 1331 | { { 4, 0 }, { 5, 10 } } |
| 152 | }, | 1332 | }, |
| 153 | { | 1333 | { |
| 1334 | "INT: DIV by zero", | ||
| 1335 | .insns_int = { | ||
| 1336 | BPF_ALU64_REG(BPF_MOV, R6, R1), | ||
| 1337 | BPF_ALU64_IMM(BPF_MOV, R7, 0), | ||
| 1338 | BPF_LD_ABS(BPF_B, 3), | ||
| 1339 | BPF_ALU32_REG(BPF_DIV, R0, R7), | ||
| 1340 | BPF_EXIT_INSN(), | ||
| 1341 | }, | ||
| 1342 | SKB_INT, | ||
| 1343 | { 10, 20, 30, 40, 50 }, | ||
| 1344 | { { 3, 0 }, { 4, 0 } } | ||
| 1345 | }, | ||
| 1346 | { | ||
| 154 | "check: missing ret", | 1347 | "check: missing ret", |
| 155 | .insns = { | 1348 | .insns = { |
| 156 | BPF_STMT(BPF_LD | BPF_IMM, 1), | 1349 | BPF_STMT(BPF_LD | BPF_IMM, 1), |
| @@ -159,6 +1352,37 @@ static struct bpf_test tests[] = { | |||
| 159 | { }, | 1352 | { }, |
| 160 | { } | 1353 | { } |
| 161 | }, | 1354 | }, |
| 1355 | { | ||
| 1356 | "check: div_k_0", | ||
| 1357 | .insns = { | ||
| 1358 | BPF_STMT(BPF_ALU | BPF_DIV | BPF_K, 0), | ||
| 1359 | BPF_STMT(BPF_RET | BPF_K, 0) | ||
| 1360 | }, | ||
| 1361 | EXPECTED_FAIL, | ||
| 1362 | { }, | ||
| 1363 | { } | ||
| 1364 | }, | ||
| 1365 | { | ||
| 1366 | "check: unknown insn", | ||
| 1367 | .insns = { | ||
| 1368 | /* seccomp insn, rejected in socket filter */ | ||
| 1369 | BPF_STMT(BPF_LDX | BPF_W | BPF_ABS, 0), | ||
| 1370 | BPF_STMT(BPF_RET | BPF_K, 0) | ||
| 1371 | }, | ||
| 1372 | EXPECTED_FAIL, | ||
| 1373 | { }, | ||
| 1374 | { } | ||
| 1375 | }, | ||
| 1376 | { | ||
| 1377 | "check: out of range spill/fill", | ||
| 1378 | .insns = { | ||
| 1379 | BPF_STMT(BPF_STX, 16), | ||
| 1380 | BPF_STMT(BPF_RET | BPF_K, 0) | ||
| 1381 | }, | ||
| 1382 | EXPECTED_FAIL, | ||
| 1383 | { }, | ||
| 1384 | { } | ||
| 1385 | }, | ||
| 162 | }; | 1386 | }; |
| 163 | 1387 | ||
| 164 | static int get_length(struct sock_filter *fp) | 1388 | static int get_length(struct sock_filter *fp) |
