1 files changed, 10 insertions, 10 deletions

diff --git a/kernel/irq/generic-chip.c b/kernel/irq/generic-chip.c
index cf80e7b0ddab..db458c68e392 100644
--- a/kernel/irq/generic-chip.c
+++ b/kernel/irq/generic-chip.c
@@ -39,7 +39,7 @@ void irq_gc_mask_disable_reg(struct irq_data *d)
         u32 mask = d->mask;
 
         irq_gc_lock(gc);
-        irq_reg_writel(mask, gc->reg_base + ct->regs.disable);
+        irq_reg_writel(gc, mask, ct->regs.disable);
         *ct->mask_cache &= ~mask;
         irq_gc_unlock(gc);
 }
@@ -59,7 +59,7 @@ void irq_gc_mask_set_bit(struct irq_data *d)
 
         irq_gc_lock(gc);
         *ct->mask_cache |= mask;
-        irq_reg_writel(*ct->mask_cache, gc->reg_base + ct->regs.mask);
+        irq_reg_writel(gc, *ct->mask_cache, ct->regs.mask);
         irq_gc_unlock(gc);
 }
 EXPORT_SYMBOL_GPL(irq_gc_mask_set_bit);
@@ -79,7 +79,7 @@ void irq_gc_mask_clr_bit(struct irq_data *d)
 
         irq_gc_lock(gc);
         *ct->mask_cache &= ~mask;
-        irq_reg_writel(*ct->mask_cache, gc->reg_base + ct->regs.mask);
+        irq_reg_writel(gc, *ct->mask_cache, ct->regs.mask);
         irq_gc_unlock(gc);
 }
 EXPORT_SYMBOL_GPL(irq_gc_mask_clr_bit);
@@ -98,7 +98,7 @@ void irq_gc_unmask_enable_reg(struct irq_data *d)
         u32 mask = d->mask;
 
         irq_gc_lock(gc);
-        irq_reg_writel(mask, gc->reg_base + ct->regs.enable);
+        irq_reg_writel(gc, mask, ct->regs.enable);
         *ct->mask_cache |= mask;
         irq_gc_unlock(gc);
 }
@@ -114,7 +114,7 @@ void irq_gc_ack_set_bit(struct irq_data *d)
         u32 mask = d->mask;
 
         irq_gc_lock(gc);
-        irq_reg_writel(mask, gc->reg_base + ct->regs.ack);
+        irq_reg_writel(gc, mask, ct->regs.ack);
         irq_gc_unlock(gc);
 }
 EXPORT_SYMBOL_GPL(irq_gc_ack_set_bit);
@@ -130,7 +130,7 @@ void irq_gc_ack_clr_bit(struct irq_data *d)
         u32 mask = ~d->mask;
 
         irq_gc_lock(gc);
-        irq_reg_writel(mask, gc->reg_base + ct->regs.ack);
+        irq_reg_writel(gc, mask, ct->regs.ack);
         irq_gc_unlock(gc);
 }
 
@@ -145,8 +145,8 @@ void irq_gc_mask_disable_reg_and_ack(struct irq_data *d)
         u32 mask = d->mask;
 
         irq_gc_lock(gc);
-        irq_reg_writel(mask, gc->reg_base + ct->regs.mask);
-        irq_reg_writel(mask, gc->reg_base + ct->regs.ack);
+        irq_reg_writel(gc, mask, ct->regs.mask);
+        irq_reg_writel(gc, mask, ct->regs.ack);
         irq_gc_unlock(gc);
 }
 
@@ -161,7 +161,7 @@ void irq_gc_eoi(struct irq_data *d)
         u32 mask = d->mask;
 
         irq_gc_lock(gc);
-        irq_reg_writel(mask, gc->reg_base + ct->regs.eoi);
+        irq_reg_writel(gc, mask, ct->regs.eoi);
         irq_gc_unlock(gc);
 }
 
@@ -245,7 +245,7 @@ irq_gc_init_mask_cache(struct irq_chip_generic *gc, enum irq_gc_flags flags)
                 }
                 ct[i].mask_cache = mskptr;
                 if (flags & IRQ_GC_INIT_MASK_CACHE)
-                        *mskptr = irq_reg_readl(gc->reg_base + mskreg);
+                        *mskptr = irq_reg_readl(gc, mskreg);
         }
 }