diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-i386/processor-cyrix.h | 30 | ||||
| -rw-r--r-- | include/asm-i386/processor.h | 11 | ||||
| -rw-r--r-- | include/asm-x86_64/processor.h | 11 |
3 files changed, 30 insertions, 22 deletions
diff --git a/include/asm-i386/processor-cyrix.h b/include/asm-i386/processor-cyrix.h new file mode 100644 index 000000000000..97568ada1f97 --- /dev/null +++ b/include/asm-i386/processor-cyrix.h | |||
| @@ -0,0 +1,30 @@ | |||
| 1 | /* | ||
| 2 | * NSC/Cyrix CPU indexed register access. Must be inlined instead of | ||
| 3 | * macros to ensure correct access ordering | ||
| 4 | * Access order is always 0x22 (=offset), 0x23 (=value) | ||
| 5 | * | ||
| 6 | * When using the old macros a line like | ||
| 7 | * setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x88); | ||
| 8 | * gets expanded to: | ||
| 9 | * do { | ||
| 10 | * outb((CX86_CCR2), 0x22); | ||
| 11 | * outb((({ | ||
| 12 | * outb((CX86_CCR2), 0x22); | ||
| 13 | * inb(0x23); | ||
| 14 | * }) | 0x88), 0x23); | ||
| 15 | * } while (0); | ||
| 16 | * | ||
| 17 | * which in fact violates the access order (= 0x22, 0x22, 0x23, 0x23). | ||
| 18 | */ | ||
| 19 | |||
| 20 | static inline u8 getCx86(u8 reg) | ||
| 21 | { | ||
| 22 | outb(reg, 0x22); | ||
| 23 | return inb(0x23); | ||
| 24 | } | ||
| 25 | |||
| 26 | static inline void setCx86(u8 reg, u8 data) | ||
| 27 | { | ||
| 28 | outb(reg, 0x22); | ||
| 29 | outb(data, 0x23); | ||
| 30 | } | ||
diff --git a/include/asm-i386/processor.h b/include/asm-i386/processor.h index 48a7f69bb767..3845fe72383e 100644 --- a/include/asm-i386/processor.h +++ b/include/asm-i386/processor.h | |||
| @@ -168,17 +168,6 @@ static inline void clear_in_cr4 (unsigned long mask) | |||
| 168 | write_cr4(cr4); | 168 | write_cr4(cr4); |
| 169 | } | 169 | } |
| 170 | 170 | ||
| 171 | /* | ||
| 172 | * NSC/Cyrix CPU indexed register access macros | ||
| 173 | */ | ||
| 174 | |||
| 175 | #define getCx86(reg) ({ outb((reg), 0x22); inb(0x23); }) | ||
| 176 | |||
| 177 | #define setCx86(reg, data) do { \ | ||
| 178 | outb((reg), 0x22); \ | ||
| 179 | outb((data), 0x23); \ | ||
| 180 | } while (0) | ||
| 181 | |||
| 182 | /* Stop speculative execution */ | 171 | /* Stop speculative execution */ |
| 183 | static inline void sync_core(void) | 172 | static inline void sync_core(void) |
| 184 | { | 173 | { |
diff --git a/include/asm-x86_64/processor.h b/include/asm-x86_64/processor.h index a1645bbc03bd..19525175b91c 100644 --- a/include/asm-x86_64/processor.h +++ b/include/asm-x86_64/processor.h | |||
| @@ -389,17 +389,6 @@ static inline void prefetchw(void *x) | |||
| 389 | 389 | ||
| 390 | #define cpu_relax() rep_nop() | 390 | #define cpu_relax() rep_nop() |
| 391 | 391 | ||
| 392 | /* | ||
| 393 | * NSC/Cyrix CPU indexed register access macros | ||
| 394 | */ | ||
| 395 | |||
| 396 | #define getCx86(reg) ({ outb((reg), 0x22); inb(0x23); }) | ||
| 397 | |||
| 398 | #define setCx86(reg, data) do { \ | ||
| 399 | outb((reg), 0x22); \ | ||
| 400 | outb((data), 0x23); \ | ||
| 401 | } while (0) | ||
| 402 | |||
| 403 | static inline void serialize_cpu(void) | 392 | static inline void serialize_cpu(void) |
| 404 | { | 393 | { |
| 405 | __asm__ __volatile__ ("cpuid" : : : "ax", "bx", "cx", "dx"); | 394 | __asm__ __volatile__ ("cpuid" : : : "ax", "bx", "cx", "dx"); |
