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-rw-r--r--include/asm-x86_64/cpufeature.h1
-rw-r--r--include/asm-x86_64/timex.h16
2 files changed, 17 insertions, 0 deletions
diff --git a/include/asm-x86_64/cpufeature.h b/include/asm-x86_64/cpufeature.h
index aea308c65709..72b39f514798 100644
--- a/include/asm-x86_64/cpufeature.h
+++ b/include/asm-x86_64/cpufeature.h
@@ -63,6 +63,7 @@
63#define X86_FEATURE_CENTAUR_MCR (3*32+ 3) /* Centaur MCRs (= MTRRs) */ 63#define X86_FEATURE_CENTAUR_MCR (3*32+ 3) /* Centaur MCRs (= MTRRs) */
64#define X86_FEATURE_K8_C (3*32+ 4) /* C stepping K8 */ 64#define X86_FEATURE_K8_C (3*32+ 4) /* C stepping K8 */
65#define X86_FEATURE_CONSTANT_TSC (3*32+5) /* TSC runs at constant rate */ 65#define X86_FEATURE_CONSTANT_TSC (3*32+5) /* TSC runs at constant rate */
66#define X86_FEATURE_SYNC_RDTSC (3*32+6) /* RDTSC syncs CPU core */
66 67
67/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */ 68/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
68#define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */ 69#define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */
diff --git a/include/asm-x86_64/timex.h b/include/asm-x86_64/timex.h
index f971f45d6d78..f18443fcdf04 100644
--- a/include/asm-x86_64/timex.h
+++ b/include/asm-x86_64/timex.h
@@ -10,6 +10,9 @@
10#include <asm/msr.h> 10#include <asm/msr.h>
11#include <asm/vsyscall.h> 11#include <asm/vsyscall.h>
12#include <asm/hpet.h> 12#include <asm/hpet.h>
13#include <asm/system.h>
14#include <asm/processor.h>
15#include <linux/compiler.h>
13 16
14#define CLOCK_TICK_RATE PIT_TICK_RATE /* Underlying HZ */ 17#define CLOCK_TICK_RATE PIT_TICK_RATE /* Underlying HZ */
15 18
@@ -23,6 +26,19 @@ static inline cycles_t get_cycles (void)
23 return ret; 26 return ret;
24} 27}
25 28
29/* Like get_cycles, but make sure the CPU is synchronized. */
30static __always_inline cycles_t get_cycles_sync(void)
31{
32 unsigned long long ret;
33 unsigned eax;
34 /* Don't do an additional sync on CPUs where we know
35 RDTSC is already synchronous. */
36 alternative_io(ASM_NOP2, "cpuid", X86_FEATURE_SYNC_RDTSC,
37 "=a" (eax), "0" (1) : "ebx","ecx","edx","memory");
38 rdtscll(ret);
39 return ret;
40}
41
26extern unsigned int cpu_khz; 42extern unsigned int cpu_khz;
27 43
28extern int read_current_timer(unsigned long *timer_value); 44extern int read_current_timer(unsigned long *timer_value);