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-rw-r--r--include/asm-sh/bugs.h4
-rw-r--r--include/asm-sh/cpu-sh3/freq.h4
-rw-r--r--include/asm-sh/cpu-sh3/mmu_context.h1
-rw-r--r--include/asm-sh/cpu-sh3/timer.h3
-rw-r--r--include/asm-sh/cpu-sh4/freq.h2
-rw-r--r--include/asm-sh/dma-mapping.h8
-rw-r--r--include/asm-sh/dma.h1
-rw-r--r--include/asm-sh/fixmap.h8
-rw-r--r--include/asm-sh/floppy.h4
-rw-r--r--include/asm-sh/io.h4
-rw-r--r--include/asm-sh/pgtable.h6
-rw-r--r--include/asm-sh/processor.h4
-rw-r--r--include/asm-sh/se7300.h64
-rw-r--r--include/asm-sh/se73180.h66
-rw-r--r--include/asm-sh/ubc.h3
15 files changed, 20 insertions, 162 deletions
diff --git a/include/asm-sh/bugs.h b/include/asm-sh/bugs.h
index aeee8da9c54f..b66139ff73fc 100644
--- a/include/asm-sh/bugs.h
+++ b/include/asm-sh/bugs.h
@@ -29,7 +29,7 @@ static void __init check_bugs(void)
29 *p++ = '2'; 29 *p++ = '2';
30 *p++ = 'a'; 30 *p++ = 'a';
31 break; 31 break;
32 case CPU_SH7705 ... CPU_SH7300: 32 case CPU_SH7705 ... CPU_SH7729:
33 *p++ = '3'; 33 *p++ = '3';
34 break; 34 break;
35 case CPU_SH7750 ... CPU_SH4_501: 35 case CPU_SH7750 ... CPU_SH4_501:
@@ -39,7 +39,7 @@ static void __init check_bugs(void)
39 *p++ = '4'; 39 *p++ = '4';
40 *p++ = 'a'; 40 *p++ = 'a';
41 break; 41 break;
42 case CPU_SH73180 ... CPU_SH7722: 42 case CPU_SH7343 ... CPU_SH7722:
43 *p++ = '4'; 43 *p++ = '4';
44 *p++ = 'a'; 44 *p++ = 'a';
45 *p++ = 'l'; 45 *p++ = 'l';
diff --git a/include/asm-sh/cpu-sh3/freq.h b/include/asm-sh/cpu-sh3/freq.h
index 273f3229785c..0a054b53b9de 100644
--- a/include/asm-sh/cpu-sh3/freq.h
+++ b/include/asm-sh/cpu-sh3/freq.h
@@ -10,11 +10,7 @@
10#ifndef __ASM_CPU_SH3_FREQ_H 10#ifndef __ASM_CPU_SH3_FREQ_H
11#define __ASM_CPU_SH3_FREQ_H 11#define __ASM_CPU_SH3_FREQ_H
12 12
13#if defined(CONFIG_CPU_SUBTYPE_SH7300)
14#define FRQCR 0xa415ff80
15#else
16#define FRQCR 0xffffff80 13#define FRQCR 0xffffff80
17#endif
18#define MIN_DIVISOR_NR 0 14#define MIN_DIVISOR_NR 0
19#define MAX_DIVISOR_NR 4 15#define MAX_DIVISOR_NR 4
20 16
diff --git a/include/asm-sh/cpu-sh3/mmu_context.h b/include/asm-sh/cpu-sh3/mmu_context.h
index 4704e86dff5b..b20786d42d09 100644
--- a/include/asm-sh/cpu-sh3/mmu_context.h
+++ b/include/asm-sh/cpu-sh3/mmu_context.h
@@ -30,7 +30,6 @@
30#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \ 30#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
31 defined(CONFIG_CPU_SUBTYPE_SH7709) || \ 31 defined(CONFIG_CPU_SUBTYPE_SH7709) || \
32 defined(CONFIG_CPU_SUBTYPE_SH7706) || \ 32 defined(CONFIG_CPU_SUBTYPE_SH7706) || \
33 defined(CONFIG_CPU_SUBTYPE_SH7300) || \
34 defined(CONFIG_CPU_SUBTYPE_SH7705) || \ 33 defined(CONFIG_CPU_SUBTYPE_SH7705) || \
35 defined(CONFIG_CPU_SUBTYPE_SH7712) || \ 34 defined(CONFIG_CPU_SUBTYPE_SH7712) || \
36 defined(CONFIG_CPU_SUBTYPE_SH7710) 35 defined(CONFIG_CPU_SUBTYPE_SH7710)
diff --git a/include/asm-sh/cpu-sh3/timer.h b/include/asm-sh/cpu-sh3/timer.h
index 4928b08f9d19..b6c2020a2ad3 100644
--- a/include/asm-sh/cpu-sh3/timer.h
+++ b/include/asm-sh/cpu-sh3/timer.h
@@ -19,7 +19,6 @@
19 * SH7729R 19 * SH7729R
20 * SH7710 20 * SH7710
21 * SH7720 21 * SH7720
22 * SH7300
23 * SH7710 22 * SH7710
24 * --------------------------------------------------------------------------- 23 * ---------------------------------------------------------------------------
25 */ 24 */
@@ -28,7 +27,7 @@
28#define TMU_TOCR 0xfffffe90 /* Byte access */ 27#define TMU_TOCR 0xfffffe90 /* Byte access */
29#endif 28#endif
30 29
31#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7710) 30#if defined(CONFIG_CPU_SUBTYPE_SH7710)
32#define TMU_012_TSTR 0xa412fe92 /* Byte access */ 31#define TMU_012_TSTR 0xa412fe92 /* Byte access */
33 32
34#define TMU0_TCOR 0xa412fe94 /* Long access */ 33#define TMU0_TCOR 0xa412fe94 /* Long access */
diff --git a/include/asm-sh/cpu-sh4/freq.h b/include/asm-sh/cpu-sh4/freq.h
index 026025b51cea..dc1d32a86374 100644
--- a/include/asm-sh/cpu-sh4/freq.h
+++ b/include/asm-sh/cpu-sh4/freq.h
@@ -10,7 +10,7 @@
10#ifndef __ASM_CPU_SH4_FREQ_H 10#ifndef __ASM_CPU_SH4_FREQ_H
11#define __ASM_CPU_SH4_FREQ_H 11#define __ASM_CPU_SH4_FREQ_H
12 12
13#if defined(CONFIG_CPU_SUBTYPE_SH73180) || defined(CONFIG_CPU_SUBTYPE_SH7722) 13#if defined(CONFIG_CPU_SUBTYPE_SH7722)
14#define FRQCR 0xa4150000 14#define FRQCR 0xa4150000
15#define VCLKCR 0xa4150004 15#define VCLKCR 0xa4150004
16#define SCLKACR 0xa4150008 16#define SCLKACR 0xa4150008
diff --git a/include/asm-sh/dma-mapping.h b/include/asm-sh/dma-mapping.h
index d3bc7818bbbe..6f492ac3fa13 100644
--- a/include/asm-sh/dma-mapping.h
+++ b/include/asm-sh/dma-mapping.h
@@ -69,11 +69,11 @@ static inline dma_addr_t dma_map_single(struct device *dev,
69{ 69{
70#if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT) 70#if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT)
71 if (dev->bus == &pci_bus_type) 71 if (dev->bus == &pci_bus_type)
72 return virt_to_bus(ptr); 72 return virt_to_phys(ptr);
73#endif 73#endif
74 dma_cache_sync(dev, ptr, size, dir); 74 dma_cache_sync(dev, ptr, size, dir);
75 75
76 return virt_to_bus(ptr); 76 return virt_to_phys(ptr);
77} 77}
78 78
79#define dma_unmap_single(dev, addr, size, dir) do { } while (0) 79#define dma_unmap_single(dev, addr, size, dir) do { } while (0)
@@ -116,7 +116,7 @@ static inline void dma_sync_single(struct device *dev, dma_addr_t dma_handle,
116 if (dev->bus == &pci_bus_type) 116 if (dev->bus == &pci_bus_type)
117 return; 117 return;
118#endif 118#endif
119 dma_cache_sync(dev, bus_to_virt(dma_handle), size, dir); 119 dma_cache_sync(dev, phys_to_virt(dma_handle), size, dir);
120} 120}
121 121
122static inline void dma_sync_single_range(struct device *dev, 122static inline void dma_sync_single_range(struct device *dev,
@@ -128,7 +128,7 @@ static inline void dma_sync_single_range(struct device *dev,
128 if (dev->bus == &pci_bus_type) 128 if (dev->bus == &pci_bus_type)
129 return; 129 return;
130#endif 130#endif
131 dma_cache_sync(dev, bus_to_virt(dma_handle) + offset, size, dir); 131 dma_cache_sync(dev, phys_to_virt(dma_handle) + offset, size, dir);
132} 132}
133 133
134static inline void dma_sync_sg(struct device *dev, struct scatterlist *sg, 134static inline void dma_sync_sg(struct device *dev, struct scatterlist *sg,
diff --git a/include/asm-sh/dma.h b/include/asm-sh/dma.h
index 6034d4a29e73..4c75b70b6414 100644
--- a/include/asm-sh/dma.h
+++ b/include/asm-sh/dma.h
@@ -111,6 +111,7 @@ struct dma_info {
111 111
112 struct list_head list; 112 struct list_head list;
113 int first_channel_nr; 113 int first_channel_nr;
114 int first_vchannel_nr;
114}; 115};
115 116
116struct dma_chan_caps { 117struct dma_chan_caps {
diff --git a/include/asm-sh/fixmap.h b/include/asm-sh/fixmap.h
index 458e9fa59545..8a566177ad96 100644
--- a/include/asm-sh/fixmap.h
+++ b/include/asm-sh/fixmap.h
@@ -46,6 +46,9 @@
46 * fix-mapped? 46 * fix-mapped?
47 */ 47 */
48enum fixed_addresses { 48enum fixed_addresses {
49#define FIX_N_COLOURS 16
50 FIX_CMAP_BEGIN,
51 FIX_CMAP_END = FIX_CMAP_BEGIN + FIX_N_COLOURS,
49#ifdef CONFIG_HIGHMEM 52#ifdef CONFIG_HIGHMEM
50 FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */ 53 FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */
51 FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1, 54 FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1,
@@ -53,8 +56,8 @@ enum fixed_addresses {
53 __end_of_fixed_addresses 56 __end_of_fixed_addresses
54}; 57};
55 58
56extern void __set_fixmap (enum fixed_addresses idx, 59extern void __set_fixmap(enum fixed_addresses idx,
57 unsigned long phys, pgprot_t flags); 60 unsigned long phys, pgprot_t flags);
58 61
59#define set_fixmap(idx, phys) \ 62#define set_fixmap(idx, phys) \
60 __set_fixmap(idx, phys, PAGE_KERNEL) 63 __set_fixmap(idx, phys, PAGE_KERNEL)
@@ -106,5 +109,4 @@ static inline unsigned long virt_to_fix(const unsigned long vaddr)
106 BUG_ON(vaddr >= FIXADDR_TOP || vaddr < FIXADDR_START); 109 BUG_ON(vaddr >= FIXADDR_TOP || vaddr < FIXADDR_START);
107 return __virt_to_fix(vaddr); 110 return __virt_to_fix(vaddr);
108} 111}
109
110#endif 112#endif
diff --git a/include/asm-sh/floppy.h b/include/asm-sh/floppy.h
index dc1ad464fa32..3b59b3af777b 100644
--- a/include/asm-sh/floppy.h
+++ b/include/asm-sh/floppy.h
@@ -181,7 +181,7 @@ static void _fd_chose_dma_mode(char *addr, unsigned long size)
181{ 181{
182 if(can_use_virtual_dma == 2) { 182 if(can_use_virtual_dma == 2) {
183 if((unsigned int) addr >= (unsigned int) high_memory || 183 if((unsigned int) addr >= (unsigned int) high_memory ||
184 virt_to_bus(addr) >= 0x10000000) 184 virt_to_phys(addr) >= 0x10000000)
185 use_virtual_dma = 1; 185 use_virtual_dma = 1;
186 else 186 else
187 use_virtual_dma = 0; 187 use_virtual_dma = 0;
@@ -219,7 +219,7 @@ static int hard_dma_setup(char *addr, unsigned long size, int mode, int io)
219 doing_pdma = 0; 219 doing_pdma = 0;
220 clear_dma_ff(FLOPPY_DMA); 220 clear_dma_ff(FLOPPY_DMA);
221 set_dma_mode(FLOPPY_DMA,mode); 221 set_dma_mode(FLOPPY_DMA,mode);
222 set_dma_addr(FLOPPY_DMA,virt_to_bus(addr)); 222 set_dma_addr(FLOPPY_DMA,virt_to_phys(addr));
223 set_dma_count(FLOPPY_DMA,size); 223 set_dma_count(FLOPPY_DMA,size);
224 enable_dma(FLOPPY_DMA); 224 enable_dma(FLOPPY_DMA);
225 return 0; 225 return 0;
diff --git a/include/asm-sh/io.h b/include/asm-sh/io.h
index aa80930ce8e4..e6a1877dcb20 100644
--- a/include/asm-sh/io.h
+++ b/include/asm-sh/io.h
@@ -241,10 +241,6 @@ static inline void *phys_to_virt(unsigned long address)
241#define virt_to_phys(address) ((unsigned long)(address)) 241#define virt_to_phys(address) ((unsigned long)(address))
242#endif 242#endif
243 243
244#define virt_to_bus virt_to_phys
245#define bus_to_virt phys_to_virt
246#define page_to_bus page_to_phys
247
248/* 244/*
249 * readX/writeX() are used to access memory mapped devices. On some 245 * readX/writeX() are used to access memory mapped devices. On some
250 * architectures the memory mapped IO stuff needs to be accessed 246 * architectures the memory mapped IO stuff needs to be accessed
diff --git a/include/asm-sh/pgtable.h b/include/asm-sh/pgtable.h
index 22efffe45019..e3fae12c0e49 100644
--- a/include/asm-sh/pgtable.h
+++ b/include/asm-sh/pgtable.h
@@ -55,11 +55,7 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
55 55
56#define PTE_PHYS_MASK (0x20000000 - PAGE_SIZE) 56#define PTE_PHYS_MASK (0x20000000 - PAGE_SIZE)
57 57
58/* 58#define VMALLOC_START (P3SEG)
59 * First 1MB map is used by fixed purpose.
60 * Currently only 4-entry (16kB) is used (see arch/sh/mm/cache.c)
61 */
62#define VMALLOC_START (P3SEG+0x00100000)
63#define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE) 59#define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE)
64 60
65/* 61/*
diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h
index 2252e75daa26..26d52174f4b4 100644
--- a/include/asm-sh/processor.h
+++ b/include/asm-sh/processor.h
@@ -45,7 +45,7 @@ enum cpu_type {
45 CPU_SH7705, CPU_SH7706, CPU_SH7707, 45 CPU_SH7705, CPU_SH7706, CPU_SH7707,
46 CPU_SH7708, CPU_SH7708S, CPU_SH7708R, 46 CPU_SH7708, CPU_SH7708S, CPU_SH7708R,
47 CPU_SH7709, CPU_SH7709A, CPU_SH7710, CPU_SH7712, 47 CPU_SH7709, CPU_SH7709A, CPU_SH7710, CPU_SH7712,
48 CPU_SH7729, CPU_SH7300, 48 CPU_SH7729,
49 49
50 /* SH-4 types */ 50 /* SH-4 types */
51 CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R, 51 CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R,
@@ -55,7 +55,7 @@ enum cpu_type {
55 CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785, CPU_SHX3, 55 CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785, CPU_SHX3,
56 56
57 /* SH4AL-DSP types */ 57 /* SH4AL-DSP types */
58 CPU_SH73180, CPU_SH7343, CPU_SH7722, 58 CPU_SH7343, CPU_SH7722,
59 59
60 /* Unknown subtype */ 60 /* Unknown subtype */
61 CPU_SH_NONE 61 CPU_SH_NONE
diff --git a/include/asm-sh/se7300.h b/include/asm-sh/se7300.h
deleted file mode 100644
index 4e24edccb30d..000000000000
--- a/include/asm-sh/se7300.h
+++ /dev/null
@@ -1,64 +0,0 @@
1#ifndef __ASM_SH_HITACHI_SE7300_H
2#define __ASM_SH_HITACHI_SE7300_H
3
4/*
5 * linux/include/asm-sh/se/se7300.h
6 *
7 * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
8 *
9 * SH-Mobile SolutionEngine 7300 support
10 */
11
12/* Box specific addresses. */
13
14/* Area 0 */
15#define PA_ROM 0x00000000 /* EPROM */
16#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte(Actually 2MB) */
17#define PA_FROM 0x00400000 /* Flash ROM */
18#define PA_FROM_SIZE 0x00400000 /* Flash size 4M byte */
19#define PA_SRAM 0x00800000 /* SRAM */
20#define PA_FROM_SIZE 0x00400000 /* SRAM size 4M byte */
21/* Area 1 */
22#define PA_EXT1 0x04000000
23#define PA_EXT1_SIZE 0x04000000
24/* Area 2 */
25#define PA_EXT2 0x08000000
26#define PA_EXT2_SIZE 0x04000000
27/* Area 3 */
28#define PA_SDRAM 0x0c000000
29#define PA_SDRAM_SIZE 0x04000000
30/* Area 4 */
31#define PA_PCIC 0x10000000 /* MR-SHPC-01 PCMCIA */
32#define PA_MRSHPC 0xb03fffe0 /* MR-SHPC-01 PCMCIA controller */
33#define PA_MRSHPC_MW1 0xb0400000 /* MR-SHPC-01 memory window base */
34#define PA_MRSHPC_MW2 0xb0500000 /* MR-SHPC-01 attribute window base */
35#define PA_MRSHPC_IO 0xb0600000 /* MR-SHPC-01 I/O window base */
36#define MRSHPC_OPTION (PA_MRSHPC + 6)
37#define MRSHPC_CSR (PA_MRSHPC + 8)
38#define MRSHPC_ISR (PA_MRSHPC + 10)
39#define MRSHPC_ICR (PA_MRSHPC + 12)
40#define MRSHPC_CPWCR (PA_MRSHPC + 14)
41#define MRSHPC_MW0CR1 (PA_MRSHPC + 16)
42#define MRSHPC_MW1CR1 (PA_MRSHPC + 18)
43#define MRSHPC_IOWCR1 (PA_MRSHPC + 20)
44#define MRSHPC_MW0CR2 (PA_MRSHPC + 22)
45#define MRSHPC_MW1CR2 (PA_MRSHPC + 24)
46#define MRSHPC_IOWCR2 (PA_MRSHPC + 26)
47#define MRSHPC_CDCR (PA_MRSHPC + 28)
48#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30)
49#define PA_LED 0xb0800000 /* LED */
50#define PA_DIPSW 0xb0900000 /* Dip switch 31 */
51#define PA_EPLD_MODESET 0xb0a00000 /* FPGA Mode set register */
52#define PA_EPLD_ST1 0xb0a80000 /* FPGA Interrupt status register1 */
53#define PA_EPLD_ST2 0xb0ac0000 /* FPGA Interrupt status register2 */
54/* Area 5 */
55#define PA_EXT5 0x14000000
56#define PA_EXT5_SIZE 0x04000000
57/* Area 6 */
58#define PA_LCD1 0xb8000000
59#define PA_LCD2 0xb8800000
60
61#define __IO_PREFIX sh7300se
62#include <asm/io_generic.h>
63
64#endif /* __ASM_SH_HITACHI_SE7300_H */
diff --git a/include/asm-sh/se73180.h b/include/asm-sh/se73180.h
deleted file mode 100644
index 907c062b4c9a..000000000000
--- a/include/asm-sh/se73180.h
+++ /dev/null
@@ -1,66 +0,0 @@
1#ifndef __ASM_SH_SE73180_H
2#define __ASM_SH_SE73180_H
3
4/*
5 * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
6 *
7 * SH-Mobile SolutionEngine 73180 support
8 */
9
10/* Box specific addresses. */
11
12/* Area 0 */
13#define PA_ROM 0x00000000 /* EPROM */
14#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte(Actually 2MB) */
15#define PA_FROM 0x00400000 /* Flash ROM */
16#define PA_FROM_SIZE 0x00400000 /* Flash size 4M byte */
17#define PA_SRAM 0x00800000 /* SRAM */
18#define PA_FROM_SIZE 0x00400000 /* SRAM size 4M byte */
19/* Area 1 */
20#define PA_EXT1 0x04000000
21#define PA_EXT1_SIZE 0x04000000
22/* Area 2 */
23#define PA_EXT2 0x08000000
24#define PA_EXT2_SIZE 0x04000000
25/* Area 3 */
26#define PA_SDRAM 0x0c000000
27#define PA_SDRAM_SIZE 0x04000000
28/* Area 4 */
29#define PA_PCIC 0x10000000 /* MR-SHPC-01 PCMCIA */
30#define PA_MRSHPC 0xb03fffe0 /* MR-SHPC-01 PCMCIA controller */
31#define PA_MRSHPC_MW1 0xb0400000 /* MR-SHPC-01 memory window base */
32#define PA_MRSHPC_MW2 0xb0500000 /* MR-SHPC-01 attribute window base */
33#define PA_MRSHPC_IO 0xb0600000 /* MR-SHPC-01 I/O window base */
34#define MRSHPC_OPTION (PA_MRSHPC + 6)
35#define MRSHPC_CSR (PA_MRSHPC + 8)
36#define MRSHPC_ISR (PA_MRSHPC + 10)
37#define MRSHPC_ICR (PA_MRSHPC + 12)
38#define MRSHPC_CPWCR (PA_MRSHPC + 14)
39#define MRSHPC_MW0CR1 (PA_MRSHPC + 16)
40#define MRSHPC_MW1CR1 (PA_MRSHPC + 18)
41#define MRSHPC_IOWCR1 (PA_MRSHPC + 20)
42#define MRSHPC_MW0CR2 (PA_MRSHPC + 22)
43#define MRSHPC_MW1CR2 (PA_MRSHPC + 24)
44#define MRSHPC_IOWCR2 (PA_MRSHPC + 26)
45#define MRSHPC_CDCR (PA_MRSHPC + 28)
46#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30)
47#define PA_LED 0xb0C00000 /* LED */
48#define LED_SHIFT 0
49#define PA_DIPSW 0xb0900000 /* Dip switch 31 */
50#define PA_EPLD_MODESET 0xb0a00000 /* FPGA Mode set register */
51#define PA_EPLD_ST1 0xb0a80000 /* FPGA Interrupt status register1 */
52#define PA_EPLD_ST2 0xb0ac0000 /* FPGA Interrupt status register2 */
53/* Area 5 */
54#define PA_EXT5 0x14000000
55#define PA_EXT5_SIZE 0x04000000
56/* Area 6 */
57#define PA_LCD1 0xb8000000
58#define PA_LCD2 0xb8800000
59
60#define __IO_PREFIX sh73180se
61#include <asm/io_generic.h>
62
63/* arch/sh/boards/se/73180/irq.c */
64int shmse_irq_demux(int irq);
65
66#endif /* __ASM_SH_SE73180_H */
diff --git a/include/asm-sh/ubc.h b/include/asm-sh/ubc.h
index 38d46e01b846..56f4e30dc49c 100644
--- a/include/asm-sh/ubc.h
+++ b/include/asm-sh/ubc.h
@@ -15,8 +15,7 @@
15#include <asm/cpu/ubc.h> 15#include <asm/cpu/ubc.h>
16 16
17/* User Break Controller */ 17/* User Break Controller */
18#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \ 18#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
19 defined(CONFIG_CPU_SUBTYPE_SH7300)
20#define UBC_TYPE_SH7729 (current_cpu_data.type == CPU_SH7729) 19#define UBC_TYPE_SH7729 (current_cpu_data.type == CPU_SH7729)
21#else 20#else
22#define UBC_TYPE_SH7729 0 21#define UBC_TYPE_SH7729 0
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-29 12:58:42 -0500