290 files changed, 9066 insertions, 3293 deletions

diff --git a/include/acpi/acpi.h b/include/acpi/acpi.h
index ca0cb603b171..a08e55a263c9 100644
--- a/include/acpi/acpi.h
+++ b/include/acpi/acpi.h
@@ -62,8 +62,6 @@
 #include <acpi/acrestyp.h>              /* Resource Descriptor structs */
 #include <acpi/acpiosxf.h>              /* OSL interfaces (ACPICA-to-OS) */
 #include <acpi/acpixf.h>                /* ACPI core subsystem external interfaces */
-#ifdef ACPI_NATIVE_INTERFACE_HEADER
-#include ACPI_NATIVE_INTERFACE_HEADER
-#endif
+#include <acpi/platform/acenvex.h>      /* Extra environment-specific items */
 
 #endif                          /* __ACPI_H__ */
diff --git a/include/acpi/acpi_bus.h b/include/acpi/acpi_bus.h
index 84a2e29a2314..b5714580801a 100644
--- a/include/acpi/acpi_bus.h
+++ b/include/acpi/acpi_bus.h
@@ -131,6 +131,7 @@ static inline struct acpi_hotplug_profile *to_acpi_hotplug_profile(
 struct acpi_scan_handler {
         const struct acpi_device_id *ids;
         struct list_head list_node;
+        bool (*match)(char *idstr, const struct acpi_device_id **matchid);
         int (*attach)(struct acpi_device *dev, const struct acpi_device_id *id);
         void (*detach)(struct acpi_device *dev);
         void (*bind)(struct device *phys_dev);
@@ -232,7 +233,8 @@ struct acpi_hardware_id {
 struct acpi_pnp_type {
         u32 hardware_id:1;
         u32 bus_address:1;
-        u32 reserved:30;
+        u32 platform_id:1;
+        u32 reserved:29;
 };
 
 struct acpi_device_pnp {
@@ -261,7 +263,8 @@ struct acpi_device_power_flags {
         u32 inrush_current:1;   /* Serialize Dx->D0 */
         u32 power_removed:1;    /* Optimize Dx->D0 */
         u32 ignore_parent:1;    /* Power is independent of parent power state */
-        u32 reserved:27;
+        u32 dsw_present:1;      /* _DSW present? */
+        u32 reserved:26;
 };
 
 struct acpi_device_power_state {
@@ -406,6 +409,8 @@ extern struct kobject *acpi_kobj;
 extern int acpi_bus_generate_netlink_event(const char*, const char*, u8, int);
 void acpi_bus_private_data_handler(acpi_handle, void *);
 int acpi_bus_get_private_data(acpi_handle, void **);
+int acpi_bus_attach_private_data(acpi_handle, void *);
+void acpi_bus_detach_private_data(acpi_handle);
 void acpi_bus_no_hotplug(acpi_handle handle);
 extern int acpi_notifier_call_chain(struct acpi_device *, u32, u32);
 extern int register_acpi_notifier(struct notifier_block *);
diff --git a/include/acpi/acpi_drivers.h b/include/acpi/acpi_drivers.h
index d504613bbf80..ea6428b7dacb 100644
--- a/include/acpi/acpi_drivers.h
+++ b/include/acpi/acpi_drivers.h
@@ -96,7 +96,12 @@ struct pci_dev *acpi_get_pci_dev(acpi_handle);
 /* Arch-defined function to add a bus to the system */
 
 struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root);
+
+#ifdef CONFIG_X86
 void pci_acpi_crs_quirks(void);
+#else
+static inline void pci_acpi_crs_quirks(void) { }
+#endif
 
 /* --------------------------------------------------------------------------
                                     Processor
diff --git a/include/acpi/acpi_io.h b/include/acpi/acpi_io.h
index 2be858018c7f..444671e9c65d 100644
--- a/include/acpi/acpi_io.h
+++ b/include/acpi/acpi_io.h
@@ -9,6 +9,9 @@ static inline void __iomem *acpi_os_ioremap(acpi_physical_address phys,
        return ioremap_cache(phys, size);
 }
 
+void __iomem *__init_refok
+acpi_os_map_iomem(acpi_physical_address phys, acpi_size size);
+void __ref acpi_os_unmap_iomem(void __iomem *virt, acpi_size size);
 void __iomem *acpi_os_get_iomem(acpi_physical_address phys, unsigned int size);
 
 int acpi_os_map_generic_address(struct acpi_generic_address *addr);
diff --git a/include/acpi/acpixf.h b/include/acpi/acpixf.h
index 44f5e9749601..35b525c19711 100644
--- a/include/acpi/acpixf.h
+++ b/include/acpi/acpixf.h
@@ -46,7 +46,7 @@
 
 /* Current ACPICA subsystem version in YYYYMMDD format */
 
-#define ACPI_CA_VERSION                 0x20140214
+#define ACPI_CA_VERSION                 0x20140424
 
 #include <acpi/acconfig.h>
 #include <acpi/actypes.h>
@@ -55,233 +55,478 @@
 
 extern u8 acpi_gbl_permanent_mmap;
 
+/*****************************************************************************
+ *
+ * Macros used for ACPICA globals and configuration
+ *
+ ****************************************************************************/
+
 /*
- * Globals that are publically available
+ * Ensure that global variables are defined and initialized only once.
+ *
+ * The use of these macros allows for a single list of globals (here)
+ * in order to simplify maintenance of the code.
  */
-extern u32 acpi_current_gpe_count;
-extern struct acpi_table_fadt acpi_gbl_FADT;
-extern u8 acpi_gbl_system_awake_and_running;
-extern u8 acpi_gbl_reduced_hardware;    /* ACPI 5.0 */
-extern u8 acpi_gbl_osi_data;
+#ifdef DEFINE_ACPI_GLOBALS
+#define ACPI_GLOBAL(type,name) \
+        extern type name; \
+        type name
 
-/* Runtime configuration of debug print levels */
+#define ACPI_INIT_GLOBAL(type,name,value) \
+        type name=value
 
-extern u32 acpi_dbg_level;
-extern u32 acpi_dbg_layer;
-
-/* ACPICA runtime options */
+#else
+#ifndef ACPI_GLOBAL
+#define ACPI_GLOBAL(type,name) \
+        extern type name
+#endif
 
-extern u8 acpi_gbl_auto_serialize_methods;
-extern u8 acpi_gbl_copy_dsdt_locally;
-extern u8 acpi_gbl_create_osi_method;
-extern u8 acpi_gbl_disable_auto_repair;
-extern u8 acpi_gbl_disable_ssdt_table_load;
-extern u8 acpi_gbl_do_not_use_xsdt;
-extern u8 acpi_gbl_enable_aml_debug_object;
-extern u8 acpi_gbl_enable_interpreter_slack;
-extern u32 acpi_gbl_trace_flags;
-extern acpi_name acpi_gbl_trace_method_name;
-extern u8 acpi_gbl_truncate_io_addresses;
-extern u8 acpi_gbl_use32_bit_fadt_addresses;
-extern u8 acpi_gbl_use_default_register_widths;
+#ifndef ACPI_INIT_GLOBAL
+#define ACPI_INIT_GLOBAL(type,name,value) \
+        extern type name
+#endif
+#endif
 
 /*
- * Hardware-reduced prototypes. All interfaces that use these macros will
- * be configured out of the ACPICA build if the ACPI_REDUCED_HARDWARE flag
- * is set to TRUE.
+ * These macros configure the various ACPICA interfaces. They are
+ * useful for generating stub inline functions for features that are
+ * configured out of the current kernel or ACPICA application.
  */
-#if (!ACPI_REDUCED_HARDWARE)
-#define ACPI_HW_DEPENDENT_RETURN_STATUS(prototype) \
+#ifndef ACPI_EXTERNAL_RETURN_STATUS
+#define ACPI_EXTERNAL_RETURN_STATUS(prototype) \
         prototype;
+#endif
 
-#define ACPI_HW_DEPENDENT_RETURN_OK(prototype) \
+#ifndef ACPI_EXTERNAL_RETURN_OK
+#define ACPI_EXTERNAL_RETURN_OK(prototype) \
         prototype;
+#endif
 
-#define ACPI_HW_DEPENDENT_RETURN_VOID(prototype) \
+#ifndef ACPI_EXTERNAL_RETURN_VOID
+#define ACPI_EXTERNAL_RETURN_VOID(prototype) \
         prototype;
+#endif
 
-#else
-#define ACPI_HW_DEPENDENT_RETURN_STATUS(prototype) \
-        static ACPI_INLINE prototype {return(AE_NOT_CONFIGURED);}
-
-#define ACPI_HW_DEPENDENT_RETURN_OK(prototype) \
-        static ACPI_INLINE prototype {return(AE_OK);}
+#ifndef ACPI_EXTERNAL_RETURN_UINT32
+#define ACPI_EXTERNAL_RETURN_UINT32(prototype) \
+        prototype;
+#endif
 
-#define ACPI_HW_DEPENDENT_RETURN_VOID(prototype) \
-        static ACPI_INLINE prototype {return;}
+#ifndef ACPI_EXTERNAL_RETURN_PTR
+#define ACPI_EXTERNAL_RETURN_PTR(prototype) \
+        prototype;
+#endif
 
-#endif                          /* !ACPI_REDUCED_HARDWARE */
+/*****************************************************************************
+ *
+ * Public globals and runtime configuration options
+ *
+ ****************************************************************************/
 
 /*
- * Initialization
+ * Enable "slack mode" of the AML interpreter?  Default is FALSE, and the
+ * interpreter strictly follows the ACPI specification. Setting to TRUE
+ * allows the interpreter to ignore certain errors and/or bad AML constructs.
+ *
+ * Currently, these features are enabled by this flag:
+ *
+ * 1) Allow "implicit return" of last value in a control method
+ * 2) Allow access beyond the end of an operation region
+ * 3) Allow access to uninitialized locals/args (auto-init to integer 0)
+ * 4) Allow ANY object type to be a source operand for the Store() operator
+ * 5) Allow unresolved references (invalid target name) in package objects
+ * 6) Enable warning messages for behavior that is not ACPI spec compliant
  */
-acpi_status __init
-acpi_initialize_tables(struct acpi_table_desc *initial_storage,
-                       u32 initial_table_count, u8 allow_resize);
-
-acpi_status __init acpi_initialize_subsystem(void);
+ACPI_INIT_GLOBAL(u8, acpi_gbl_enable_interpreter_slack, FALSE);
 
-acpi_status __init acpi_enable_subsystem(u32 flags);
-
-acpi_status __init acpi_initialize_objects(u32 flags);
+/*
+ * Automatically serialize all methods that create named objects? Default
+ * is TRUE, meaning that all non_serialized methods are scanned once at
+ * table load time to determine those that create named objects. Methods
+ * that create named objects are marked Serialized in order to prevent
+ * possible run-time problems if they are entered by more than one thread.
+ */
+ACPI_INIT_GLOBAL(u8, acpi_gbl_auto_serialize_methods, TRUE);
 
-acpi_status __init acpi_terminate(void);
+/*
+ * Create the predefined _OSI method in the namespace? Default is TRUE
+ * because ACPICA is fully compatible with other ACPI implementations.
+ * Changing this will revert ACPICA (and machine ASL) to pre-OSI behavior.
+ */
+ACPI_INIT_GLOBAL(u8, acpi_gbl_create_osi_method, TRUE);
 
 /*
- * Miscellaneous global interfaces
+ * Optionally use default values for the ACPI register widths. Set this to
+ * TRUE to use the defaults, if an FADT contains incorrect widths/lengths.
  */
-ACPI_HW_DEPENDENT_RETURN_STATUS(acpi_status acpi_enable(void))
-ACPI_HW_DEPENDENT_RETURN_STATUS(acpi_status acpi_disable(void))
-#ifdef ACPI_FUTURE_USAGE
-acpi_status acpi_subsystem_status(void);
-#endif
+ACPI_INIT_GLOBAL(u8, acpi_gbl_use_default_register_widths, TRUE);
 
-#ifdef ACPI_FUTURE_USAGE
-acpi_status acpi_get_system_info(struct acpi_buffer *ret_buffer);
-#endif
+/*
+ * Whether or not to verify the table checksum before installation. Set
+ * this to TRUE to verify the table checksum before install it to the table
+ * manager. Note that enabling this option causes errors to happen in some
+ * OSPMs during early initialization stages. Default behavior is to do such
+ * verification.
+ */
+ACPI_INIT_GLOBAL(u8, acpi_gbl_verify_table_checksum, TRUE);
 
-acpi_status acpi_get_statistics(struct acpi_statistics *stats);
+/*
+ * Optionally enable output from the AML Debug Object.
+ */
+ACPI_INIT_GLOBAL(u8, acpi_gbl_enable_aml_debug_object, FALSE);
 
-const char *acpi_format_exception(acpi_status exception);
+/*
+ * Optionally copy the entire DSDT to local memory (instead of simply
+ * mapping it.) There are some BIOSs that corrupt or replace the original
+ * DSDT, creating the need for this option. Default is FALSE, do not copy
+ * the DSDT.
+ */
+ACPI_INIT_GLOBAL(u8, acpi_gbl_copy_dsdt_locally, FALSE);
 
-acpi_status acpi_purge_cached_objects(void);
+/*
+ * Optionally ignore an XSDT if present and use the RSDT instead.
+ * Although the ACPI specification requires that an XSDT be used instead
+ * of the RSDT, the XSDT has been found to be corrupt or ill-formed on
+ * some machines. Default behavior is to use the XSDT if present.
+ */
+ACPI_INIT_GLOBAL(u8, acpi_gbl_do_not_use_xsdt, FALSE);
 
-acpi_status acpi_install_interface(acpi_string interface_name);
+/*
+ * Optionally use 32-bit FADT addresses if and when there is a conflict
+ * (address mismatch) between the 32-bit and 64-bit versions of the
+ * address. Although ACPICA adheres to the ACPI specification which
+ * requires the use of the corresponding 64-bit address if it is non-zero,
+ * some machines have been found to have a corrupted non-zero 64-bit
+ * address. Default is TRUE, favor the 32-bit addresses.
+ */
+ACPI_INIT_GLOBAL(u8, acpi_gbl_use32_bit_fadt_addresses, TRUE);
 
-acpi_status acpi_remove_interface(acpi_string interface_name);
+/*
+ * Optionally truncate I/O addresses to 16 bits. Provides compatibility
+ * with other ACPI implementations. NOTE: During ACPICA initialization,
+ * this value is set to TRUE if any Windows OSI strings have been
+ * requested by the BIOS.
+ */
+ACPI_INIT_GLOBAL(u8, acpi_gbl_truncate_io_addresses, FALSE);
 
-acpi_status acpi_update_interfaces(u8 action);
+/*
+ * Disable runtime checking and repair of values returned by control methods.
+ * Use only if the repair is causing a problem on a particular machine.
+ */
+ACPI_INIT_GLOBAL(u8, acpi_gbl_disable_auto_repair, FALSE);
 
-u32
-acpi_check_address_range(acpi_adr_space_type space_id,
-                         acpi_physical_address address,
-                         acpi_size length, u8 warn);
+/*
+ * Optionally do not install any SSDTs from the RSDT/XSDT during initialization.
+ * This can be useful for debugging ACPI problems on some machines.
+ */
+ACPI_INIT_GLOBAL(u8, acpi_gbl_disable_ssdt_table_install, FALSE);
 
-acpi_status
-acpi_decode_pld_buffer(u8 *in_buffer,
-                       acpi_size length, struct acpi_pld_info **return_buffer);
+/*
+ * We keep track of the latest version of Windows that has been requested by
+ * the BIOS. ACPI 5.0.
+ */
+ACPI_INIT_GLOBAL(u8, acpi_gbl_osi_data, 0);
 
 /*
- * ACPI table load/unload interfaces
+ * ACPI 5.0 introduces the concept of a "reduced hardware platform", meaning
+ * that the ACPI hardware is no longer required. A flag in the FADT indicates
+ * a reduced HW machine, and that flag is duplicated here for convenience.
  */
-acpi_status acpi_load_table(struct acpi_table_header *table);
+ACPI_INIT_GLOBAL(u8, acpi_gbl_reduced_hardware, FALSE);
 
-acpi_status acpi_unload_parent_table(acpi_handle object);
+/*
+ * This mechanism is used to trace a specified AML method. The method is
+ * traced each time it is executed.
+ */
+ACPI_INIT_GLOBAL(u32, acpi_gbl_trace_flags, 0);
+ACPI_INIT_GLOBAL(acpi_name, acpi_gbl_trace_method_name, 0);
 
-acpi_status __init acpi_load_tables(void);
+/*
+ * Runtime configuration of debug output control masks. We want the debug
+ * switches statically initialized so they are already set when the debugger
+ * is entered.
+ */
+ACPI_INIT_GLOBAL(u32, acpi_dbg_level, ACPI_DEBUG_DEFAULT);
+ACPI_INIT_GLOBAL(u32, acpi_dbg_layer, 0);
 
 /*
- * ACPI table manipulation interfaces
+ * Other miscellaneous globals
  */
-acpi_status __init acpi_reallocate_root_table(void);
+ACPI_GLOBAL(struct acpi_table_fadt, acpi_gbl_FADT);
+ACPI_GLOBAL(u32, acpi_current_gpe_count);
+ACPI_GLOBAL(u8, acpi_gbl_system_awake_and_running);
 
-acpi_status __init acpi_find_root_pointer(acpi_size *rsdp_address);
+/*****************************************************************************
+ *
+ * ACPICA public interface configuration.
+ *
+ * Interfaces that are configured out of the ACPICA build are replaced
+ * by inlined stubs by default.
+ *
+ ****************************************************************************/
 
-acpi_status acpi_unload_table_id(acpi_owner_id id);
+/*
+ * Hardware-reduced prototypes (default: Not hardware reduced).
+ *
+ * All ACPICA hardware-related interfaces that use these macros will be
+ * configured out of the ACPICA build if the ACPI_REDUCED_HARDWARE flag
+ * is set to TRUE.
+ *
+ * Note: This static build option for reduced hardware is intended to
+ * reduce ACPICA code size if desired or necessary. However, even if this
+ * option is not specified, the runtime behavior of ACPICA is dependent
+ * on the actual FADT reduced hardware flag (HW_REDUCED_ACPI). If set,
+ * the flag will enable similar behavior -- ACPICA will not attempt
+ * to access any ACPI-relate hardware (SCI, GPEs, Fixed Events, etc.)
+ */
+#if (!ACPI_REDUCED_HARDWARE)
+#define ACPI_HW_DEPENDENT_RETURN_STATUS(prototype) \
+        ACPI_EXTERNAL_RETURN_STATUS(prototype)
 
-acpi_status
-acpi_get_table_header(acpi_string signature,
-                      u32 instance, struct acpi_table_header *out_table_header);
+#define ACPI_HW_DEPENDENT_RETURN_OK(prototype) \
+        ACPI_EXTERNAL_RETURN_OK(prototype)
 
-acpi_status
-acpi_get_table_with_size(acpi_string signature,
-               u32 instance, struct acpi_table_header **out_table,
-               acpi_size *tbl_size);
+#define ACPI_HW_DEPENDENT_RETURN_VOID(prototype) \
+        ACPI_EXTERNAL_RETURN_VOID(prototype)
 
-acpi_status
-acpi_get_table(acpi_string signature,
-               u32 instance, struct acpi_table_header **out_table);
+#else
+#define ACPI_HW_DEPENDENT_RETURN_STATUS(prototype) \
+        static ACPI_INLINE prototype {return(AE_NOT_CONFIGURED);}
 
-acpi_status
-acpi_get_table_by_index(u32 table_index, struct acpi_table_header **out_table);
+#define ACPI_HW_DEPENDENT_RETURN_OK(prototype) \
+        static ACPI_INLINE prototype {return(AE_OK);}
 
-acpi_status
-acpi_install_table_handler(acpi_table_handler handler, void *context);
+#define ACPI_HW_DEPENDENT_RETURN_VOID(prototype) \
+        static ACPI_INLINE prototype {return;}
 
-acpi_status acpi_remove_table_handler(acpi_table_handler handler);
+#endif                          /* !ACPI_REDUCED_HARDWARE */
 
 /*
- * Namespace and name interfaces
+ * Error message prototypes (default: error messages enabled).
+ *
+ * All interfaces related to error and warning messages
+ * will be configured out of the ACPICA build if the
+ * ACPI_NO_ERROR_MESSAGE flag is defined.
  */
-acpi_status
-acpi_walk_namespace(acpi_object_type type,
-                    acpi_handle start_object,
-                    u32 max_depth,
-                    acpi_walk_callback descending_callback,
-                    acpi_walk_callback ascending_callback,
-                    void *context, void **return_value);
+#ifndef ACPI_NO_ERROR_MESSAGES
+#define ACPI_MSG_DEPENDENT_RETURN_VOID(prototype) \
+        prototype;
 
-acpi_status
-acpi_get_devices(const char *HID,
-                 acpi_walk_callback user_function,
-                 void *context, void **return_value);
+#else
+#define ACPI_MSG_DEPENDENT_RETURN_VOID(prototype) \
+        static ACPI_INLINE prototype {return;}
 
-acpi_status
-acpi_get_name(acpi_handle object,
-              u32 name_type, struct acpi_buffer *ret_path_ptr);
+#endif                          /* ACPI_NO_ERROR_MESSAGES */
 
-acpi_status
-acpi_get_handle(acpi_handle parent,
-                acpi_string pathname, acpi_handle * ret_handle);
+/*
+ * Debugging output prototypes (default: no debug output).
+ *
+ * All interfaces related to debug output messages
+ * will be configured out of the ACPICA build unless the
+ * ACPI_DEBUG_OUTPUT flag is defined.
+ */
+#ifdef ACPI_DEBUG_OUTPUT
+#define ACPI_DBG_DEPENDENT_RETURN_VOID(prototype) \
+        prototype;
 
-acpi_status
-acpi_attach_data(acpi_handle object, acpi_object_handler handler, void *data);
+#else
+#define ACPI_DBG_DEPENDENT_RETURN_VOID(prototype) \
+        static ACPI_INLINE prototype {return;}
 
-acpi_status acpi_detach_data(acpi_handle object, acpi_object_handler handler);
+#endif                          /* ACPI_DEBUG_OUTPUT */
 
-acpi_status
-acpi_get_data_full(acpi_handle object, acpi_object_handler handler, void **data,
-                   void (*callback)(void *));
+/*****************************************************************************
+ *
+ * ACPICA public interface prototypes
+ *
+ ****************************************************************************/
 
-acpi_status
-acpi_get_data(acpi_handle object, acpi_object_handler handler, void **data);
+/*
+ * Initialization
+ */
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status __init
+                            acpi_initialize_tables(struct acpi_table_desc
+                                                   *initial_storage,
+                                                   u32 initial_table_count,
+                                                   u8 allow_resize))
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status __init acpi_initialize_subsystem(void))
 
-acpi_status
-acpi_debug_trace(char *name, u32 debug_level, u32 debug_layer, u32 flags);
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status __init acpi_enable_subsystem(u32 flags))
+
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status __init
+                            acpi_initialize_objects(u32 flags))
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status __init acpi_terminate(void))
 
 /*
- * Object manipulation and enumeration
+ * Miscellaneous global interfaces
  */
-acpi_status
-acpi_evaluate_object(acpi_handle object,
-                     acpi_string pathname,
-                     struct acpi_object_list *parameter_objects,
-                     struct acpi_buffer *return_object_buffer);
+ACPI_HW_DEPENDENT_RETURN_STATUS(acpi_status acpi_enable(void))
+ACPI_HW_DEPENDENT_RETURN_STATUS(acpi_status acpi_disable(void))
+#ifdef ACPI_FUTURE_USAGE
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status acpi_subsystem_status(void))
+#endif
 
-acpi_status
-acpi_evaluate_object_typed(acpi_handle object,
-                           acpi_string pathname,
-                           struct acpi_object_list *external_params,
-                           struct acpi_buffer *return_buffer,
-                           acpi_object_type return_type);
+#ifdef ACPI_FUTURE_USAGE
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                            acpi_get_system_info(struct acpi_buffer
+                                                 *ret_buffer))
+#endif
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                             acpi_get_statistics(struct acpi_statistics *stats))
+ACPI_EXTERNAL_RETURN_PTR(const char
+                          *acpi_format_exception(acpi_status exception))
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status acpi_purge_cached_objects(void))
+
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                            acpi_install_interface(acpi_string interface_name))
+
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                            acpi_remove_interface(acpi_string interface_name))
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status acpi_update_interfaces(u8 action))
+
+ACPI_EXTERNAL_RETURN_UINT32(u32
+                            acpi_check_address_range(acpi_adr_space_type
+                                                     space_id,
+                                                     acpi_physical_address
+                                                     address, acpi_size length,
+                                                     u8 warn))
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                             acpi_decode_pld_buffer(u8 *in_buffer,
+                                                    acpi_size length,
+                                                    struct acpi_pld_info
+                                                    **return_buffer))
 
-acpi_status
-acpi_get_object_info(acpi_handle object,
-                     struct acpi_device_info **return_buffer);
+/*
+ * ACPI table load/unload interfaces
+ */
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status __init
+                            acpi_install_table(acpi_physical_address address,
+                                               u8 physical))
 
-acpi_status acpi_install_method(u8 *buffer);
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                            acpi_load_table(struct acpi_table_header *table))
 
-acpi_status
-acpi_get_next_object(acpi_object_type type,
-                     acpi_handle parent,
-                     acpi_handle child, acpi_handle * out_handle);
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                            acpi_unload_parent_table(acpi_handle object))
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status __init acpi_load_tables(void))
 
-acpi_status acpi_get_type(acpi_handle object, acpi_object_type * out_type);
+/*
+ * ACPI table manipulation interfaces
+ */
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status __init acpi_reallocate_root_table(void))
+
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status __init
+                            acpi_find_root_pointer(acpi_size * rsdp_address))
+
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                            acpi_get_table_header(acpi_string signature,
+                                                  u32 instance,
+                                                  struct acpi_table_header
+                                                  *out_table_header))
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                             acpi_get_table(acpi_string signature, u32 instance,
+                                            struct acpi_table_header
+                                            **out_table))
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                             acpi_get_table_by_index(u32 table_index,
+                                                     struct acpi_table_header
+                                                     **out_table))
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                             acpi_install_table_handler(acpi_table_handler
+                                                        handler, void *context))
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                             acpi_remove_table_handler(acpi_table_handler
+                                                       handler))
 
-acpi_status acpi_get_id(acpi_handle object, acpi_owner_id * out_type);
+/*
+ * Namespace and name interfaces
+ */
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                            acpi_walk_namespace(acpi_object_type type,
+                                                acpi_handle start_object,
+                                                u32 max_depth,
+                                                acpi_walk_callback
+                                                descending_callback,
+                                                acpi_walk_callback
+                                                ascending_callback,
+                                                void *context,
+                                                void **return_value))
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                             acpi_get_devices(const char *HID,
+                                              acpi_walk_callback user_function,
+                                              void *context,
+                                              void **return_value))
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                             acpi_get_name(acpi_handle object, u32 name_type,
+                                           struct acpi_buffer *ret_path_ptr))
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                             acpi_get_handle(acpi_handle parent,
+                                             acpi_string pathname,
+                                             acpi_handle * ret_handle))
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                             acpi_attach_data(acpi_handle object,
+                                              acpi_object_handler handler,
+                                              void *data))
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                             acpi_detach_data(acpi_handle object,
+                                              acpi_object_handler handler))
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                             acpi_get_data(acpi_handle object,
+                                           acpi_object_handler handler,
+                                           void **data))
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                             acpi_debug_trace(char *name, u32 debug_level,
+                                              u32 debug_layer, u32 flags))
 
-acpi_status acpi_get_parent(acpi_handle object, acpi_handle * out_handle);
+/*
+ * Object manipulation and enumeration
+ */
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                            acpi_evaluate_object(acpi_handle object,
+                                                 acpi_string pathname,
+                                                 struct acpi_object_list
+                                                 *parameter_objects,
+                                                 struct acpi_buffer
+                                                 *return_object_buffer))
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                             acpi_evaluate_object_typed(acpi_handle object,
+                                                        acpi_string pathname,
+                                                        struct acpi_object_list
+                                                        *external_params,
+                                                        struct acpi_buffer
+                                                        *return_buffer,
+                                                        acpi_object_type
+                                                        return_type))
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                             acpi_get_object_info(acpi_handle object,
+                                                  struct acpi_device_info
+                                                  **return_buffer))
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status acpi_install_method(u8 *buffer))
+
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                            acpi_get_next_object(acpi_object_type type,
+                                                 acpi_handle parent,
+                                                 acpi_handle child,
+                                                 acpi_handle * out_handle))
+
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                            acpi_get_type(acpi_handle object,
+                                          acpi_object_type * out_type))
+
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                            acpi_get_parent(acpi_handle object,
+                                            acpi_handle * out_handle))
 
 /*
  * Handler interfaces
  */
-acpi_status
-acpi_install_initialization_handler(acpi_init_handler handler, u32 function);
-
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                            acpi_install_initialization_handler
+                            (acpi_init_handler handler, u32 function))
 ACPI_HW_DEPENDENT_RETURN_STATUS(acpi_status
-                                acpi_install_sci_handler(acpi_sci_handler
-                                                         address,
-                                                         void *context))
+                                 acpi_install_sci_handler(acpi_sci_handler
+                                                          address,
+                                                          void *context))
 ACPI_HW_DEPENDENT_RETURN_STATUS(acpi_status
                                  acpi_remove_sci_handler(acpi_sci_handler
                                                          address))
@@ -313,30 +558,42 @@ ACPI_HW_DEPENDENT_RETURN_STATUS(acpi_status
                                                          u32 gpe_number,
                                                          acpi_gpe_handler
                                                          address))
-acpi_status acpi_install_notify_handler(acpi_handle device, u32 handler_type,
-                                         acpi_notify_handler handler,
-                                         void *context);
-
-acpi_status
-acpi_remove_notify_handler(acpi_handle device,
-                           u32 handler_type, acpi_notify_handler handler);
-
-acpi_status
-acpi_install_address_space_handler(acpi_handle device,
-                                   acpi_adr_space_type space_id,
-                                   acpi_adr_space_handler handler,
-                                   acpi_adr_space_setup setup, void *context);
-
-acpi_status
-acpi_remove_address_space_handler(acpi_handle device,
-                                  acpi_adr_space_type space_id,
-                                  acpi_adr_space_handler handler);
-
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                             acpi_install_notify_handler(acpi_handle device,
+                                                         u32 handler_type,
+                                                         acpi_notify_handler
+                                                         handler,
+                                                         void *context))
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                             acpi_remove_notify_handler(acpi_handle device,
+                                                        u32 handler_type,
+                                                        acpi_notify_handler
+                                                        handler))
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                             acpi_install_address_space_handler(acpi_handle
+                                                                device,
+                                                                acpi_adr_space_type
+                                                                space_id,
+                                                                acpi_adr_space_handler
+                                                                handler,
+                                                                acpi_adr_space_setup
+                                                                setup,
+                                                                void *context))
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                             acpi_remove_address_space_handler(acpi_handle
+                                                               device,
+                                                               acpi_adr_space_type
+                                                               space_id,
+                                                               acpi_adr_space_handler
+                                                               handler))
 #ifdef ACPI_FUTURE_USAGE
-acpi_status acpi_install_exception_handler(acpi_exception_handler handler);
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                             acpi_install_exception_handler
+                             (acpi_exception_handler handler))
 #endif
-
-acpi_status acpi_install_interface_handler(acpi_interface_handler handler);
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                             acpi_install_interface_handler
+                             (acpi_interface_handler handler))
 
 /*
  * Global Lock interfaces
@@ -351,10 +608,14 @@ ACPI_HW_DEPENDENT_RETURN_STATUS(acpi_status
 /*
  * Interfaces to AML mutex objects
  */
-acpi_status
-acpi_acquire_mutex(acpi_handle handle, acpi_string pathname, u16 timeout);
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                            acpi_acquire_mutex(acpi_handle handle,
+                                               acpi_string pathname,
+                                               u16 timeout))
 
-acpi_status acpi_release_mutex(acpi_handle handle, acpi_string pathname);
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                            acpi_release_mutex(acpi_handle handle,
+                                               acpi_string pathname))
 
 /*
  * Fixed Event interfaces
@@ -434,57 +695,69 @@ typedef
 acpi_status(*acpi_walk_resource_callback) (struct acpi_resource * resource,
                                            void *context);
 
-acpi_status
-acpi_get_vendor_resource(acpi_handle device,
-                         char *name,
-                         struct acpi_vendor_uuid *uuid,
-                         struct acpi_buffer *ret_buffer);
-
-acpi_status
-acpi_get_current_resources(acpi_handle device, struct acpi_buffer *ret_buffer);
-
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                            acpi_get_vendor_resource(acpi_handle device,
+                                                     char *name,
+                                                     struct acpi_vendor_uuid
+                                                     *uuid,
+                                                     struct acpi_buffer
+                                                     *ret_buffer))
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                             acpi_get_current_resources(acpi_handle device,
+                                                        struct acpi_buffer
+                                                        *ret_buffer))
 #ifdef ACPI_FUTURE_USAGE
-acpi_status
-acpi_get_possible_resources(acpi_handle device, struct acpi_buffer *ret_buffer);
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                             acpi_get_possible_resources(acpi_handle device,
+                                                         struct acpi_buffer
+                                                         *ret_buffer))
 #endif
-
-acpi_status
-acpi_get_event_resources(acpi_handle device_handle,
-                         struct acpi_buffer *ret_buffer);
-
-acpi_status
-acpi_walk_resource_buffer(struct acpi_buffer *buffer,
-                          acpi_walk_resource_callback user_function,
-                          void *context);
-
-acpi_status
-acpi_walk_resources(acpi_handle device,
-                    char *name,
-                    acpi_walk_resource_callback user_function, void *context);
-
-acpi_status
-acpi_set_current_resources(acpi_handle device, struct acpi_buffer *in_buffer);
-
-acpi_status
-acpi_get_irq_routing_table(acpi_handle device, struct acpi_buffer *ret_buffer);
-
-acpi_status
-acpi_resource_to_address64(struct acpi_resource *resource,
-                           struct acpi_resource_address64 *out);
-
-acpi_status
-acpi_buffer_to_resource(u8 *aml_buffer,
-                        u16 aml_buffer_length,
-                        struct acpi_resource **resource_ptr);
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                             acpi_get_event_resources(acpi_handle device_handle,
+                                                      struct acpi_buffer
+                                                      *ret_buffer))
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                             acpi_walk_resource_buffer(struct acpi_buffer
+                                                       *buffer,
+                                                       acpi_walk_resource_callback
+                                                       user_function,
+                                                       void *context))
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                             acpi_walk_resources(acpi_handle device, char *name,
+                                                 acpi_walk_resource_callback
+                                                 user_function, void *context))
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                             acpi_set_current_resources(acpi_handle device,
+                                                        struct acpi_buffer
+                                                        *in_buffer))
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                             acpi_get_irq_routing_table(acpi_handle device,
+                                                        struct acpi_buffer
+                                                        *ret_buffer))
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                             acpi_resource_to_address64(struct acpi_resource
+                                                        *resource,
+                                                        struct
+                                                        acpi_resource_address64
+                                                        *out))
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                             acpi_buffer_to_resource(u8 *aml_buffer,
+                                                     u16 aml_buffer_length,
+                                                     struct acpi_resource
+                                                     **resource_ptr))
 
 /*
  * Hardware (ACPI device) interfaces
  */
-acpi_status acpi_reset(void);
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status acpi_reset(void))
 
-acpi_status acpi_read(u64 *value, struct acpi_generic_address *reg);
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                            acpi_read(u64 *value,
+                                      struct acpi_generic_address *reg))
 
-acpi_status acpi_write(u64 value, struct acpi_generic_address *reg);
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                            acpi_write(u64 value,
+                                       struct acpi_generic_address *reg))
 
 ACPI_HW_DEPENDENT_RETURN_STATUS(acpi_status
                                 acpi_read_bit_register(u32 register_id,
@@ -497,18 +770,20 @@ ACPI_HW_DEPENDENT_RETURN_STATUS(acpi_status
 /*
  * Sleep/Wake interfaces
  */
-acpi_status
-acpi_get_sleep_type_data(u8 sleep_state, u8 *slp_typ_a, u8 *slp_typ_b);
-
-acpi_status acpi_enter_sleep_state_prep(u8 sleep_state);
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                            acpi_get_sleep_type_data(u8 sleep_state,
+                                                     u8 *slp_typ_a,
+                                                     u8 *slp_typ_b))
 
-acpi_status acpi_enter_sleep_state(u8 sleep_state);
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                            acpi_enter_sleep_state_prep(u8 sleep_state))
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status acpi_enter_sleep_state(u8 sleep_state))
 
 ACPI_HW_DEPENDENT_RETURN_STATUS(acpi_status acpi_enter_sleep_state_s4bios(void))
 
-acpi_status acpi_leave_sleep_state_prep(u8 sleep_state);
-
-acpi_status acpi_leave_sleep_state(u8 sleep_state);
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status
+                            acpi_leave_sleep_state_prep(u8 sleep_state))
+ACPI_EXTERNAL_RETURN_STATUS(acpi_status acpi_leave_sleep_state(u8 sleep_state))
 
 ACPI_HW_DEPENDENT_RETURN_STATUS(acpi_status
                                 acpi_set_firmware_waking_vector(u32
@@ -535,53 +810,72 @@ ACPI_HW_DEPENDENT_RETURN_STATUS(acpi_status
 /*
  * Error/Warning output
  */
-ACPI_PRINTF_LIKE(3)
-void ACPI_INTERNAL_VAR_XFACE
-acpi_error(const char *module_name, u32 line_number, const char *format, ...);
-
-ACPI_PRINTF_LIKE(4)
-void ACPI_INTERNAL_VAR_XFACE
-acpi_exception(const char *module_name,
-               u32 line_number, acpi_status status, const char *format, ...);
-
-ACPI_PRINTF_LIKE(3)
-void ACPI_INTERNAL_VAR_XFACE
-acpi_warning(const char *module_name, u32 line_number, const char *format, ...);
-
-ACPI_PRINTF_LIKE(3)
-void ACPI_INTERNAL_VAR_XFACE
-acpi_info(const char *module_name, u32 line_number, const char *format, ...);
-
-ACPI_PRINTF_LIKE(3)
-void ACPI_INTERNAL_VAR_XFACE
-acpi_bios_error(const char *module_name,
-                u32 line_number, const char *format, ...);
-
-ACPI_PRINTF_LIKE(3)
-void ACPI_INTERNAL_VAR_XFACE
-acpi_bios_warning(const char *module_name,
-                  u32 line_number, const char *format, ...);
+ACPI_MSG_DEPENDENT_RETURN_VOID(ACPI_PRINTF_LIKE(3)
+                               void ACPI_INTERNAL_VAR_XFACE
+                               acpi_error(const char *module_name,
+                                          u32 line_number,
+                                          const char *format, ...))
+ACPI_MSG_DEPENDENT_RETURN_VOID(ACPI_PRINTF_LIKE(4)
+                                void ACPI_INTERNAL_VAR_XFACE
+                                acpi_exception(const char *module_name,
+                                               u32 line_number,
+                                               acpi_status status,
+                                               const char *format, ...))
+ACPI_MSG_DEPENDENT_RETURN_VOID(ACPI_PRINTF_LIKE(3)
+                                void ACPI_INTERNAL_VAR_XFACE
+                                acpi_warning(const char *module_name,
+                                             u32 line_number,
+                                             const char *format, ...))
+ACPI_MSG_DEPENDENT_RETURN_VOID(ACPI_PRINTF_LIKE(3)
+                                void ACPI_INTERNAL_VAR_XFACE
+                                acpi_info(const char *module_name,
+                                          u32 line_number,
+                                          const char *format, ...))
+ACPI_MSG_DEPENDENT_RETURN_VOID(ACPI_PRINTF_LIKE(3)
+                                void ACPI_INTERNAL_VAR_XFACE
+                                acpi_bios_error(const char *module_name,
+                                                u32 line_number,
+                                                const char *format, ...))
+ACPI_MSG_DEPENDENT_RETURN_VOID(ACPI_PRINTF_LIKE(3)
+                                void ACPI_INTERNAL_VAR_XFACE
+                                acpi_bios_warning(const char *module_name,
+                                                  u32 line_number,
+                                                  const char *format, ...))
 
 /*
  * Debug output
  */
-#ifdef ACPI_DEBUG_OUTPUT
+ACPI_DBG_DEPENDENT_RETURN_VOID(ACPI_PRINTF_LIKE(6)
+                               void ACPI_INTERNAL_VAR_XFACE
+                               acpi_debug_print(u32 requested_debug_level,
+                                                u32 line_number,
+                                                const char *function_name,
+                                                const char *module_name,
+                                                u32 component_id,
+                                                const char *format, ...))
+ACPI_DBG_DEPENDENT_RETURN_VOID(ACPI_PRINTF_LIKE(6)
+                                void ACPI_INTERNAL_VAR_XFACE
+                                acpi_debug_print_raw(u32 requested_debug_level,
+                                                     u32 line_number,
+                                                     const char *function_name,
+                                                     const char *module_name,
+                                                     u32 component_id,
+                                                     const char *format, ...))
 
-ACPI_PRINTF_LIKE(6)
-void ACPI_INTERNAL_VAR_XFACE
-acpi_debug_print(u32 requested_debug_level,
-                 u32 line_number,
-                 const char *function_name,
-                 const char *module_name,
-                 u32 component_id, const char *format, ...);
-
-ACPI_PRINTF_LIKE(6)
-void ACPI_INTERNAL_VAR_XFACE
-acpi_debug_print_raw(u32 requested_debug_level,
-                     u32 line_number,
-                     const char *function_name,
-                     const char *module_name,
-                     u32 component_id, const char *format, ...);
-#endif
+/*
+ * Divergences
+ */
+acpi_status acpi_get_id(acpi_handle object, acpi_owner_id * out_type);
+
+acpi_status acpi_unload_table_id(acpi_owner_id id);
+
+acpi_status
+acpi_get_table_with_size(acpi_string signature,
+               u32 instance, struct acpi_table_header **out_table,
+               acpi_size *tbl_size);
+
+acpi_status
+acpi_get_data_full(acpi_handle object, acpi_object_handler handler, void **data,
+                   void (*callback)(void *));
 
 #endif                          /* __ACXFACE_H__ */
diff --git a/include/acpi/actbl.h b/include/acpi/actbl.h
index 3b30e36b53b5..1cc7ef13c01a 100644
--- a/include/acpi/actbl.h
+++ b/include/acpi/actbl.h
@@ -367,12 +367,11 @@ struct acpi_table_desc {
 
 /* Masks for Flags field above */
 
-#define ACPI_TABLE_ORIGIN_UNKNOWN       (0)
-#define ACPI_TABLE_ORIGIN_MAPPED        (1)
-#define ACPI_TABLE_ORIGIN_ALLOCATED     (2)
-#define ACPI_TABLE_ORIGIN_OVERRIDE      (4)
-#define ACPI_TABLE_ORIGIN_MASK          (7)
-#define ACPI_TABLE_IS_LOADED            (8)
+#define ACPI_TABLE_ORIGIN_EXTERNAL_VIRTUAL  (0) /* Virtual address, external maintained */
+#define ACPI_TABLE_ORIGIN_INTERNAL_PHYSICAL (1) /* Physical address, internally mapped */
+#define ACPI_TABLE_ORIGIN_INTERNAL_VIRTUAL  (2) /* Virtual address, internallly allocated */
+#define ACPI_TABLE_ORIGIN_MASK              (3)
+#define ACPI_TABLE_IS_LOADED                (8)
 
 /*
  * Get the remaining ACPI tables
diff --git a/include/acpi/actbl1.h b/include/acpi/actbl1.h
index 212c65de75df..4ad7da805180 100644
--- a/include/acpi/actbl1.h
+++ b/include/acpi/actbl1.h
@@ -675,7 +675,7 @@ enum acpi_madt_type {
 };
 
 /*
- * MADT Sub-tables, correspond to Type in struct acpi_subtable_header
+ * MADT Subtables, correspond to Type in struct acpi_subtable_header
  */
 
 /* 0: Processor Local APIC */
@@ -918,7 +918,7 @@ enum acpi_srat_type {
 };
 
 /*
- * SRAT Sub-tables, correspond to Type in struct acpi_subtable_header
+ * SRAT Subtables, correspond to Type in struct acpi_subtable_header
  */
 
 /* 0: Processor Local APIC/SAPIC Affinity */
diff --git a/include/acpi/actbl2.h b/include/acpi/actbl2.h
index c8adad9c6b6a..860e5c883eb3 100644
--- a/include/acpi/actbl2.h
+++ b/include/acpi/actbl2.h
@@ -70,6 +70,7 @@
 #define ACPI_SIG_HPET           "HPET"  /* High Precision Event Timer table */
 #define ACPI_SIG_IBFT           "IBFT"  /* iSCSI Boot Firmware Table */
 #define ACPI_SIG_IVRS           "IVRS"  /* I/O Virtualization Reporting Structure */
+#define ACPI_SIG_LPIT           "LPIT"  /* Low Power Idle Table */
 #define ACPI_SIG_MCFG           "MCFG"  /* PCI Memory Mapped Configuration table */
 #define ACPI_SIG_MCHI           "MCHI"  /* Management Controller Host Interface table */
 #define ACPI_SIG_MTMR           "MTMR"  /* MID Timer table */
@@ -456,7 +457,7 @@ struct acpi_dmar_pci_path {
 };
 
 /*
- * DMAR Sub-tables, correspond to Type in struct acpi_dmar_header
+ * DMAR Subtables, correspond to Type in struct acpi_dmar_header
  */
 
 /* 0: Hardware Unit Definition */
@@ -820,7 +821,71 @@ struct acpi_ivrs_memory {
 
 /*******************************************************************************
  *
- * MCFG - PCI Memory Mapped Configuration table and sub-table
+ * LPIT - Low Power Idle Table
+ *
+ * Conforms to "ACPI Low Power Idle Table (LPIT) and _LPD Proposal (DRAFT)"
+ *
+ ******************************************************************************/
+
+struct acpi_table_lpit {
+        struct acpi_table_header header;        /* Common ACPI table header */
+};
+
+/* LPIT subtable header */
+
+struct acpi_lpit_header {
+        u32 type;               /* Subtable type */
+        u32 length;             /* Subtable length */
+        u16 unique_id;
+        u16 reserved;
+        u32 flags;
+};
+
+/* Values for subtable Type above */
+
+enum acpi_lpit_type {
+        ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00,
+        ACPI_LPIT_TYPE_SIMPLE_IO = 0x01
+};
+
+/* Masks for Flags field above  */
+
+#define ACPI_LPIT_STATE_DISABLED    (1)
+#define ACPI_LPIT_NO_COUNTER        (1<<1)
+
+/*
+ * LPIT subtables, correspond to Type in struct acpi_lpit_header
+ */
+
+/* 0x00: Native C-state instruction based LPI structure */
+
+struct acpi_lpit_native {
+        struct acpi_lpit_header header;
+        struct acpi_generic_address entry_trigger;
+        u32 residency;
+        u32 latency;
+        struct acpi_generic_address residency_counter;
+        u64 counter_frequency;
+};
+
+/* 0x01: Simple I/O based LPI structure */
+
+struct acpi_lpit_io {
+        struct acpi_lpit_header header;
+        struct acpi_generic_address entry_trigger;
+        u32 trigger_action;
+        u64 trigger_value;
+        u64 trigger_mask;
+        struct acpi_generic_address minimum_idle_state;
+        u32 residency;
+        u32 latency;
+        struct acpi_generic_address residency_counter;
+        u64 counter_frequency;
+};
+
+/*******************************************************************************
+ *
+ * MCFG - PCI Memory Mapped Configuration table and subtable
  *        Version 1
  *
  * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005
@@ -923,7 +988,7 @@ enum acpi_slic_type {
 };
 
 /*
- * SLIC Sub-tables, correspond to Type in struct acpi_slic_header
+ * SLIC Subtables, correspond to Type in struct acpi_slic_header
  */
 
 /* 0: Public Key Structure */
diff --git a/include/acpi/actypes.h b/include/acpi/actypes.h
index e76356574374..19b26bb69a70 100644
--- a/include/acpi/actypes.h
+++ b/include/acpi/actypes.h
@@ -329,6 +329,15 @@ typedef u32 acpi_physical_address;
  *
  ******************************************************************************/
 
+#ifdef ACPI_NO_MEM_ALLOCATIONS
+
+#define ACPI_ALLOCATE(a)                NULL
+#define ACPI_ALLOCATE_ZEROED(a)         NULL
+#define ACPI_FREE(a)
+#define ACPI_MEM_TRACKING(a)
+
+#else                           /* ACPI_NO_MEM_ALLOCATIONS */
+
 #ifdef ACPI_DBG_TRACK_ALLOCATIONS
 /*
  * Memory allocation tracking (used by acpi_exec to detect memory leaks)
@@ -350,6 +359,8 @@ typedef u32 acpi_physical_address;
 
 #endif                          /* ACPI_DBG_TRACK_ALLOCATIONS */
 
+#endif                          /* ACPI_NO_MEM_ALLOCATIONS */
+
 /******************************************************************************
  *
  * ACPI Specification constants (Do not change unless the specification changes)
@@ -928,9 +939,19 @@ struct acpi_object_list {
  * Miscellaneous common Data Structures used by the interfaces
  */
 #define ACPI_NO_BUFFER              0
+
+#ifdef ACPI_NO_MEM_ALLOCATIONS
+
+#define ACPI_ALLOCATE_BUFFER        (acpi_size) (0)
+#define ACPI_ALLOCATE_LOCAL_BUFFER  (acpi_size) (0)
+
+#else                           /* ACPI_NO_MEM_ALLOCATIONS */
+
 #define ACPI_ALLOCATE_BUFFER        (acpi_size) (-1)    /* Let ACPICA allocate buffer */
 #define ACPI_ALLOCATE_LOCAL_BUFFER  (acpi_size) (-2)    /* For internal use only (enables tracking) */
 
+#endif                          /* ACPI_NO_MEM_ALLOCATIONS */
+
 struct acpi_buffer {
         acpi_size length;       /* Length in bytes of the buffer */
         void *pointer;          /* pointer to buffer */
diff --git a/include/acpi/platform/acenvex.h b/include/acpi/platform/acenvex.h
new file mode 100644
index 000000000000..2b612384c994
--- /dev/null
+++ b/include/acpi/platform/acenvex.h
@@ -0,0 +1,63 @@
+/******************************************************************************
+ *
+ * Name: acenvex.h - Extra host and compiler configuration
+ *
+ *****************************************************************************/
+
+/*
+ * Copyright (C) 2000 - 2014, Intel Corp.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions, and the following disclaimer,
+ *    without modification.
+ * 2. Redistributions in binary form must reproduce at minimum a disclaimer
+ *    substantially similar to the "NO WARRANTY" disclaimer below
+ *    ("Disclaimer") and any redistribution must be conditioned upon
+ *    including a substantially similar Disclaimer requirement for further
+ *    binary redistribution.
+ * 3. Neither the names of the above-listed copyright holders nor the names
+ *    of any contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * Alternatively, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2 as published by the Free
+ * Software Foundation.
+ *
+ * NO WARRANTY
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGES.
+ */
+
+#ifndef __ACENVEX_H__
+#define __ACENVEX_H__
+
+/*! [Begin] no source code translation */
+
+/******************************************************************************
+ *
+ * Extra host configuration files. All ACPICA headers are included before
+ * including these files.
+ *
+ *****************************************************************************/
+
+#if defined(_LINUX) || defined(__linux__)
+#include <acpi/platform/aclinuxex.h>
+
+#endif
+
+/*! [End] no source code translation !*/
+
+#endif                          /* __ACENVEX_H__ */
diff --git a/include/acpi/platform/acgcc.h b/include/acpi/platform/acgcc.h
index a476b9118b49..384875da3713 100644
--- a/include/acpi/platform/acgcc.h
+++ b/include/acpi/platform/acgcc.h
@@ -64,4 +64,15 @@
  */
 #define ACPI_UNUSED_VAR __attribute__ ((unused))
 
+/*
+ * Some versions of gcc implement strchr() with a buggy macro. So,
+ * undef it here. Prevents error messages of this form (usually from the
+ * file getopt.c):
+ *
+ * error: logical '&&' with non-zero constant will always evaluate as true
+ */
+#ifdef strchr
+#undef strchr
+#endif
+
 #endif                          /* __ACGCC_H__ */
diff --git a/include/acpi/platform/aclinux.h b/include/acpi/platform/aclinux.h
index 93c55ed7c53d..cd1f052d55bb 100644
--- a/include/acpi/platform/aclinux.h
+++ b/include/acpi/platform/aclinux.h
@@ -48,7 +48,6 @@
 
 #define ACPI_USE_SYSTEM_CLIBRARY
 #define ACPI_USE_DO_WHILE_0
-#define ACPI_MUTEX_TYPE             ACPI_BINARY_SEMAPHORE
 
 #ifdef __KERNEL__
 
@@ -71,169 +70,65 @@
 #ifdef EXPORT_ACPI_INTERFACES
 #include <linux/export.h>
 #endif
-#include <asm/acpi.h>
+#include <asm/acenv.h>
 
-/* Host-dependent types and defines for in-kernel ACPICA */
+#ifndef CONFIG_ACPI
 
-#define ACPI_MACHINE_WIDTH          BITS_PER_LONG
-#define ACPI_EXPORT_SYMBOL(symbol)  EXPORT_SYMBOL(symbol);
-#define strtoul                     simple_strtoul
+/* External globals for __KERNEL__, stubs is needed */
 
-#define acpi_cache_t                        struct kmem_cache
-#define acpi_spinlock                       spinlock_t *
-#define acpi_cpu_flags                      unsigned long
+#define ACPI_GLOBAL(t,a)
+#define ACPI_INIT_GLOBAL(t,a,b)
 
-#else                           /* !__KERNEL__ */
+/* Generating stubs for configurable ACPICA macros */
 
-#include <stdarg.h>
-#include <string.h>
-#include <stdlib.h>
-#include <ctype.h>
-#include <unistd.h>
+#define ACPI_NO_MEM_ALLOCATIONS
 
-/* Disable kernel specific declarators */
+/* Generating stubs for configurable ACPICA functions */
 
-#ifndef __init
-#define __init
-#endif
-
-#ifndef __iomem
-#define __iomem
-#endif
+#define ACPI_NO_ERROR_MESSAGES
+#undef ACPI_DEBUG_OUTPUT
 
-/* Host-dependent types and defines for user-space ACPICA */
-
-#define ACPI_FLUSH_CPU_CACHE()
-#define ACPI_CAST_PTHREAD_T(pthread) ((acpi_thread_id) (pthread))
+/* External interface for __KERNEL__, stub is needed */
 
-#if defined(__ia64__) || defined(__x86_64__) || defined(__aarch64__)
-#define ACPI_MACHINE_WIDTH          64
-#define COMPILER_DEPENDENT_INT64    long
-#define COMPILER_DEPENDENT_UINT64   unsigned long
-#else
-#define ACPI_MACHINE_WIDTH          32
-#define COMPILER_DEPENDENT_INT64    long long
-#define COMPILER_DEPENDENT_UINT64   unsigned long long
-#define ACPI_USE_NATIVE_DIVIDE
-#endif
+#define ACPI_EXTERNAL_RETURN_STATUS(prototype) \
+        static ACPI_INLINE prototype {return(AE_NOT_CONFIGURED);}
+#define ACPI_EXTERNAL_RETURN_OK(prototype) \
+        static ACPI_INLINE prototype {return(AE_OK);}
+#define ACPI_EXTERNAL_RETURN_VOID(prototype) \
+        static ACPI_INLINE prototype {return;}
+#define ACPI_EXTERNAL_RETURN_UINT32(prototype) \
+        static ACPI_INLINE prototype {return(0);}
+#define ACPI_EXTERNAL_RETURN_PTR(prototype) \
+        static ACPI_INLINE prototype {return(NULL);}
 
-#ifndef __cdecl
-#define __cdecl
-#endif
+#endif                          /* CONFIG_ACPI */
 
-#endif                          /* __KERNEL__ */
+/* Host-dependent types and defines for in-kernel ACPICA */
 
-/* Linux uses GCC */
+#define ACPI_MACHINE_WIDTH          BITS_PER_LONG
+#define ACPI_EXPORT_SYMBOL(symbol)  EXPORT_SYMBOL(symbol);
+#define strtoul                     simple_strtoul
 
-#include <acpi/platform/acgcc.h>
+#define acpi_cache_t                        struct kmem_cache
+#define acpi_spinlock                       spinlock_t *
+#define acpi_cpu_flags                      unsigned long
 
-#ifdef __KERNEL__
+/* Use native linux version of acpi_os_allocate_zeroed */
 
-/*
- * FIXME: Inclusion of actypes.h
- * Linux kernel need this before defining inline OSL interfaces as
- * actypes.h need to be included to find ACPICA type definitions.
- * Since from ACPICA's perspective, the actypes.h should be included after
- * acenv.h (aclinux.h), this leads to a inclusion mis-ordering issue.
- */
-#include <acpi/actypes.h>
+#define USE_NATIVE_ALLOCATE_ZEROED
 
 /*
  * Overrides for in-kernel ACPICA
  */
-acpi_status __init acpi_os_initialize(void);
 #define ACPI_USE_ALTERNATE_PROTOTYPE_acpi_os_initialize
-
-acpi_status acpi_os_terminate(void);
 #define ACPI_USE_ALTERNATE_PROTOTYPE_acpi_os_terminate
-
-/*
- * Memory allocation/deallocation
- */
-
-/*
- * The irqs_disabled() check is for resume from RAM.
- * Interrupts are off during resume, just like they are for boot.
- * However, boot has  (system_state != SYSTEM_RUNNING)
- * to quiet __might_sleep() in kmalloc() and resume does not.
- */
-static inline void *acpi_os_allocate(acpi_size size)
-{
-        return kmalloc(size, irqs_disabled()? GFP_ATOMIC : GFP_KERNEL);
-}
-
 #define ACPI_USE_ALTERNATE_PROTOTYPE_acpi_os_allocate
-
-/* Use native linux version of acpi_os_allocate_zeroed */
-
-static inline void *acpi_os_allocate_zeroed(acpi_size size)
-{
-        return kzalloc(size, irqs_disabled()? GFP_ATOMIC : GFP_KERNEL);
-}
-
 #define ACPI_USE_ALTERNATE_PROTOTYPE_acpi_os_allocate_zeroed
-#define USE_NATIVE_ALLOCATE_ZEROED
-
-static inline void acpi_os_free(void *memory)
-{
-        kfree(memory);
-}
-
 #define ACPI_USE_ALTERNATE_PROTOTYPE_acpi_os_free
-
-static inline void *acpi_os_acquire_object(acpi_cache_t * cache)
-{
-        return kmem_cache_zalloc(cache,
-                                 irqs_disabled()? GFP_ATOMIC : GFP_KERNEL);
-}
-
 #define ACPI_USE_ALTERNATE_PROTOTYPE_acpi_os_acquire_object
-
-static inline acpi_thread_id acpi_os_get_thread_id(void)
-{
-        return (acpi_thread_id) (unsigned long)current;
-}
-
 #define ACPI_USE_ALTERNATE_PROTOTYPE_acpi_os_get_thread_id
-
-#ifndef CONFIG_PREEMPT
-
-/*
- * Used within ACPICA to show where it is safe to preempt execution
- * when CONFIG_PREEMPT=n
- */
-#define ACPI_PREEMPTION_POINT() \
-        do { \
-                if (!irqs_disabled()) \
-                        cond_resched(); \
-        } while (0)
-
-#endif
-
-/*
- * When lockdep is enabled, the spin_lock_init() macro stringifies it's
- * argument and uses that as a name for the lock in debugging.
- * By executing spin_lock_init() in a macro the key changes from "lock" for
- * all locks to the name of the argument of acpi_os_create_lock(), which
- * prevents lockdep from reporting false positives for ACPICA locks.
- */
-#define acpi_os_create_lock(__handle) \
-        ({ \
-                spinlock_t *lock = ACPI_ALLOCATE(sizeof(*lock)); \
-                if (lock) { \
-                        *(__handle) = lock; \
-                        spin_lock_init(*(__handle)); \
-                } \
-                lock ? AE_OK : AE_NO_MEMORY; \
-        })
 #define ACPI_USE_ALTERNATE_PROTOTYPE_acpi_os_create_lock
 
-void __iomem *acpi_os_map_memory(acpi_physical_address where, acpi_size length);
-#define ACPI_USE_ALTERNATE_PROTOTYPE_acpi_os_map_memory
-
-void acpi_os_unmap_memory(void __iomem * logical_address, acpi_size size);
-#define ACPI_USE_ALTERNATE_PROTOTYPE_acpi_os_unmap_memory
-
 /*
  * OSL interfaces used by debugger/disassembler
  */
@@ -252,11 +147,45 @@ void acpi_os_unmap_memory(void __iomem * logical_address, acpi_size size);
 #define ACPI_USE_ALTERNATE_PROTOTYPE_acpi_os_get_next_filename
 #define ACPI_USE_ALTERNATE_PROTOTYPE_acpi_os_close_directory
 
-/*
- * OSL interfaces added by Linux
- */
-void early_acpi_os_unmap_memory(void __iomem * virt, acpi_size size);
+#else                           /* !__KERNEL__ */
+
+#include <stdarg.h>
+#include <string.h>
+#include <stdlib.h>
+#include <ctype.h>
+#include <unistd.h>
+
+/* Define/disable kernel-specific declarators */
+
+#ifndef __init
+#define __init
+#endif
+
+/* Host-dependent types and defines for user-space ACPICA */
+
+#define ACPI_FLUSH_CPU_CACHE()
+#define ACPI_CAST_PTHREAD_T(pthread) ((acpi_thread_id) (pthread))
+
+#if defined(__ia64__)    || defined(__x86_64__) ||\
+        defined(__aarch64__) || defined(__PPC64__)
+#define ACPI_MACHINE_WIDTH          64
+#define COMPILER_DEPENDENT_INT64    long
+#define COMPILER_DEPENDENT_UINT64   unsigned long
+#else
+#define ACPI_MACHINE_WIDTH          32
+#define COMPILER_DEPENDENT_INT64    long long
+#define COMPILER_DEPENDENT_UINT64   unsigned long long
+#define ACPI_USE_NATIVE_DIVIDE
+#endif
+
+#ifndef __cdecl
+#define __cdecl
+#endif
 
 #endif                          /* __KERNEL__ */
 
+/* Linux uses GCC */
+
+#include <acpi/platform/acgcc.h>
+
 #endif                          /* __ACLINUX_H__ */
diff --git a/include/acpi/platform/aclinuxex.h b/include/acpi/platform/aclinuxex.h
new file mode 100644
index 000000000000..191e741cfa0e
--- /dev/null
+++ b/include/acpi/platform/aclinuxex.h
@@ -0,0 +1,112 @@
+/******************************************************************************
+ *
+ * Name: aclinuxex.h - Extra OS specific defines, etc. for Linux
+ *
+ *****************************************************************************/
+
+/*
+ * Copyright (C) 2000 - 2014, Intel Corp.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions, and the following disclaimer,
+ *    without modification.
+ * 2. Redistributions in binary form must reproduce at minimum a disclaimer
+ *    substantially similar to the "NO WARRANTY" disclaimer below
+ *    ("Disclaimer") and any redistribution must be conditioned upon
+ *    including a substantially similar Disclaimer requirement for further
+ *    binary redistribution.
+ * 3. Neither the names of the above-listed copyright holders nor the names
+ *    of any contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * Alternatively, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2 as published by the Free
+ * Software Foundation.
+ *
+ * NO WARRANTY
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGES.
+ */
+
+#ifndef __ACLINUXEX_H__
+#define __ACLINUXEX_H__
+
+#ifdef __KERNEL__
+
+/*
+ * Overrides for in-kernel ACPICA
+ */
+acpi_status __init acpi_os_initialize(void);
+
+acpi_status acpi_os_terminate(void);
+
+/*
+ * The irqs_disabled() check is for resume from RAM.
+ * Interrupts are off during resume, just like they are for boot.
+ * However, boot has  (system_state != SYSTEM_RUNNING)
+ * to quiet __might_sleep() in kmalloc() and resume does not.
+ */
+static inline void *acpi_os_allocate(acpi_size size)
+{
+        return kmalloc(size, irqs_disabled()? GFP_ATOMIC : GFP_KERNEL);
+}
+
+static inline void *acpi_os_allocate_zeroed(acpi_size size)
+{
+        return kzalloc(size, irqs_disabled()? GFP_ATOMIC : GFP_KERNEL);
+}
+
+static inline void acpi_os_free(void *memory)
+{
+        kfree(memory);
+}
+
+static inline void *acpi_os_acquire_object(acpi_cache_t * cache)
+{
+        return kmem_cache_zalloc(cache,
+                                 irqs_disabled()? GFP_ATOMIC : GFP_KERNEL);
+}
+
+static inline acpi_thread_id acpi_os_get_thread_id(void)
+{
+        return (acpi_thread_id) (unsigned long)current;
+}
+
+/*
+ * When lockdep is enabled, the spin_lock_init() macro stringifies it's
+ * argument and uses that as a name for the lock in debugging.
+ * By executing spin_lock_init() in a macro the key changes from "lock" for
+ * all locks to the name of the argument of acpi_os_create_lock(), which
+ * prevents lockdep from reporting false positives for ACPICA locks.
+ */
+#define acpi_os_create_lock(__handle) \
+        ({ \
+                spinlock_t *lock = ACPI_ALLOCATE(sizeof(*lock)); \
+                if (lock) { \
+                        *(__handle) = lock; \
+                        spin_lock_init(*(__handle)); \
+                } \
+                lock ? AE_OK : AE_NO_MEMORY; \
+        })
+
+/*
+ * OSL interfaces added by Linux
+ */
+void early_acpi_os_unmap_memory(void __iomem * virt, acpi_size size);
+
+#endif                          /* __KERNEL__ */
+
+#endif                          /* __ACLINUXEX_H__ */
diff --git a/include/acpi/video.h b/include/acpi/video.h
index 61109f2609fc..ea4c7bbded4d 100644
--- a/include/acpi/video.h
+++ b/include/acpi/video.h
@@ -19,11 +19,13 @@ struct acpi_device;
 #if (defined CONFIG_ACPI_VIDEO || defined CONFIG_ACPI_VIDEO_MODULE)
 extern int acpi_video_register(void);
 extern void acpi_video_unregister(void);
+extern void acpi_video_unregister_backlight(void);
 extern int acpi_video_get_edid(struct acpi_device *device, int type,
                                int device_id, void **edid);
 #else
 static inline int acpi_video_register(void) { return 0; }
 static inline void acpi_video_unregister(void) { return; }
+static inline void acpi_video_unregister_backlight(void) { return; }
 static inline int acpi_video_get_edid(struct acpi_device *device, int type,
                                       int device_id, void **edid)
 {
diff --git a/include/asm-generic/atomic.h b/include/asm-generic/atomic.h
index 33bd2de3bc1e..9c79e7603459 100644
--- a/include/asm-generic/atomic.h
+++ b/include/asm-generic/atomic.h
@@ -16,6 +16,7 @@
 #define __ASM_GENERIC_ATOMIC_H
 
 #include <asm/cmpxchg.h>
+#include <asm/barrier.h>
 
 #ifdef CONFIG_SMP
 /* Force people to define core atomics */
@@ -182,11 +183,5 @@ static inline void atomic_set_mask(unsigned int mask, atomic_t *v)
 }
 #endif
 
-/* Assume that atomic operations are already serializing */
-#define smp_mb__before_atomic_dec()     barrier()
-#define smp_mb__after_atomic_dec()      barrier()
-#define smp_mb__before_atomic_inc()     barrier()
-#define smp_mb__after_atomic_inc()      barrier()
-
 #endif /* __KERNEL__ */
 #endif /* __ASM_GENERIC_ATOMIC_H */
diff --git a/include/asm-generic/barrier.h b/include/asm-generic/barrier.h
index 6f692f8ac664..1402fa855388 100644
--- a/include/asm-generic/barrier.h
+++ b/include/asm-generic/barrier.h
@@ -62,6 +62,14 @@
 #define set_mb(var, value)  do { (var) = (value); mb(); } while (0)
 #endif
 
+#ifndef smp_mb__before_atomic
+#define smp_mb__before_atomic() smp_mb()
+#endif
+
+#ifndef smp_mb__after_atomic
+#define smp_mb__after_atomic()  smp_mb()
+#endif
+
 #define smp_store_release(p, v)                                         \
 do {                                                                    \
         compiletime_assert_atomic_type(*p);                             \
diff --git a/include/asm-generic/bitops.h b/include/asm-generic/bitops.h
index 280ca7a96f75..dcdcacf2fd2b 100644
--- a/include/asm-generic/bitops.h
+++ b/include/asm-generic/bitops.h
@@ -11,14 +11,7 @@
 
 #include <linux/irqflags.h>
 #include <linux/compiler.h>
-
-/*
- * clear_bit may not imply a memory barrier
- */
-#ifndef smp_mb__before_clear_bit
-#define smp_mb__before_clear_bit()      smp_mb()
-#define smp_mb__after_clear_bit()       smp_mb()
-#endif
+#include <asm/barrier.h>
 
 #include <asm-generic/bitops/__ffs.h>
 #include <asm-generic/bitops/ffz.h>
diff --git a/include/asm-generic/bitops/atomic.h b/include/asm-generic/bitops/atomic.h
index 9ae6c34dc191..49673510b484 100644
--- a/include/asm-generic/bitops/atomic.h
+++ b/include/asm-generic/bitops/atomic.h
@@ -80,7 +80,7 @@ static inline void set_bit(int nr, volatile unsigned long *addr)
  *
  * clear_bit() is atomic and may not be reordered.  However, it does
  * not contain a memory barrier, so if it is used for locking purposes,
- * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
+ * you should call smp_mb__before_atomic() and/or smp_mb__after_atomic()
  * in order to ensure changes are visible on other processors.
  */
 static inline void clear_bit(int nr, volatile unsigned long *addr)
diff --git a/include/asm-generic/bitops/lock.h b/include/asm-generic/bitops/lock.h
index 308a9e22c802..c30266e94806 100644
--- a/include/asm-generic/bitops/lock.h
+++ b/include/asm-generic/bitops/lock.h
@@ -20,7 +20,7 @@
  */
 #define clear_bit_unlock(nr, addr)      \
 do {                                    \
-        smp_mb__before_clear_bit();     \
+        smp_mb__before_atomic();        \
         clear_bit(nr, addr);            \
 } while (0)
 
diff --git a/include/asm-generic/dma-coherent.h b/include/asm-generic/dma-coherent.h
index 2be8a2dbc868..0297e5875798 100644
--- a/include/asm-generic/dma-coherent.h
+++ b/include/asm-generic/dma-coherent.h
@@ -16,16 +16,13 @@ int dma_mmap_from_coherent(struct device *dev, struct vm_area_struct *vma,
  * Standard interface
  */
 #define ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
-extern int
-dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
-                            dma_addr_t device_addr, size_t size, int flags);
+int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
+                                dma_addr_t device_addr, size_t size, int flags);
 
-extern void
-dma_release_declared_memory(struct device *dev);
+void dma_release_declared_memory(struct device *dev);
 
-extern void *
-dma_mark_declared_memory_occupied(struct device *dev,
-                                  dma_addr_t device_addr, size_t size);
+void *dma_mark_declared_memory_occupied(struct device *dev,
+                                        dma_addr_t device_addr, size_t size);
 #else
 #define dma_alloc_from_coherent(dev, size, handle, ret) (0)
 #define dma_release_from_coherent(dev, order, vaddr) (0)
diff --git a/include/asm-generic/ioctl.h b/include/asm-generic/ioctl.h
index d17295b290fa..297fb0d7cd6c 100644
--- a/include/asm-generic/ioctl.h
+++ b/include/asm-generic/ioctl.h
@@ -3,10 +3,15 @@
 
 #include <uapi/asm-generic/ioctl.h>
 
+#ifdef __CHECKER__
+#define _IOC_TYPECHECK(t) (sizeof(t))
+#else
 /* provoke compile error for invalid uses of size argument */
 extern unsigned int __invalid_size_argument_for_IOC;
 #define _IOC_TYPECHECK(t) \
         ((sizeof(t) == sizeof(t[1]) && \
           sizeof(t) < (1 << _IOC_SIZEBITS)) ? \
           sizeof(t) : __invalid_size_argument_for_IOC)
+#endif
+
 #endif /* _ASM_GENERIC_IOCTL_H */
diff --git a/include/asm-generic/pgtable.h b/include/asm-generic/pgtable.h
index a8015a7a55bb..53b2acc38213 100644
--- a/include/asm-generic/pgtable.h
+++ b/include/asm-generic/pgtable.h
@@ -233,6 +233,10 @@ static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
 # define pte_accessible(mm, pte)        ((void)(pte), 1)
 #endif
 
+#ifndef pte_present_nonuma
+#define pte_present_nonuma(pte) pte_present(pte)
+#endif
+
 #ifndef flush_tlb_fix_spurious_fault
 #define flush_tlb_fix_spurious_fault(vma, address) flush_tlb_page(vma, address)
 #endif
@@ -670,7 +674,7 @@ static inline int pmd_trans_unstable(pmd_t *pmd)
 static inline int pte_numa(pte_t pte)
 {
         return (pte_flags(pte) &
-                (_PAGE_NUMA|_PAGE_PRESENT)) == _PAGE_NUMA;
+                (_PAGE_NUMA|_PAGE_PROTNONE|_PAGE_PRESENT)) == _PAGE_NUMA;
 }
 #endif
 
@@ -678,7 +682,7 @@ static inline int pte_numa(pte_t pte)
 static inline int pmd_numa(pmd_t pmd)
 {
         return (pmd_flags(pmd) &
-                (_PAGE_NUMA|_PAGE_PRESENT)) == _PAGE_NUMA;
+                (_PAGE_NUMA|_PAGE_PROTNONE|_PAGE_PRESENT)) == _PAGE_NUMA;
 }
 #endif
 
diff --git a/include/asm-generic/unaligned.h b/include/asm-generic/unaligned.h
index 03cf5936bad6..1ac097279db1 100644
--- a/include/asm-generic/unaligned.h
+++ b/include/asm-generic/unaligned.h
@@ -4,22 +4,27 @@
 /*
  * This is the most generic implementation of unaligned accesses
  * and should work almost anywhere.
- *
- * If an architecture can handle unaligned accesses in hardware,
- * it may want to use the linux/unaligned/access_ok.h implementation
- * instead.
  */
 #include <asm/byteorder.h>
 
+/* Set by the arch if it can handle unaligned accesses in hardware. */
+#ifdef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
+# include <linux/unaligned/access_ok.h>
+#endif
+
 #if defined(__LITTLE_ENDIAN)
-# include <linux/unaligned/le_struct.h>
-# include <linux/unaligned/be_byteshift.h>
+# ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
+#  include <linux/unaligned/le_struct.h>
+#  include <linux/unaligned/be_byteshift.h>
+# endif
 # include <linux/unaligned/generic.h>
 # define get_unaligned  __get_unaligned_le
 # define put_unaligned  __put_unaligned_le
 #elif defined(__BIG_ENDIAN)
-# include <linux/unaligned/be_struct.h>
-# include <linux/unaligned/le_byteshift.h>
+# ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
+#  include <linux/unaligned/be_struct.h>
+#  include <linux/unaligned/le_byteshift.h>
+# endif
 # include <linux/unaligned/generic.h>
 # define get_unaligned  __get_unaligned_be
 # define put_unaligned  __put_unaligned_be
diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h
index 146e4fffd710..d647637cd699 100644
--- a/include/asm-generic/vmlinux.lds.h
+++ b/include/asm-generic/vmlinux.lds.h
@@ -139,52 +139,23 @@
 #define TRACE_SYSCALLS()
 #endif
 
-#ifdef CONFIG_CLKSRC_OF
-#define CLKSRC_OF_TABLES() . = ALIGN(8);                                \
-                           VMLINUX_SYMBOL(__clksrc_of_table) = .;       \
-                           *(__clksrc_of_table)                         \
-                           *(__clksrc_of_table_end)
-#else
-#define CLKSRC_OF_TABLES()
-#endif
 
-#ifdef CONFIG_IRQCHIP
-#define IRQCHIP_OF_MATCH_TABLE()                                        \
+#define ___OF_TABLE(cfg, name)  _OF_TABLE_##cfg(name)
+#define __OF_TABLE(cfg, name)   ___OF_TABLE(cfg, name)
+#define OF_TABLE(cfg, name)     __OF_TABLE(config_enabled(cfg), name)
+#define _OF_TABLE_0(name)
+#define _OF_TABLE_1(name)                                               \
         . = ALIGN(8);                                                   \
-        VMLINUX_SYMBOL(__irqchip_begin) = .;                            \
-        *(__irqchip_of_table)                                           \
-        *(__irqchip_of_end)
-#else
-#define IRQCHIP_OF_MATCH_TABLE()
-#endif
-
-#ifdef CONFIG_COMMON_CLK
-#define CLK_OF_TABLES() . = ALIGN(8);                           \
-                        VMLINUX_SYMBOL(__clk_of_table) = .;     \
-                        *(__clk_of_table)                       \
-                        *(__clk_of_table_end)
-#else
-#define CLK_OF_TABLES()
-#endif
-
-#ifdef CONFIG_OF_RESERVED_MEM
-#define RESERVEDMEM_OF_TABLES()                         \
-        . = ALIGN(8);                                   \
-        VMLINUX_SYMBOL(__reservedmem_of_table) = .;     \
-        *(__reservedmem_of_table)                       \
-        *(__reservedmem_of_table_end)
-#else
-#define RESERVEDMEM_OF_TABLES()
-#endif
+        VMLINUX_SYMBOL(__##name##_of_table) = .;                        \
+        *(__##name##_of_table)                                          \
+        *(__##name##_of_table_end)
 
-#ifdef CONFIG_SMP
-#define CPU_METHOD_OF_TABLES() . = ALIGN(8);                                \
-                           VMLINUX_SYMBOL(__cpu_method_of_table_begin) = .; \
-                           *(__cpu_method_of_table)                         \
-                           VMLINUX_SYMBOL(__cpu_method_of_table_end) = .;
-#else
-#define CPU_METHOD_OF_TABLES()
-#endif
+#define CLKSRC_OF_TABLES()      OF_TABLE(CONFIG_CLKSRC_OF, clksrc)
+#define IRQCHIP_OF_MATCH_TABLE() OF_TABLE(CONFIG_IRQCHIP, irqchip)
+#define CLK_OF_TABLES()         OF_TABLE(CONFIG_COMMON_CLK, clk)
+#define RESERVEDMEM_OF_TABLES() OF_TABLE(CONFIG_OF_RESERVED_MEM, reservedmem)
+#define CPU_METHOD_OF_TABLES()  OF_TABLE(CONFIG_SMP, cpu_method)
+#define EARLYCON_OF_TABLES()    OF_TABLE(CONFIG_SERIAL_EARLYCON, earlycon)
 
 #define KERNEL_DTB()                                                    \
         STRUCT_ALIGN();                                                 \
@@ -513,7 +484,8 @@
         CLKSRC_OF_TABLES()                                              \
         CPU_METHOD_OF_TABLES()                                          \
         KERNEL_DTB()                                                    \
-        IRQCHIP_OF_MATCH_TABLE()
+        IRQCHIP_OF_MATCH_TABLE()                                        \
+        EARLYCON_OF_TABLES()
 
 #define INIT_TEXT                                                       \
         *(.init.text)                                                   \
diff --git a/include/crypto/internal/hash.h b/include/crypto/internal/hash.h
index 821eae8cbd8c..9b6f32a6cad1 100644
--- a/include/crypto/internal/hash.h
+++ b/include/crypto/internal/hash.h
@@ -55,15 +55,28 @@ extern const struct crypto_type crypto_ahash_type;
 int crypto_hash_walk_done(struct crypto_hash_walk *walk, int err);
 int crypto_hash_walk_first(struct ahash_request *req,
                            struct crypto_hash_walk *walk);
+int crypto_ahash_walk_first(struct ahash_request *req,
+                           struct crypto_hash_walk *walk);
 int crypto_hash_walk_first_compat(struct hash_desc *hdesc,
                                   struct crypto_hash_walk *walk,
                                   struct scatterlist *sg, unsigned int len);
 
+static inline int crypto_ahash_walk_done(struct crypto_hash_walk *walk,
+                                         int err)
+{
+        return crypto_hash_walk_done(walk, err);
+}
+
 static inline int crypto_hash_walk_last(struct crypto_hash_walk *walk)
 {
         return !(walk->entrylen | walk->total);
 }
 
+static inline int crypto_ahash_walk_last(struct crypto_hash_walk *walk)
+{
+        return crypto_hash_walk_last(walk);
+}
+
 int crypto_register_ahash(struct ahash_alg *alg);
 int crypto_unregister_ahash(struct ahash_alg *alg);
 int ahash_register_instance(struct crypto_template *tmpl,
diff --git a/include/dt-bindings/clock/bcm21664.h b/include/dt-bindings/clock/bcm21664.h
new file mode 100644
index 000000000000..5a7f0e4750a8
--- /dev/null
+++ b/include/dt-bindings/clock/bcm21664.h
@@ -0,0 +1,62 @@
+/*
+ * Copyright (C) 2013 Broadcom Corporation
+ * Copyright 2013 Linaro Limited
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _CLOCK_BCM21664_H
+#define _CLOCK_BCM21664_H
+
+/*
+ * This file defines the values used to specify clocks provided by
+ * the clock control units (CCUs) on Broadcom BCM21664 family SoCs.
+ */
+
+/* bcm21664 CCU device tree "compatible" strings */
+#define BCM21664_DT_ROOT_CCU_COMPAT     "brcm,bcm21664-root-ccu"
+#define BCM21664_DT_AON_CCU_COMPAT      "brcm,bcm21664-aon-ccu"
+#define BCM21664_DT_MASTER_CCU_COMPAT   "brcm,bcm21664-master-ccu"
+#define BCM21664_DT_SLAVE_CCU_COMPAT    "brcm,bcm21664-slave-ccu"
+
+/* root CCU clock ids */
+
+#define BCM21664_ROOT_CCU_FRAC_1M               0
+#define BCM21664_ROOT_CCU_CLOCK_COUNT           1
+
+/* aon CCU clock ids */
+
+#define BCM21664_AON_CCU_HUB_TIMER              0
+#define BCM21664_AON_CCU_CLOCK_COUNT            1
+
+/* master CCU clock ids */
+
+#define BCM21664_MASTER_CCU_SDIO1               0
+#define BCM21664_MASTER_CCU_SDIO2               1
+#define BCM21664_MASTER_CCU_SDIO3               2
+#define BCM21664_MASTER_CCU_SDIO4               3
+#define BCM21664_MASTER_CCU_SDIO1_SLEEP         4
+#define BCM21664_MASTER_CCU_SDIO2_SLEEP         5
+#define BCM21664_MASTER_CCU_SDIO3_SLEEP         6
+#define BCM21664_MASTER_CCU_SDIO4_SLEEP         7
+#define BCM21664_MASTER_CCU_CLOCK_COUNT         8
+
+/* slave CCU clock ids */
+
+#define BCM21664_SLAVE_CCU_UARTB                0
+#define BCM21664_SLAVE_CCU_UARTB2               1
+#define BCM21664_SLAVE_CCU_UARTB3               2
+#define BCM21664_SLAVE_CCU_BSC1                 3
+#define BCM21664_SLAVE_CCU_BSC2                 4
+#define BCM21664_SLAVE_CCU_BSC3                 5
+#define BCM21664_SLAVE_CCU_BSC4                 6
+#define BCM21664_SLAVE_CCU_CLOCK_COUNT          7
+
+#endif /* _CLOCK_BCM21664_H */
diff --git a/include/dt-bindings/clock/bcm281xx.h b/include/dt-bindings/clock/bcm281xx.h
index e0096940886d..a763460cf1af 100644
--- a/include/dt-bindings/clock/bcm281xx.h
+++ b/include/dt-bindings/clock/bcm281xx.h
@@ -20,6 +20,18 @@
  * the clock control units (CCUs) on Broadcom BCM281XX family SoCs.
  */
 
+/*
+ * These are the bcm281xx CCU device tree "compatible" strings.
+ * We're stuck with using "bcm11351" in the string because wild
+ * cards aren't allowed, and that name was the first one defined
+ * in this family of devices.
+ */
+#define BCM281XX_DT_ROOT_CCU_COMPAT     "brcm,bcm11351-root-ccu"
+#define BCM281XX_DT_AON_CCU_COMPAT      "brcm,bcm11351-aon-ccu"
+#define BCM281XX_DT_HUB_CCU_COMPAT      "brcm,bcm11351-hub-ccu"
+#define BCM281XX_DT_MASTER_CCU_COMPAT   "brcm,bcm11351-master-ccu"
+#define BCM281XX_DT_SLAVE_CCU_COMPAT    "brcm,bcm11351-slave-ccu"
+
 /* root CCU clock ids */
 
 #define BCM281XX_ROOT_CCU_FRAC_1M               0
diff --git a/include/dt-bindings/clock/berlin2.h b/include/dt-bindings/clock/berlin2.h
new file mode 100644
index 000000000000..0c30800175df
--- /dev/null
+++ b/include/dt-bindings/clock/berlin2.h
@@ -0,0 +1,45 @@
+/*
+ * Berlin2 BG2/BG2CD clock tree IDs
+ */
+
+#define CLKID_SYS               0
+#define CLKID_CPU               1
+#define CLKID_DRMFIGO           2
+#define CLKID_CFG               3
+#define CLKID_GFX               4
+#define CLKID_ZSP               5
+#define CLKID_PERIF             6
+#define CLKID_PCUBE             7
+#define CLKID_VSCOPE            8
+#define CLKID_NFC_ECC           9
+#define CLKID_VPP               10
+#define CLKID_APP               11
+#define CLKID_AUDIO0            12
+#define CLKID_AUDIO2            13
+#define CLKID_AUDIO3            14
+#define CLKID_AUDIO1            15
+#define CLKID_GFX3D_CORE        16
+#define CLKID_GFX3D_SYS         17
+#define CLKID_ARC               18
+#define CLKID_VIP               19
+#define CLKID_SDIO0XIN          20
+#define CLKID_SDIO1XIN          21
+#define CLKID_GFX3D_EXTRA       22
+#define CLKID_GC360             23
+#define CLKID_SDIO_DLLMST       24
+#define CLKID_GETH0             25
+#define CLKID_GETH1             26
+#define CLKID_SATA              27
+#define CLKID_AHBAPB            28
+#define CLKID_USB0              29
+#define CLKID_USB1              30
+#define CLKID_PBRIDGE           31
+#define CLKID_SDIO0             32
+#define CLKID_SDIO1             33
+#define CLKID_NFC               34
+#define CLKID_SMEMC             35
+#define CLKID_AUDIOHD           36
+#define CLKID_VIDEO0            37
+#define CLKID_VIDEO1            38
+#define CLKID_VIDEO2            39
+#define CLKID_TWD               40
diff --git a/include/dt-bindings/clock/berlin2q.h b/include/dt-bindings/clock/berlin2q.h
new file mode 100644
index 000000000000..287fc3b4afb2
--- /dev/null
+++ b/include/dt-bindings/clock/berlin2q.h
@@ -0,0 +1,31 @@
+/*
+ * Berlin2 BG2Q clock tree IDs
+ */
+
+#define CLKID_SYS               0
+#define CLKID_DRMFIGO           1
+#define CLKID_CFG               2
+#define CLKID_GFX2D             3
+#define CLKID_ZSP               4
+#define CLKID_PERIF             5
+#define CLKID_PCUBE             6
+#define CLKID_VSCOPE            7
+#define CLKID_NFC_ECC           8
+#define CLKID_VPP               9
+#define CLKID_APP               10
+#define CLKID_SDIO0XIN          11
+#define CLKID_SDIO1XIN          12
+#define CLKID_GFX2DAXI          13
+#define CLKID_GETH0             14
+#define CLKID_SATA              15
+#define CLKID_AHBAPB            16
+#define CLKID_USB0              17
+#define CLKID_USB1              18
+#define CLKID_USB2              19
+#define CLKID_USB3              20
+#define CLKID_PBRIDGE           21
+#define CLKID_SDIO              22
+#define CLKID_NFC               23
+#define CLKID_SMEMC             24
+#define CLKID_PCIE              25
+#define CLKID_TWD               26
diff --git a/include/dt-bindings/clock/exynos3250.h b/include/dt-bindings/clock/exynos3250.h
new file mode 100644
index 000000000000..b535e9da7de6
--- /dev/null
+++ b/include/dt-bindings/clock/exynos3250.h
@@ -0,0 +1,258 @@
+/*
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ *      Author: Tomasz Figa <t.figa@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Device Tree binding constants for Samsung Exynos3250 clock controllers.
+ */
+
+#ifndef _DT_BINDINGS_CLOCK_SAMSUNG_EXYNOS3250_CLOCK_H
+#define _DT_BINDINGS_CLOCK_SAMSUNG_EXYNOS3250_CLOCK_H
+
+/*
+ * Let each exported clock get a unique index, which is used on DT-enabled
+ * platforms to lookup the clock from a clock specifier. These indices are
+ * therefore considered an ABI and so must not be changed. This implies
+ * that new clocks should be added either in free spaces between clock groups
+ * or at the end.
+ */
+
+
+/*
+ * Main CMU
+ */
+
+#define CLK_OSCSEL                      1
+#define CLK_FIN_PLL                     2
+#define CLK_FOUT_APLL                   3
+#define CLK_FOUT_VPLL                   4
+#define CLK_FOUT_UPLL                   5
+#define CLK_FOUT_MPLL                   6
+
+/* Muxes */
+#define CLK_MOUT_MPLL_USER_L            16
+#define CLK_MOUT_GDL                    17
+#define CLK_MOUT_MPLL_USER_R            18
+#define CLK_MOUT_GDR                    19
+#define CLK_MOUT_EBI                    20
+#define CLK_MOUT_ACLK_200               21
+#define CLK_MOUT_ACLK_160               22
+#define CLK_MOUT_ACLK_100               23
+#define CLK_MOUT_ACLK_266_1             24
+#define CLK_MOUT_ACLK_266_0             25
+#define CLK_MOUT_ACLK_266               26
+#define CLK_MOUT_VPLL                   27
+#define CLK_MOUT_EPLL_USER              28
+#define CLK_MOUT_EBI_1                  29
+#define CLK_MOUT_UPLL                   30
+#define CLK_MOUT_ACLK_400_MCUISP_SUB    31
+#define CLK_MOUT_MPLL                   32
+#define CLK_MOUT_ACLK_400_MCUISP        33
+#define CLK_MOUT_VPLLSRC                34
+#define CLK_MOUT_CAM1                   35
+#define CLK_MOUT_CAM_BLK                36
+#define CLK_MOUT_MFC                    37
+#define CLK_MOUT_MFC_1                  38
+#define CLK_MOUT_MFC_0                  39
+#define CLK_MOUT_G3D                    40
+#define CLK_MOUT_G3D_1                  41
+#define CLK_MOUT_G3D_0                  42
+#define CLK_MOUT_MIPI0                  43
+#define CLK_MOUT_FIMD0                  44
+#define CLK_MOUT_UART_ISP               45
+#define CLK_MOUT_SPI1_ISP               46
+#define CLK_MOUT_SPI0_ISP               47
+#define CLK_MOUT_TSADC                  48
+#define CLK_MOUT_MMC1                   49
+#define CLK_MOUT_MMC0                   50
+#define CLK_MOUT_UART1                  51
+#define CLK_MOUT_UART0                  52
+#define CLK_MOUT_SPI1                   53
+#define CLK_MOUT_SPI0                   54
+#define CLK_MOUT_AUDIO                  55
+#define CLK_MOUT_MPLL_USER_C            56
+#define CLK_MOUT_HPM                    57
+#define CLK_MOUT_CORE                   58
+#define CLK_MOUT_APLL                   59
+#define CLK_MOUT_ACLK_266_SUB           60
+
+/* Dividers */
+#define CLK_DIV_GPL                     64
+#define CLK_DIV_GDL                     65
+#define CLK_DIV_GPR                     66
+#define CLK_DIV_GDR                     67
+#define CLK_DIV_MPLL_PRE                68
+#define CLK_DIV_ACLK_400_MCUISP         69
+#define CLK_DIV_EBI                     70
+#define CLK_DIV_ACLK_200                71
+#define CLK_DIV_ACLK_160                72
+#define CLK_DIV_ACLK_100                73
+#define CLK_DIV_ACLK_266                74
+#define CLK_DIV_CAM1                    75
+#define CLK_DIV_CAM_BLK                 76
+#define CLK_DIV_MFC                     77
+#define CLK_DIV_G3D                     78
+#define CLK_DIV_MIPI0_PRE               79
+#define CLK_DIV_MIPI0                   80
+#define CLK_DIV_FIMD0                   81
+#define CLK_DIV_UART_ISP                82
+#define CLK_DIV_SPI1_ISP_PRE            83
+#define CLK_DIV_SPI1_ISP                84
+#define CLK_DIV_SPI0_ISP_PRE            85
+#define CLK_DIV_SPI0_ISP                86
+#define CLK_DIV_TSADC_PRE               87
+#define CLK_DIV_TSADC                   88
+#define CLK_DIV_MMC1_PRE                89
+#define CLK_DIV_MMC1                    90
+#define CLK_DIV_MMC0_PRE                91
+#define CLK_DIV_MMC0                    92
+#define CLK_DIV_UART1                   93
+#define CLK_DIV_UART0                   94
+#define CLK_DIV_SPI1_PRE                95
+#define CLK_DIV_SPI1                    96
+#define CLK_DIV_SPI0_PRE                97
+#define CLK_DIV_SPI0                    98
+#define CLK_DIV_PCM                     99
+#define CLK_DIV_AUDIO                   100
+#define CLK_DIV_I2S                     101
+#define CLK_DIV_CORE2                   102
+#define CLK_DIV_APLL                    103
+#define CLK_DIV_PCLK_DBG                104
+#define CLK_DIV_ATB                     105
+#define CLK_DIV_COREM                   106
+#define CLK_DIV_CORE                    107
+#define CLK_DIV_HPM                     108
+#define CLK_DIV_COPY                    109
+
+/* Gates */
+#define CLK_ASYNC_G3D                   128
+#define CLK_ASYNC_MFCL                  129
+#define CLK_PPMULEFT                    130
+#define CLK_GPIO_LEFT                   131
+#define CLK_ASYNC_ISPMX                 132
+#define CLK_ASYNC_FSYSD                 133
+#define CLK_ASYNC_LCD0X                 134
+#define CLK_ASYNC_CAMX                  135
+#define CLK_PPMURIGHT                   136
+#define CLK_GPIO_RIGHT                  137
+#define CLK_MONOCNT                     138
+#define CLK_TZPC6                       139
+#define CLK_PROVISIONKEY1               140
+#define CLK_PROVISIONKEY0               141
+#define CLK_CMU_ISPPART                 142
+#define CLK_TMU_APBIF                   143
+#define CLK_KEYIF                       144
+#define CLK_RTC                         145
+#define CLK_WDT                         146
+#define CLK_MCT                         147
+#define CLK_SECKEY                      148
+#define CLK_TZPC5                       149
+#define CLK_TZPC4                       150
+#define CLK_TZPC3                       151
+#define CLK_TZPC2                       152
+#define CLK_TZPC1                       153
+#define CLK_TZPC0                       154
+#define CLK_CMU_COREPART                155
+#define CLK_CMU_TOPPART                 156
+#define CLK_PMU_APBIF                   157
+#define CLK_SYSREG                      158
+#define CLK_CHIP_ID                     159
+#define CLK_QEJPEG                      160
+#define CLK_PIXELASYNCM1                161
+#define CLK_PIXELASYNCM0                162
+#define CLK_PPMUCAMIF                   163
+#define CLK_QEM2MSCALER                 164
+#define CLK_QEGSCALER1                  165
+#define CLK_QEGSCALER0                  166
+#define CLK_SMMUJPEG                    167
+#define CLK_SMMUM2M2SCALER              168
+#define CLK_SMMUGSCALER1                169
+#define CLK_SMMUGSCALER0                170
+#define CLK_JPEG                        171
+#define CLK_M2MSCALER                   172
+#define CLK_GSCALER1                    173
+#define CLK_GSCALER0                    174
+#define CLK_QEMFC                       175
+#define CLK_PPMUMFC_L                   176
+#define CLK_SMMUMFC_L                   177
+#define CLK_MFC                         178
+#define CLK_SMMUG3D                     179
+#define CLK_QEG3D                       180
+#define CLK_PPMUG3D                     181
+#define CLK_G3D                         182
+#define CLK_QE_CH1_LCD                  183
+#define CLK_QE_CH0_LCD                  184
+#define CLK_PPMULCD0                    185
+#define CLK_SMMUFIMD0                   186
+#define CLK_DSIM0                       187
+#define CLK_FIMD0                       188
+#define CLK_CAM1                        189
+#define CLK_UART_ISP_TOP                190
+#define CLK_SPI1_ISP_TOP                191
+#define CLK_SPI0_ISP_TOP                192
+#define CLK_TSADC                       193
+#define CLK_PPMUFILE                    194
+#define CLK_USBOTG                      195
+#define CLK_USBHOST                     196
+#define CLK_SROMC                       197
+#define CLK_SDMMC1                      198
+#define CLK_SDMMC0                      199
+#define CLK_PDMA1                       200
+#define CLK_PDMA0                       201
+#define CLK_PWM                         202
+#define CLK_PCM                         203
+#define CLK_I2S                         204
+#define CLK_SPI1                        205
+#define CLK_SPI0                        206
+#define CLK_I2C7                        207
+#define CLK_I2C6                        208
+#define CLK_I2C5                        209
+#define CLK_I2C4                        210
+#define CLK_I2C3                        211
+#define CLK_I2C2                        212
+#define CLK_I2C1                        213
+#define CLK_I2C0                        214
+#define CLK_UART1                       215
+#define CLK_UART0                       216
+#define CLK_BLOCK_LCD                   217
+#define CLK_BLOCK_G3D                   218
+#define CLK_BLOCK_MFC                   219
+#define CLK_BLOCK_CAM                   220
+#define CLK_SMIES                       221
+
+/* Special clocks */
+#define CLK_SCLK_JPEG                   224
+#define CLK_SCLK_M2MSCALER              225
+#define CLK_SCLK_GSCALER1               226
+#define CLK_SCLK_GSCALER0               227
+#define CLK_SCLK_MFC                    228
+#define CLK_SCLK_G3D                    229
+#define CLK_SCLK_MIPIDPHY2L             230
+#define CLK_SCLK_MIPI0                  231
+#define CLK_SCLK_FIMD0                  232
+#define CLK_SCLK_CAM1                   233
+#define CLK_SCLK_UART_ISP               234
+#define CLK_SCLK_SPI1_ISP               235
+#define CLK_SCLK_SPI0_ISP               236
+#define CLK_SCLK_UPLL                   237
+#define CLK_SCLK_TSADC                  238
+#define CLK_SCLK_EBI                    239
+#define CLK_SCLK_MMC1                   240
+#define CLK_SCLK_MMC0                   241
+#define CLK_SCLK_I2S                    242
+#define CLK_SCLK_PCM                    243
+#define CLK_SCLK_SPI1                   244
+#define CLK_SCLK_SPI0                   245
+#define CLK_SCLK_UART1                  246
+#define CLK_SCLK_UART0                  247
+
+/*
+ * Total number of clocks of main CMU.
+ * NOTE: Must be equal to last clock ID increased by one.
+ */
+#define CLK_NR_CLKS                     248
+
+#endif /* _DT_BINDINGS_CLOCK_SAMSUNG_EXYNOS3250_CLOCK_H */
diff --git a/include/dt-bindings/clock/exynos4.h b/include/dt-bindings/clock/exynos4.h
index 75aff336dfb0..1106ca540a96 100644
--- a/include/dt-bindings/clock/exynos4.h
+++ b/include/dt-bindings/clock/exynos4.h
@@ -33,6 +33,7 @@
 #define CLK_MOUT_MPLL_USER_C    18 /* Exynos4x12 only */
 #define CLK_MOUT_CORE           19
 #define CLK_MOUT_APLL           20
+#define CLK_SCLK_HDMIPHY        22
 
 /* gate for special clocks (sclk) */
 #define CLK_SCLK_FIMC0          128
@@ -181,7 +182,6 @@
 #define CLK_KEYIF               347
 #define CLK_AUDSS               348
 #define CLK_MIPI_HSI            349 /* Exynos4210 only */
-#define CLK_MDMA2               350 /* Exynos4210 only */
 #define CLK_PIXELASYNCM0        351
 #define CLK_PIXELASYNCM1        352
 #define CLK_FIMC_LITE0          353 /* Exynos4x12 only */
diff --git a/include/dt-bindings/clock/exynos5250.h b/include/dt-bindings/clock/exynos5250.h
index 922f2dca9bf0..be6e97c54f54 100644
--- a/include/dt-bindings/clock/exynos5250.h
+++ b/include/dt-bindings/clock/exynos5250.h
@@ -150,11 +150,30 @@
 #define CLK_G2D                 345
 #define CLK_MDMA0               346
 #define CLK_SMMU_MDMA0          347
+#define CLK_SSS                 348
+#define CLK_G3D                 349
+#define CLK_SMMU_TV             350
+#define CLK_SMMU_FIMD1          351
+#define CLK_SMMU_2D             352
+#define CLK_SMMU_FIMC_ISP       353
+#define CLK_SMMU_FIMC_DRC       354
+#define CLK_SMMU_FIMC_SCC       355
+#define CLK_SMMU_FIMC_SCP       356
+#define CLK_SMMU_FIMC_FD        357
+#define CLK_SMMU_FIMC_MCU       358
+#define CLK_SMMU_FIMC_ODC       359
+#define CLK_SMMU_FIMC_DIS0      360
+#define CLK_SMMU_FIMC_DIS1      361
+#define CLK_SMMU_FIMC_3DNR      362
+#define CLK_SMMU_FIMC_LITE0     363
+#define CLK_SMMU_FIMC_LITE1     364
+#define CLK_CAMIF_TOP           365
 
 /* mux clocks */
 #define CLK_MOUT_HDMI           1024
+#define CLK_MOUT_GPLL           1025
 
 /* must be greater than maximal clock id */
-#define CLK_NR_CLKS             1025
+#define CLK_NR_CLKS             1026
 
 #endif /* _DT_BINDINGS_CLOCK_EXYNOS_5250_H */
diff --git a/include/dt-bindings/clock/exynos5260-clk.h b/include/dt-bindings/clock/exynos5260-clk.h
new file mode 100644
index 000000000000..a4bac9a1764f
--- /dev/null
+++ b/include/dt-bindings/clock/exynos5260-clk.h
@@ -0,0 +1,469 @@
+/*
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ * Author: Rahul Sharma <rahul.sharma@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Provides Constants for Exynos5260 clocks.
+*/
+
+#ifndef _DT_BINDINGS_CLK_EXYNOS5260_H
+#define _DT_BINDINGS_CLK_EXYNOS5260_H
+
+/* Clock names: <cmu><type><IP> */
+
+/* List Of Clocks For CMU_TOP */
+
+#define TOP_FOUT_DISP_PLL                               1
+#define TOP_FOUT_AUD_PLL                                2
+#define TOP_MOUT_AUDTOP_PLL_USER                        3
+#define TOP_MOUT_AUD_PLL                                4
+#define TOP_MOUT_DISP_PLL                               5
+#define TOP_MOUT_BUSTOP_PLL_USER                        6
+#define TOP_MOUT_MEMTOP_PLL_USER                        7
+#define TOP_MOUT_MEDIATOP_PLL_USER                      8
+#define TOP_MOUT_DISP_DISP_333                          9
+#define TOP_MOUT_ACLK_DISP_333                          10
+#define TOP_MOUT_DISP_DISP_222                          11
+#define TOP_MOUT_ACLK_DISP_222                          12
+#define TOP_MOUT_DISP_MEDIA_PIXEL                       13
+#define TOP_MOUT_FIMD1                                  14
+#define TOP_MOUT_SCLK_PERI_SPI0_CLK                     15
+#define TOP_MOUT_SCLK_PERI_SPI1_CLK                     16
+#define TOP_MOUT_SCLK_PERI_SPI2_CLK                     17
+#define TOP_MOUT_SCLK_PERI_UART0_UCLK                   18
+#define TOP_MOUT_SCLK_PERI_UART2_UCLK                   19
+#define TOP_MOUT_SCLK_PERI_UART1_UCLK                   20
+#define TOP_MOUT_BUS4_BUSTOP_100                        21
+#define TOP_MOUT_BUS4_BUSTOP_400                        22
+#define TOP_MOUT_BUS3_BUSTOP_100                        23
+#define TOP_MOUT_BUS3_BUSTOP_400                        24
+#define TOP_MOUT_BUS2_BUSTOP_400                        25
+#define TOP_MOUT_BUS2_BUSTOP_100                        26
+#define TOP_MOUT_BUS1_BUSTOP_100                        27
+#define TOP_MOUT_BUS1_BUSTOP_400                        28
+#define TOP_MOUT_SCLK_FSYS_USB                          29
+#define TOP_MOUT_SCLK_FSYS_MMC0_SDCLKIN_A               30
+#define TOP_MOUT_SCLK_FSYS_MMC1_SDCLKIN_A               31
+#define TOP_MOUT_SCLK_FSYS_MMC2_SDCLKIN_A               32
+#define TOP_MOUT_SCLK_FSYS_MMC0_SDCLKIN_B               33
+#define TOP_MOUT_SCLK_FSYS_MMC1_SDCLKIN_B               34
+#define TOP_MOUT_SCLK_FSYS_MMC2_SDCLKIN_B               35
+#define TOP_MOUT_ACLK_ISP1_266                          36
+#define TOP_MOUT_ISP1_MEDIA_266                         37
+#define TOP_MOUT_ACLK_ISP1_400                          38
+#define TOP_MOUT_ISP1_MEDIA_400                         39
+#define TOP_MOUT_SCLK_ISP1_SPI0                         40
+#define TOP_MOUT_SCLK_ISP1_SPI1                         41
+#define TOP_MOUT_SCLK_ISP1_UART                         42
+#define TOP_MOUT_SCLK_ISP1_SENSOR2                      43
+#define TOP_MOUT_SCLK_ISP1_SENSOR1                      44
+#define TOP_MOUT_SCLK_ISP1_SENSOR0                      45
+#define TOP_MOUT_ACLK_MFC_333                           46
+#define TOP_MOUT_MFC_BUSTOP_333                         47
+#define TOP_MOUT_ACLK_G2D_333                           48
+#define TOP_MOUT_G2D_BUSTOP_333                         49
+#define TOP_MOUT_ACLK_GSCL_FIMC                         50
+#define TOP_MOUT_GSCL_BUSTOP_FIMC                       51
+#define TOP_MOUT_ACLK_GSCL_333                          52
+#define TOP_MOUT_GSCL_BUSTOP_333                        53
+#define TOP_MOUT_ACLK_GSCL_400                          54
+#define TOP_MOUT_M2M_MEDIATOP_400                       55
+#define TOP_DOUT_ACLK_MFC_333                           56
+#define TOP_DOUT_ACLK_G2D_333                           57
+#define TOP_DOUT_SCLK_ISP1_SENSOR2_A                    58
+#define TOP_DOUT_SCLK_ISP1_SENSOR1_A                    59
+#define TOP_DOUT_SCLK_ISP1_SENSOR0_A                    60
+#define TOP_DOUT_ACLK_GSCL_FIMC                         61
+#define TOP_DOUT_ACLK_GSCL_400                          62
+#define TOP_DOUT_ACLK_GSCL_333                          63
+#define TOP_DOUT_SCLK_ISP1_SPI0_B                       64
+#define TOP_DOUT_SCLK_ISP1_SPI0_A                       65
+#define TOP_DOUT_ACLK_ISP1_400                          66
+#define TOP_DOUT_ACLK_ISP1_266                          67
+#define TOP_DOUT_SCLK_ISP1_UART                         68
+#define TOP_DOUT_SCLK_ISP1_SPI1_B                       69
+#define TOP_DOUT_SCLK_ISP1_SPI1_A                       70
+#define TOP_DOUT_SCLK_ISP1_SENSOR2_B                    71
+#define TOP_DOUT_SCLK_ISP1_SENSOR1_B                    72
+#define TOP_DOUT_SCLK_ISP1_SENSOR0_B                    73
+#define TOP_DOUTTOP__SCLK_HPM_TARGETCLK                 74
+#define TOP_DOUT_SCLK_DISP_PIXEL                        75
+#define TOP_DOUT_ACLK_DISP_222                          76
+#define TOP_DOUT_ACLK_DISP_333                          77
+#define TOP_DOUT_ACLK_BUS4_100                          78
+#define TOP_DOUT_ACLK_BUS4_400                          79
+#define TOP_DOUT_ACLK_BUS3_100                          80
+#define TOP_DOUT_ACLK_BUS3_400                          81
+#define TOP_DOUT_ACLK_BUS2_100                          82
+#define TOP_DOUT_ACLK_BUS2_400                          83
+#define TOP_DOUT_ACLK_BUS1_100                          84
+#define TOP_DOUT_ACLK_BUS1_400                          85
+#define TOP_DOUT_SCLK_PERI_SPI1_B                       86
+#define TOP_DOUT_SCLK_PERI_SPI1_A                       87
+#define TOP_DOUT_SCLK_PERI_SPI0_B                       88
+#define TOP_DOUT_SCLK_PERI_SPI0_A                       89
+#define TOP_DOUT_SCLK_PERI_UART0                        90
+#define TOP_DOUT_SCLK_PERI_UART2                        91
+#define TOP_DOUT_SCLK_PERI_UART1                        92
+#define TOP_DOUT_SCLK_PERI_SPI2_B                       93
+#define TOP_DOUT_SCLK_PERI_SPI2_A                       94
+#define TOP_DOUT_ACLK_PERI_AUD                          95
+#define TOP_DOUT_ACLK_PERI_66                           96
+#define TOP_DOUT_SCLK_FSYS_MMC0_SDCLKIN_B               97
+#define TOP_DOUT_SCLK_FSYS_MMC0_SDCLKIN_A               98
+#define TOP_DOUT_SCLK_FSYS_USBDRD30_SUSPEND_CLK         99
+#define TOP_DOUT_ACLK_FSYS_200                          100
+#define TOP_DOUT_SCLK_FSYS_MMC2_SDCLKIN_B               101
+#define TOP_DOUT_SCLK_FSYS_MMC2_SDCLKIN_A               102
+#define TOP_DOUT_SCLK_FSYS_MMC1_SDCLKIN_B               103
+#define TOP_DOUT_SCLK_FSYS_MMC1_SDCLKIN_A               104
+#define TOP_SCLK_FIMD1                                  105
+#define TOP_SCLK_MMC2                                   106
+#define TOP_SCLK_MMC1                                   107
+#define TOP_SCLK_MMC0                                   108
+#define PHYCLK_DPTX_PHY_CH3_TXD_CLK                     109
+#define PHYCLK_DPTX_PHY_CH2_TXD_CLK                     110
+#define PHYCLK_DPTX_PHY_CH1_TXD_CLK                     111
+#define PHYCLK_DPTX_PHY_CH0_TXD_CLK                     112
+#define phyclk_hdmi_phy_tmds_clko                       113
+#define PHYCLK_HDMI_PHY_PIXEL_CLKO                      114
+#define PHYCLK_HDMI_LINK_O_TMDS_CLKHI                   115
+#define PHYCLK_MIPI_DPHY_4L_M_TXBYTECLKHS               116
+#define PHYCLK_DPTX_PHY_O_REF_CLK_24M                   117
+#define PHYCLK_DPTX_PHY_CLK_DIV2                        118
+#define PHYCLK_MIPI_DPHY_4L_M_RXCLKESC0                 119
+#define PHYCLK_USBHOST20_PHY_PHYCLOCK                   120
+#define PHYCLK_USBHOST20_PHY_FREECLK                    121
+#define PHYCLK_USBHOST20_PHY_CLK48MOHCI                 122
+#define PHYCLK_USBDRD30_UDRD30_PIPE_PCLK                123
+#define PHYCLK_USBDRD30_UDRD30_PHYCLOCK                 124
+#define TOP_NR_CLK                                      125
+
+
+/* List Of Clocks For CMU_EGL */
+
+#define EGL_FOUT_EGL_PLL                                1
+#define EGL_FOUT_EGL_DPLL                               2
+#define EGL_MOUT_EGL_B                                  3
+#define EGL_MOUT_EGL_PLL                                4
+#define EGL_DOUT_EGL_PLL                                5
+#define EGL_DOUT_EGL_PCLK_DBG                           6
+#define EGL_DOUT_EGL_ATCLK                              7
+#define EGL_DOUT_PCLK_EGL                               8
+#define EGL_DOUT_ACLK_EGL                               9
+#define EGL_DOUT_EGL2                                   10
+#define EGL_DOUT_EGL1                                   11
+#define EGL_NR_CLK                                      12
+
+
+/* List Of Clocks For CMU_KFC */
+
+#define KFC_FOUT_KFC_PLL                                1
+#define KFC_MOUT_KFC_PLL                                2
+#define KFC_MOUT_KFC                                    3
+#define KFC_DOUT_KFC_PLL                                4
+#define KFC_DOUT_PCLK_KFC                               5
+#define KFC_DOUT_ACLK_KFC                               6
+#define KFC_DOUT_KFC_PCLK_DBG                           7
+#define KFC_DOUT_KFC_ATCLK                              8
+#define KFC_DOUT_KFC2                                   9
+#define KFC_DOUT_KFC1                                   10
+#define KFC_NR_CLK                                      11
+
+
+/* List Of Clocks For CMU_MIF */
+
+#define MIF_FOUT_MEM_PLL                                1
+#define MIF_FOUT_MEDIA_PLL                              2
+#define MIF_FOUT_BUS_PLL                                3
+#define MIF_MOUT_CLK2X_PHY                              4
+#define MIF_MOUT_MIF_DREX2X                             5
+#define MIF_MOUT_CLKM_PHY                               6
+#define MIF_MOUT_MIF_DREX                               7
+#define MIF_MOUT_MEDIA_PLL                              8
+#define MIF_MOUT_BUS_PLL                                9
+#define MIF_MOUT_MEM_PLL                                10
+#define MIF_DOUT_ACLK_BUS_100                           11
+#define MIF_DOUT_ACLK_BUS_200                           12
+#define MIF_DOUT_ACLK_MIF_466                           13
+#define MIF_DOUT_CLK2X_PHY                              14
+#define MIF_DOUT_CLKM_PHY                               15
+#define MIF_DOUT_BUS_PLL                                16
+#define MIF_DOUT_MEM_PLL                                17
+#define MIF_DOUT_MEDIA_PLL                              18
+#define MIF_CLK_LPDDR3PHY_WRAP1                         19
+#define MIF_CLK_LPDDR3PHY_WRAP0                         20
+#define MIF_CLK_MONOCNT                                 21
+#define MIF_CLK_MIF_RTC                                 22
+#define MIF_CLK_DREX1                                   23
+#define MIF_CLK_DREX0                                   24
+#define MIF_CLK_INTMEM                                  25
+#define MIF_SCLK_LPDDR3PHY_WRAP_U1                      26
+#define MIF_SCLK_LPDDR3PHY_WRAP_U0                      27
+#define MIF_NR_CLK                                      28
+
+
+/* List Of Clocks For CMU_G3D */
+
+#define G3D_FOUT_G3D_PLL                                1
+#define G3D_MOUT_G3D_PLL                                2
+#define G3D_DOUT_PCLK_G3D                               3
+#define G3D_DOUT_ACLK_G3D                               4
+#define G3D_CLK_G3D_HPM                                 5
+#define G3D_CLK_G3D                                     6
+#define G3D_NR_CLK                                      7
+
+
+/* List Of Clocks For CMU_AUD */
+
+#define AUD_MOUT_SCLK_AUD_PCM                           1
+#define AUD_MOUT_SCLK_AUD_I2S                           2
+#define AUD_MOUT_AUD_PLL_USER                           3
+#define AUD_DOUT_ACLK_AUD_131                           4
+#define AUD_DOUT_SCLK_AUD_UART                          5
+#define AUD_DOUT_SCLK_AUD_PCM                           6
+#define AUD_DOUT_SCLK_AUD_I2S                           7
+#define AUD_CLK_AUD_UART                                8
+#define AUD_CLK_PCM                                     9
+#define AUD_CLK_I2S                                     10
+#define AUD_CLK_DMAC                                    11
+#define AUD_CLK_SRAMC                                   12
+#define AUD_SCLK_AUD_UART                               13
+#define AUD_SCLK_PCM                                    14
+#define AUD_SCLK_I2S                                    15
+#define AUD_NR_CLK                                      16
+
+
+/* List Of Clocks For CMU_MFC */
+
+#define MFC_MOUT_ACLK_MFC_333_USER                      1
+#define MFC_DOUT_PCLK_MFC_83                            2
+#define MFC_CLK_MFC                                     3
+#define MFC_CLK_SMMU2_MFCM1                             4
+#define MFC_CLK_SMMU2_MFCM0                             5
+#define MFC_NR_CLK                                      6
+
+
+/* List Of Clocks For CMU_GSCL */
+
+#define GSCL_MOUT_ACLK_CSIS                             1
+#define GSCL_MOUT_ACLK_GSCL_FIMC_USER                   2
+#define GSCL_MOUT_ACLK_M2M_400_USER                     3
+#define GSCL_MOUT_ACLK_GSCL_333_USER                    4
+#define GSCL_DOUT_ACLK_CSIS_200                         5
+#define GSCL_DOUT_PCLK_M2M_100                          6
+#define GSCL_CLK_PIXEL_GSCL1                            7
+#define GSCL_CLK_PIXEL_GSCL0                            8
+#define GSCL_CLK_MSCL1                                  9
+#define GSCL_CLK_MSCL0                                  10
+#define GSCL_CLK_GSCL1                                  11
+#define GSCL_CLK_GSCL0                                  12
+#define GSCL_CLK_FIMC_LITE_D                            13
+#define GSCL_CLK_FIMC_LITE_B                            14
+#define GSCL_CLK_FIMC_LITE_A                            15
+#define GSCL_CLK_CSIS1                                  16
+#define GSCL_CLK_CSIS0                                  17
+#define GSCL_CLK_SMMU3_LITE_D                           18
+#define GSCL_CLK_SMMU3_LITE_B                           19
+#define GSCL_CLK_SMMU3_LITE_A                           20
+#define GSCL_CLK_SMMU3_GSCL0                            21
+#define GSCL_CLK_SMMU3_GSCL1                            22
+#define GSCL_CLK_SMMU3_MSCL0                            23
+#define GSCL_CLK_SMMU3_MSCL1                            24
+#define GSCL_SCLK_CSIS1_WRAP                            25
+#define GSCL_SCLK_CSIS0_WRAP                            26
+#define GSCL_NR_CLK                                     27
+
+
+/* List Of Clocks For CMU_FSYS */
+
+#define FSYS_MOUT_PHYCLK_USBHOST20_PHYCLK_USER          1
+#define FSYS_MOUT_PHYCLK_USBHOST20_FREECLK_USER         2
+#define FSYS_MOUT_PHYCLK_USBHOST20_CLK48MOHCI_USER      3
+#define FSYS_MOUT_PHYCLK_USBDRD30_PIPE_PCLK_USER        4
+#define FSYS_MOUT_PHYCLK_USBDRD30_PHYCLOCK_USER         5
+#define FSYS_CLK_TSI                                    6
+#define FSYS_CLK_USBLINK                                7
+#define FSYS_CLK_USBHOST20                              8
+#define FSYS_CLK_USBDRD30                               9
+#define FSYS_CLK_SROMC                                  10
+#define FSYS_CLK_PDMA                                   11
+#define FSYS_CLK_MMC2                                   12
+#define FSYS_CLK_MMC1                                   13
+#define FSYS_CLK_MMC0                                   14
+#define FSYS_CLK_RTIC                                   15
+#define FSYS_CLK_SMMU_RTIC                              16
+#define FSYS_PHYCLK_USBDRD30                            17
+#define FSYS_PHYCLK_USBHOST20                           18
+#define FSYS_NR_CLK                                     19
+
+
+/* List Of Clocks For CMU_PERI */
+
+#define PERI_MOUT_SCLK_SPDIF                            1
+#define PERI_MOUT_SCLK_I2SCOD                           2
+#define PERI_MOUT_SCLK_PCM                              3
+#define PERI_DOUT_I2S                                   4
+#define PERI_DOUT_PCM                                   5
+#define PERI_CLK_WDT_KFC                                6
+#define PERI_CLK_WDT_EGL                                7
+#define PERI_CLK_HSIC3                                  8
+#define PERI_CLK_HSIC2                                  9
+#define PERI_CLK_HSIC1                                  10
+#define PERI_CLK_HSIC0                                  11
+#define PERI_CLK_PCM                                    12
+#define PERI_CLK_MCT                                    13
+#define PERI_CLK_I2S                                    14
+#define PERI_CLK_I2CHDMI                                15
+#define PERI_CLK_I2C7                                   16
+#define PERI_CLK_I2C6                                   17
+#define PERI_CLK_I2C5                                   18
+#define PERI_CLK_I2C4                                   19
+#define PERI_CLK_I2C9                                   20
+#define PERI_CLK_I2C8                                   21
+#define PERI_CLK_I2C11                                  22
+#define PERI_CLK_I2C10                                  23
+#define PERI_CLK_HDMICEC                                24
+#define PERI_CLK_EFUSE_WRITER                           25
+#define PERI_CLK_ABB                                    26
+#define PERI_CLK_UART2                                  27
+#define PERI_CLK_UART1                                  28
+#define PERI_CLK_UART0                                  29
+#define PERI_CLK_ADC                                    30
+#define PERI_CLK_TMU4                                   31
+#define PERI_CLK_TMU3                                   32
+#define PERI_CLK_TMU2                                   33
+#define PERI_CLK_TMU1                                   34
+#define PERI_CLK_TMU0                                   35
+#define PERI_CLK_SPI2                                   36
+#define PERI_CLK_SPI1                                   37
+#define PERI_CLK_SPI0                                   38
+#define PERI_CLK_SPDIF                                  39
+#define PERI_CLK_PWM                                    40
+#define PERI_CLK_UART4                                  41
+#define PERI_CLK_CHIPID                                 42
+#define PERI_CLK_PROVKEY0                               43
+#define PERI_CLK_PROVKEY1                               44
+#define PERI_CLK_SECKEY                                 45
+#define PERI_CLK_TOP_RTC                                46
+#define PERI_CLK_TZPC10                                 47
+#define PERI_CLK_TZPC9                                  48
+#define PERI_CLK_TZPC8                                  49
+#define PERI_CLK_TZPC7                                  50
+#define PERI_CLK_TZPC6                                  51
+#define PERI_CLK_TZPC5                                  52
+#define PERI_CLK_TZPC4                                  53
+#define PERI_CLK_TZPC3                                  54
+#define PERI_CLK_TZPC2                                  55
+#define PERI_CLK_TZPC1                                  56
+#define PERI_CLK_TZPC0                                  57
+#define PERI_SCLK_UART2                                 58
+#define PERI_SCLK_UART1                                 59
+#define PERI_SCLK_UART0                                 60
+#define PERI_SCLK_SPI2                                  61
+#define PERI_SCLK_SPI1                                  62
+#define PERI_SCLK_SPI0                                  63
+#define PERI_SCLK_SPDIF                                 64
+#define PERI_SCLK_I2S                                   65
+#define PERI_SCLK_PCM1                                  66
+#define PERI_NR_CLK                                     67
+
+
+/* List Of Clocks For CMU_DISP */
+
+#define DISP_MOUT_SCLK_HDMI_SPDIF                       1
+#define DISP_MOUT_SCLK_HDMI_PIXEL                       2
+#define DISP_MOUT_PHYCLK_MIPI_DPHY_4LMRXCLK_ESC0_USER   3
+#define DISP_MOUT_PHYCLK_HDMI_PHY_TMDS_CLKO_USER        4
+#define DISP_MOUT_PHYCLK_HDMI_PHY_REF_CLKO_USER         5
+#define DISP_MOUT_HDMI_PHY_PIXEL                        6
+#define DISP_MOUT_PHYCLK_HDMI_LINK_O_TMDS_CLKHI_USER    7
+#define DISP_MOUT_PHYCLK_MIPI_DPHY_4L_M_TXBYTE_CLKHS    8
+#define DISP_MOUT_PHYCLK_DPTX_PHY_O_REF_CLK_24M_USER    9
+#define DISP_MOUT_PHYCLK_DPTX_PHY_CLK_DIV2_USER         10
+#define DISP_MOUT_PHYCLK_DPTX_PHY_CH3_TXD_CLK_USER      11
+#define DISP_MOUT_PHYCLK_DPTX_PHY_CH2_TXD_CLK_USER      12
+#define DISP_MOUT_PHYCLK_DPTX_PHY_CH1_TXD_CLK_USER      13
+#define DISP_MOUT_PHYCLK_DPTX_PHY_CH0_TXD_CLK_USER      14
+#define DISP_MOUT_ACLK_DISP_222_USER                    15
+#define DISP_MOUT_SCLK_DISP_PIXEL_USER                  16
+#define DISP_MOUT_ACLK_DISP_333_USER                    17
+#define DISP_DOUT_SCLK_HDMI_PHY_PIXEL_CLKI              18
+#define DISP_DOUT_SCLK_FIMD1_EXTCLKPLL                  19
+#define DISP_DOUT_PCLK_DISP_111                         20
+#define DISP_CLK_SMMU_TV                                21
+#define DISP_CLK_SMMU_FIMD1M1                           22
+#define DISP_CLK_SMMU_FIMD1M0                           23
+#define DISP_CLK_PIXEL_MIXER                            24
+#define DISP_CLK_PIXEL_DISP                             25
+#define DISP_CLK_MIXER                                  26
+#define DISP_CLK_MIPIPHY                                27
+#define DISP_CLK_HDMIPHY                                28
+#define DISP_CLK_HDMI                                   29
+#define DISP_CLK_FIMD1                                  30
+#define DISP_CLK_DSIM1                                  31
+#define DISP_CLK_DPPHY                                  32
+#define DISP_CLK_DP                                     33
+#define DISP_SCLK_PIXEL                                 34
+#define DISP_MOUT_HDMI_PHY_PIXEL_USER                   35
+#define DISP_NR_CLK                                     36
+
+
+/* List Of Clocks For CMU_G2D */
+
+#define G2D_MOUT_ACLK_G2D_333_USER                      1
+#define G2D_DOUT_PCLK_G2D_83                            2
+#define G2D_CLK_SMMU3_JPEG                              3
+#define G2D_CLK_MDMA                                    4
+#define G2D_CLK_JPEG                                    5
+#define G2D_CLK_G2D                                     6
+#define G2D_CLK_SSS                                     7
+#define G2D_CLK_SLIM_SSS                                8
+#define G2D_CLK_SMMU_SLIM_SSS                           9
+#define G2D_CLK_SMMU_SSS                                10
+#define G2D_CLK_SMMU_MDMA                               11
+#define G2D_CLK_SMMU3_G2D                               12
+#define G2D_NR_CLK                                      13
+
+
+/* List Of Clocks For CMU_ISP */
+
+#define ISP_MOUT_ISP_400_USER                           1
+#define ISP_MOUT_ISP_266_USER                           2
+#define ISP_DOUT_SCLK_MPWM                              3
+#define ISP_DOUT_CA5_PCLKDBG                            4
+#define ISP_DOUT_CA5_ATCLKIN                            5
+#define ISP_DOUT_PCLK_ISP_133                           6
+#define ISP_DOUT_PCLK_ISP_66                            7
+#define ISP_CLK_GIC                                     8
+#define ISP_CLK_WDT                                     9
+#define ISP_CLK_UART                                    10
+#define ISP_CLK_SPI1                                    11
+#define ISP_CLK_SPI0                                    12
+#define ISP_CLK_SMMU_SCALERP                            13
+#define ISP_CLK_SMMU_SCALERC                            14
+#define ISP_CLK_SMMU_ISPCX                              15
+#define ISP_CLK_SMMU_ISP                                16
+#define ISP_CLK_SMMU_FD                                 17
+#define ISP_CLK_SMMU_DRC                                18
+#define ISP_CLK_PWM                                     19
+#define ISP_CLK_MTCADC                                  20
+#define ISP_CLK_MPWM                                    21
+#define ISP_CLK_MCUCTL                                  22
+#define ISP_CLK_I2C1                                    23
+#define ISP_CLK_I2C0                                    24
+#define ISP_CLK_FIMC_SCALERP                            25
+#define ISP_CLK_FIMC_SCALERC                            26
+#define ISP_CLK_FIMC                                    27
+#define ISP_CLK_FIMC_FD                                 28
+#define ISP_CLK_FIMC_DRC                                29
+#define ISP_CLK_CA5                                     30
+#define ISP_SCLK_SPI0_EXT                               31
+#define ISP_SCLK_SPI1_EXT                               32
+#define ISP_SCLK_UART_EXT                               33
+#define ISP_NR_CLK                                      34
+
+#endif
diff --git a/include/dt-bindings/clock/exynos5410.h b/include/dt-bindings/clock/exynos5410.h
new file mode 100644
index 000000000000..9b180f032e2d
--- /dev/null
+++ b/include/dt-bindings/clock/exynos5410.h
@@ -0,0 +1,33 @@
+#ifndef _DT_BINDINGS_CLOCK_EXYNOS_5410_H
+#define _DT_BINDINGS_CLOCK_EXYNOS_5410_H
+
+/* core clocks */
+#define CLK_FIN_PLL 1
+#define CLK_FOUT_APLL 2
+#define CLK_FOUT_CPLL 3
+#define CLK_FOUT_MPLL 4
+#define CLK_FOUT_BPLL 5
+#define CLK_FOUT_KPLL 6
+
+/* gate for special clocks (sclk) */
+#define CLK_SCLK_UART0 128
+#define CLK_SCLK_UART1 129
+#define CLK_SCLK_UART2 130
+#define CLK_SCLK_UART3 131
+#define CLK_SCLK_MMC0 132
+#define CLK_SCLK_MMC1 133
+#define CLK_SCLK_MMC2 134
+
+/* gate clocks */
+#define CLK_UART0 257
+#define CLK_UART1 258
+#define CLK_UART2 259
+#define CLK_UART3 260
+#define CLK_MCT 315
+#define CLK_MMC0 351
+#define CLK_MMC1 352
+#define CLK_MMC2 353
+
+#define CLK_NR_CLKS 512
+
+#endif /* _DT_BINDINGS_CLOCK_EXYNOS_5410_H */
diff --git a/include/dt-bindings/clock/exynos5420.h b/include/dt-bindings/clock/exynos5420.h
index 5eefd8813f02..97dcb89d37d3 100644
--- a/include/dt-bindings/clock/exynos5420.h
+++ b/include/dt-bindings/clock/exynos5420.h
@@ -58,6 +58,9 @@
 #define CLK_SCLK_GSCL_WA        156
 #define CLK_SCLK_GSCL_WB        157
 #define CLK_SCLK_HDMIPHY        158
+#define CLK_MAU_EPLL            159
+#define CLK_SCLK_HSIC_12M       160
+#define CLK_SCLK_MPHY_IXTAL24   161
 
 /* gate clocks */
 #define CLK_ACLK66_PERIC        256
@@ -69,10 +72,10 @@
 #define CLK_I2C1                262
 #define CLK_I2C2                263
 #define CLK_I2C3                264
-#define CLK_I2C4                265
-#define CLK_I2C5                266
-#define CLK_I2C6                267
-#define CLK_I2C7                268
+#define CLK_USI0                265
+#define CLK_USI1                266
+#define CLK_USI2                267
+#define CLK_USI3                268
 #define CLK_I2C_HDMI            269
 #define CLK_TSADC               270
 #define CLK_SPI0                271
@@ -85,9 +88,9 @@
 #define CLK_PCM2                278
 #define CLK_PWM                 279
 #define CLK_SPDIF               280
-#define CLK_I2C8                281
-#define CLK_I2C9                282
-#define CLK_I2C10               283
+#define CLK_USI4                281
+#define CLK_USI5                282
+#define CLK_USI6                283
 #define CLK_ACLK66_PSGEN        300
 #define CLK_CHIPID              301
 #define CLK_SYSREG              302
@@ -140,7 +143,8 @@
 #define CLK_HDMI                413
 #define CLK_ACLK300_DISP1       420
 #define CLK_FIMD1               421
-#define CLK_SMMU_FIMD1          422
+#define CLK_SMMU_FIMD1M0        422
+#define CLK_SMMU_FIMD1M1        423
 #define CLK_ACLK166             430
 #define CLK_MIXER               431
 #define CLK_ACLK266             440
@@ -152,6 +156,7 @@
 #define CLK_JPEG                451
 #define CLK_JPEG2               452
 #define CLK_SMMU_JPEG           453
+#define CLK_SMMU_JPEG2          454
 #define CLK_ACLK300_GSCL        460
 #define CLK_SMMU_GSCL0          461
 #define CLK_SMMU_GSCL1          462
@@ -159,7 +164,7 @@
 #define CLK_GSCL_WB             464
 #define CLK_GSCL0               465
 #define CLK_GSCL1               466
-#define CLK_CLK_3AA             467
+#define CLK_FIMC_3AA            467
 #define CLK_ACLK266_G2D         470
 #define CLK_SSS                 471
 #define CLK_SLIM_SSS            472
@@ -172,12 +177,32 @@
 #define CLK_SMMU_FIMCL1         493
 #define CLK_SMMU_FIMCL3         494
 #define CLK_FIMC_LITE3          495
+#define CLK_FIMC_LITE0          496
+#define CLK_FIMC_LITE1          497
 #define CLK_ACLK_G3D            500
 #define CLK_G3D                 501
 #define CLK_SMMU_MIXER          502
+#define CLK_SMMU_G2D            503
+#define CLK_SMMU_MDMA0          504
+#define CLK_MC                  505
+#define CLK_TOP_RTC             506
+#define CLK_SCLK_UART_ISP       510
+#define CLK_SCLK_SPI0_ISP       511
+#define CLK_SCLK_SPI1_ISP       512
+#define CLK_SCLK_PWM_ISP        513
+#define CLK_SCLK_ISP_SENSOR0    514
+#define CLK_SCLK_ISP_SENSOR1    515
+#define CLK_SCLK_ISP_SENSOR2    516
+#define CLK_ACLK432_SCALER      517
+#define CLK_ACLK432_CAM         518
+#define CLK_ACLK_FL1550_CAM     519
+#define CLK_ACLK550_CAM         520
 
 /* mux clocks */
 #define CLK_MOUT_HDMI           640
+#define CLK_MOUT_G3D            641
+#define CLK_MOUT_VPLL           642
+#define CLK_MOUT_MAUDIO0        643
 
 /* divider clocks */
 #define CLK_DOUT_PIXEL          768
diff --git a/include/dt-bindings/clock/hix5hd2-clock.h b/include/dt-bindings/clock/hix5hd2-clock.h
new file mode 100644
index 000000000000..aad579a75802
--- /dev/null
+++ b/include/dt-bindings/clock/hix5hd2-clock.h
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2014 Linaro Ltd.
+ * Copyright (c) 2014 Hisilicon Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ */
+
+#ifndef __DTS_HIX5HD2_CLOCK_H
+#define __DTS_HIX5HD2_CLOCK_H
+
+/* fixed rate */
+#define HIX5HD2_FIXED_1200M             1
+#define HIX5HD2_FIXED_400M              2
+#define HIX5HD2_FIXED_48M               3
+#define HIX5HD2_FIXED_24M               4
+#define HIX5HD2_FIXED_600M              5
+#define HIX5HD2_FIXED_300M              6
+#define HIX5HD2_FIXED_75M               7
+#define HIX5HD2_FIXED_200M              8
+#define HIX5HD2_FIXED_100M              9
+#define HIX5HD2_FIXED_40M               10
+#define HIX5HD2_FIXED_150M              11
+#define HIX5HD2_FIXED_1728M             12
+#define HIX5HD2_FIXED_28P8M             13
+#define HIX5HD2_FIXED_432M              14
+#define HIX5HD2_FIXED_345P6M            15
+#define HIX5HD2_FIXED_288M              16
+#define HIX5HD2_FIXED_60M               17
+#define HIX5HD2_FIXED_750M              18
+#define HIX5HD2_FIXED_500M              19
+#define HIX5HD2_FIXED_54M               20
+#define HIX5HD2_FIXED_27M               21
+#define HIX5HD2_FIXED_1500M             22
+#define HIX5HD2_FIXED_375M              23
+#define HIX5HD2_FIXED_187M              24
+#define HIX5HD2_FIXED_250M              25
+#define HIX5HD2_FIXED_125M              26
+#define HIX5HD2_FIXED_2P02M             27
+#define HIX5HD2_FIXED_50M               28
+#define HIX5HD2_FIXED_25M               29
+#define HIX5HD2_FIXED_83M               30
+
+/* mux clocks */
+#define HIX5HD2_SFC_MUX                 64
+#define HIX5HD2_MMC_MUX                 65
+#define HIX5HD2_FEPHY_MUX               66
+
+/* gate clocks */
+#define HIX5HD2_SFC_RST                 128
+#define HIX5HD2_SFC_CLK                 129
+#define HIX5HD2_MMC_CIU_CLK             130
+#define HIX5HD2_MMC_BIU_CLK             131
+#define HIX5HD2_MMC_CIU_RST             132
+
+#define HIX5HD2_NR_CLKS                 256
+#endif  /* __DTS_HIX5HD2_CLOCK_H */
diff --git a/include/dt-bindings/clock/imx6sx-clock.h b/include/dt-bindings/clock/imx6sx-clock.h
new file mode 100644
index 000000000000..421d8bb76f2f
--- /dev/null
+++ b/include/dt-bindings/clock/imx6sx-clock.h
@@ -0,0 +1,256 @@
+/*
+ * Copyright (C) 2014 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_IMX6SX_H
+#define __DT_BINDINGS_CLOCK_IMX6SX_H
+
+#define IMX6SX_CLK_DUMMY                0
+#define IMX6SX_CLK_CKIL                 1
+#define IMX6SX_CLK_CKIH                 2
+#define IMX6SX_CLK_OSC                  3
+#define IMX6SX_CLK_PLL1_SYS             4
+#define IMX6SX_CLK_PLL2_BUS             5
+#define IMX6SX_CLK_PLL3_USB_OTG         6
+#define IMX6SX_CLK_PLL4_AUDIO           7
+#define IMX6SX_CLK_PLL5_VIDEO           8
+#define IMX6SX_CLK_PLL6_ENET            9
+#define IMX6SX_CLK_PLL7_USB_HOST        10
+#define IMX6SX_CLK_USBPHY1              11
+#define IMX6SX_CLK_USBPHY2              12
+#define IMX6SX_CLK_USBPHY1_GATE         13
+#define IMX6SX_CLK_USBPHY2_GATE         14
+#define IMX6SX_CLK_PCIE_REF             15
+#define IMX6SX_CLK_PCIE_REF_125M        16
+#define IMX6SX_CLK_ENET_REF             17
+#define IMX6SX_CLK_PLL2_PFD0            18
+#define IMX6SX_CLK_PLL2_PFD1            19
+#define IMX6SX_CLK_PLL2_PFD2            20
+#define IMX6SX_CLK_PLL2_PFD3            21
+#define IMX6SX_CLK_PLL3_PFD0            22
+#define IMX6SX_CLK_PLL3_PFD1            23
+#define IMX6SX_CLK_PLL3_PFD2            24
+#define IMX6SX_CLK_PLL3_PFD3            25
+#define IMX6SX_CLK_PLL2_198M            26
+#define IMX6SX_CLK_PLL3_120M            27
+#define IMX6SX_CLK_PLL3_80M             28
+#define IMX6SX_CLK_PLL3_60M             29
+#define IMX6SX_CLK_TWD                  30
+#define IMX6SX_CLK_PLL4_POST_DIV        31
+#define IMX6SX_CLK_PLL4_AUDIO_DIV       32
+#define IMX6SX_CLK_PLL5_POST_DIV        33
+#define IMX6SX_CLK_PLL5_VIDEO_DIV       34
+#define IMX6SX_CLK_STEP                 35
+#define IMX6SX_CLK_PLL1_SW              36
+#define IMX6SX_CLK_OCRAM_SEL            37
+#define IMX6SX_CLK_PERIPH_PRE           38
+#define IMX6SX_CLK_PERIPH2_PRE          39
+#define IMX6SX_CLK_PERIPH_CLK2_SEL      40
+#define IMX6SX_CLK_PERIPH2_CLK2_SEL     41
+#define IMX6SX_CLK_PCIE_AXI_SEL         42
+#define IMX6SX_CLK_GPU_AXI_SEL          43
+#define IMX6SX_CLK_GPU_CORE_SEL         44
+#define IMX6SX_CLK_EIM_SLOW_SEL         45
+#define IMX6SX_CLK_USDHC1_SEL           46
+#define IMX6SX_CLK_USDHC2_SEL           47
+#define IMX6SX_CLK_USDHC3_SEL           48
+#define IMX6SX_CLK_USDHC4_SEL           49
+#define IMX6SX_CLK_SSI1_SEL             50
+#define IMX6SX_CLK_SSI2_SEL             51
+#define IMX6SX_CLK_SSI3_SEL             52
+#define IMX6SX_CLK_QSPI1_SEL            53
+#define IMX6SX_CLK_PERCLK_SEL           54
+#define IMX6SX_CLK_VID_SEL              55
+#define IMX6SX_CLK_ESAI_SEL             56
+#define IMX6SX_CLK_LDB_DI0_DIV_SEL      57
+#define IMX6SX_CLK_LDB_DI1_DIV_SEL      58
+#define IMX6SX_CLK_CAN_SEL              59
+#define IMX6SX_CLK_UART_SEL             60
+#define IMX6SX_CLK_QSPI2_SEL            61
+#define IMX6SX_CLK_LDB_DI1_SEL          62
+#define IMX6SX_CLK_LDB_DI0_SEL          63
+#define IMX6SX_CLK_SPDIF_SEL            64
+#define IMX6SX_CLK_AUDIO_SEL            65
+#define IMX6SX_CLK_ENET_PRE_SEL         66
+#define IMX6SX_CLK_ENET_SEL             67
+#define IMX6SX_CLK_M4_PRE_SEL           68
+#define IMX6SX_CLK_M4_SEL               69
+#define IMX6SX_CLK_ECSPI_SEL            70
+#define IMX6SX_CLK_LCDIF1_PRE_SEL       71
+#define IMX6SX_CLK_LCDIF2_PRE_SEL       72
+#define IMX6SX_CLK_LCDIF1_SEL           73
+#define IMX6SX_CLK_LCDIF2_SEL           74
+#define IMX6SX_CLK_DISPLAY_SEL          75
+#define IMX6SX_CLK_CSI_SEL              76
+#define IMX6SX_CLK_CKO1_SEL             77
+#define IMX6SX_CLK_CKO2_SEL             78
+#define IMX6SX_CLK_CKO                  79
+#define IMX6SX_CLK_PERIPH_CLK2          80
+#define IMX6SX_CLK_PERIPH2_CLK2         81
+#define IMX6SX_CLK_IPG                  82
+#define IMX6SX_CLK_GPU_CORE_PODF        83
+#define IMX6SX_CLK_GPU_AXI_PODF         84
+#define IMX6SX_CLK_LCDIF1_PODF          85
+#define IMX6SX_CLK_QSPI1_PODF           86
+#define IMX6SX_CLK_EIM_SLOW_PODF        87
+#define IMX6SX_CLK_LCDIF2_PODF          88
+#define IMX6SX_CLK_PERCLK               89
+#define IMX6SX_CLK_VID_PODF             90
+#define IMX6SX_CLK_CAN_PODF             91
+#define IMX6SX_CLK_USDHC1_PODF          92
+#define IMX6SX_CLK_USDHC2_PODF          93
+#define IMX6SX_CLK_USDHC3_PODF          94
+#define IMX6SX_CLK_USDHC4_PODF          95
+#define IMX6SX_CLK_UART_PODF            96
+#define IMX6SX_CLK_ESAI_PRED            97
+#define IMX6SX_CLK_ESAI_PODF            98
+#define IMX6SX_CLK_SSI3_PRED            99
+#define IMX6SX_CLK_SSI3_PODF            100
+#define IMX6SX_CLK_SSI1_PRED            101
+#define IMX6SX_CLK_SSI1_PODF            102
+#define IMX6SX_CLK_QSPI2_PRED           103
+#define IMX6SX_CLK_QSPI2_PODF           104
+#define IMX6SX_CLK_SSI2_PRED            105
+#define IMX6SX_CLK_SSI2_PODF            106
+#define IMX6SX_CLK_SPDIF_PRED           107
+#define IMX6SX_CLK_SPDIF_PODF           108
+#define IMX6SX_CLK_AUDIO_PRED           109
+#define IMX6SX_CLK_AUDIO_PODF           110
+#define IMX6SX_CLK_ENET_PODF            111
+#define IMX6SX_CLK_M4_PODF              112
+#define IMX6SX_CLK_ECSPI_PODF           113
+#define IMX6SX_CLK_LCDIF1_PRED          114
+#define IMX6SX_CLK_LCDIF2_PRED          115
+#define IMX6SX_CLK_DISPLAY_PODF         116
+#define IMX6SX_CLK_CSI_PODF             117
+#define IMX6SX_CLK_LDB_DI0_DIV_3_5      118
+#define IMX6SX_CLK_LDB_DI0_DIV_7        119
+#define IMX6SX_CLK_LDB_DI1_DIV_3_5      120
+#define IMX6SX_CLK_LDB_DI1_DIV_7        121
+#define IMX6SX_CLK_CKO1_PODF            122
+#define IMX6SX_CLK_CKO2_PODF            123
+#define IMX6SX_CLK_PERIPH               124
+#define IMX6SX_CLK_PERIPH2              125
+#define IMX6SX_CLK_OCRAM                126
+#define IMX6SX_CLK_AHB                  127
+#define IMX6SX_CLK_MMDC_PODF            128
+#define IMX6SX_CLK_ARM                  129
+#define IMX6SX_CLK_AIPS_TZ1             130
+#define IMX6SX_CLK_AIPS_TZ2             131
+#define IMX6SX_CLK_APBH_DMA             132
+#define IMX6SX_CLK_ASRC_GATE            133
+#define IMX6SX_CLK_CAAM_MEM             134
+#define IMX6SX_CLK_CAAM_ACLK            135
+#define IMX6SX_CLK_CAAM_IPG             136
+#define IMX6SX_CLK_CAN1_IPG             137
+#define IMX6SX_CLK_CAN1_SERIAL          138
+#define IMX6SX_CLK_CAN2_IPG             139
+#define IMX6SX_CLK_CAN2_SERIAL          140
+#define IMX6SX_CLK_CPU_DEBUG            141
+#define IMX6SX_CLK_DCIC1                142
+#define IMX6SX_CLK_DCIC2                143
+#define IMX6SX_CLK_AIPS_TZ3             144
+#define IMX6SX_CLK_ECSPI1               145
+#define IMX6SX_CLK_ECSPI2               146
+#define IMX6SX_CLK_ECSPI3               147
+#define IMX6SX_CLK_ECSPI4               148
+#define IMX6SX_CLK_ECSPI5               149
+#define IMX6SX_CLK_EPIT1                150
+#define IMX6SX_CLK_EPIT2                151
+#define IMX6SX_CLK_ESAI_EXTAL           152
+#define IMX6SX_CLK_WAKEUP               153
+#define IMX6SX_CLK_GPT_BUS              154
+#define IMX6SX_CLK_GPT_SERIAL           155
+#define IMX6SX_CLK_GPU                  156
+#define IMX6SX_CLK_OCRAM_S              157
+#define IMX6SX_CLK_CANFD                158
+#define IMX6SX_CLK_CSI                  159
+#define IMX6SX_CLK_I2C1                 160
+#define IMX6SX_CLK_I2C2                 161
+#define IMX6SX_CLK_I2C3                 162
+#define IMX6SX_CLK_OCOTP                163
+#define IMX6SX_CLK_IOMUXC               164
+#define IMX6SX_CLK_IPMUX1               165
+#define IMX6SX_CLK_IPMUX2               166
+#define IMX6SX_CLK_IPMUX3               167
+#define IMX6SX_CLK_TZASC1               168
+#define IMX6SX_CLK_LCDIF_APB            169
+#define IMX6SX_CLK_PXP_AXI              170
+#define IMX6SX_CLK_M4                   171
+#define IMX6SX_CLK_ENET                 172
+#define IMX6SX_CLK_DISPLAY_AXI          173
+#define IMX6SX_CLK_LCDIF2_PIX           174
+#define IMX6SX_CLK_LCDIF1_PIX           175
+#define IMX6SX_CLK_LDB_DI0              176
+#define IMX6SX_CLK_QSPI1                177
+#define IMX6SX_CLK_MLB                  178
+#define IMX6SX_CLK_MMDC_P0_FAST         179
+#define IMX6SX_CLK_MMDC_P0_IPG          180
+#define IMX6SX_CLK_AXI                  181
+#define IMX6SX_CLK_PCIE_AXI             182
+#define IMX6SX_CLK_QSPI2                183
+#define IMX6SX_CLK_PER1_BCH             184
+#define IMX6SX_CLK_PER2_MAIN            185
+#define IMX6SX_CLK_PWM1                 186
+#define IMX6SX_CLK_PWM2                 187
+#define IMX6SX_CLK_PWM3                 188
+#define IMX6SX_CLK_PWM4                 189
+#define IMX6SX_CLK_GPMI_BCH_APB         190
+#define IMX6SX_CLK_GPMI_BCH             191
+#define IMX6SX_CLK_GPMI_IO              192
+#define IMX6SX_CLK_GPMI_APB             193
+#define IMX6SX_CLK_ROM                  194
+#define IMX6SX_CLK_SDMA                 195
+#define IMX6SX_CLK_SPBA                 196
+#define IMX6SX_CLK_SPDIF                197
+#define IMX6SX_CLK_SSI1_IPG             198
+#define IMX6SX_CLK_SSI2_IPG             199
+#define IMX6SX_CLK_SSI3_IPG             200
+#define IMX6SX_CLK_SSI1                 201
+#define IMX6SX_CLK_SSI2                 202
+#define IMX6SX_CLK_SSI3                 203
+#define IMX6SX_CLK_UART_IPG             204
+#define IMX6SX_CLK_UART_SERIAL          205
+#define IMX6SX_CLK_SAI1                 206
+#define IMX6SX_CLK_SAI2                 207
+#define IMX6SX_CLK_USBOH3               208
+#define IMX6SX_CLK_USDHC1               209
+#define IMX6SX_CLK_USDHC2               210
+#define IMX6SX_CLK_USDHC3               211
+#define IMX6SX_CLK_USDHC4               212
+#define IMX6SX_CLK_EIM_SLOW             213
+#define IMX6SX_CLK_PWM8                 214
+#define IMX6SX_CLK_VADC                 215
+#define IMX6SX_CLK_GIS                  216
+#define IMX6SX_CLK_I2C4                 217
+#define IMX6SX_CLK_PWM5                 218
+#define IMX6SX_CLK_PWM6                 219
+#define IMX6SX_CLK_PWM7                 220
+#define IMX6SX_CLK_CKO1                 221
+#define IMX6SX_CLK_CKO2                 222
+#define IMX6SX_CLK_IPP_DI0              223
+#define IMX6SX_CLK_IPP_DI1              224
+#define IMX6SX_CLK_ENET_AHB             225
+#define IMX6SX_CLK_OCRAM_PODF           226
+#define IMX6SX_CLK_GPT_3M               227
+#define IMX6SX_CLK_ENET_PTP             228
+#define IMX6SX_CLK_ENET_PTP_REF         229
+#define IMX6SX_CLK_ENET2_REF            230
+#define IMX6SX_CLK_ENET2_REF_125M       231
+#define IMX6SX_CLK_AUDIO                232
+#define IMX6SX_CLK_LVDS1_SEL            233
+#define IMX6SX_CLK_LVDS1_OUT            234
+#define IMX6SX_CLK_ASRC_IPG             235
+#define IMX6SX_CLK_ASRC_MEM             236
+#define IMX6SX_CLK_SAI1_IPG             237
+#define IMX6SX_CLK_SAI2_IPG             238
+#define IMX6SX_CLK_ESAI_IPG             239
+#define IMX6SX_CLK_ESAI_MEM             240
+#define IMX6SX_CLK_CLK_END              241
+
+#endif /* __DT_BINDINGS_CLOCK_IMX6SX_H */
diff --git a/include/dt-bindings/clock/lsi,axm5516-clks.h b/include/dt-bindings/clock/lsi,axm5516-clks.h
new file mode 100644
index 000000000000..beb41ace5dd6
--- /dev/null
+++ b/include/dt-bindings/clock/lsi,axm5516-clks.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2014 LSI Corporation
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ */
+
+#ifndef _DT_BINDINGS_CLK_AXM5516_H
+#define _DT_BINDINGS_CLK_AXM5516_H
+
+#define AXXIA_CLK_FAB_PLL       0
+#define AXXIA_CLK_CPU_PLL       1
+#define AXXIA_CLK_SYS_PLL       2
+#define AXXIA_CLK_SM0_PLL       3
+#define AXXIA_CLK_SM1_PLL       4
+#define AXXIA_CLK_FAB_DIV       5
+#define AXXIA_CLK_SYS_DIV       6
+#define AXXIA_CLK_NRCP_DIV      7
+#define AXXIA_CLK_CPU0_DIV      8
+#define AXXIA_CLK_CPU1_DIV      9
+#define AXXIA_CLK_CPU2_DIV      10
+#define AXXIA_CLK_CPU3_DIV      11
+#define AXXIA_CLK_PER_DIV       12
+#define AXXIA_CLK_MMC_DIV       13
+#define AXXIA_CLK_FAB           14
+#define AXXIA_CLK_SYS           15
+#define AXXIA_CLK_NRCP          16
+#define AXXIA_CLK_CPU0          17
+#define AXXIA_CLK_CPU1          18
+#define AXXIA_CLK_CPU2          19
+#define AXXIA_CLK_CPU3          20
+#define AXXIA_CLK_PER           21
+#define AXXIA_CLK_MMC           22
+
+#endif
diff --git a/include/dt-bindings/clock/qcom,gcc-msm8960.h b/include/dt-bindings/clock/qcom,gcc-msm8960.h
index 03bbf49d43b7..f9f547146a15 100644
--- a/include/dt-bindings/clock/qcom,gcc-msm8960.h
+++ b/include/dt-bindings/clock/qcom,gcc-msm8960.h
@@ -51,7 +51,7 @@
 #define QDSS_TSCTR_CLK                          34
 #define SFAB_ADM0_M0_A_CLK                      35
 #define SFAB_ADM0_M1_A_CLK                      36
-#define SFAB_ADM0_M2_A_CLK                      37
+#define SFAB_ADM0_M2_H_CLK                      37
 #define ADM0_CLK                                38
 #define ADM0_PBUS_CLK                           39
 #define MSS_XPU_CLK                             40
@@ -99,7 +99,7 @@
 #define CFPB2_H_CLK                             82
 #define SFAB_CFPB_M_H_CLK                       83
 #define CFPB_MASTER_H_CLK                       84
-#define SFAB_CFPB_S_HCLK                        85
+#define SFAB_CFPB_S_H_CLK                       85
 #define CFPB_SPLITTER_H_CLK                     86
 #define TSIF_H_CLK                              87
 #define TSIF_INACTIVITY_TIMERS_CLK              88
@@ -110,7 +110,6 @@
 #define CE1_SLEEP_CLK                           93
 #define CE2_H_CLK                               94
 #define CE2_CORE_CLK                            95
-#define CE2_SLEEP_CLK                           96
 #define SFPB_H_CLK_SRC                          97
 #define SFPB_H_CLK                              98
 #define SFAB_SFPB_M_H_CLK                       99
@@ -252,7 +251,7 @@
 #define MSS_S_H_CLK                             235
 #define MSS_CXO_SRC_CLK                         236
 #define SATA_H_CLK                              237
-#define SATA_SRC_CLK                            238
+#define SATA_CLK_SRC                            238
 #define SATA_RXOOB_CLK                          239
 #define SATA_PMALIVE_CLK                        240
 #define SATA_PHY_REF_CLK                        241
diff --git a/include/dt-bindings/clock/qcom,gcc-msm8974.h b/include/dt-bindings/clock/qcom,gcc-msm8974.h
index 223ca174d9d3..51e51c860fe6 100644
--- a/include/dt-bindings/clock/qcom,gcc-msm8974.h
+++ b/include/dt-bindings/clock/qcom,gcc-msm8974.h
@@ -316,5 +316,9 @@
 #define GCC_CE2_CLK_SLEEP_ENA                                   299
 #define GCC_CE2_AXI_CLK_SLEEP_ENA                               300
 #define GCC_CE2_AHB_CLK_SLEEP_ENA                               301
+#define GPLL4                                                   302
+#define GPLL4_VOTE                                              303
+#define GCC_SDCC1_CDCCAL_SLEEP_CLK                              304
+#define GCC_SDCC1_CDCCAL_FF_CLK                                 305
 
 #endif
diff --git a/include/dt-bindings/clock/r7s72100-clock.h b/include/dt-bindings/clock/r7s72100-clock.h
new file mode 100644
index 000000000000..5128f4d94f44
--- /dev/null
+++ b/include/dt-bindings/clock/r7s72100-clock.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright (C) 2014 Renesas Solutions Corp.
+ * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_R7S72100_H__
+#define __DT_BINDINGS_CLOCK_R7S72100_H__
+
+#define R7S72100_CLK_PLL        0
+
+/* MSTP3 */
+#define R7S72100_CLK_MTU2       3
+
+/* MSTP4 */
+#define R7S72100_CLK_SCIF0      7
+#define R7S72100_CLK_SCIF1      6
+#define R7S72100_CLK_SCIF2      5
+#define R7S72100_CLK_SCIF3      4
+#define R7S72100_CLK_SCIF4      3
+#define R7S72100_CLK_SCIF5      2
+#define R7S72100_CLK_SCIF6      1
+#define R7S72100_CLK_SCIF7      0
+
+/* MSTP9 */
+#define R7S72100_CLK_I2C0       7
+#define R7S72100_CLK_I2C1       6
+#define R7S72100_CLK_I2C2       5
+#define R7S72100_CLK_I2C3       4
+
+/* MSTP10 */
+#define R7S72100_CLK_SPI0       7
+#define R7S72100_CLK_SPI1       6
+#define R7S72100_CLK_SPI2       5
+#define R7S72100_CLK_SPI3       4
+#define R7S72100_CLK_SPI4       3
+
+#endif /* __DT_BINDINGS_CLOCK_R7S72100_H__ */
diff --git a/include/dt-bindings/clock/r8a7779-clock.h b/include/dt-bindings/clock/r8a7779-clock.h
new file mode 100644
index 000000000000..381a6114237a
--- /dev/null
+++ b/include/dt-bindings/clock/r8a7779-clock.h
@@ -0,0 +1,64 @@
+/*
+ * Copyright (C) 2013  Horms Solutions Ltd.
+ *
+ * Contact: Simon Horman <horms@verge.net.au>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_R8A7779_H__
+#define __DT_BINDINGS_CLOCK_R8A7779_H__
+
+/* CPG */
+#define R8A7779_CLK_PLLA        0
+#define R8A7779_CLK_Z           1
+#define R8A7779_CLK_ZS          2
+#define R8A7779_CLK_S           3
+#define R8A7779_CLK_S1          4
+#define R8A7779_CLK_P           5
+#define R8A7779_CLK_B           6
+#define R8A7779_CLK_OUT         7
+
+/* MSTP 0 */
+#define R8A7779_CLK_HSPI        7
+#define R8A7779_CLK_TMU2        14
+#define R8A7779_CLK_TMU1        15
+#define R8A7779_CLK_TMU0        16
+#define R8A7779_CLK_HSCIF1      18
+#define R8A7779_CLK_HSCIF0      19
+#define R8A7779_CLK_SCIF5       21
+#define R8A7779_CLK_SCIF4       22
+#define R8A7779_CLK_SCIF3       23
+#define R8A7779_CLK_SCIF2       24
+#define R8A7779_CLK_SCIF1       25
+#define R8A7779_CLK_SCIF0       26
+#define R8A7779_CLK_I2C3        27
+#define R8A7779_CLK_I2C2        28
+#define R8A7779_CLK_I2C1        29
+#define R8A7779_CLK_I2C0        30
+
+/* MSTP 1 */
+#define R8A7779_CLK_USB01       0
+#define R8A7779_CLK_USB2        1
+#define R8A7779_CLK_DU          3
+#define R8A7779_CLK_VIN2        8
+#define R8A7779_CLK_VIN1        9
+#define R8A7779_CLK_VIN0        10
+#define R8A7779_CLK_ETHER       14
+#define R8A7779_CLK_SATA        15
+#define R8A7779_CLK_PCIE        16
+#define R8A7779_CLK_VIN3        20
+
+/* MSTP 3 */
+#define R8A7779_CLK_SDHI3       20
+#define R8A7779_CLK_SDHI2       21
+#define R8A7779_CLK_SDHI1       22
+#define R8A7779_CLK_SDHI0       23
+#define R8A7779_CLK_MMC1        30
+#define R8A7779_CLK_MMC0        31
+
+
+#endif /* __DT_BINDINGS_CLOCK_R8A7779_H__ */
diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h
index 6548a5fbcf4a..1118f7a4bca6 100644
--- a/include/dt-bindings/clock/r8a7790-clock.h
+++ b/include/dt-bindings/clock/r8a7790-clock.h
@@ -33,8 +33,8 @@
 #define R8A7790_CLK_TMU0                25
 #define R8A7790_CLK_VSP1_DU1            27
 #define R8A7790_CLK_VSP1_DU0            28
-#define R8A7790_CLK_VSP1_RT             30
-#define R8A7790_CLK_VSP1_SY             31
+#define R8A7790_CLK_VSP1_R              30
+#define R8A7790_CLK_VSP1_S              31
 
 /* MSTP2 */
 #define R8A7790_CLK_SCIFA2              2
@@ -50,6 +50,7 @@
 #define R8A7790_CLK_SYS_DMAC0           19
 
 /* MSTP3 */
+#define R8A7790_CLK_IIC2                0
 #define R8A7790_CLK_TPU0                4
 #define R8A7790_CLK_MMCIF1              5
 #define R8A7790_CLK_SDHI3               11
@@ -57,6 +58,8 @@
 #define R8A7790_CLK_SDHI1               13
 #define R8A7790_CLK_SDHI0               14
 #define R8A7790_CLK_MMCIF0              15
+#define R8A7790_CLK_IIC0                18
+#define R8A7790_CLK_IIC1                23
 #define R8A7790_CLK_SSUSB               28
 #define R8A7790_CLK_CMT1                29
 #define R8A7790_CLK_USBDMAC0            30
diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h
index 30f82f286e29..b050d18437ce 100644
--- a/include/dt-bindings/clock/r8a7791-clock.h
+++ b/include/dt-bindings/clock/r8a7791-clock.h
@@ -32,7 +32,7 @@
 #define R8A7791_CLK_TMU0                25
 #define R8A7791_CLK_VSP1_DU1            27
 #define R8A7791_CLK_VSP1_DU0            28
-#define R8A7791_CLK_VSP1_SY             31
+#define R8A7791_CLK_VSP1_S              31
 
 /* MSTP2 */
 #define R8A7791_CLK_SCIFA2              2
@@ -43,7 +43,8 @@
 #define R8A7791_CLK_SCIFB1              7
 #define R8A7791_CLK_MSIOF1              8
 #define R8A7791_CLK_SCIFB2              16
-#define R8A7791_CLK_DMAC                18
+#define R8A7791_CLK_SYS_DMAC1           18
+#define R8A7791_CLK_SYS_DMAC0           19
 
 /* MSTP3 */
 #define R8A7791_CLK_TPU0                4
@@ -51,6 +52,8 @@
 #define R8A7791_CLK_SDHI1               12
 #define R8A7791_CLK_SDHI0               14
 #define R8A7791_CLK_MMCIF0              15
+#define R8A7791_CLK_IIC0                18
+#define R8A7791_CLK_IIC1                23
 #define R8A7791_CLK_SSUSB               28
 #define R8A7791_CLK_CMT1                29
 #define R8A7791_CLK_USBDMAC0            30
@@ -61,6 +64,7 @@
 #define R8A7791_CLK_PWM                 23
 
 /* MSTP7 */
+#define R8A7791_CLK_EHCI                3
 #define R8A7791_CLK_HSUSB               4
 #define R8A7791_CLK_HSCIF2              13
 #define R8A7791_CLK_SCIF5               14
diff --git a/include/dt-bindings/clock/s3c2410.h b/include/dt-bindings/clock/s3c2410.h
new file mode 100644
index 000000000000..352a7673fc69
--- /dev/null
+++ b/include/dt-bindings/clock/s3c2410.h
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Device Tree binding constants clock controllers of Samsung S3C2410 and later.
+ */
+
+#ifndef _DT_BINDINGS_CLOCK_SAMSUNG_S3C2410_CLOCK_H
+#define _DT_BINDINGS_CLOCK_SAMSUNG_S3C2410_CLOCK_H
+
+/*
+ * Let each exported clock get a unique index, which is used on DT-enabled
+ * platforms to lookup the clock from a clock specifier. These indices are
+ * therefore considered an ABI and so must not be changed. This implies
+ * that new clocks should be added either in free spaces between clock groups
+ * or at the end.
+ */
+
+/* Core clocks. */
+
+/* id 1 is reserved */
+#define MPLL                    2
+#define UPLL                    3
+#define FCLK                    4
+#define HCLK                    5
+#define PCLK                    6
+#define UCLK                    7
+#define ARMCLK                  8
+
+/* pclk-gates */
+#define PCLK_UART0              16
+#define PCLK_UART1              17
+#define PCLK_UART2              18
+#define PCLK_I2C                19
+#define PCLK_SDI                20
+#define PCLK_SPI                21
+#define PCLK_ADC                22
+#define PCLK_AC97               23
+#define PCLK_I2S                24
+#define PCLK_PWM                25
+#define PCLK_RTC                26
+#define PCLK_GPIO               27
+
+
+/* hclk-gates */
+#define HCLK_LCD                32
+#define HCLK_USBH               33
+#define HCLK_USBD               34
+#define HCLK_NAND               35
+#define HCLK_CAM                36
+
+
+#define CAMIF                   40
+
+
+/* Total number of clocks. */
+#define NR_CLKS                 (CAMIF + 1)
+
+#endif /* _DT_BINDINGS_CLOCK_SAMSUNG_S3C2443_CLOCK_H */
diff --git a/include/dt-bindings/clock/s3c2412.h b/include/dt-bindings/clock/s3c2412.h
new file mode 100644
index 000000000000..aac1dcfda81c
--- /dev/null
+++ b/include/dt-bindings/clock/s3c2412.h
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Device Tree binding constants clock controllers of Samsung S3C2412.
+ */
+
+#ifndef _DT_BINDINGS_CLOCK_SAMSUNG_S3C2412_CLOCK_H
+#define _DT_BINDINGS_CLOCK_SAMSUNG_S3C2412_CLOCK_H
+
+/*
+ * Let each exported clock get a unique index, which is used on DT-enabled
+ * platforms to lookup the clock from a clock specifier. These indices are
+ * therefore considered an ABI and so must not be changed. This implies
+ * that new clocks should be added either in free spaces between clock groups
+ * or at the end.
+ */
+
+/* Core clocks. */
+
+/* id 1 is reserved */
+#define MPLL                    2
+#define UPLL                    3
+#define MDIVCLK                 4
+#define MSYSCLK                 5
+#define USYSCLK                 6
+#define HCLK                    7
+#define PCLK                    8
+#define ARMDIV                  9
+#define ARMCLK                  10
+
+
+/* Special clocks */
+#define SCLK_CAM                16
+#define SCLK_UART               17
+#define SCLK_I2S                18
+#define SCLK_USBD               19
+#define SCLK_USBH               20
+
+/* pclk-gates */
+#define PCLK_WDT                32
+#define PCLK_SPI                33
+#define PCLK_I2S                34
+#define PCLK_I2C                35
+#define PCLK_ADC                36
+#define PCLK_RTC                37
+#define PCLK_GPIO               38
+#define PCLK_UART2              39
+#define PCLK_UART1              40
+#define PCLK_UART0              41
+#define PCLK_SDI                42
+#define PCLK_PWM                43
+#define PCLK_USBD               44
+
+/* hclk-gates */
+#define HCLK_HALF               48
+#define HCLK_X2                 49
+#define HCLK_SDRAM              50
+#define HCLK_USBH               51
+#define HCLK_LCD                52
+#define HCLK_NAND               53
+#define HCLK_DMA3               54
+#define HCLK_DMA2               55
+#define HCLK_DMA1               56
+#define HCLK_DMA0               57
+
+/* Total number of clocks. */
+#define NR_CLKS                 (HCLK_DMA0 + 1)
+
+#endif /* _DT_BINDINGS_CLOCK_SAMSUNG_S3C2412_CLOCK_H */
diff --git a/include/dt-bindings/clock/s3c2443.h b/include/dt-bindings/clock/s3c2443.h
new file mode 100644
index 000000000000..37e66b054d64
--- /dev/null
+++ b/include/dt-bindings/clock/s3c2443.h
@@ -0,0 +1,92 @@
+/*
+ * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Device Tree binding constants clock controllers of Samsung S3C2443 and later.
+ */
+
+#ifndef _DT_BINDINGS_CLOCK_SAMSUNG_S3C2443_CLOCK_H
+#define _DT_BINDINGS_CLOCK_SAMSUNG_S3C2443_CLOCK_H
+
+/*
+ * Let each exported clock get a unique index, which is used on DT-enabled
+ * platforms to lookup the clock from a clock specifier. These indices are
+ * therefore considered an ABI and so must not be changed. This implies
+ * that new clocks should be added either in free spaces between clock groups
+ * or at the end.
+ */
+
+/* Core clocks. */
+#define MSYSCLK                 1
+#define ESYSCLK                 2
+#define ARMDIV                  3
+#define ARMCLK                  4
+#define HCLK                    5
+#define PCLK                    6
+
+/* Special clocks */
+#define SCLK_HSSPI0             16
+#define SCLK_FIMD               17
+#define SCLK_I2S0               18
+#define SCLK_I2S1               19
+#define SCLK_HSMMC1             20
+#define SCLK_HSMMC_EXT          21
+#define SCLK_CAM                22
+#define SCLK_UART               23
+#define SCLK_USBH               24
+
+/* Muxes */
+#define MUX_HSSPI0              32
+#define MUX_HSSPI1              33
+#define MUX_HSMMC0              34
+#define MUX_HSMMC1              35
+
+/* hclk-gates */
+#define HCLK_DMA0               48
+#define HCLK_DMA1               49
+#define HCLK_DMA2               50
+#define HCLK_DMA3               51
+#define HCLK_DMA4               52
+#define HCLK_DMA5               53
+#define HCLK_DMA6               54
+#define HCLK_DMA7               55
+#define HCLK_CAM                56
+#define HCLK_LCD                57
+#define HCLK_USBH               58
+#define HCLK_USBD               59
+#define HCLK_IROM               60
+#define HCLK_HSMMC0             61
+#define HCLK_HSMMC1             62
+#define HCLK_CFC                63
+#define HCLK_SSMC               64
+#define HCLK_DRAM               65
+#define HCLK_2D                 66
+
+/* pclk-gates */
+#define PCLK_UART0              72
+#define PCLK_UART1              73
+#define PCLK_UART2              74
+#define PCLK_UART3              75
+#define PCLK_I2C0               76
+#define PCLK_SDI                77
+#define PCLK_SPI0               78
+#define PCLK_ADC                79
+#define PCLK_AC97               80
+#define PCLK_I2S0               81
+#define PCLK_PWM                82
+#define PCLK_WDT                83
+#define PCLK_RTC                84
+#define PCLK_GPIO               85
+#define PCLK_SPI1               86
+#define PCLK_CHIPID             87
+#define PCLK_I2C1               88
+#define PCLK_I2S1               89
+#define PCLK_PCM                90
+
+/* Total number of clocks. */
+#define NR_CLKS                 (PCLK_PCM + 1)
+
+#endif /* _DT_BINDINGS_CLOCK_SAMSUNG_S3C2443_CLOCK_H */
diff --git a/include/dt-bindings/clock/stih415-clks.h b/include/dt-bindings/clock/stih415-clks.h
new file mode 100644
index 000000000000..0d2c7397e028
--- /dev/null
+++ b/include/dt-bindings/clock/stih415-clks.h
@@ -0,0 +1,15 @@
+/*
+ * This header provides constants clk index STMicroelectronics
+ * STiH415 SoC.
+ */
+#ifndef _CLK_STIH415
+#define _CLK_STIH415
+
+/* CLOCKGEN A0 */
+#define CLK_ICN_REG             0
+#define CLK_ETH1_PHY            4
+
+/* CLOCKGEN A1 */
+#define CLK_GMAC0_PHY           3
+
+#endif
diff --git a/include/dt-bindings/clock/stih416-clks.h b/include/dt-bindings/clock/stih416-clks.h
new file mode 100644
index 000000000000..552c779eb6af
--- /dev/null
+++ b/include/dt-bindings/clock/stih416-clks.h
@@ -0,0 +1,15 @@
+/*
+ * This header provides constants clk index STMicroelectronics
+ * STiH416 SoC.
+ */
+#ifndef _CLK_STIH416
+#define _CLK_STIH416
+
+/* CLOCKGEN A0 */
+#define CLK_ICN_REG             0
+#define CLK_ETH1_PHY            4
+
+/* CLOCKGEN A1 */
+#define CLK_GMAC0_PHY           3
+
+#endif
diff --git a/include/dt-bindings/clock/tegra114-car.h b/include/dt-bindings/clock/tegra114-car.h
index 6d0d8d8ef31e..fc12621fb432 100644
--- a/include/dt-bindings/clock/tegra114-car.h
+++ b/include/dt-bindings/clock/tegra114-car.h
@@ -337,6 +337,7 @@
 #define TEGRA114_CLK_CLK_OUT_3_MUX 308
 #define TEGRA114_CLK_DSIA_MUX 309
 #define TEGRA114_CLK_DSIB_MUX 310
-#define TEGRA114_CLK_CLK_MAX 311
+#define TEGRA114_CLK_XUSB_SS_DIV2 311
+#define TEGRA114_CLK_CLK_MAX 312
 
 #endif  /* _DT_BINDINGS_CLOCK_TEGRA114_CAR_H */
diff --git a/include/dt-bindings/clock/tegra124-car.h b/include/dt-bindings/clock/tegra124-car.h
index 433528ab5161..8a4c5892890f 100644
--- a/include/dt-bindings/clock/tegra124-car.h
+++ b/include/dt-bindings/clock/tegra124-car.h
@@ -336,6 +336,7 @@
 #define TEGRA124_CLK_DSIA_MUX 309
 #define TEGRA124_CLK_DSIB_MUX 310
 #define TEGRA124_CLK_SOR0_LVDS 311
-#define TEGRA124_CLK_CLK_MAX 312
+#define TEGRA124_CLK_XUSB_SS_DIV2 312
+#define TEGRA124_CLK_CLK_MAX 313
 
 #endif  /* _DT_BINDINGS_CLOCK_TEGRA124_CAR_H */
diff --git a/include/dt-bindings/pinctrl/omap.h b/include/dt-bindings/pinctrl/omap.h
index b04528cd033c..1c75b8ca5228 100644
--- a/include/dt-bindings/pinctrl/omap.h
+++ b/include/dt-bindings/pinctrl/omap.h
@@ -62,12 +62,29 @@
 #define OMAP3630_CORE2_IOPAD(pa, val)   OMAP_IOPAD_OFFSET((pa), 0x25a0) (val)
 #define OMAP3_WKUP_IOPAD(pa, val)       OMAP_IOPAD_OFFSET((pa), 0x2a00) (val)
 #define AM33XX_IOPAD(pa, val)           OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
-#define OMAP4_CORE_IOPAD(pa, val)       OMAP_IOPAD_OFFSET((pa), 0x0040) (val)
-#define OMAP4_WKUP_IOPAD(pa, val)       OMAP_IOPAD_OFFSET((pa), 0xe040) (val)
 #define AM4372_IOPAD(pa, val)           OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
-#define OMAP5_CORE_IOPAD(pa, val)       OMAP_IOPAD_OFFSET((pa), 0x2840) (val)
-#define OMAP5_WKUP_IOPAD(pa, val)       OMAP_IOPAD_OFFSET((pa), 0xc840) (val)
 #define DRA7XX_CORE_IOPAD(pa, val)      OMAP_IOPAD_OFFSET((pa), 0x3400) (val)
 
+/*
+ * Macros to allow using the offset from the padconf physical address
+ * instead  of the offset from padconf base.
+ */
+#define OMAP_PADCONF_OFFSET(offset, base_offset)        ((offset) - (base_offset))
+
+#define OMAP4_IOPAD(offset, val)        OMAP_PADCONF_OFFSET((offset), 0x0040) (val)
+#define OMAP5_IOPAD(offset, val)        OMAP_PADCONF_OFFSET((offset), 0x0040) (val)
+
+/*
+ * Define some commonly used pins configured by the boards.
+ * Note that some boards use alternative pins, so check
+ * the schematics before using these.
+ */
+#define OMAP3_UART1_RX          0x152
+#define OMAP3_UART2_RX          0x14a
+#define OMAP3_UART3_RX          0x16e
+#define OMAP4_UART2_RX          0xdc
+#define OMAP4_UART3_RX          0x104
+#define OMAP4_UART4_RX          0x11c
+
 #endif
 
diff --git a/include/dt-bindings/reset-controller/stih415-resets.h b/include/dt-bindings/reset-controller/stih415-resets.h
index c2f8a66913c5..c2329fe29cf6 100644
--- a/include/dt-bindings/reset-controller/stih415-resets.h
+++ b/include/dt-bindings/reset-controller/stih415-resets.h
@@ -22,5 +22,6 @@
 #define STIH415_USB0_SOFTRESET          3
 #define STIH415_USB1_SOFTRESET          4
 #define STIH415_USB2_SOFTRESET          5
+#define STIH415_KEYSCAN_SOFTRESET       6
 
 #endif /* _DT_BINDINGS_RESET_CONTROLLER_STIH415 */
diff --git a/include/dt-bindings/reset-controller/stih416-resets.h b/include/dt-bindings/reset-controller/stih416-resets.h
index 2127743f23e3..fcf9af1ac0b2 100644
--- a/include/dt-bindings/reset-controller/stih416-resets.h
+++ b/include/dt-bindings/reset-controller/stih416-resets.h
@@ -46,5 +46,6 @@
 #define STIH416_COMPO_A_SOFTRESET       25
 #define STIH416_VP8_DEC_SOFTRESET       26
 #define STIH416_VTG_MAIN_SOFTRESET      27
+#define STIH416_KEYSCAN_SOFTRESET       28
 
 #endif /* _DT_BINDINGS_RESET_CONTROLLER_STIH416 */
diff --git a/include/dt-bindings/reset/altr,rst-mgr.h b/include/dt-bindings/reset/altr,rst-mgr.h
new file mode 100644
index 000000000000..3f04908fb87c
--- /dev/null
+++ b/include/dt-bindings/reset/altr,rst-mgr.h
@@ -0,0 +1,90 @@
+/*
+ * Copyright (c) 2014, Steffen Trumtrar <s.trumtrar@pengutronix.de>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _DT_BINDINGS_RESET_ALTR_RST_MGR_H
+#define _DT_BINDINGS_RESET_ALTR_RST_MGR_H
+
+/* MPUMODRST */
+#define CPU0_RESET              0
+#define CPU1_RESET              1
+#define WDS_RESET               2
+#define SCUPER_RESET            3
+#define L2_RESET                4
+
+/* PERMODRST */
+#define EMAC0_RESET             32
+#define EMAC1_RESET             33
+#define USB0_RESET              34
+#define USB1_RESET              35
+#define NAND_RESET              36
+#define QSPI_RESET              37
+#define L4WD0_RESET             38
+#define L4WD1_RESET             39
+#define OSC1TIMER0_RESET        40
+#define OSC1TIMER1_RESET        41
+#define SPTIMER0_RESET          42
+#define SPTIMER1_RESET          43
+#define I2C0_RESET              44
+#define I2C1_RESET              45
+#define I2C2_RESET              46
+#define I2C3_RESET              47
+#define UART0_RESET             48
+#define UART1_RESET             49
+#define SPIM0_RESET             50
+#define SPIM1_RESET             51
+#define SPIS0_RESET             52
+#define SPIS1_RESET             53
+#define SDMMC_RESET             54
+#define CAN0_RESET              55
+#define CAN1_RESET              56
+#define GPIO0_RESET             57
+#define GPIO1_RESET             58
+#define GPIO2_RESET             59
+#define DMA_RESET               60
+#define SDR_RESET               61
+
+/* PER2MODRST */
+#define DMAIF0_RESET            64
+#define DMAIF1_RESET            65
+#define DMAIF2_RESET            66
+#define DMAIF3_RESET            67
+#define DMAIF4_RESET            68
+#define DMAIF5_RESET            69
+#define DMAIF6_RESET            70
+#define DMAIF7_RESET            71
+
+/* BRGMODRST */
+#define HPS2FPGA_RESET          96
+#define LWHPS2FPGA_RESET        97
+#define FPGA2HPS_RESET          98
+
+/* MISCMODRST*/
+#define ROM_RESET               128
+#define OCRAM_RESET             129
+#define SYSMGR_RESET            130
+#define SYSMGRCOLD_RESET        131
+#define FPGAMGR_RESET           132
+#define ACPIDMAP_RESET          133
+#define S2F_RESET               134
+#define S2FCOLD_RESET           135
+#define NRSTPIN_RESET           136
+#define TIMESTAMPCOLD_RESET     137
+#define CLKMGRCOLD_RESET        138
+#define SCANMGR_RESET           139
+#define FRZCTRLCOLD_RESET       140
+#define SYSDBG_RESET            141
+#define DBG_RESET               142
+#define TAPCOLD_RESET           143
+#define SDRCOLD_RESET           144
+
+#endif
diff --git a/include/dt-bindings/reset/qcom,gcc-msm8960.h b/include/dt-bindings/reset/qcom,gcc-msm8960.h
index a840e680323c..07edd0e65eed 100644
--- a/include/dt-bindings/reset/qcom,gcc-msm8960.h
+++ b/include/dt-bindings/reset/qcom,gcc-msm8960.h
@@ -58,7 +58,7 @@
 #define PPSS_PROC_RESET                                 41
 #define PPSS_RESET                                      42
 #define DMA_BAM_RESET                                   43
-#define SIC_TIC_RESET                                   44
+#define SPS_TIC_H_RESET                                 44
 #define SLIMBUS_H_RESET                                 45
 #define SFAB_CFPB_M_RESET                               46
 #define SFAB_CFPB_S_RESET                               47
diff --git a/include/dt-bindings/soc/qcom,gsbi.h b/include/dt-bindings/soc/qcom,gsbi.h
new file mode 100644
index 000000000000..7ac4292333aa
--- /dev/null
+++ b/include/dt-bindings/soc/qcom,gsbi.h
@@ -0,0 +1,26 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#ifndef __DT_BINDINGS_QCOM_GSBI_H
+#define __DT_BINDINGS_QCOM_GSBI_H
+
+#define GSBI_PROT_IDLE          0
+#define GSBI_PROT_I2C_UIM       1
+#define GSBI_PROT_I2C           2
+#define GSBI_PROT_SPI           3
+#define GSBI_PROT_UART_W_FC     4
+#define GSBI_PROT_UIM           5
+#define GSBI_PROT_I2C_UART      6
+
+#define GSBI_CRCI_QUP           0
+#define GSBI_CRCI_UART          1
+
+#endif
diff --git a/include/linux/acpi.h b/include/linux/acpi.h
index 7a8f2cd66c8b..358c01b971db 100644
--- a/include/linux/acpi.h
+++ b/include/linux/acpi.h
@@ -37,6 +37,7 @@
 
 #include <linux/list.h>
 #include <linux/mod_devicetable.h>
+#include <linux/dynamic_debug.h>
 
 #include <acpi/acpi.h>
 #include <acpi/acpi_bus.h>
@@ -184,6 +185,8 @@ extern int ec_transaction(u8 command,
                           u8 *rdata, unsigned rdata_len);
 extern acpi_handle ec_get_handle(void);
 
+extern bool acpi_is_pnp_device(struct acpi_device *);
+
 #if defined(CONFIG_ACPI_WMI) || defined(CONFIG_ACPI_WMI_MODULE)
 
 typedef void (*wmi_notify_handler) (u32 value, void *context);
@@ -554,14 +557,20 @@ static inline int acpi_subsys_runtime_resume(struct device *dev) { return 0; }
 int acpi_dev_suspend_late(struct device *dev);
 int acpi_dev_resume_early(struct device *dev);
 int acpi_subsys_prepare(struct device *dev);
+void acpi_subsys_complete(struct device *dev);
 int acpi_subsys_suspend_late(struct device *dev);
 int acpi_subsys_resume_early(struct device *dev);
+int acpi_subsys_suspend(struct device *dev);
+int acpi_subsys_freeze(struct device *dev);
 #else
 static inline int acpi_dev_suspend_late(struct device *dev) { return 0; }
 static inline int acpi_dev_resume_early(struct device *dev) { return 0; }
 static inline int acpi_subsys_prepare(struct device *dev) { return 0; }
+static inline void acpi_subsys_complete(struct device *dev) {}
 static inline int acpi_subsys_suspend_late(struct device *dev) { return 0; }
 static inline int acpi_subsys_resume_early(struct device *dev) { return 0; }
+static inline int acpi_subsys_suspend(struct device *dev) { return 0; }
+static inline int acpi_subsys_freeze(struct device *dev) { return 0; }
 #endif
 
 #if defined(CONFIG_ACPI) && defined(CONFIG_PM)
@@ -589,6 +598,14 @@ static inline __printf(3, 4) void
 acpi_handle_printk(const char *level, void *handle, const char *fmt, ...) {}
 #endif  /* !CONFIG_ACPI */
 
+#if defined(CONFIG_ACPI) && defined(CONFIG_DYNAMIC_DEBUG)
+__printf(3, 4)
+void __acpi_handle_debug(struct _ddebug *descriptor, acpi_handle handle, const char *fmt, ...);
+#else
+#define __acpi_handle_debug(descriptor, handle, fmt, ...)               \
+        acpi_handle_printk(KERN_DEBUG, handle, fmt, ##__VA_ARGS__);
+#endif
+
 /*
  * acpi_handle_<level>: Print message with ACPI prefix and object path
  *
@@ -610,11 +627,19 @@ acpi_handle_printk(const char *level, void *handle, const char *fmt, ...) {}
 #define acpi_handle_info(handle, fmt, ...)                              \
         acpi_handle_printk(KERN_INFO, handle, fmt, ##__VA_ARGS__)
 
-/* REVISIT: Support CONFIG_DYNAMIC_DEBUG when necessary */
-#if defined(DEBUG) || defined(CONFIG_DYNAMIC_DEBUG)
+#if defined(DEBUG)
 #define acpi_handle_debug(handle, fmt, ...)                             \
         acpi_handle_printk(KERN_DEBUG, handle, fmt, ##__VA_ARGS__)
 #else
+#if defined(CONFIG_DYNAMIC_DEBUG)
+#define acpi_handle_debug(handle, fmt, ...)                             \
+do {                                                                    \
+        DEFINE_DYNAMIC_DEBUG_METADATA(descriptor, fmt);                 \
+        if (unlikely(descriptor.flags & _DPRINTK_FLAGS_PRINT))          \
+                __acpi_handle_debug(&descriptor, handle, pr_fmt(fmt),   \
+                                ##__VA_ARGS__);                         \
+} while (0)
+#else
 #define acpi_handle_debug(handle, fmt, ...)                             \
 ({                                                                      \
         if (0)                                                          \
@@ -622,5 +647,6 @@ acpi_handle_printk(const char *level, void *handle, const char *fmt, ...) {}
         0;                                                              \
 })
 #endif
+#endif
 
 #endif  /*_LINUX_ACPI_H*/
diff --git a/include/linux/amba/mmci.h b/include/linux/amba/mmci.h
index 32a89cf5ec45..8c98113069ce 100644
--- a/include/linux/amba/mmci.h
+++ b/include/linux/amba/mmci.h
@@ -6,28 +6,9 @@
 
 #include <linux/mmc/host.h>
 
-
-/*
- * These defines is places here due to access is needed from machine
- * configuration files. The ST Micro version does not have ROD and
- * reuse the voltage registers for direction settings.
- */
-#define MCI_ST_DATA2DIREN       (1 << 2)
-#define MCI_ST_CMDDIREN         (1 << 3)
-#define MCI_ST_DATA0DIREN       (1 << 4)
-#define MCI_ST_DATA31DIREN      (1 << 5)
-#define MCI_ST_FBCLKEN          (1 << 7)
-#define MCI_ST_DATA74DIREN      (1 << 8)
-
-/* Just some dummy forwarding */
-struct dma_chan;
-
 /**
  * struct mmci_platform_data - platform configuration for the MMCI
  * (also known as PL180) block.
- * @f_max: the maximum operational frequency for this host in this
- * platform configuration. When this is specified it takes precedence
- * over the module parameter for the same frequency.
  * @ocr_mask: available voltages on the 4 pins from the block, this
  * is ignored if a regulator is used, see the MMC_VDD_* masks in
  * mmc/host.h
@@ -42,37 +23,14 @@ struct dma_chan;
  * @gpio_wp: read this GPIO pin to see if the card is write protected
  * @gpio_cd: read this GPIO pin to detect card insertion
  * @cd_invert: true if the gpio_cd pin value is active low
- * @capabilities: the capabilities of the block as implemented in
- * this platform, signify anything MMC_CAP_* from mmc/host.h
- * @capabilities2: more capabilities, MMC_CAP2_* from mmc/host.h
- * @sigdir: a bit field indicating for what bits in the MMC bus the host
- * should enable signal direction indication.
- * @dma_filter: function used to select an appropriate RX and TX
- * DMA channel to be used for DMA, if and only if you're deploying the
- * generic DMA engine
- * @dma_rx_param: parameter passed to the DMA allocation
- * filter in order to select an appropriate RX channel. If
- * there is a bidirectional RX+TX channel, then just specify
- * this and leave dma_tx_param set to NULL
- * @dma_tx_param: parameter passed to the DMA allocation
- * filter in order to select an appropriate TX channel. If this
- * is NULL the driver will attempt to use the RX channel as a
- * bidirectional channel
  */
 struct mmci_platform_data {
-        unsigned int f_max;
         unsigned int ocr_mask;
         int (*ios_handler)(struct device *, struct mmc_ios *);
         unsigned int (*status)(struct device *);
         int     gpio_wp;
         int     gpio_cd;
         bool    cd_invert;
-        unsigned long capabilities;
-        unsigned long capabilities2;
-        u32 sigdir;
-        bool (*dma_filter)(struct dma_chan *chan, void *filter_param);
-        void *dma_rx_param;
-        void *dma_tx_param;
 };
 
 #endif
diff --git a/include/linux/atomic.h b/include/linux/atomic.h
index 5b08a8540ecf..fef3a809e7cf 100644
--- a/include/linux/atomic.h
+++ b/include/linux/atomic.h
@@ -3,6 +3,42 @@
 #define _LINUX_ATOMIC_H
 #include <asm/atomic.h>
 
+/*
+ * Provide __deprecated wrappers for the new interface, avoid flag day changes.
+ * We need the ugly external functions to break header recursion hell.
+ */
+#ifndef smp_mb__before_atomic_inc
+static inline void __deprecated smp_mb__before_atomic_inc(void)
+{
+        extern void __smp_mb__before_atomic(void);
+        __smp_mb__before_atomic();
+}
+#endif
+
+#ifndef smp_mb__after_atomic_inc
+static inline void __deprecated smp_mb__after_atomic_inc(void)
+{
+        extern void __smp_mb__after_atomic(void);
+        __smp_mb__after_atomic();
+}
+#endif
+
+#ifndef smp_mb__before_atomic_dec
+static inline void __deprecated smp_mb__before_atomic_dec(void)
+{
+        extern void __smp_mb__before_atomic(void);
+        __smp_mb__before_atomic();
+}
+#endif
+
+#ifndef smp_mb__after_atomic_dec
+static inline void __deprecated smp_mb__after_atomic_dec(void)
+{
+        extern void __smp_mb__after_atomic(void);
+        __smp_mb__after_atomic();
+}
+#endif
+
 /**
  * atomic_add_unless - add unless the number is already a given value
  * @v: pointer of type atomic_t
diff --git a/include/linux/backlight.h b/include/linux/backlight.h
index 72647429adf6..adb14a8616df 100644
--- a/include/linux/backlight.h
+++ b/include/linux/backlight.h
@@ -40,6 +40,11 @@ enum backlight_type {
         BACKLIGHT_TYPE_MAX,
 };
 
+enum backlight_notification {
+        BACKLIGHT_REGISTERED,
+        BACKLIGHT_UNREGISTERED,
+};
+
 struct backlight_device;
 struct fb_info;
 
@@ -133,6 +138,8 @@ extern void devm_backlight_device_unregister(struct device *dev,
 extern void backlight_force_update(struct backlight_device *bd,
                                    enum backlight_update_reason reason);
 extern bool backlight_device_registered(enum backlight_type type);
+extern int backlight_register_notifier(struct notifier_block *nb);
+extern int backlight_unregister_notifier(struct notifier_block *nb);
 
 #define to_backlight_device(obj) container_of(obj, struct backlight_device, dev)
 
diff --git a/include/linux/bio.h b/include/linux/bio.h
index bba550826921..5a645769f020 100644
--- a/include/linux/bio.h
+++ b/include/linux/bio.h
@@ -333,7 +333,7 @@ static inline struct bio *bio_next_split(struct bio *bio, int sectors,
 
 extern struct bio_set *bioset_create(unsigned int, unsigned int);
 extern void bioset_free(struct bio_set *);
-extern mempool_t *biovec_create_pool(struct bio_set *bs, int pool_entries);
+extern mempool_t *biovec_create_pool(int pool_entries);
 
 extern struct bio *bio_alloc_bioset(gfp_t, int, struct bio_set *);
 extern void bio_put(struct bio *);
diff --git a/include/linux/bitops.h b/include/linux/bitops.h
index be5fd38bd5a0..cbc5833fb221 100644
--- a/include/linux/bitops.h
+++ b/include/linux/bitops.h
@@ -32,6 +32,26 @@ extern unsigned long __sw_hweight64(__u64 w);
  */
 #include <asm/bitops.h>
 
+/*
+ * Provide __deprecated wrappers for the new interface, avoid flag day changes.
+ * We need the ugly external functions to break header recursion hell.
+ */
+#ifndef smp_mb__before_clear_bit
+static inline void __deprecated smp_mb__before_clear_bit(void)
+{
+        extern void __smp_mb__before_atomic(void);
+        __smp_mb__before_atomic();
+}
+#endif
+
+#ifndef smp_mb__after_clear_bit
+static inline void __deprecated smp_mb__after_clear_bit(void)
+{
+        extern void __smp_mb__after_atomic(void);
+        __smp_mb__after_atomic();
+}
+#endif
+
 #define for_each_set_bit(bit, addr, size) \
         for ((bit) = find_first_bit((addr), (size));            \
              (bit) < (size);                                    \
diff --git a/include/linux/blk-mq.h b/include/linux/blk-mq.h
index 0120451545d8..0feedebfde48 100644
--- a/include/linux/blk-mq.h
+++ b/include/linux/blk-mq.h
@@ -8,7 +8,13 @@ struct blk_mq_tags;
 struct blk_mq_cpu_notifier {
         struct list_head list;
         void *data;
-        void (*notify)(void *data, unsigned long action, unsigned int cpu);
+        int (*notify)(void *data, unsigned long action, unsigned int cpu);
+};
+
+struct blk_mq_ctxmap {
+        unsigned int map_size;
+        unsigned int bits_per_word;
+        struct blk_align_bitmap *map;
 };
 
 struct blk_mq_hw_ctx {
@@ -18,7 +24,11 @@ struct blk_mq_hw_ctx {
         } ____cacheline_aligned_in_smp;
 
         unsigned long           state;          /* BLK_MQ_S_* flags */
-        struct delayed_work     delayed_work;
+        struct delayed_work     run_work;
+        struct delayed_work     delay_work;
+        cpumask_var_t           cpumask;
+        int                     next_cpu;
+        int                     next_cpu_batch;
 
         unsigned long           flags;          /* BLK_MQ_F_* flags */
 
@@ -27,13 +37,13 @@ struct blk_mq_hw_ctx {
 
         void                    *driver_data;
 
+        struct blk_mq_ctxmap    ctx_map;
+
         unsigned int            nr_ctx;
         struct blk_mq_ctx       **ctxs;
-        unsigned int            nr_ctx_map;
-        unsigned long           *ctx_map;
 
-        struct request          **rqs;
-        struct list_head        page_list;
+        unsigned int            wait_index;
+
         struct blk_mq_tags      *tags;
 
         unsigned long           queued;
@@ -41,31 +51,40 @@ struct blk_mq_hw_ctx {
 #define BLK_MQ_MAX_DISPATCH_ORDER       10
         unsigned long           dispatched[BLK_MQ_MAX_DISPATCH_ORDER];
 
-        unsigned int            queue_depth;
         unsigned int            numa_node;
         unsigned int            cmd_size;       /* per-request extra data */
 
+        atomic_t                nr_active;
+
         struct blk_mq_cpu_notifier      cpu_notifier;
         struct kobject          kobj;
 };
 
-struct blk_mq_reg {
+struct blk_mq_tag_set {
         struct blk_mq_ops       *ops;
         unsigned int            nr_hw_queues;
-        unsigned int            queue_depth;
+        unsigned int            queue_depth;    /* max hw supported */
         unsigned int            reserved_tags;
         unsigned int            cmd_size;       /* per-request extra data */
         int                     numa_node;
         unsigned int            timeout;
         unsigned int            flags;          /* BLK_MQ_F_* */
+        void                    *driver_data;
+
+        struct blk_mq_tags      **tags;
+
+        struct mutex            tag_list_lock;
+        struct list_head        tag_list;
 };
 
 typedef int (queue_rq_fn)(struct blk_mq_hw_ctx *, struct request *);
 typedef struct blk_mq_hw_ctx *(map_queue_fn)(struct request_queue *, const int);
-typedef struct blk_mq_hw_ctx *(alloc_hctx_fn)(struct blk_mq_reg *,unsigned int);
-typedef void (free_hctx_fn)(struct blk_mq_hw_ctx *, unsigned int);
 typedef int (init_hctx_fn)(struct blk_mq_hw_ctx *, void *, unsigned int);
 typedef void (exit_hctx_fn)(struct blk_mq_hw_ctx *, unsigned int);
+typedef int (init_request_fn)(void *, struct request *, unsigned int,
+                unsigned int, unsigned int);
+typedef void (exit_request_fn)(void *, struct request *, unsigned int,
+                unsigned int);
 
 struct blk_mq_ops {
         /*
@@ -86,18 +105,20 @@ struct blk_mq_ops {
         softirq_done_fn         *complete;
 
         /*
-         * Override for hctx allocations (should probably go)
-         */
-        alloc_hctx_fn           *alloc_hctx;
-        free_hctx_fn            *free_hctx;
-
-        /*
          * Called when the block layer side of a hardware queue has been
          * set up, allowing the driver to allocate/init matching structures.
          * Ditto for exit/teardown.
          */
         init_hctx_fn            *init_hctx;
         exit_hctx_fn            *exit_hctx;
+
+        /*
+         * Called for every command allocated by the block layer to allow
+         * the driver to set up driver specific data.
+         * Ditto for exit/teardown.
+         */
+        init_request_fn         *init_request;
+        exit_request_fn         *exit_request;
 };
 
 enum {
@@ -107,18 +128,24 @@ enum {
 
         BLK_MQ_F_SHOULD_MERGE   = 1 << 0,
         BLK_MQ_F_SHOULD_SORT    = 1 << 1,
-        BLK_MQ_F_SHOULD_IPI     = 1 << 2,
+        BLK_MQ_F_TAG_SHARED     = 1 << 2,
+        BLK_MQ_F_SG_MERGE       = 1 << 3,
+        BLK_MQ_F_SYSFS_UP       = 1 << 4,
 
         BLK_MQ_S_STOPPED        = 0,
+        BLK_MQ_S_TAG_ACTIVE     = 1,
 
         BLK_MQ_MAX_DEPTH        = 2048,
+
+        BLK_MQ_CPU_WORK_BATCH   = 8,
 };
 
-struct request_queue *blk_mq_init_queue(struct blk_mq_reg *, void *);
+struct request_queue *blk_mq_init_queue(struct blk_mq_tag_set *);
 int blk_mq_register_disk(struct gendisk *);
 void blk_mq_unregister_disk(struct gendisk *);
-int blk_mq_init_commands(struct request_queue *, int (*init)(void *data, struct blk_mq_hw_ctx *, struct request *, unsigned int), void *data);
-void blk_mq_free_commands(struct request_queue *, void (*free)(void *data, struct blk_mq_hw_ctx *, struct request *, unsigned int), void *data);
+
+int blk_mq_alloc_tag_set(struct blk_mq_tag_set *set);
+void blk_mq_free_tag_set(struct blk_mq_tag_set *set);
 
 void blk_mq_flush_plug_list(struct blk_plug *plug, bool from_schedule);
 
@@ -126,28 +153,28 @@ void blk_mq_insert_request(struct request *, bool, bool, bool);
 void blk_mq_run_queues(struct request_queue *q, bool async);
 void blk_mq_free_request(struct request *rq);
 bool blk_mq_can_queue(struct blk_mq_hw_ctx *);
-struct request *blk_mq_alloc_request(struct request_queue *q, int rw, gfp_t gfp);
-struct request *blk_mq_alloc_reserved_request(struct request_queue *q, int rw, gfp_t gfp);
-struct request *blk_mq_rq_from_tag(struct request_queue *q, unsigned int tag);
+struct request *blk_mq_alloc_request(struct request_queue *q, int rw,
+                gfp_t gfp, bool reserved);
+struct request *blk_mq_tag_to_rq(struct blk_mq_tags *tags, unsigned int tag);
 
 struct blk_mq_hw_ctx *blk_mq_map_queue(struct request_queue *, const int ctx_index);
-struct blk_mq_hw_ctx *blk_mq_alloc_single_hw_queue(struct blk_mq_reg *, unsigned int);
-void blk_mq_free_single_hw_queue(struct blk_mq_hw_ctx *, unsigned int);
+struct blk_mq_hw_ctx *blk_mq_alloc_single_hw_queue(struct blk_mq_tag_set *, unsigned int, int);
 
-bool blk_mq_end_io_partial(struct request *rq, int error,
-                unsigned int nr_bytes);
-static inline void blk_mq_end_io(struct request *rq, int error)
-{
-        bool done = !blk_mq_end_io_partial(rq, error, blk_rq_bytes(rq));
-        BUG_ON(!done);
-}
+void blk_mq_end_io(struct request *rq, int error);
+void __blk_mq_end_io(struct request *rq, int error);
 
+void blk_mq_requeue_request(struct request *rq);
+void blk_mq_add_to_requeue_list(struct request *rq, bool at_head);
+void blk_mq_kick_requeue_list(struct request_queue *q);
 void blk_mq_complete_request(struct request *rq);
 
 void blk_mq_stop_hw_queue(struct blk_mq_hw_ctx *hctx);
 void blk_mq_start_hw_queue(struct blk_mq_hw_ctx *hctx);
 void blk_mq_stop_hw_queues(struct request_queue *q);
-void blk_mq_start_stopped_hw_queues(struct request_queue *q);
+void blk_mq_start_hw_queues(struct request_queue *q);
+void blk_mq_start_stopped_hw_queues(struct request_queue *q, bool async);
+void blk_mq_delay_queue(struct blk_mq_hw_ctx *hctx, unsigned long msecs);
+void blk_mq_tag_busy_iter(struct blk_mq_tags *tags, void (*fn)(void *data, unsigned long *), void *data);
 
 /*
  * Driver command data is immediately after the request. So subtract request
@@ -162,12 +189,6 @@ static inline void *blk_mq_rq_to_pdu(struct request *rq)
         return (void *) rq + sizeof(*rq);
 }
 
-static inline struct request *blk_mq_tag_to_rq(struct blk_mq_hw_ctx *hctx,
-                                               unsigned int tag)
-{
-        return hctx->rqs[tag];
-}
-
 #define queue_for_each_hw_ctx(q, hctx, i)                               \
         for ((i) = 0; (i) < (q)->nr_hw_queues &&                        \
              ({ hctx = (q)->queue_hw_ctx[i]; 1; }); (i)++)
diff --git a/include/linux/blk_types.h b/include/linux/blk_types.h
index aa0eaa2d0bd8..d8e4cea23a25 100644
--- a/include/linux/blk_types.h
+++ b/include/linux/blk_types.h
@@ -190,6 +190,7 @@ enum rq_flag_bits {
         __REQ_PM,               /* runtime pm request */
         __REQ_END,              /* last of chain of requests */
         __REQ_HASHED,           /* on IO scheduler merge hash */
+        __REQ_MQ_INFLIGHT,      /* track inflight for MQ */
         __REQ_NR_BITS,          /* stops here */
 };
 
@@ -243,5 +244,6 @@ enum rq_flag_bits {
 #define REQ_PM                  (1ULL << __REQ_PM)
 #define REQ_END                 (1ULL << __REQ_END)
 #define REQ_HASHED              (1ULL << __REQ_HASHED)
+#define REQ_MQ_INFLIGHT         (1ULL << __REQ_MQ_INFLIGHT)
 
 #endif /* __LINUX_BLK_TYPES_H */
diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h
index 0d84981ee03f..3cd426e971db 100644
--- a/include/linux/blkdev.h
+++ b/include/linux/blkdev.h
@@ -90,15 +90,15 @@ enum rq_cmd_type_bits {
 #define BLK_MAX_CDB     16
 
 /*
- * try to put the fields that are referenced together in the same cacheline.
- * if you modify this structure, be sure to check block/blk-core.c:blk_rq_init()
- * as well!
+ * Try to put the fields that are referenced together in the same cacheline.
+ *
+ * If you modify this structure, make sure to update blk_rq_init() and
+ * especially blk_mq_rq_ctx_init() to take care of the added fields.
  */
 struct request {
         struct list_head queuelist;
         union {
                 struct call_single_data csd;
-                struct work_struct mq_flush_work;
                 unsigned long fifo_time;
         };
 
@@ -178,7 +178,6 @@ struct request {
         unsigned short ioprio;
 
         void *special;          /* opaque pointer available for LLD use */
-        char *buffer;           /* kaddr of the current segment if available */
 
         int tag;
         int errors;
@@ -336,7 +335,7 @@ struct request_queue {
         unsigned int            *mq_map;
 
         /* sw queues */
-        struct blk_mq_ctx       *queue_ctx;
+        struct blk_mq_ctx __percpu      *queue_ctx;
         unsigned int            nr_queues;
 
         /* hw dispatch queues */
@@ -463,6 +462,10 @@ struct request_queue {
         struct request          *flush_rq;
         spinlock_t              mq_flush_lock;
 
+        struct list_head        requeue_list;
+        spinlock_t              requeue_lock;
+        struct work_struct      requeue_work;
+
         struct mutex            sysfs_lock;
 
         int                     bypass_depth;
@@ -481,6 +484,9 @@ struct request_queue {
         wait_queue_head_t       mq_freeze_wq;
         struct percpu_counter   mq_usage_counter;
         struct list_head        all_q_node;
+
+        struct blk_mq_tag_set   *tag_set;
+        struct list_head        tag_set_list;
 };
 
 #define QUEUE_FLAG_QUEUED       1       /* uses generic tag queueing */
@@ -504,6 +510,7 @@ struct request_queue {
 #define QUEUE_FLAG_SAME_FORCE  18       /* force complete on same CPU */
 #define QUEUE_FLAG_DEAD        19       /* queue tear-down finished */
 #define QUEUE_FLAG_INIT_DONE   20       /* queue is initialized */
+#define QUEUE_FLAG_NO_SG_MERGE 21       /* don't attempt to merge SG segments*/
 
 #define QUEUE_FLAG_DEFAULT      ((1 << QUEUE_FLAG_IO_STAT) |            \
                                  (1 << QUEUE_FLAG_STACKABLE)    |       \
@@ -613,6 +620,15 @@ static inline void queue_flag_clear(unsigned int flag, struct request_queue *q)
 
 #define rq_data_dir(rq)         (((rq)->cmd_flags & 1) != 0)
 
+/*
+ * Driver can handle struct request, if it either has an old style
+ * request_fn defined, or is blk-mq based.
+ */
+static inline bool queue_is_rq_based(struct request_queue *q)
+{
+        return q->request_fn || q->mq_ops;
+}
+
 static inline unsigned int blk_queue_cluster(struct request_queue *q)
 {
         return q->limits.cluster;
@@ -937,6 +953,7 @@ extern struct request *blk_fetch_request(struct request_queue *q);
  */
 extern bool blk_update_request(struct request *rq, int error,
                                unsigned int nr_bytes);
+extern void blk_finish_request(struct request *rq, int error);
 extern bool blk_end_request(struct request *rq, int error,
                             unsigned int nr_bytes);
 extern void blk_end_request_all(struct request *rq, int error);
@@ -1053,7 +1070,6 @@ static inline void blk_post_runtime_resume(struct request_queue *q, int err) {}
  * schedule() where blk_schedule_flush_plug() is called.
  */
 struct blk_plug {
-        unsigned long magic; /* detect uninitialized use-cases */
         struct list_head list; /* requests */
         struct list_head mq_list; /* blk-mq requests */
         struct list_head cb_list; /* md requires an unplug callback */
@@ -1102,7 +1118,8 @@ static inline bool blk_needs_flush_plug(struct task_struct *tsk)
 /*
  * tag stuff
  */
-#define blk_rq_tagged(rq)               ((rq)->cmd_flags & REQ_QUEUED)
+#define blk_rq_tagged(rq) \
+        ((rq)->mq_ctx || ((rq)->cmd_flags & REQ_QUEUED))
 extern int blk_queue_start_tag(struct request_queue *, struct request *);
 extern struct request *blk_queue_find_tag(struct request_queue *, int);
 extern void blk_queue_end_tag(struct request_queue *, struct request *);
@@ -1370,8 +1387,9 @@ static inline void put_dev_sector(Sector p)
 }
 
 struct work_struct;
-int kblockd_schedule_work(struct request_queue *q, struct work_struct *work);
-int kblockd_schedule_delayed_work(struct request_queue *q, struct delayed_work *dwork, unsigned long delay);
+int kblockd_schedule_work(struct work_struct *work);
+int kblockd_schedule_delayed_work(struct delayed_work *dwork, unsigned long delay);
+int kblockd_schedule_delayed_work_on(int cpu, struct delayed_work *dwork, unsigned long delay);
 
 #ifdef CONFIG_BLK_CGROUP
 /*
@@ -1570,6 +1588,7 @@ static inline bool blk_integrity_is_initialized(struct gendisk *g)
 struct block_device_operations {
         int (*open) (struct block_device *, fmode_t);
         void (*release) (struct gendisk *, fmode_t);
+        int (*rw_page)(struct block_device *, sector_t, struct page *, int rw);
         int (*ioctl) (struct block_device *, fmode_t, unsigned, unsigned long);
         int (*compat_ioctl) (struct block_device *, fmode_t, unsigned, unsigned long);
         int (*direct_access) (struct block_device *, sector_t,
@@ -1588,7 +1607,13 @@ struct block_device_operations {
 
 extern int __blkdev_driver_ioctl(struct block_device *, fmode_t, unsigned int,
                                  unsigned long);
+extern int bdev_read_page(struct block_device *, sector_t, struct page *);
+extern int bdev_write_page(struct block_device *, sector_t, struct page *,
+                                                struct writeback_control *);
 #else /* CONFIG_BLOCK */
+
+struct block_device;
+
 /*
  * stubs for when the block layer is configured out
  */
@@ -1624,6 +1649,12 @@ static inline bool blk_needs_flush_plug(struct task_struct *tsk)
         return false;
 }
 
+static inline int blkdev_issue_flush(struct block_device *bdev, gfp_t gfp_mask,
+                                     sector_t *error_sector)
+{
+        return 0;
+}
+
 #endif /* CONFIG_BLOCK */
 
 #endif
diff --git a/include/linux/bootmem.h b/include/linux/bootmem.h
index db51fe4fe317..4e2bd4c95b66 100644
--- a/include/linux/bootmem.h
+++ b/include/linux/bootmem.h
@@ -58,9 +58,9 @@ extern void free_bootmem_late(unsigned long physaddr, unsigned long size);
  * Flags for reserve_bootmem (also if CONFIG_HAVE_ARCH_BOOTMEM_NODE,
  * the architecture-specific code should honor this).
  *
- * If flags is 0, then the return value is always 0 (success). If
- * flags contains BOOTMEM_EXCLUSIVE, then -EBUSY is returned if the
- * memory already was reserved.
+ * If flags is BOOTMEM_DEFAULT, then the return value is always 0 (success).
+ * If flags contains BOOTMEM_EXCLUSIVE, then -EBUSY is returned if the memory
+ * already was reserved.
  */
 #define BOOTMEM_DEFAULT         0
 #define BOOTMEM_EXCLUSIVE       (1<<0)
diff --git a/include/linux/buffer_head.h b/include/linux/buffer_head.h
index c40302f909ce..324329ceea1e 100644
--- a/include/linux/buffer_head.h
+++ b/include/linux/buffer_head.h
@@ -207,8 +207,6 @@ void block_invalidatepage(struct page *page, unsigned int offset,
                           unsigned int length);
 int block_write_full_page(struct page *page, get_block_t *get_block,
                                 struct writeback_control *wbc);
-int block_write_full_page_endio(struct page *page, get_block_t *get_block,
-                        struct writeback_control *wbc, bh_end_io_t *handler);
 int block_read_full_page(struct page*, get_block_t*);
 int block_is_partially_uptodate(struct page *page, unsigned long from,
                                 unsigned long count);
@@ -278,7 +276,7 @@ static inline void get_bh(struct buffer_head *bh)
 
 static inline void put_bh(struct buffer_head *bh)
 {
-        smp_mb__before_atomic_dec();
+        smp_mb__before_atomic();
         atomic_dec(&bh->b_count);
 }
 
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 511917416fb0..0c287dbbb144 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -40,14 +40,14 @@ struct dentry;
  * through the clk_* api.
  *
  * @prepare:    Prepare the clock for enabling. This must not return until
- *              the clock is fully prepared, and it's safe to call clk_enable.
- *              This callback is intended to allow clock implementations to
- *              do any initialisation that may sleep. Called with
- *              prepare_lock held.
+ *              the clock is fully prepared, and it's safe to call clk_enable.
+ *              This callback is intended to allow clock implementations to
+ *              do any initialisation that may sleep. Called with
+ *              prepare_lock held.
  *
  * @unprepare:  Release the clock from its prepared state. This will typically
- *              undo any work done in the @prepare callback. Called with
- *              prepare_lock held.
+ *              undo any work done in the @prepare callback. Called with
+ *              prepare_lock held.
  *
  * @is_prepared: Queries the hardware to determine if the clock is prepared.
  *              This function is allowed to sleep. Optional, if this op is not
@@ -58,16 +58,16 @@ struct dentry;
  *              Called with prepare mutex held. This function may sleep.
  *
  * @enable:     Enable the clock atomically. This must not return until the
- *              clock is generating a valid clock signal, usable by consumer
- *              devices. Called with enable_lock held. This function must not
- *              sleep.
+ *              clock is generating a valid clock signal, usable by consumer
+ *              devices. Called with enable_lock held. This function must not
+ *              sleep.
  *
  * @disable:    Disable the clock atomically. Called with enable_lock held.
- *              This function must not sleep.
+ *              This function must not sleep.
  *
  * @is_enabled: Queries the hardware to determine if the clock is enabled.
- *              This function must not sleep. Optional, if this op is not
- *              set then the enable count will be used.
+ *              This function must not sleep. Optional, if this op is not
+ *              set then the enable count will be used.
  *
  * @disable_unused: Disable the clock atomically.  Only called from
  *              clk_disable_unused for gate clocks with special needs.
@@ -75,34 +75,35 @@ struct dentry;
  *              sleep.
  *
  * @recalc_rate Recalculate the rate of this clock, by querying hardware. The
- *              parent rate is an input parameter.  It is up to the caller to
- *              ensure that the prepare_mutex is held across this call.
- *              Returns the calculated rate.  Optional, but recommended - if
- *              this op is not set then clock rate will be initialized to 0.
+ *              parent rate is an input parameter.  It is up to the caller to
+ *              ensure that the prepare_mutex is held across this call.
+ *              Returns the calculated rate.  Optional, but recommended - if
+ *              this op is not set then clock rate will be initialized to 0.
  *
  * @round_rate: Given a target rate as input, returns the closest rate actually
- *              supported by the clock.
+ *              supported by the clock. The parent rate is an input/output
+ *              parameter.
  *
  * @determine_rate: Given a target rate as input, returns the closest rate
  *              actually supported by the clock, and optionally the parent clock
  *              that should be used to provide the clock rate.
  *
- * @get_parent: Queries the hardware to determine the parent of a clock.  The
- *              return value is a u8 which specifies the index corresponding to
- *              the parent clock.  This index can be applied to either the
- *              .parent_names or .parents arrays.  In short, this function
- *              translates the parent value read from hardware into an array
- *              index.  Currently only called when the clock is initialized by
- *              __clk_init.  This callback is mandatory for clocks with
- *              multiple parents.  It is optional (and unnecessary) for clocks
- *              with 0 or 1 parents.
- *
  * @set_parent: Change the input source of this clock; for clocks with multiple
- *              possible parents specify a new parent by passing in the index
- *              as a u8 corresponding to the parent in either the .parent_names
- *              or .parents arrays.  This function in affect translates an
- *              array index into the value programmed into the hardware.
- *              Returns 0 on success, -EERROR otherwise.
+ *              possible parents specify a new parent by passing in the index
+ *              as a u8 corresponding to the parent in either the .parent_names
+ *              or .parents arrays.  This function in affect translates an
+ *              array index into the value programmed into the hardware.
+ *              Returns 0 on success, -EERROR otherwise.
+ *
+ * @get_parent: Queries the hardware to determine the parent of a clock.  The
+ *              return value is a u8 which specifies the index corresponding to
+ *              the parent clock.  This index can be applied to either the
+ *              .parent_names or .parents arrays.  In short, this function
+ *              translates the parent value read from hardware into an array
+ *              index.  Currently only called when the clock is initialized by
+ *              __clk_init.  This callback is mandatory for clocks with
+ *              multiple parents.  It is optional (and unnecessary) for clocks
+ *              with 0 or 1 parents.
  *
  * @set_rate:   Change the rate of this clock. The requested rate is specified
  *              by the second argument, which should typically be the return
@@ -110,13 +111,6 @@ struct dentry;
  *              which is likely helpful for most .set_rate implementation.
  *              Returns 0 on success, -EERROR otherwise.
  *
- * @recalc_accuracy: Recalculate the accuracy of this clock. The clock accuracy
- *              is expressed in ppb (parts per billion). The parent accuracy is
- *              an input parameter.
- *              Returns the calculated accuracy.  Optional - if this op is not
- *              set then clock accuracy will be initialized to parent accuracy
- *              or 0 (perfect clock) if clock has no parent.
- *
  * @set_rate_and_parent: Change the rate and the parent of this clock. The
  *              requested rate is specified by the second argument, which
  *              should typically be the return of .round_rate call.  The
@@ -128,6 +122,18 @@ struct dentry;
  *              separately via calls to .set_parent and .set_rate.
  *              Returns 0 on success, -EERROR otherwise.
  *
+ * @recalc_accuracy: Recalculate the accuracy of this clock. The clock accuracy
+ *              is expressed in ppb (parts per billion). The parent accuracy is
+ *              an input parameter.
+ *              Returns the calculated accuracy.  Optional - if this op is not
+ *              set then clock accuracy will be initialized to parent accuracy
+ *              or 0 (perfect clock) if clock has no parent.
+ *
+ * @init:       Perform platform-specific initialization magic.
+ *              This is not not used by any of the basic clock types.
+ *              Please consider other ways of solving initialization problems
+ *              before using this callback, as its use is discouraged.
+ *
  * @debug_init: Set up type-specific debugfs entries for this clock.  This
  *              is called once, after the debugfs directory entry for this
  *              clock has been created.  The dentry pointer representing that
@@ -157,15 +163,15 @@ struct clk_ops {
         void            (*disable_unused)(struct clk_hw *hw);
         unsigned long   (*recalc_rate)(struct clk_hw *hw,
                                         unsigned long parent_rate);
-        long            (*round_rate)(struct clk_hw *hw, unsigned long,
-                                        unsigned long *);
+        long            (*round_rate)(struct clk_hw *hw, unsigned long rate,
+                                        unsigned long *parent_rate);
         long            (*determine_rate)(struct clk_hw *hw, unsigned long rate,
                                         unsigned long *best_parent_rate,
                                         struct clk **best_parent_clk);
         int             (*set_parent)(struct clk_hw *hw, u8 index);
         u8              (*get_parent)(struct clk_hw *hw);
-        int             (*set_rate)(struct clk_hw *hw, unsigned long,
-                                    unsigned long);
+        int             (*set_rate)(struct clk_hw *hw, unsigned long rate,
+                                    unsigned long parent_rate);
         int             (*set_rate_and_parent)(struct clk_hw *hw,
                                     unsigned long rate,
                                     unsigned long parent_rate, u8 index);
@@ -254,12 +260,12 @@ void of_fixed_clk_setup(struct device_node *np);
  *
  * Flags:
  * CLK_GATE_SET_TO_DISABLE - by default this clock sets the bit at bit_idx to
- *      enable the clock.  Setting this flag does the opposite: setting the bit
- *      disable the clock and clearing it enables the clock
+ *      enable the clock.  Setting this flag does the opposite: setting the bit
+ *      disable the clock and clearing it enables the clock
  * CLK_GATE_HIWORD_MASK - The gate settings are only in lower 16-bit
- *   of this register, and mask of gate bits are in higher 16-bit of this
- *   register.  While setting the gate bits, higher 16-bit should also be
- *   updated to indicate changing gate bits.
+ *      of this register, and mask of gate bits are in higher 16-bit of this
+ *      register.  While setting the gate bits, higher 16-bit should also be
+ *      updated to indicate changing gate bits.
  */
 struct clk_gate {
         struct clk_hw hw;
@@ -298,20 +304,24 @@ struct clk_div_table {
  *
  * Flags:
  * CLK_DIVIDER_ONE_BASED - by default the divisor is the value read from the
- *      register plus one.  If CLK_DIVIDER_ONE_BASED is set then the divider is
- *      the raw value read from the register, with the value of zero considered
+ *      register plus one.  If CLK_DIVIDER_ONE_BASED is set then the divider is
+ *      the raw value read from the register, with the value of zero considered
  *      invalid, unless CLK_DIVIDER_ALLOW_ZERO is set.
  * CLK_DIVIDER_POWER_OF_TWO - clock divisor is 2 raised to the value read from
- *      the hardware register
+ *      the hardware register
  * CLK_DIVIDER_ALLOW_ZERO - Allow zero divisors.  For dividers which have
  *      CLK_DIVIDER_ONE_BASED set, it is possible to end up with a zero divisor.
  *      Some hardware implementations gracefully handle this case and allow a
  *      zero divisor by not modifying their input clock
  *      (divide by one / bypass).
  * CLK_DIVIDER_HIWORD_MASK - The divider settings are only in lower 16-bit
- *   of this register, and mask of divider bits are in higher 16-bit of this
- *   register.  While setting the divider bits, higher 16-bit should also be
- *   updated to indicate changing divider bits.
+ *      of this register, and mask of divider bits are in higher 16-bit of this
+ *      register.  While setting the divider bits, higher 16-bit should also be
+ *      updated to indicate changing divider bits.
+ * CLK_DIVIDER_ROUND_CLOSEST - Makes the best calculated divider to be rounded
+ *      to the closest integer instead of the up one.
+ * CLK_DIVIDER_READ_ONLY - The divider settings are preconfigured and should
+ *      not be changed by the clock framework.
  */
 struct clk_divider {
         struct clk_hw   hw;
@@ -327,8 +337,11 @@ struct clk_divider {
 #define CLK_DIVIDER_POWER_OF_TWO        BIT(1)
 #define CLK_DIVIDER_ALLOW_ZERO          BIT(2)
 #define CLK_DIVIDER_HIWORD_MASK         BIT(3)
+#define CLK_DIVIDER_ROUND_CLOSEST       BIT(4)
+#define CLK_DIVIDER_READ_ONLY           BIT(5)
 
 extern const struct clk_ops clk_divider_ops;
+extern const struct clk_ops clk_divider_ro_ops;
 struct clk *clk_register_divider(struct device *dev, const char *name,
                 const char *parent_name, unsigned long flags,
                 void __iomem *reg, u8 shift, u8 width,
@@ -356,9 +369,9 @@ struct clk *clk_register_divider_table(struct device *dev, const char *name,
  * CLK_MUX_INDEX_ONE - register index starts at 1, not 0
  * CLK_MUX_INDEX_BIT - register index is a single bit (power of two)
  * CLK_MUX_HIWORD_MASK - The mux settings are only in lower 16-bit of this
- *   register, and mask of mux bits are in higher 16-bit of this register.
- *   While setting the mux bits, higher 16-bit should also be updated to
- *   indicate changing mux bits.
+ *      register, and mask of mux bits are in higher 16-bit of this register.
+ *      While setting the mux bits, higher 16-bit should also be updated to
+ *      indicate changing mux bits.
  */
 struct clk_mux {
         struct clk_hw   hw;
@@ -413,6 +426,37 @@ struct clk *clk_register_fixed_factor(struct device *dev, const char *name,
                 const char *parent_name, unsigned long flags,
                 unsigned int mult, unsigned int div);
 
+/**
+ * struct clk_fractional_divider - adjustable fractional divider clock
+ *
+ * @hw:         handle between common and hardware-specific interfaces
+ * @reg:        register containing the divider
+ * @mshift:     shift to the numerator bit field
+ * @mwidth:     width of the numerator bit field
+ * @nshift:     shift to the denominator bit field
+ * @nwidth:     width of the denominator bit field
+ * @lock:       register lock
+ *
+ * Clock with adjustable fractional divider affecting its output frequency.
+ */
+
+struct clk_fractional_divider {
+        struct clk_hw   hw;
+        void __iomem    *reg;
+        u8              mshift;
+        u32             mmask;
+        u8              nshift;
+        u32             nmask;
+        u8              flags;
+        spinlock_t      *lock;
+};
+
+extern const struct clk_ops clk_fractional_divider_ops;
+struct clk *clk_register_fractional_divider(struct device *dev,
+                const char *name, const char *parent_name, unsigned long flags,
+                void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nwidth,
+                u8 clk_divider_flags, spinlock_t *lock);
+
 /***
  * struct clk_composite - aggregate clock of mux, divider and gate clocks
  *
@@ -498,10 +542,7 @@ struct clk_onecell_data {
 
 extern struct of_device_id __clk_of_table;
 
-#define CLK_OF_DECLARE(name, compat, fn)                        \
-        static const struct of_device_id __clk_of_table_##name  \
-                __used __section(__clk_of_table)                \
-                = { .compatible = compat, .data = fn };
+#define CLK_OF_DECLARE(name, compat, fn) OF_DECLARE_1(clk, name, compat, fn)
 
 #ifdef CONFIG_OF
 int of_clk_add_provider(struct device_node *np,
diff --git a/include/linux/clk/at91_pmc.h b/include/linux/clk/at91_pmc.h
index a6911ebbd02a..de4268d4987a 100644
--- a/include/linux/clk/at91_pmc.h
+++ b/include/linux/clk/at91_pmc.h
@@ -155,6 +155,7 @@ extern void __iomem *at91_pmc_base;
 #define         AT91_PMC_LOCKB          (1 <<  2)               /* PLLB Lock */
 #define         AT91_PMC_MCKRDY         (1 <<  3)               /* Master Clock */
 #define         AT91_PMC_LOCKU          (1 <<  6)               /* UPLL Lock [some SAM9] */
+#define         AT91_PMC_OSCSEL         (1 <<  7)               /* Slow Oscillator Selection [some SAM9] */
 #define         AT91_PMC_PCK0RDY        (1 <<  8)               /* Programmable Clock 0 */
 #define         AT91_PMC_PCK1RDY        (1 <<  9)               /* Programmable Clock 1 */
 #define         AT91_PMC_PCK2RDY        (1 << 10)               /* Programmable Clock 2 */
diff --git a/include/linux/clk/shmobile.h b/include/linux/clk/shmobile.h
index f9bf080a1123..9f8a14041dd5 100644
--- a/include/linux/clk/shmobile.h
+++ b/include/linux/clk/shmobile.h
@@ -1,7 +1,9 @@
 /*
  * Copyright 2013 Ideas On Board SPRL
+ * Copyright 2013, 2014 Horms Solutions Ltd.
  *
  * Contact: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+ * Contact: Simon Horman <horms@verge.net.au>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -14,6 +16,7 @@
 
 #include <linux/types.h>
 
+void r8a7779_clocks_init(u32 mode);
 void rcar_gen2_clocks_init(u32 mode);
 
 #endif
diff --git a/include/linux/clk/sunxi.h b/include/linux/clk/sunxi.h
new file mode 100644
index 000000000000..aed28c4451d9
--- /dev/null
+++ b/include/linux/clk/sunxi.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright 2013 - Hans de Goede <hdegoede@redhat.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __LINUX_CLK_SUNXI_H_
+#define __LINUX_CLK_SUNXI_H_
+
+#include <linux/clk.h>
+
+void clk_sunxi_mmc_phase_control(struct clk *clk, u8 sample, u8 output);
+
+#endif
diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h
index 67301a405712..a16b497d5159 100644
--- a/include/linux/clocksource.h
+++ b/include/linux/clocksource.h
@@ -339,23 +339,13 @@ extern int clocksource_mmio_init(void __iomem *, const char *,
 
 extern int clocksource_i8253_init(void);
 
-struct device_node;
-typedef void(*clocksource_of_init_fn)(struct device_node *);
+#define CLOCKSOURCE_OF_DECLARE(name, compat, fn) \
+        OF_DECLARE_1(clksrc, name, compat, fn)
+
 #ifdef CONFIG_CLKSRC_OF
 extern void clocksource_of_init(void);
-
-#define CLOCKSOURCE_OF_DECLARE(name, compat, fn)                        \
-        static const struct of_device_id __clksrc_of_table_##name       \
-                __used __section(__clksrc_of_table)                     \
-                 = { .compatible = compat,                              \
-                     .data = (fn == (clocksource_of_init_fn)NULL) ? fn : fn }
 #else
 static inline void clocksource_of_init(void) {}
-#define CLOCKSOURCE_OF_DECLARE(name, compat, fn)                        \
-        static const struct of_device_id __clksrc_of_table_##name       \
-                __attribute__((unused))                                 \
-                 = { .compatible = compat,                              \
-                     .data = (fn == (clocksource_of_init_fn)NULL) ? fn : fn }
 #endif
 
 #endif /* _LINUX_CLOCKSOURCE_H */
diff --git a/include/linux/compaction.h b/include/linux/compaction.h
index 7e1c76e3cd68..01e3132820da 100644
--- a/include/linux/compaction.h
+++ b/include/linux/compaction.h
@@ -22,7 +22,7 @@ extern int sysctl_extfrag_handler(struct ctl_table *table, int write,
 extern int fragmentation_index(struct zone *zone, unsigned int order);
 extern unsigned long try_to_compact_pages(struct zonelist *zonelist,
                         int order, gfp_t gfp_mask, nodemask_t *mask,
-                        bool sync, bool *contended);
+                        enum migrate_mode mode, bool *contended);
 extern void compact_pgdat(pg_data_t *pgdat, int order);
 extern void reset_isolation_suitable(pg_data_t *pgdat);
 extern unsigned long compaction_suitable(struct zone *zone, int order);
@@ -91,7 +91,7 @@ static inline bool compaction_restarting(struct zone *zone, int order)
 #else
 static inline unsigned long try_to_compact_pages(struct zonelist *zonelist,
                         int order, gfp_t gfp_mask, nodemask_t *nodemask,
-                        bool sync, bool *contended)
+                        enum migrate_mode mode, bool *contended)
 {
         return COMPACT_CONTINUE;
 }
diff --git a/include/linux/compiler-intel.h b/include/linux/compiler-intel.h
index 5529c5239421..ba147a1727e6 100644
--- a/include/linux/compiler-intel.h
+++ b/include/linux/compiler-intel.h
@@ -13,12 +13,9 @@
 /* Intel ECC compiler doesn't support gcc specific asm stmts.
  * It uses intrinsics to do the equivalent things.
  */
-#undef barrier
 #undef RELOC_HIDE
 #undef OPTIMIZER_HIDE_VAR
 
-#define barrier() __memory_barrier()
-
 #define RELOC_HIDE(ptr, off)                                    \
   ({ unsigned long __ptr;                                       \
      __ptr = (unsigned long) (ptr);                             \
diff --git a/include/linux/compiler.h b/include/linux/compiler.h
index ee7239ea1583..64fdfe1cfcf0 100644
--- a/include/linux/compiler.h
+++ b/include/linux/compiler.h
@@ -323,9 +323,18 @@ void ftrace_likely_update(struct ftrace_branch_data *f, int val, int expect);
 #endif
 #ifndef __compiletime_error
 # define __compiletime_error(message)
-# define __compiletime_error_fallback(condition) \
+/*
+ * Sparse complains of variable sized arrays due to the temporary variable in
+ * __compiletime_assert. Unfortunately we can't just expand it out to make
+ * sparse see a constant array size without breaking compiletime_assert on old
+ * versions of GCC (e.g. 4.2.4), so hide the array from sparse altogether.
+ */
+# ifndef __CHECKER__
+#  define __compiletime_error_fallback(condition) \
         do { ((void)sizeof(char[1 - 2 * condition])); } while (0)
-#else
+# endif
+#endif
+#ifndef __compiletime_error_fallback
 # define __compiletime_error_fallback(condition) do { } while (0)
 #endif
 
diff --git a/include/linux/connector.h b/include/linux/connector.h
index be9c4747d511..f8fe8637d771 100644
--- a/include/linux/connector.h
+++ b/include/linux/connector.h
@@ -71,6 +71,7 @@ struct cn_dev {
 int cn_add_callback(struct cb_id *id, const char *name,
                     void (*callback)(struct cn_msg *, struct netlink_skb_parms *));
 void cn_del_callback(struct cb_id *);
+int cn_netlink_send_mult(struct cn_msg *msg, u16 len, u32 portid, u32 group, gfp_t gfp_mask);
 int cn_netlink_send(struct cn_msg *msg, u32 portid, u32 group, gfp_t gfp_mask);
 
 int cn_queue_add_callback(struct cn_queue_dev *dev, const char *name,
diff --git a/include/linux/console_struct.h b/include/linux/console_struct.h
index 7f0c32908568..e859c98d1767 100644
--- a/include/linux/console_struct.h
+++ b/include/linux/console_struct.h
@@ -17,6 +17,7 @@
 #include <linux/workqueue.h>
 
 struct vt_struct;
+struct uni_pagedir;
 
 #define NPAR 16
 
@@ -104,8 +105,8 @@ struct vc_data {
         unsigned int    vc_bell_pitch;          /* Console bell pitch */
         unsigned int    vc_bell_duration;       /* Console bell duration */
         struct vc_data **vc_display_fg;         /* [!] Ptr to var holding fg console for this display */
-        unsigned long   vc_uni_pagedir;
-        unsigned long   *vc_uni_pagedir_loc;  /* [!] Location of uni_pagedir variable for this console */
+        struct uni_pagedir *vc_uni_pagedir;
+        struct uni_pagedir **vc_uni_pagedir_loc; /* [!] Location of uni_pagedir variable for this console */
         bool vc_panic_force_write; /* when oops/panic this VC can accept forced output/blanking */
         /* additional information is in vt_kern.h */
 };
diff --git a/include/linux/cpu.h b/include/linux/cpu.h
index 81887120395c..95978ad7fcdd 100644
--- a/include/linux/cpu.h
+++ b/include/linux/cpu.h
@@ -256,7 +256,6 @@ enum cpuhp_state {
 };
 
 void cpu_startup_entry(enum cpuhp_state state);
-void cpu_idle(void);
 
 void cpu_idle_poll_ctrl(bool enable);
 
diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h
index 5ae5100c1f24..3f458896d45c 100644
--- a/include/linux/cpufreq.h
+++ b/include/linux/cpufreq.h
@@ -110,6 +110,7 @@ struct cpufreq_policy {
         bool                    transition_ongoing; /* Tracks transition status */
         spinlock_t              transition_lock;
         wait_queue_head_t       transition_wait;
+        struct task_struct      *transition_task; /* Task which is doing the transition */
 };
 
 /* Only for ACPI */
@@ -468,6 +469,55 @@ struct cpufreq_frequency_table {
                                     * order */
 };
 
+#if defined(CONFIG_CPU_FREQ) && defined(CONFIG_PM_OPP)
+int dev_pm_opp_init_cpufreq_table(struct device *dev,
+                                  struct cpufreq_frequency_table **table);
+void dev_pm_opp_free_cpufreq_table(struct device *dev,
+                                   struct cpufreq_frequency_table **table);
+#else
+static inline int dev_pm_opp_init_cpufreq_table(struct device *dev,
+                                                struct cpufreq_frequency_table
+                                                **table)
+{
+        return -EINVAL;
+}
+
+static inline void dev_pm_opp_free_cpufreq_table(struct device *dev,
+                                                 struct cpufreq_frequency_table
+                                                 **table)
+{
+}
+#endif
+
+static inline bool cpufreq_next_valid(struct cpufreq_frequency_table **pos)
+{
+        while ((*pos)->frequency != CPUFREQ_TABLE_END)
+                if ((*pos)->frequency != CPUFREQ_ENTRY_INVALID)
+                        return true;
+                else
+                        (*pos)++;
+        return false;
+}
+
+/*
+ * cpufreq_for_each_entry -     iterate over a cpufreq_frequency_table
+ * @pos:        the cpufreq_frequency_table * to use as a loop cursor.
+ * @table:      the cpufreq_frequency_table * to iterate over.
+ */
+
+#define cpufreq_for_each_entry(pos, table)      \
+        for (pos = table; pos->frequency != CPUFREQ_TABLE_END; pos++)
+
+/*
+ * cpufreq_for_each_valid_entry -     iterate over a cpufreq_frequency_table
+ *      excluding CPUFREQ_ENTRY_INVALID frequencies.
+ * @pos:        the cpufreq_frequency_table * to use as a loop cursor.
+ * @table:      the cpufreq_frequency_table * to iterate over.
+ */
+
+#define cpufreq_for_each_valid_entry(pos, table)        \
+        for (pos = table; cpufreq_next_valid(&pos); pos++)
+
 int cpufreq_frequency_table_cpuinfo(struct cpufreq_policy *policy,
                                     struct cpufreq_frequency_table *table);
 
diff --git a/include/linux/cpuidle.h b/include/linux/cpuidle.h
index b0238cba440b..c51a436135c4 100644
--- a/include/linux/cpuidle.h
+++ b/include/linux/cpuidle.h
@@ -120,8 +120,6 @@ struct cpuidle_driver {
 #ifdef CONFIG_CPU_IDLE
 extern void disable_cpuidle(void);
 
-extern int cpuidle_enabled(struct cpuidle_driver *drv,
-                          struct cpuidle_device *dev);
 extern int cpuidle_select(struct cpuidle_driver *drv,
                           struct cpuidle_device *dev);
 extern int cpuidle_enter(struct cpuidle_driver *drv,
@@ -145,13 +143,11 @@ extern void cpuidle_resume(void);
 extern int cpuidle_enable_device(struct cpuidle_device *dev);
 extern void cpuidle_disable_device(struct cpuidle_device *dev);
 extern int cpuidle_play_dead(void);
+extern void cpuidle_use_deepest_state(bool enable);
 
 extern struct cpuidle_driver *cpuidle_get_cpu_driver(struct cpuidle_device *dev);
 #else
 static inline void disable_cpuidle(void) { }
-static inline int cpuidle_enabled(struct cpuidle_driver *drv,
-                                  struct cpuidle_device *dev)
-{return -ENODEV; }
 static inline int cpuidle_select(struct cpuidle_driver *drv,
                                  struct cpuidle_device *dev)
 {return -ENODEV; }
@@ -180,6 +176,7 @@ static inline int cpuidle_enable_device(struct cpuidle_device *dev)
 {return -ENODEV; }
 static inline void cpuidle_disable_device(struct cpuidle_device *dev) { }
 static inline int cpuidle_play_dead(void) {return -ENODEV; }
+static inline void cpuidle_use_deepest_state(bool enable) {}
 static inline struct cpuidle_driver *cpuidle_get_cpu_driver(
         struct cpuidle_device *dev) {return NULL; }
 #endif
diff --git a/include/linux/cpuset.h b/include/linux/cpuset.h
index b19d3dc2e651..ade2390ffe92 100644
--- a/include/linux/cpuset.h
+++ b/include/linux/cpuset.h
@@ -12,10 +12,31 @@
 #include <linux/cpumask.h>
 #include <linux/nodemask.h>
 #include <linux/mm.h>
+#include <linux/jump_label.h>
 
 #ifdef CONFIG_CPUSETS
 
-extern int number_of_cpusets;   /* How many cpusets are defined in system? */
+extern struct static_key cpusets_enabled_key;
+static inline bool cpusets_enabled(void)
+{
+        return static_key_false(&cpusets_enabled_key);
+}
+
+static inline int nr_cpusets(void)
+{
+        /* jump label reference count + the top-level cpuset */
+        return static_key_count(&cpusets_enabled_key) + 1;
+}
+
+static inline void cpuset_inc(void)
+{
+        static_key_slow_inc(&cpusets_enabled_key);
+}
+
+static inline void cpuset_dec(void)
+{
+        static_key_slow_dec(&cpusets_enabled_key);
+}
 
 extern int cpuset_init(void);
 extern void cpuset_init_smp(void);
@@ -32,13 +53,13 @@ extern int __cpuset_node_allowed_hardwall(int node, gfp_t gfp_mask);
 
 static inline int cpuset_node_allowed_softwall(int node, gfp_t gfp_mask)
 {
-        return number_of_cpusets <= 1 ||
+        return nr_cpusets() <= 1 ||
                 __cpuset_node_allowed_softwall(node, gfp_mask);
 }
 
 static inline int cpuset_node_allowed_hardwall(int node, gfp_t gfp_mask)
 {
-        return number_of_cpusets <= 1 ||
+        return nr_cpusets() <= 1 ||
                 __cpuset_node_allowed_hardwall(node, gfp_mask);
 }
 
@@ -124,6 +145,8 @@ static inline void set_mems_allowed(nodemask_t nodemask)
 
 #else /* !CONFIG_CPUSETS */
 
+static inline bool cpusets_enabled(void) { return false; }
+
 static inline int cpuset_init(void) { return 0; }
 static inline void cpuset_init_smp(void) {}
 
diff --git a/include/linux/devfreq.h b/include/linux/devfreq.h
index d48dc00232a4..f1863dcd83ea 100644
--- a/include/linux/devfreq.h
+++ b/include/linux/devfreq.h
@@ -181,6 +181,12 @@ extern struct devfreq *devfreq_add_device(struct device *dev,
                                   const char *governor_name,
                                   void *data);
 extern int devfreq_remove_device(struct devfreq *devfreq);
+extern struct devfreq *devm_devfreq_add_device(struct device *dev,
+                                  struct devfreq_dev_profile *profile,
+                                  const char *governor_name,
+                                  void *data);
+extern void devm_devfreq_remove_device(struct device *dev,
+                                  struct devfreq *devfreq);
 
 /* Supposed to be called by PM_SLEEP/PM_RUNTIME callbacks */
 extern int devfreq_suspend_device(struct devfreq *devfreq);
@@ -193,6 +199,10 @@ extern int devfreq_register_opp_notifier(struct device *dev,
                                          struct devfreq *devfreq);
 extern int devfreq_unregister_opp_notifier(struct device *dev,
                                            struct devfreq *devfreq);
+extern int devm_devfreq_register_opp_notifier(struct device *dev,
+                                              struct devfreq *devfreq);
+extern void devm_devfreq_unregister_opp_notifier(struct device *dev,
+                                                struct devfreq *devfreq);
 
 #if IS_ENABLED(CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND)
 /**
@@ -220,7 +230,7 @@ static inline struct devfreq *devfreq_add_device(struct device *dev,
                                           const char *governor_name,
                                           void *data)
 {
-        return NULL;
+        return ERR_PTR(-ENOSYS);
 }
 
 static inline int devfreq_remove_device(struct devfreq *devfreq)
@@ -228,6 +238,19 @@ static inline int devfreq_remove_device(struct devfreq *devfreq)
         return 0;
 }
 
+static inline struct devfreq *devm_devfreq_add_device(struct device *dev,
+                                        struct devfreq_dev_profile *profile,
+                                        const char *governor_name,
+                                        void *data)
+{
+        return ERR_PTR(-ENOSYS);
+}
+
+static inline void devm_devfreq_remove_device(struct device *dev,
+                                        struct devfreq *devfreq)
+{
+}
+
 static inline int devfreq_suspend_device(struct devfreq *devfreq)
 {
         return 0;
@@ -256,6 +279,16 @@ static inline int devfreq_unregister_opp_notifier(struct device *dev,
         return -EINVAL;
 }
 
+static inline int devm_devfreq_register_opp_notifier(struct device *dev,
+                                                     struct devfreq *devfreq)
+{
+        return -EINVAL;
+}
+
+static inline void devm_devfreq_unregister_opp_notifier(struct device *dev,
+                                                        struct devfreq *devfreq)
+{
+}
 #endif /* CONFIG_PM_DEVFREQ */
 
 #endif /* __LINUX_DEVFREQ_H__ */
diff --git a/include/linux/device.h b/include/linux/device.h
index d1d1c055b48e..af424acd393d 100644
--- a/include/linux/device.h
+++ b/include/linux/device.h
@@ -623,6 +623,12 @@ static inline void *devm_kcalloc(struct device *dev,
 }
 extern void devm_kfree(struct device *dev, void *p);
 extern char *devm_kstrdup(struct device *dev, const char *s, gfp_t gfp);
+extern void *devm_kmemdup(struct device *dev, const void *src, size_t len,
+                          gfp_t gfp);
+
+extern unsigned long devm_get_free_pages(struct device *dev,
+                                         gfp_t gfp_mask, unsigned int order);
+extern void devm_free_pages(struct device *dev, unsigned long addr);
 
 void __iomem *devm_ioremap_resource(struct device *dev, struct resource *res);
 void __iomem *devm_request_and_ioremap(struct device *dev,
@@ -673,6 +679,7 @@ struct acpi_dev_node {
  *              variants, which GPIO pins act in what additional roles, and so
  *              on.  This shrinks the "Board Support Packages" (BSPs) and
  *              minimizes board-specific #ifdefs in drivers.
+ * @driver_data: Private pointer for driver specific info.
  * @power:      For device power management.
  *              See Documentation/power/devices.txt for details.
  * @pm_domain:  Provide callbacks that are executed during system suspend,
@@ -685,6 +692,7 @@ struct acpi_dev_node {
  * @coherent_dma_mask: Like dma_mask, but for alloc_coherent mapping as not all
  *              hardware supports 64-bit addresses for consistent allocations
  *              such descriptors.
+ * @dma_pfn_offset: offset of DMA memory range relatively of RAM
  * @dma_parms:  A low level driver may set these to teach IOMMU code about
  *              segment limitations.
  * @dma_pools:  Dma pools (if dma'ble device).
@@ -734,6 +742,8 @@ struct device {
                                            device */
         void            *platform_data; /* Platform specific data, device
                                            core doesn't touch it */
+        void            *driver_data;   /* Driver data, set and get with
+                                           dev_set/get_drvdata */
         struct dev_pm_info      power;
         struct dev_pm_domain    *pm_domain;
 
@@ -750,6 +760,7 @@ struct device {
                                              not all hardware supports
                                              64 bit addresses for consistent
                                              allocations such descriptors. */
+        unsigned long   dma_pfn_offset;
 
         struct device_dma_parameters *dma_parms;
 
@@ -823,6 +834,16 @@ static inline void set_dev_node(struct device *dev, int node)
 }
 #endif
 
+static inline void *dev_get_drvdata(const struct device *dev)
+{
+        return dev->driver_data;
+}
+
+static inline void dev_set_drvdata(struct device *dev, void *data)
+{
+        dev->driver_data = data;
+}
+
 static inline struct pm_subsys_data *dev_to_psd(struct device *dev)
 {
         return dev ? dev->power.subsys_data : NULL;
@@ -907,8 +928,6 @@ extern int device_move(struct device *dev, struct device *new_parent,
 extern const char *device_get_devnode(struct device *dev,
                                       umode_t *mode, kuid_t *uid, kgid_t *gid,
                                       const char **tmp);
-extern void *dev_get_drvdata(const struct device *dev);
-extern int dev_set_drvdata(struct device *dev, void *data);
 
 static inline bool device_supports_offline(struct device *dev)
 {
diff --git a/include/linux/dma-contiguous.h b/include/linux/dma-contiguous.h
index 3b28f937d959..772eab5d524a 100644
--- a/include/linux/dma-contiguous.h
+++ b/include/linux/dma-contiguous.h
@@ -88,7 +88,8 @@ static inline void dma_contiguous_set_default(struct cma *cma)
 void dma_contiguous_reserve(phys_addr_t addr_limit);
 
 int __init dma_contiguous_reserve_area(phys_addr_t size, phys_addr_t base,
-                                       phys_addr_t limit, struct cma **res_cma);
+                                       phys_addr_t limit, struct cma **res_cma,
+                                       bool fixed);
 
 /**
  * dma_declare_contiguous() - reserve area for contiguous memory handling
@@ -108,7 +109,7 @@ static inline int dma_declare_contiguous(struct device *dev, phys_addr_t size,
 {
         struct cma *cma;
         int ret;
-        ret = dma_contiguous_reserve_area(size, base, limit, &cma);
+        ret = dma_contiguous_reserve_area(size, base, limit, &cma, true);
         if (ret == 0)
                 dev_set_cma_area(dev, cma);
 
@@ -136,7 +137,9 @@ static inline void dma_contiguous_set_default(struct cma *cma) { }
 static inline void dma_contiguous_reserve(phys_addr_t limit) { }
 
 static inline int dma_contiguous_reserve_area(phys_addr_t size, phys_addr_t base,
-                                       phys_addr_t limit, struct cma **res_cma) {
+                                       phys_addr_t limit, struct cma **res_cma,
+                                       bool fixed)
+{
         return -ENOSYS;
 }
 
diff --git a/include/linux/dma-mapping.h b/include/linux/dma-mapping.h
index fd4aee29ad10..931b70986272 100644
--- a/include/linux/dma-mapping.h
+++ b/include/linux/dma-mapping.h
@@ -8,6 +8,12 @@
 #include <linux/dma-direction.h>
 #include <linux/scatterlist.h>
 
+/*
+ * A dma_addr_t can hold any valid DMA or bus address for the platform.
+ * It can be given to a device to use as a DMA source or target.  A CPU cannot
+ * reference a dma_addr_t directly because there may be translation between
+ * its physical address space and the bus address space.
+ */
 struct dma_map_ops {
         void* (*alloc)(struct device *dev, size_t size,
                                 dma_addr_t *dma_handle, gfp_t gfp,
@@ -123,6 +129,13 @@ static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask)
 
 extern u64 dma_get_required_mask(struct device *dev);
 
+#ifndef set_arch_dma_coherent_ops
+static inline int set_arch_dma_coherent_ops(struct device *dev)
+{
+        return 0;
+}
+#endif
+
 static inline unsigned int dma_get_max_seg_size(struct device *dev)
 {
         return dev->dma_parms ? dev->dma_parms->max_segment_size : 65536;
@@ -186,7 +199,7 @@ static inline int dma_get_cache_alignment(void)
 
 #ifndef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
 static inline int
-dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
+dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
                             dma_addr_t device_addr, size_t size, int flags)
 {
         return 0;
@@ -217,13 +230,14 @@ extern void *dmam_alloc_noncoherent(struct device *dev, size_t size,
 extern void dmam_free_noncoherent(struct device *dev, size_t size, void *vaddr,
                                   dma_addr_t dma_handle);
 #ifdef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
-extern int dmam_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
+extern int dmam_declare_coherent_memory(struct device *dev,
+                                        phys_addr_t phys_addr,
                                         dma_addr_t device_addr, size_t size,
                                         int flags);
 extern void dmam_release_declared_memory(struct device *dev);
 #else /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */
 static inline int dmam_declare_coherent_memory(struct device *dev,
-                                dma_addr_t bus_addr, dma_addr_t device_addr,
+                                phys_addr_t phys_addr, dma_addr_t device_addr,
                                 size_t size, gfp_t gfp)
 {
         return 0;
diff --git a/include/linux/efi.h b/include/linux/efi.h
index 6c100ff0cae4..41bbf8ba4ba8 100644
--- a/include/linux/efi.h
+++ b/include/linux/efi.h
@@ -575,6 +575,9 @@ typedef efi_status_t efi_query_variable_store_t(u32 attributes, unsigned long si
 #define EFI_FILE_SYSTEM_GUID \
     EFI_GUID(  0x964e5b22, 0x6459, 0x11d2, 0x8e, 0x39, 0x00, 0xa0, 0xc9, 0x69, 0x72, 0x3b )
 
+#define DEVICE_TREE_GUID \
+    EFI_GUID(  0xb1b621d5, 0xf19c, 0x41a5, 0x83, 0x0b, 0xd9, 0x15, 0x2c, 0x69, 0xaa, 0xe0 )
+
 typedef struct {
         efi_guid_t guid;
         u64 table;
@@ -664,6 +667,14 @@ struct efi_memory_map {
         unsigned long desc_size;
 };
 
+struct efi_fdt_params {
+        u64 system_table;
+        u64 mmap;
+        u32 mmap_size;
+        u32 desc_size;
+        u32 desc_ver;
+};
+
 typedef struct {
         u32 revision;
         u32 parent_handle;
@@ -861,8 +872,15 @@ extern void efi_initialize_iomem_resources(struct resource *code_resource,
 extern void efi_get_time(struct timespec *now);
 extern int efi_set_rtc_mmss(const struct timespec *now);
 extern void efi_reserve_boot_services(void);
+extern int efi_get_fdt_params(struct efi_fdt_params *params, int verbose);
 extern struct efi_memory_map memmap;
 
+/* Iterate through an efi_memory_map */
+#define for_each_efi_memory_desc(m, md)                                    \
+        for ((md) = (m)->map;                                              \
+             (md) <= (efi_memory_desc_t *)((m)->map_end - (m)->desc_size); \
+             (md) = (void *)(md) + (m)->desc_size)
+
 /**
  * efi_range_is_wc - check the WC bit on an address range
  * @start: starting kvirt address
@@ -1033,8 +1051,10 @@ struct efivars {
  * and we use a page for reading/writing.
  */
 
+#define EFI_VAR_NAME_LEN        1024
+
 struct efi_variable {
-        efi_char16_t  VariableName[1024/sizeof(efi_char16_t)];
+        efi_char16_t  VariableName[EFI_VAR_NAME_LEN/sizeof(efi_char16_t)];
         efi_guid_t    VendorGuid;
         unsigned long DataSize;
         __u8          Data[1024];
@@ -1116,7 +1136,7 @@ int efivar_entry_iter(int (*func)(struct efivar_entry *, void *),
 struct efivar_entry *efivar_entry_find(efi_char16_t *name, efi_guid_t guid,
                                        struct list_head *head, bool remove);
 
-bool efivar_validate(struct efi_variable *var, u8 *data, unsigned long len);
+bool efivar_validate(efi_char16_t *var_name, u8 *data, unsigned long len);
 
 extern struct work_struct efivar_work;
 void efivar_run_worker(void);
diff --git a/include/linux/extcon.h b/include/linux/extcon.h
index f488145bb2d4..36f49c405dfb 100644
--- a/include/linux/extcon.h
+++ b/include/linux/extcon.h
@@ -185,9 +185,22 @@ struct extcon_specific_cable_nb {
  */
 extern int extcon_dev_register(struct extcon_dev *edev);
 extern void extcon_dev_unregister(struct extcon_dev *edev);
+extern int devm_extcon_dev_register(struct device *dev,
+                                    struct extcon_dev *edev);
+extern void devm_extcon_dev_unregister(struct device *dev,
+                                       struct extcon_dev *edev);
 extern struct extcon_dev *extcon_get_extcon_dev(const char *extcon_name);
 
 /*
+ * Following APIs control the memory of extcon device.
+ */
+extern struct extcon_dev *extcon_dev_allocate(const char **cables);
+extern void extcon_dev_free(struct extcon_dev *edev);
+extern struct extcon_dev *devm_extcon_dev_allocate(struct device *dev,
+                                                   const char **cables);
+extern void devm_extcon_dev_free(struct device *dev, struct extcon_dev *edev);
+
+/*
  * get/set/update_state access the 32b encoded state value, which represents
  * states of all possible cables of the multistate port. For example, if one
  * calls extcon_set_state(edev, 0x7), it may mean that all the three cables
@@ -254,6 +267,30 @@ static inline int extcon_dev_register(struct extcon_dev *edev)
 
 static inline void extcon_dev_unregister(struct extcon_dev *edev) { }
 
+static inline int devm_extcon_dev_register(struct device *dev,
+                                           struct extcon_dev *edev)
+{
+        return -EINVAL;
+}
+
+static inline void devm_extcon_dev_unregister(struct device *dev,
+                                              struct extcon_dev *edev) { }
+
+static inline struct extcon_dev *extcon_dev_allocate(const char **cables)
+{
+        return ERR_PTR(-ENOSYS);
+}
+
+static inline void extcon_dev_free(struct extcon_dev *edev) { }
+
+static inline struct extcon_dev *devm_extcon_dev_allocate(struct device *dev,
+                                                          const char **cables)
+{
+        return ERR_PTR(-ENOSYS);
+}
+
+static inline void devm_extcon_dev_free(struct extcon_dev *edev) { }
+
 static inline u32 extcon_get_state(struct extcon_dev *edev)
 {
         return 0;
diff --git a/include/linux/fb.h b/include/linux/fb.h
index fe6ac956550e..b6bfda99add3 100644
--- a/include/linux/fb.h
+++ b/include/linux/fb.h
@@ -47,6 +47,7 @@ struct device_node;
 
 #define FB_MISC_PRIM_COLOR      1
 #define FB_MISC_1ST_DETAIL      2       /* First Detailed Timing is preferred */
+#define FB_MISC_HDMI            4
 struct fb_chroma {
         __u32 redx;     /* in fraction of 1024 */
         __u32 greenx;
@@ -641,7 +642,7 @@ static inline void unlock_fb_info(struct fb_info *info)
 static inline void __fb_pad_aligned_buffer(u8 *dst, u32 d_pitch,
                                            u8 *src, u32 s_pitch, u32 height)
 {
-        int i, j;
+        u32 i, j;
 
         d_pitch -= s_pitch;
 
diff --git a/include/linux/firewire.h b/include/linux/firewire.h
index c3683bdf28fe..d4b7683c722d 100644
--- a/include/linux/firewire.h
+++ b/include/linux/firewire.h
@@ -367,6 +367,9 @@ static inline int fw_stream_packet_destination_id(int tag, int channel, int sy)
         return tag << 14 | channel << 8 | sy;
 }
 
+void fw_schedule_bus_reset(struct fw_card *card, bool delayed,
+                           bool short_reset);
+
 struct fw_descriptor {
         struct list_head link;
         size_t length;
diff --git a/include/linux/fs.h b/include/linux/fs.h
index 878031227c57..c3f46e499dd0 100644
--- a/include/linux/fs.h
+++ b/include/linux/fs.h
@@ -2590,6 +2590,7 @@ extern ssize_t simple_read_from_buffer(void __user *to, size_t count,
 extern ssize_t simple_write_to_buffer(void *to, size_t available, loff_t *ppos,
                 const void __user *from, size_t count);
 
+extern int __generic_file_fsync(struct file *, loff_t, loff_t, int);
 extern int generic_file_fsync(struct file *, loff_t, loff_t, int);
 
 extern int generic_check_addressable(unsigned, u64);
diff --git a/include/linux/ftrace.h b/include/linux/ftrace.h
index ae9504b4b67d..2018751cad9e 100644
--- a/include/linux/ftrace.h
+++ b/include/linux/ftrace.h
@@ -616,25 +616,27 @@ static inline void __ftrace_enabled_restore(int enabled)
 #endif
 }
 
-#ifndef HAVE_ARCH_CALLER_ADDR
+/* All archs should have this, but we define it for consistency */
+#ifndef ftrace_return_address0
+# define ftrace_return_address0 __builtin_return_address(0)
+#endif
+
+/* Archs may use other ways for ADDR1 and beyond */
+#ifndef ftrace_return_address
 # ifdef CONFIG_FRAME_POINTER
-#  define CALLER_ADDR0 ((unsigned long)__builtin_return_address(0))
-#  define CALLER_ADDR1 ((unsigned long)__builtin_return_address(1))
-#  define CALLER_ADDR2 ((unsigned long)__builtin_return_address(2))
-#  define CALLER_ADDR3 ((unsigned long)__builtin_return_address(3))
-#  define CALLER_ADDR4 ((unsigned long)__builtin_return_address(4))
-#  define CALLER_ADDR5 ((unsigned long)__builtin_return_address(5))
-#  define CALLER_ADDR6 ((unsigned long)__builtin_return_address(6))
+#  define ftrace_return_address(n) __builtin_return_address(n)
 # else
-#  define CALLER_ADDR0 ((unsigned long)__builtin_return_address(0))
-#  define CALLER_ADDR1 0UL
-#  define CALLER_ADDR2 0UL
-#  define CALLER_ADDR3 0UL
-#  define CALLER_ADDR4 0UL
-#  define CALLER_ADDR5 0UL
-#  define CALLER_ADDR6 0UL
+#  define ftrace_return_address(n) 0UL
 # endif
-#endif /* ifndef HAVE_ARCH_CALLER_ADDR */
+#endif
+
+#define CALLER_ADDR0 ((unsigned long)ftrace_return_address0)
+#define CALLER_ADDR1 ((unsigned long)ftrace_return_address(1))
+#define CALLER_ADDR2 ((unsigned long)ftrace_return_address(2))
+#define CALLER_ADDR3 ((unsigned long)ftrace_return_address(3))
+#define CALLER_ADDR4 ((unsigned long)ftrace_return_address(4))
+#define CALLER_ADDR5 ((unsigned long)ftrace_return_address(5))
+#define CALLER_ADDR6 ((unsigned long)ftrace_return_address(6))
 
 #ifdef CONFIG_IRQSOFF_TRACER
   extern void time_hardirqs_on(unsigned long a0, unsigned long a1);
diff --git a/include/linux/genhd.h b/include/linux/genhd.h
index 9f3c275e053e..ec274e0f4ed2 100644
--- a/include/linux/genhd.h
+++ b/include/linux/genhd.h
@@ -649,7 +649,7 @@ static inline void hd_ref_init(struct hd_struct *part)
 static inline void hd_struct_get(struct hd_struct *part)
 {
         atomic_inc(&part->ref);
-        smp_mb__after_atomic_inc();
+        smp_mb__after_atomic();
 }
 
 static inline int hd_struct_try_get(struct hd_struct *part)
diff --git a/include/linux/gfp.h b/include/linux/gfp.h
index 39b81dc7d01a..6eb1fb37de9a 100644
--- a/include/linux/gfp.h
+++ b/include/linux/gfp.h
@@ -6,7 +6,6 @@
 #include <linux/stddef.h>
 #include <linux/linkage.h>
 #include <linux/topology.h>
-#include <linux/mmdebug.h>
 
 struct vm_area_struct;
 
@@ -31,7 +30,6 @@ struct vm_area_struct;
 #define ___GFP_HARDWALL         0x20000u
 #define ___GFP_THISNODE         0x40000u
 #define ___GFP_RECLAIMABLE      0x80000u
-#define ___GFP_KMEMCG           0x100000u
 #define ___GFP_NOTRACK          0x200000u
 #define ___GFP_NO_KSWAPD        0x400000u
 #define ___GFP_OTHER_NODE       0x800000u
@@ -91,7 +89,6 @@ struct vm_area_struct;
 
 #define __GFP_NO_KSWAPD ((__force gfp_t)___GFP_NO_KSWAPD)
 #define __GFP_OTHER_NODE ((__force gfp_t)___GFP_OTHER_NODE) /* On behalf of other node */
-#define __GFP_KMEMCG    ((__force gfp_t)___GFP_KMEMCG) /* Allocation comes from a memcg-accounted resource */
 #define __GFP_WRITE     ((__force gfp_t)___GFP_WRITE)   /* Allocator intends to dirty page */
 
 /*
@@ -353,6 +350,10 @@ extern struct page *alloc_pages_vma(gfp_t gfp_mask, int order,
 #define alloc_page_vma_node(gfp_mask, vma, addr, node)          \
         alloc_pages_vma(gfp_mask, 0, vma, addr, node)
 
+extern struct page *alloc_kmem_pages(gfp_t gfp_mask, unsigned int order);
+extern struct page *alloc_kmem_pages_node(int nid, gfp_t gfp_mask,
+                                          unsigned int order);
+
 extern unsigned long __get_free_pages(gfp_t gfp_mask, unsigned int order);
 extern unsigned long get_zeroed_page(gfp_t gfp_mask);
 
@@ -369,11 +370,11 @@ void *alloc_pages_exact_nid(int nid, size_t size, gfp_t gfp_mask);
 
 extern void __free_pages(struct page *page, unsigned int order);
 extern void free_pages(unsigned long addr, unsigned int order);
-extern void free_hot_cold_page(struct page *page, int cold);
-extern void free_hot_cold_page_list(struct list_head *list, int cold);
+extern void free_hot_cold_page(struct page *page, bool cold);
+extern void free_hot_cold_page_list(struct list_head *list, bool cold);
 
-extern void __free_memcg_kmem_pages(struct page *page, unsigned int order);
-extern void free_memcg_kmem_pages(unsigned long addr, unsigned int order);
+extern void __free_kmem_pages(struct page *page, unsigned int order);
+extern void free_kmem_pages(unsigned long addr, unsigned int order);
 
 #define __free_page(page) __free_pages((page), 0)
 #define free_page(addr) free_pages((addr), 0)
diff --git a/include/linux/goldfish.h b/include/linux/goldfish.h
new file mode 100644
index 000000000000..569236e6b2bc
--- /dev/null
+++ b/include/linux/goldfish.h
@@ -0,0 +1,15 @@
+#ifndef __LINUX_GOLDFISH_H
+#define __LINUX_GOLDFISH_H
+
+/* Helpers for Goldfish virtual platform */
+
+static inline void gf_write64(unsigned long data,
+                void __iomem *portl, void __iomem *porth)
+{
+        writel((u32)data, portl);
+#ifdef CONFIG_64BIT
+        writel(data>>32, porth);
+#endif
+}
+
+#endif /* __LINUX_GOLDFISH_H */
diff --git a/include/linux/gpio/consumer.h b/include/linux/gpio/consumer.h
index bed128e8f4b1..05e53ccb708b 100644
--- a/include/linux/gpio/consumer.h
+++ b/include/linux/gpio/consumer.h
@@ -1,6 +1,7 @@
 #ifndef __LINUX_GPIO_CONSUMER_H
 #define __LINUX_GPIO_CONSUMER_H
 
+#include <linux/bug.h>
 #include <linux/err.h>
 #include <linux/kernel.h>
 
@@ -23,6 +24,12 @@ struct gpio_desc *__must_check gpiod_get(struct device *dev,
 struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
                                                const char *con_id,
                                                unsigned int idx);
+struct gpio_desc *__must_check gpiod_get_optional(struct device *dev,
+                                                  const char *con_id);
+struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev,
+                                                        const char *con_id,
+                                                        unsigned int index);
+
 void gpiod_put(struct gpio_desc *desc);
 
 struct gpio_desc *__must_check devm_gpiod_get(struct device *dev,
@@ -30,6 +37,12 @@ struct gpio_desc *__must_check devm_gpiod_get(struct device *dev,
 struct gpio_desc *__must_check devm_gpiod_get_index(struct device *dev,
                                                     const char *con_id,
                                                     unsigned int idx);
+struct gpio_desc *__must_check devm_gpiod_get_optional(struct device *dev,
+                                                       const char *con_id);
+struct gpio_desc *__must_check
+devm_gpiod_get_index_optional(struct device *dev, const char *con_id,
+                              unsigned int index);
+
 void devm_gpiod_put(struct device *dev, struct gpio_desc *desc);
 
 int gpiod_get_direction(const struct gpio_desc *desc);
@@ -73,6 +86,20 @@ static inline struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
 {
         return ERR_PTR(-ENOSYS);
 }
+
+static inline struct gpio_desc *__must_check
+gpiod_get_optional(struct device *dev, const char *con_id)
+{
+        return ERR_PTR(-ENOSYS);
+}
+
+static inline struct gpio_desc *__must_check
+gpiod_get_index_optional(struct device *dev, const char *con_id,
+                         unsigned int index)
+{
+        return ERR_PTR(-ENOSYS);
+}
+
 static inline void gpiod_put(struct gpio_desc *desc)
 {
         might_sleep();
@@ -93,6 +120,20 @@ struct gpio_desc *__must_check devm_gpiod_get_index(struct device *dev,
 {
         return ERR_PTR(-ENOSYS);
 }
+
+static inline struct gpio_desc *__must_check
+devm_gpiod_get_optional(struct device *dev, const char *con_id)
+{
+        return ERR_PTR(-ENOSYS);
+}
+
+static inline struct gpio_desc *__must_check
+devm_gpiod_get_index_optional(struct device *dev, const char *con_id,
+                              unsigned int index)
+{
+        return ERR_PTR(-ENOSYS);
+}
+
 static inline void devm_gpiod_put(struct device *dev, struct gpio_desc *desc)
 {
         might_sleep();
diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h
index 1827b43966d9..573e4f3243d0 100644
--- a/include/linux/gpio/driver.h
+++ b/include/linux/gpio/driver.h
@@ -51,7 +51,10 @@ struct seq_file;
  *      format specifier for an unsigned int.  It is substituted by the actual
  *      number of the gpio.
  * @can_sleep: flag must be set iff get()/set() methods sleep, as they
- *      must while accessing GPIO expander chips over I2C or SPI
+ *      must while accessing GPIO expander chips over I2C or SPI. This
+ *      implies that if the chip supports IRQs, these IRQs need to be threaded
+ *      as the chip access may sleep when e.g. reading out the IRQ status
+ *      registers.
  * @exported: flags if the gpiochip is exported for use from sysfs. Private.
  *
  * A gpio_chip can help platforms abstract various sources of GPIOs so
diff --git a/include/linux/hid-sensor-hub.h b/include/linux/hid-sensor-hub.h
index b70cfd7ff29c..51f7ccadf923 100644
--- a/include/linux/hid-sensor-hub.h
+++ b/include/linux/hid-sensor-hub.h
@@ -189,7 +189,7 @@ struct hid_sensor_common {
         struct hid_sensor_hub_device *hsdev;
         struct platform_device *pdev;
         unsigned usage_id;
-        bool data_ready;
+        atomic_t data_ready;
         struct iio_trigger *trigger;
         struct hid_sensor_hub_attribute_info poll;
         struct hid_sensor_hub_attribute_info report_state;
@@ -223,4 +223,10 @@ int hid_sensor_read_samp_freq_value(struct hid_sensor_common *st,
 int hid_sensor_get_usage_index(struct hid_sensor_hub_device *hsdev,
                                 u32 report_id, int field_index, u32 usage_id);
 
+int hid_sensor_format_scale(u32 usage_id,
+                            struct hid_sensor_hub_attribute_info *attr_info,
+                            int *val0, int *val1);
+
+s32 hid_sensor_read_poll_value(struct hid_sensor_common *st);
+
 #endif
diff --git a/include/linux/hid-sensor-ids.h b/include/linux/hid-sensor-ids.h
index 14ead9e8eda8..109f0e633e01 100644
--- a/include/linux/hid-sensor-ids.h
+++ b/include/linux/hid-sensor-ids.h
@@ -76,6 +76,7 @@
 #define HID_USAGE_SENSOR_ORIENT_TILT_Y                          0x200480
 #define HID_USAGE_SENSOR_ORIENT_TILT_Z                          0x200481
 
+#define HID_USAGE_SENSOR_DEVICE_ORIENTATION                     0x20008A
 #define HID_USAGE_SENSOR_ORIENT_ROTATION_MATRIX                 0x200482
 #define HID_USAGE_SENSOR_ORIENT_QUATERNION                      0x200483
 #define HID_USAGE_SENSOR_ORIENT_MAGN_FLUX                       0x200484
diff --git a/include/linux/hid.h b/include/linux/hid.h
index 720e3a10608c..77632cf159c0 100644
--- a/include/linux/hid.h
+++ b/include/linux/hid.h
@@ -233,11 +233,6 @@ struct hid_item {
 #define HID_DG_BARRELSWITCH     0x000d0044
 #define HID_DG_ERASER           0x000d0045
 #define HID_DG_TABLETPICK       0x000d0046
-/*
- * as of May 20, 2009 the usages below are not yet in the official USB spec
- * but are being pushed by Microsft as described in their paper "Digitizer
- * Drivers for Windows Touch and Pen-Based Computers"
- */
 #define HID_DG_CONFIDENCE       0x000d0047
 #define HID_DG_WIDTH            0x000d0048
 #define HID_DG_HEIGHT           0x000d0049
@@ -246,6 +241,8 @@ struct hid_item {
 #define HID_DG_DEVICEINDEX      0x000d0053
 #define HID_DG_CONTACTCOUNT     0x000d0054
 #define HID_DG_CONTACTMAX       0x000d0055
+#define HID_DG_BARRELSWITCH2    0x000d005a
+#define HID_DG_TOOLSERIALNUMBER 0x000d005b
 
 /*
  * HID report types --- Ouch! HID spec says 1 2 3!
@@ -299,6 +296,9 @@ struct hid_item {
 
 /*
  * HID device groups
+ *
+ * Note: HID_GROUP_ANY is declared in linux/mod_devicetable.h
+ * and has a value of 0x0000
  */
 #define HID_GROUP_GENERIC                       0x0001
 #define HID_GROUP_MULTITOUCH                    0x0002
@@ -306,6 +306,11 @@ struct hid_item {
 #define HID_GROUP_MULTITOUCH_WIN_8              0x0004
 
 /*
+ * Vendor specific HID device groups
+ */
+#define HID_GROUP_RMI                           0x0100
+
+/*
  * This is the global environment of the parser. This information is
  * persistent for main-items. The global environment can be saved and
  * restored with PUSH/POP statements.
@@ -570,6 +575,8 @@ struct hid_descriptor {
         .bus = BUS_USB, .vendor = (ven), .product = (prod)
 #define HID_BLUETOOTH_DEVICE(ven, prod)                                 \
         .bus = BUS_BLUETOOTH, .vendor = (ven), .product = (prod)
+#define HID_I2C_DEVICE(ven, prod)                               \
+        .bus = BUS_I2C, .vendor = (ven), .product = (prod)
 
 #define HID_REPORT_ID(rep) \
         .report_type = (rep)
diff --git a/include/linux/hsi/hsi.h b/include/linux/hsi/hsi.h
index 39bfd5b89077..3ec06300d535 100644
--- a/include/linux/hsi/hsi.h
+++ b/include/linux/hsi/hsi.h
@@ -68,17 +68,31 @@ enum {
 };
 
 /**
+ * struct hsi_channel - channel resource used by the hsi clients
+ * @id: Channel number
+ * @name: Channel name
+ */
+struct hsi_channel {
+        unsigned int    id;
+        const char      *name;
+};
+
+/**
  * struct hsi_config - Configuration for RX/TX HSI modules
  * @mode: Bit transmission mode (STREAM or FRAME)
- * @channels: Number of channels to use [1..16]
+ * @channels: Channel resources used by the client
+ * @num_channels: Number of channel resources
+ * @num_hw_channels: Number of channels the transceiver is configured for [1..16]
  * @speed: Max bit transmission speed (Kbit/s)
  * @flow: RX flow type (SYNCHRONIZED or PIPELINE)
  * @arb_mode: Arbitration mode for TX frame (Round robin, priority)
  */
 struct hsi_config {
-        unsigned int    mode;
-        unsigned int    channels;
-        unsigned int    speed;
+        unsigned int            mode;
+        struct hsi_channel      *channels;
+        unsigned int            num_channels;
+        unsigned int            num_hw_channels;
+        unsigned int            speed;
         union {
                 unsigned int    flow;           /* RX only */
                 unsigned int    arb_mode;       /* TX only */
@@ -282,6 +296,21 @@ struct hsi_controller *hsi_alloc_controller(unsigned int n_ports, gfp_t flags);
 void hsi_put_controller(struct hsi_controller *hsi);
 int hsi_register_controller(struct hsi_controller *hsi);
 void hsi_unregister_controller(struct hsi_controller *hsi);
+struct hsi_client *hsi_new_client(struct hsi_port *port,
+                                                struct hsi_board_info *info);
+int hsi_remove_client(struct device *dev, void *data);
+void hsi_port_unregister_clients(struct hsi_port *port);
+
+#ifdef CONFIG_OF
+void hsi_add_clients_from_dt(struct hsi_port *port,
+                             struct device_node *clients);
+#else
+static inline void hsi_add_clients_from_dt(struct hsi_port *port,
+                                           struct device_node *clients)
+{
+        return;
+}
+#endif
 
 static inline void hsi_controller_set_drvdata(struct hsi_controller *hsi,
                                                                 void *data)
@@ -305,6 +334,8 @@ static inline struct hsi_port *hsi_find_port_num(struct hsi_controller *hsi,
  */
 int hsi_async(struct hsi_client *cl, struct hsi_msg *msg);
 
+int hsi_get_channel_id_by_name(struct hsi_client *cl, char *name);
+
 /**
  * hsi_id - Get HSI controller ID associated to a client
  * @cl: Pointer to a HSI client
diff --git a/include/linux/hsi/ssi_protocol.h b/include/linux/hsi/ssi_protocol.h
new file mode 100644
index 000000000000..1433651be0dc
--- /dev/null
+++ b/include/linux/hsi/ssi_protocol.h
@@ -0,0 +1,42 @@
+/*
+ * ssip_slave.h
+ *
+ * SSIP slave support header file
+ *
+ * Copyright (C) 2010 Nokia Corporation. All rights reserved.
+ *
+ * Contact: Carlos Chinea <carlos.chinea@nokia.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ */
+
+#ifndef __LINUX_SSIP_SLAVE_H__
+#define __LINUX_SSIP_SLAVE_H__
+
+#include <linux/hsi/hsi.h>
+
+static inline void ssip_slave_put_master(struct hsi_client *master)
+{
+}
+
+struct hsi_client *ssip_slave_get_master(struct hsi_client *slave);
+int ssip_slave_start_tx(struct hsi_client *master);
+int ssip_slave_stop_tx(struct hsi_client *master);
+void ssip_reset_event(struct hsi_client *master);
+
+int ssip_slave_running(struct hsi_client *master);
+
+#endif /* __LINUX_SSIP_SLAVE_H__ */
+
diff --git a/include/linux/hugetlb.h b/include/linux/hugetlb.h
index b65166de1d9d..255cd5cc0754 100644
--- a/include/linux/hugetlb.h
+++ b/include/linux/hugetlb.h
@@ -343,6 +343,11 @@ static inline unsigned huge_page_shift(struct hstate *h)
         return h->order + PAGE_SHIFT;
 }
 
+static inline bool hstate_is_gigantic(struct hstate *h)
+{
+        return huge_page_order(h) >= MAX_ORDER;
+}
+
 static inline unsigned int pages_per_huge_page(struct hstate *h)
 {
         return 1 << h->order;
@@ -392,15 +397,13 @@ static inline pgoff_t basepage_index(struct page *page)
 
 extern void dissolve_free_huge_pages(unsigned long start_pfn,
                                      unsigned long end_pfn);
-int pmd_huge_support(void);
-/*
- * Currently hugepage migration is enabled only for pmd-based hugepage.
- * This function will be updated when hugepage migration is more widely
- * supported.
- */
-static inline int hugepage_migration_support(struct hstate *h)
+static inline int hugepage_migration_supported(struct hstate *h)
 {
-        return pmd_huge_support() && (huge_page_shift(h) == PMD_SHIFT);
+#ifdef CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION
+        return huge_page_shift(h) == PMD_SHIFT;
+#else
+        return 0;
+#endif
 }
 
 static inline spinlock_t *huge_pte_lockptr(struct hstate *h,
@@ -450,8 +453,7 @@ static inline pgoff_t basepage_index(struct page *page)
         return page->index;
 }
 #define dissolve_free_huge_pages(s, e)  do {} while (0)
-#define pmd_huge_support()      0
-#define hugepage_migration_support(h)   0
+#define hugepage_migration_supported(h) 0
 
 static inline spinlock_t *huge_pte_lockptr(struct hstate *h,
                                            struct mm_struct *mm, pte_t *pte)
diff --git a/include/linux/hyperv.h b/include/linux/hyperv.h
index 2d7b4f139c32..08cfaff8a072 100644
--- a/include/linux/hyperv.h
+++ b/include/linux/hyperv.h
@@ -696,6 +696,8 @@ struct vmbus_channel {
          * preserve the earlier behavior.
          */
         u32 target_vp;
+        /* The corresponding CPUID in the guest */
+        u32 target_cpu;
         /*
          * Support for sub-channels. For high performance devices,
          * it will be useful to have multiple sub-channels to support
@@ -732,6 +734,11 @@ struct vmbus_channel {
          * Support per-channel state for use by vmbus drivers.
          */
         void *per_channel_state;
+        /*
+         * To support per-cpu lookup mapping of relid to channel,
+         * link up channels based on their CPU affinity.
+         */
+        struct list_head percpu_list;
 };
 
 static inline void set_channel_read_state(struct vmbus_channel *c, bool state)
diff --git a/include/linux/idr.h b/include/linux/idr.h
index 6af3400b9b2f..013fd9bc4cb6 100644
--- a/include/linux/idr.h
+++ b/include/linux/idr.h
@@ -29,21 +29,24 @@
 
 struct idr_layer {
         int                     prefix; /* the ID prefix of this idr_layer */
-        DECLARE_BITMAP(bitmap, IDR_SIZE); /* A zero bit means "space here" */
+        int                     layer;  /* distance from leaf */
         struct idr_layer __rcu  *ary[1<<IDR_BITS];
         int                     count;  /* When zero, we can release it */
-        int                     layer;  /* distance from leaf */
-        struct rcu_head         rcu_head;
+        union {
+                /* A zero bit means "space here" */
+                DECLARE_BITMAP(bitmap, IDR_SIZE);
+                struct rcu_head         rcu_head;
+        };
 };
 
 struct idr {
         struct idr_layer __rcu  *hint;  /* the last layer allocated from */
         struct idr_layer __rcu  *top;
-        struct idr_layer        *id_free;
         int                     layers; /* only valid w/o concurrent changes */
-        int                     id_free_cnt;
         int                     cur;    /* current pos for cyclic allocation */
         spinlock_t              lock;
+        int                     id_free_cnt;
+        struct idr_layer        *id_free;
 };
 
 #define IDR_INIT(name)                                                  \
diff --git a/include/linux/iio/common/st_sensors.h b/include/linux/iio/common/st_sensors.h
index 3c005eb3a0a4..96f51f0e0096 100644
--- a/include/linux/iio/common/st_sensors.h
+++ b/include/linux/iio/common/st_sensors.h
@@ -269,6 +269,10 @@ int st_sensors_set_enable(struct iio_dev *indio_dev, bool enable);
 
 int st_sensors_set_axis_enable(struct iio_dev *indio_dev, u8 axis_enable);
 
+void st_sensors_power_enable(struct iio_dev *indio_dev);
+
+void st_sensors_power_disable(struct iio_dev *indio_dev);
+
 int st_sensors_set_odr(struct iio_dev *indio_dev, unsigned int odr);
 
 int st_sensors_set_dataready_irq(struct iio_dev *indio_dev, bool enable);
diff --git a/include/linux/iio/consumer.h b/include/linux/iio/consumer.h
index 2752b1fd12be..651f9a0e2765 100644
--- a/include/linux/iio/consumer.h
+++ b/include/linux/iio/consumer.h
@@ -123,6 +123,19 @@ int iio_read_channel_raw(struct iio_channel *chan,
                          int *val);
 
 /**
+ * iio_read_channel_average_raw() - read from a given channel
+ * @chan:               The channel being queried.
+ * @val:                Value read back.
+ *
+ * Note raw reads from iio channels are in adc counts and hence
+ * scale will need to be applied if standard units required.
+ *
+ * In opposit to the normal iio_read_channel_raw this function
+ * returns the average of multiple reads.
+ */
+int iio_read_channel_average_raw(struct iio_channel *chan, int *val);
+
+/**
  * iio_read_channel_processed() - read processed value from a given channel
  * @chan:               The channel being queried.
  * @val:                Value read back.
diff --git a/include/linux/iio/iio.h b/include/linux/iio/iio.h
index 5f2d00e7e488..ccde91725f98 100644
--- a/include/linux/iio/iio.h
+++ b/include/linux/iio/iio.h
@@ -177,6 +177,12 @@ struct iio_event_spec {
  *                      shift:          Shift right by this before masking out
  *                                      realbits.
  *                      endianness:     little or big endian
+ *                      repeat:         Number of times real/storage bits
+ *                                      repeats. When the repeat element is
+ *                                      more than 1, then the type element in
+ *                                      sysfs will show a repeat value.
+ *                                      Otherwise, the number of repetitions is
+ *                                      omitted.
  * @info_mask_separate: What information is to be exported that is specific to
  *                      this channel.
  * @info_mask_shared_by_type: What information is to be exported that is shared
@@ -219,6 +225,7 @@ struct iio_chan_spec {
                 u8      realbits;
                 u8      storagebits;
                 u8      shift;
+                u8      repeat;
                 enum iio_endian endianness;
         } scan_type;
         long                    info_mask_separate;
@@ -288,6 +295,8 @@ static inline s64 iio_get_time_ns(void)
 #define INDIO_ALL_BUFFER_MODES                                  \
         (INDIO_BUFFER_TRIGGERED | INDIO_BUFFER_HARDWARE)
 
+#define INDIO_MAX_RAW_ELEMENTS          4
+
 struct iio_trigger; /* forward declaration */
 struct iio_dev;
 
@@ -302,6 +311,14 @@ struct iio_dev;
  *                      the channel in question.  Return value will specify the
  *                      type of value returned by the device. val and val2 will
  *                      contain the elements making up the returned value.
+ * @read_raw_multi:     function to return values from the device.
+ *                      mask specifies which value. Note 0 means a reading of
+ *                      the channel in question.  Return value will specify the
+ *                      type of value returned by the device. vals pointer
+ *                      contain the elements making up the returned value.
+ *                      max_len specifies maximum number of elements
+ *                      vals pointer can contain. val_len is used to return
+ *                      length of valid elements in vals.
  * @write_raw:          function to write a value to the device.
  *                      Parameters are the same as for read_raw.
  * @write_raw_get_fmt:  callback function to query the expected
@@ -328,6 +345,13 @@ struct iio_info {
                         int *val2,
                         long mask);
 
+        int (*read_raw_multi)(struct iio_dev *indio_dev,
+                        struct iio_chan_spec const *chan,
+                        int max_len,
+                        int *vals,
+                        int *val_len,
+                        long mask);
+
         int (*write_raw)(struct iio_dev *indio_dev,
                          struct iio_chan_spec const *chan,
                          int val,
diff --git a/include/linux/iio/types.h b/include/linux/iio/types.h
index 084d882fe01b..d480631eabc2 100644
--- a/include/linux/iio/types.h
+++ b/include/linux/iio/types.h
@@ -53,6 +53,9 @@ enum iio_modifier {
         IIO_MOD_LIGHT_RED,
         IIO_MOD_LIGHT_GREEN,
         IIO_MOD_LIGHT_BLUE,
+        IIO_MOD_QUATERNION,
+        IIO_MOD_TEMP_AMBIENT,
+        IIO_MOD_TEMP_OBJECT,
 };
 
 enum iio_event_type {
@@ -79,6 +82,7 @@ enum iio_event_direction {
 #define IIO_VAL_INT_PLUS_MICRO 2
 #define IIO_VAL_INT_PLUS_NANO 3
 #define IIO_VAL_INT_PLUS_MICRO_DB 4
+#define IIO_VAL_INT_MULTIPLE 5
 #define IIO_VAL_FRACTIONAL 10
 #define IIO_VAL_FRACTIONAL_LOG2 11
 
diff --git a/include/linux/init.h b/include/linux/init.h
index a3ba27076342..2df8e8dd10a4 100644
--- a/include/linux/init.h
+++ b/include/linux/init.h
@@ -297,16 +297,28 @@ void __init parse_early_options(char *cmdline);
 
 #else /* MODULE */
 
-/* Don't use these in loadable modules, but some people do... */
+/*
+ * In most cases loadable modules do not need custom
+ * initcall levels. There are still some valid cases where
+ * a driver may be needed early if built in, and does not
+ * matter when built as a loadable module. Like bus
+ * snooping debug drivers.
+ */
 #define early_initcall(fn)              module_init(fn)
 #define core_initcall(fn)               module_init(fn)
+#define core_initcall_sync(fn)          module_init(fn)
 #define postcore_initcall(fn)           module_init(fn)
+#define postcore_initcall_sync(fn)      module_init(fn)
 #define arch_initcall(fn)               module_init(fn)
 #define subsys_initcall(fn)             module_init(fn)
+#define subsys_initcall_sync(fn)        module_init(fn)
 #define fs_initcall(fn)                 module_init(fn)
+#define fs_initcall_sync(fn)            module_init(fn)
 #define rootfs_initcall(fn)             module_init(fn)
 #define device_initcall(fn)             module_init(fn)
+#define device_initcall_sync(fn)        module_init(fn)
 #define late_initcall(fn)               module_init(fn)
+#define late_initcall_sync(fn)          module_init(fn)
 
 #define console_initcall(fn)            module_init(fn)
 #define security_initcall(fn)           module_init(fn)
diff --git a/include/linux/interrupt.h b/include/linux/interrupt.h
index 051c85032f48..698ad053d064 100644
--- a/include/linux/interrupt.h
+++ b/include/linux/interrupt.h
@@ -199,6 +199,26 @@ extern int check_wakeup_irqs(void);
 static inline int check_wakeup_irqs(void) { return 0; }
 #endif
 
+/**
+ * struct irq_affinity_notify - context for notification of IRQ affinity changes
+ * @irq:                Interrupt to which notification applies
+ * @kref:               Reference count, for internal use
+ * @work:               Work item, for internal use
+ * @notify:             Function to be called on change.  This will be
+ *                      called in process context.
+ * @release:            Function to be called on release.  This will be
+ *                      called in process context.  Once registered, the
+ *                      structure must only be freed when this function is
+ *                      called or later.
+ */
+struct irq_affinity_notify {
+        unsigned int irq;
+        struct kref kref;
+        struct work_struct work;
+        void (*notify)(struct irq_affinity_notify *, const cpumask_t *mask);
+        void (*release)(struct kref *ref);
+};
+
 #if defined(CONFIG_SMP)
 
 extern cpumask_var_t irq_default_affinity;
@@ -242,26 +262,6 @@ extern int irq_select_affinity(unsigned int irq);
 
 extern int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m);
 
-/**
- * struct irq_affinity_notify - context for notification of IRQ affinity changes
- * @irq:                Interrupt to which notification applies
- * @kref:               Reference count, for internal use
- * @work:               Work item, for internal use
- * @notify:             Function to be called on change.  This will be
- *                      called in process context.
- * @release:            Function to be called on release.  This will be
- *                      called in process context.  Once registered, the
- *                      structure must only be freed when this function is
- *                      called or later.
- */
-struct irq_affinity_notify {
-        unsigned int irq;
-        struct kref kref;
-        struct work_struct work;
-        void (*notify)(struct irq_affinity_notify *, const cpumask_t *mask);
-        void (*release)(struct kref *ref);
-};
-
 extern int
 irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify);
 
@@ -289,6 +289,12 @@ static inline int irq_set_affinity_hint(unsigned int irq,
 {
         return -EINVAL;
 }
+
+static inline int
+irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify)
+{
+        return 0;
+}
 #endif /* CONFIG_SMP */
 
 /*
@@ -491,7 +497,7 @@ static inline int tasklet_trylock(struct tasklet_struct *t)
 
 static inline void tasklet_unlock(struct tasklet_struct *t)
 {
-        smp_mb__before_clear_bit(); 
+        smp_mb__before_atomic();
         clear_bit(TASKLET_STATE_RUN, &(t)->state);
 }
 
@@ -539,7 +545,7 @@ static inline void tasklet_hi_schedule_first(struct tasklet_struct *t)
 static inline void tasklet_disable_nosync(struct tasklet_struct *t)
 {
         atomic_inc(&t->count);
-        smp_mb__after_atomic_inc();
+        smp_mb__after_atomic();
 }
 
 static inline void tasklet_disable(struct tasklet_struct *t)
@@ -551,13 +557,13 @@ static inline void tasklet_disable(struct tasklet_struct *t)
 
 static inline void tasklet_enable(struct tasklet_struct *t)
 {
-        smp_mb__before_atomic_dec();
+        smp_mb__before_atomic();
         atomic_dec(&t->count);
 }
 
 static inline void tasklet_hi_enable(struct tasklet_struct *t)
 {
-        smp_mb__before_atomic_dec();
+        smp_mb__before_atomic();
         atomic_dec(&t->count);
 }
 
diff --git a/include/linux/irq.h b/include/linux/irq.h
index 5c57efb863d0..0d998d8b01d8 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -525,24 +525,6 @@ static inline void irq_set_percpu_devid_flags(unsigned int irq)
                              IRQ_NOPROBE | IRQ_PER_CPU_DEVID);
 }
 
-/* Handle dynamic irq creation and destruction */
-extern unsigned int create_irq_nr(unsigned int irq_want, int node);
-extern unsigned int __create_irqs(unsigned int from, unsigned int count,
-                                  int node);
-extern int create_irq(void);
-extern void destroy_irq(unsigned int irq);
-extern void destroy_irqs(unsigned int irq, unsigned int count);
-
-/*
- * Dynamic irq helper functions. Obsolete. Use irq_alloc_desc* and
- * irq_free_desc instead.
- */
-extern void dynamic_irq_cleanup(unsigned int irq);
-static inline void dynamic_irq_init(unsigned int irq)
-{
-        dynamic_irq_cleanup(irq);
-}
-
 /* Set/get chip/data for an IRQ: */
 extern int irq_set_chip(unsigned int irq, struct irq_chip *chip);
 extern int irq_set_handler_data(unsigned int irq, void *data);
@@ -625,17 +607,29 @@ int __irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node,
         irq_alloc_descs(-1, from, cnt, node)
 
 void irq_free_descs(unsigned int irq, unsigned int cnt);
-int irq_reserve_irqs(unsigned int from, unsigned int cnt);
-
 static inline void irq_free_desc(unsigned int irq)
 {
         irq_free_descs(irq, 1);
 }
 
-static inline int irq_reserve_irq(unsigned int irq)
+#ifdef CONFIG_GENERIC_IRQ_LEGACY_ALLOC_HWIRQ
+unsigned int irq_alloc_hwirqs(int cnt, int node);
+static inline unsigned int irq_alloc_hwirq(int node)
+{
+        return irq_alloc_hwirqs(1, node);
+}
+void irq_free_hwirqs(unsigned int from, int cnt);
+static inline void irq_free_hwirq(unsigned int irq)
 {
-        return irq_reserve_irqs(irq, 1);
+        return irq_free_hwirqs(irq, 1);
 }
+int arch_setup_hwirq(unsigned int irq, int node);
+void arch_teardown_hwirq(unsigned int irq);
+#endif
+
+#ifdef CONFIG_GENERIC_IRQ_LEGACY
+void irq_init_desc(unsigned int irq);
+#endif
 
 #ifndef irq_reg_writel
 # define irq_reg_writel(val, addr)      writel(val, addr)
diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h
index 7ed92d0560d5..45e2d8c15bd2 100644
--- a/include/linux/irqchip/arm-gic.h
+++ b/include/linux/irqchip/arm-gic.h
@@ -21,6 +21,8 @@
 #define GIC_CPU_ACTIVEPRIO              0xd0
 #define GIC_CPU_IDENT                   0xfc
 
+#define GICC_IAR_INT_ID_MASK            0x3ff
+
 #define GIC_DIST_CTRL                   0x000
 #define GIC_DIST_CTR                    0x004
 #define GIC_DIST_IGROUP                 0x080
diff --git a/include/linux/irqdesc.h b/include/linux/irqdesc.h
index 26e2661d3935..472c021a2d4f 100644
--- a/include/linux/irqdesc.h
+++ b/include/linux/irqdesc.h
@@ -27,6 +27,8 @@ struct irq_desc;
  * @irq_count:          stats field to detect stalled irqs
  * @last_unhandled:     aging timer for unhandled count
  * @irqs_unhandled:     stats field for spurious unhandled interrupts
+ * @threads_handled:    stats field for deferred spurious detection of threaded handlers
+ * @threads_handled_last: comparator field for deferred spurious detection of theraded handlers
  * @lock:               locking for SMP
  * @affinity_hint:      hint to user space for preferred irq affinity
  * @affinity_notify:    context for notification of affinity changes
@@ -52,6 +54,8 @@ struct irq_desc {
         unsigned int            irq_count;      /* For detecting broken IRQs */
         unsigned long           last_unhandled; /* Aging timer for unhandled count */
         unsigned int            irqs_unhandled;
+        atomic_t                threads_handled;
+        int                     threads_handled_last;
         raw_spinlock_t          lock;
         struct cpumask          *percpu_enabled;
 #ifdef CONFIG_SMP
diff --git a/include/linux/jump_label.h b/include/linux/jump_label.h
index 5c1dfb2a9e73..784304b222b3 100644
--- a/include/linux/jump_label.h
+++ b/include/linux/jump_label.h
@@ -69,6 +69,10 @@ struct static_key {
 
 # include <asm/jump_label.h>
 # define HAVE_JUMP_LABEL
+#else
+struct static_key {
+        atomic_t enabled;
+};
 #endif  /* CC_HAVE_ASM_GOTO && CONFIG_JUMP_LABEL */
 
 enum jump_label_type {
@@ -79,6 +83,12 @@ enum jump_label_type {
 struct module;
 
 #include <linux/atomic.h>
+
+static inline int static_key_count(struct static_key *key)
+{
+        return atomic_read(&key->enabled);
+}
+
 #ifdef HAVE_JUMP_LABEL
 
 #define JUMP_LABEL_TYPE_FALSE_BRANCH    0UL
@@ -134,10 +144,6 @@ extern void jump_label_apply_nops(struct module *mod);
 
 #else  /* !HAVE_JUMP_LABEL */
 
-struct static_key {
-        atomic_t enabled;
-};
-
 static __always_inline void jump_label_init(void)
 {
         static_key_initialized = true;
@@ -145,14 +151,14 @@ static __always_inline void jump_label_init(void)
 
 static __always_inline bool static_key_false(struct static_key *key)
 {
-        if (unlikely(atomic_read(&key->enabled) > 0))
+        if (unlikely(static_key_count(key) > 0))
                 return true;
         return false;
 }
 
 static __always_inline bool static_key_true(struct static_key *key)
 {
-        if (likely(atomic_read(&key->enabled) > 0))
+        if (likely(static_key_count(key) > 0))
                 return true;
         return false;
 }
@@ -194,7 +200,7 @@ static inline int jump_label_apply_nops(struct module *mod)
 
 static inline bool static_key_enabled(struct static_key *key)
 {
-        return (atomic_read(&key->enabled) > 0);
+        return static_key_count(key) > 0;
 }
 
 #endif  /* _LINUX_JUMP_LABEL_H */
diff --git a/include/linux/kernfs.h b/include/linux/kernfs.h
index 52bf5677db0b..17aa1cce6f8e 100644
--- a/include/linux/kernfs.h
+++ b/include/linux/kernfs.h
@@ -161,6 +161,10 @@ struct kernfs_root {
         /* private fields, do not use outside kernfs proper */
         struct ida              ino_ida;
         struct kernfs_syscall_ops *syscall_ops;
+
+        /* list of kernfs_super_info of this root, protected by kernfs_mutex */
+        struct list_head        supers;
+
         wait_queue_head_t       deactivate_waitq;
 };
 
diff --git a/include/linux/key.h b/include/linux/key.h
index 80d677483e31..3ae45f09589b 100644
--- a/include/linux/key.h
+++ b/include/linux/key.h
@@ -332,7 +332,7 @@ do {									\
 } while (0)
 
 #ifdef CONFIG_SYSCTL
-extern ctl_table key_sysctls[];
+extern struct ctl_table key_sysctls[];
 #endif
 /*
  * the userspace interface
diff --git a/include/linux/kmemleak.h b/include/linux/kmemleak.h
index 5bb424659c04..057e95971014 100644
--- a/include/linux/kmemleak.h
+++ b/include/linux/kmemleak.h
@@ -30,6 +30,7 @@ extern void kmemleak_alloc_percpu(const void __percpu *ptr, size_t size) __ref;
 extern void kmemleak_free(const void *ptr) __ref;
 extern void kmemleak_free_part(const void *ptr, size_t size) __ref;
 extern void kmemleak_free_percpu(const void __percpu *ptr) __ref;
+extern void kmemleak_update_trace(const void *ptr) __ref;
 extern void kmemleak_not_leak(const void *ptr) __ref;
 extern void kmemleak_ignore(const void *ptr) __ref;
 extern void kmemleak_scan_area(const void *ptr, size_t size, gfp_t gfp) __ref;
@@ -83,6 +84,9 @@ static inline void kmemleak_free_recursive(const void *ptr, unsigned long flags)
 static inline void kmemleak_free_percpu(const void __percpu *ptr)
 {
 }
+static inline void kmemleak_update_trace(const void *ptr)
+{
+}
 static inline void kmemleak_not_leak(const void *ptr)
 {
 }
diff --git a/include/linux/kobject.h b/include/linux/kobject.h
index f896a33e8341..2d61b909f414 100644
--- a/include/linux/kobject.h
+++ b/include/linux/kobject.h
@@ -32,8 +32,10 @@
 #define UEVENT_NUM_ENVP                 32      /* number of env pointers */
 #define UEVENT_BUFFER_SIZE              2048    /* buffer for the variables */
 
+#ifdef CONFIG_UEVENT_HELPER
 /* path to the userspace helper executed on an event */
 extern char uevent_helper[];
+#endif
 
 /* counter to tag the uevent, read only except for the kobject core */
 extern u64 uevent_seqnum;
diff --git a/include/linux/kvm_host.h b/include/linux/kvm_host.h
index 7d21cf9f4380..970c68197c69 100644
--- a/include/linux/kvm_host.h
+++ b/include/linux/kvm_host.h
@@ -134,6 +134,8 @@ static inline bool is_error_page(struct page *page)
 #define KVM_REQ_EPR_EXIT          20
 #define KVM_REQ_SCAN_IOAPIC       21
 #define KVM_REQ_GLOBAL_CLOCK_UPDATE 22
+#define KVM_REQ_ENABLE_IBS        23
+#define KVM_REQ_DISABLE_IBS       24
 
 #define KVM_USERSPACE_IRQ_SOURCE_ID             0
 #define KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID        1
@@ -163,6 +165,7 @@ enum kvm_bus {
         KVM_MMIO_BUS,
         KVM_PIO_BUS,
         KVM_VIRTIO_CCW_NOTIFY_BUS,
+        KVM_FAST_MMIO_BUS,
         KVM_NR_BUSES
 };
 
@@ -367,6 +370,7 @@ struct kvm {
         struct mm_struct *mm; /* userspace tied to this vm */
         struct kvm_memslots *memslots;
         struct srcu_struct srcu;
+        struct srcu_struct irq_srcu;
 #ifdef CONFIG_KVM_APIC_ARCHITECTURE
         u32 bsp_vcpu_id;
 #endif
@@ -410,9 +414,7 @@ struct kvm {
         unsigned long mmu_notifier_seq;
         long mmu_notifier_count;
 #endif
-        /* Protected by mmu_lock */
-        bool tlbs_dirty;
-
+        long tlbs_dirty;
         struct list_head devices;
 };
 
@@ -879,6 +881,13 @@ static inline hpa_t pfn_to_hpa(pfn_t pfn)
         return (hpa_t)pfn << PAGE_SHIFT;
 }
 
+static inline bool kvm_is_error_gpa(struct kvm *kvm, gpa_t gpa)
+{
+        unsigned long hva = gfn_to_hva(kvm, gpa_to_gfn(gpa));
+
+        return kvm_is_error_hva(hva);
+}
+
 static inline void kvm_migrate_timers(struct kvm_vcpu *vcpu)
 {
         set_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests);
diff --git a/include/linux/mbus.h b/include/linux/mbus.h
index 345b8c53b897..550c88fb0267 100644
--- a/include/linux/mbus.h
+++ b/include/linux/mbus.h
@@ -73,6 +73,6 @@ int mvebu_mbus_del_window(phys_addr_t base, size_t size);
 int mvebu_mbus_init(const char *soc, phys_addr_t mbus_phys_base,
                     size_t mbus_size, phys_addr_t sdram_phys_base,
                     size_t sdram_size);
-int mvebu_mbus_dt_init(void);
+int mvebu_mbus_dt_init(bool is_coherent);
 
 #endif /* __LINUX_MBUS_H */
diff --git a/include/linux/mc146818rtc.h b/include/linux/mc146818rtc.h
index 2f4e957af656..433e0c74d643 100644
--- a/include/linux/mc146818rtc.h
+++ b/include/linux/mc146818rtc.h
@@ -31,6 +31,10 @@ struct cmos_rtc_board_info {
         void    (*wake_on)(struct device *dev);
         void    (*wake_off)(struct device *dev);
 
+        u32     flags;
+#define CMOS_RTC_FLAGS_NOFREQ   (1 << 0)
+        int     address_space;
+
         u8      rtc_day_alarm;          /* zero, or register index */
         u8      rtc_mon_alarm;          /* zero, or register index */
         u8      rtc_century;            /* zero, or register index */
diff --git a/include/linux/mcb.h b/include/linux/mcb.h
index 2db284d14064..ed06e15a36aa 100644
--- a/include/linux/mcb.h
+++ b/include/linux/mcb.h
@@ -16,6 +16,7 @@
 #include <linux/irqreturn.h>
 
 struct mcb_driver;
+struct mcb_device;
 
 /**
  * struct mcb_bus - MEN Chameleon Bus
@@ -23,11 +24,14 @@ struct mcb_driver;
  * @dev: pointer to carrier device
  * @children: the child busses
  * @bus_nr: mcb bus number
+ * @get_irq: callback to get IRQ number
  */
 struct mcb_bus {
         struct list_head children;
         struct device dev;
+        struct device *carrier;
         int bus_nr;
+        int (*get_irq)(struct mcb_device *dev);
 };
 #define to_mcb_bus(b) container_of((b), struct mcb_bus, dev)
 
@@ -105,7 +109,7 @@ extern void mcb_unregister_driver(struct mcb_driver *driver);
         module_driver(__mcb_driver, mcb_register_driver, mcb_unregister_driver);
 extern void mcb_bus_add_devices(const struct mcb_bus *bus);
 extern int mcb_device_register(struct mcb_bus *bus, struct mcb_device *dev);
-extern struct mcb_bus *mcb_alloc_bus(void);
+extern struct mcb_bus *mcb_alloc_bus(struct device *carrier);
 extern struct mcb_bus *mcb_bus_get(struct mcb_bus *bus);
 extern void mcb_bus_put(struct mcb_bus *bus);
 extern struct mcb_device *mcb_alloc_dev(struct mcb_bus *bus);
diff --git a/include/linux/memblock.h b/include/linux/memblock.h
index 8a20a51ed42d..b660e05b63d4 100644
--- a/include/linux/memblock.h
+++ b/include/linux/memblock.h
@@ -18,6 +18,7 @@
 #include <linux/mm.h>
 
 #define INIT_MEMBLOCK_REGIONS   128
+#define INIT_PHYSMEM_REGIONS    4
 
 /* Definition of memblock flags. */
 #define MEMBLOCK_HOTPLUG        0x1     /* hotpluggable region */
@@ -43,6 +44,9 @@ struct memblock {
         phys_addr_t current_limit;
         struct memblock_type memory;
         struct memblock_type reserved;
+#ifdef CONFIG_HAVE_MEMBLOCK_PHYS_MAP
+        struct memblock_type physmem;
+#endif
 };
 
 extern struct memblock memblock;
@@ -71,6 +75,63 @@ int memblock_reserve(phys_addr_t base, phys_addr_t size);
 void memblock_trim_memory(phys_addr_t align);
 int memblock_mark_hotplug(phys_addr_t base, phys_addr_t size);
 int memblock_clear_hotplug(phys_addr_t base, phys_addr_t size);
+
+/* Low level functions */
+int memblock_add_range(struct memblock_type *type,
+                       phys_addr_t base, phys_addr_t size,
+                       int nid, unsigned long flags);
+
+int memblock_remove_range(struct memblock_type *type,
+                          phys_addr_t base,
+                          phys_addr_t size);
+
+void __next_mem_range(u64 *idx, int nid, struct memblock_type *type_a,
+                      struct memblock_type *type_b, phys_addr_t *out_start,
+                      phys_addr_t *out_end, int *out_nid);
+
+void __next_mem_range_rev(u64 *idx, int nid, struct memblock_type *type_a,
+                          struct memblock_type *type_b, phys_addr_t *out_start,
+                          phys_addr_t *out_end, int *out_nid);
+
+/**
+ * for_each_mem_range - iterate through memblock areas from type_a and not
+ * included in type_b. Or just type_a if type_b is NULL.
+ * @i: u64 used as loop variable
+ * @type_a: ptr to memblock_type to iterate
+ * @type_b: ptr to memblock_type which excludes from the iteration
+ * @nid: node selector, %NUMA_NO_NODE for all nodes
+ * @p_start: ptr to phys_addr_t for start address of the range, can be %NULL
+ * @p_end: ptr to phys_addr_t for end address of the range, can be %NULL
+ * @p_nid: ptr to int for nid of the range, can be %NULL
+ */
+#define for_each_mem_range(i, type_a, type_b, nid,                      \
+                           p_start, p_end, p_nid)                       \
+        for (i = 0, __next_mem_range(&i, nid, type_a, type_b,           \
+                                     p_start, p_end, p_nid);            \
+             i != (u64)ULLONG_MAX;                                      \
+             __next_mem_range(&i, nid, type_a, type_b,                  \
+                              p_start, p_end, p_nid))
+
+/**
+ * for_each_mem_range_rev - reverse iterate through memblock areas from
+ * type_a and not included in type_b. Or just type_a if type_b is NULL.
+ * @i: u64 used as loop variable
+ * @type_a: ptr to memblock_type to iterate
+ * @type_b: ptr to memblock_type which excludes from the iteration
+ * @nid: node selector, %NUMA_NO_NODE for all nodes
+ * @p_start: ptr to phys_addr_t for start address of the range, can be %NULL
+ * @p_end: ptr to phys_addr_t for end address of the range, can be %NULL
+ * @p_nid: ptr to int for nid of the range, can be %NULL
+ */
+#define for_each_mem_range_rev(i, type_a, type_b, nid,                  \
+                               p_start, p_end, p_nid)                   \
+        for (i = (u64)ULLONG_MAX,                                       \
+                     __next_mem_range_rev(&i, nid, type_a, type_b,      \
+                                         p_start, p_end, p_nid);        \
+             i != (u64)ULLONG_MAX;                                      \
+             __next_mem_range_rev(&i, nid, type_a, type_b,              \
+                                  p_start, p_end, p_nid))
+
 #ifdef CONFIG_MOVABLE_NODE
 static inline bool memblock_is_hotpluggable(struct memblock_region *m)
 {
@@ -113,9 +174,6 @@ void __next_mem_pfn_range(int *idx, int nid, unsigned long *out_start_pfn,
              i >= 0; __next_mem_pfn_range(&i, nid, p_start, p_end, p_nid))
 #endif /* CONFIG_HAVE_MEMBLOCK_NODE_MAP */
 
-void __next_free_mem_range(u64 *idx, int nid, phys_addr_t *out_start,
-                           phys_addr_t *out_end, int *out_nid);
-
 /**
  * for_each_free_mem_range - iterate through free memblock areas
  * @i: u64 used as loop variable
@@ -128,13 +186,8 @@ void __next_free_mem_range(u64 *idx, int nid, phys_addr_t *out_start,
  * soon as memblock is initialized.
  */
 #define for_each_free_mem_range(i, nid, p_start, p_end, p_nid)          \
-        for (i = 0,                                                     \
-             __next_free_mem_range(&i, nid, p_start, p_end, p_nid);     \
-             i != (u64)ULLONG_MAX;                                      \
-             __next_free_mem_range(&i, nid, p_start, p_end, p_nid))
-
-void __next_free_mem_range_rev(u64 *idx, int nid, phys_addr_t *out_start,
-                               phys_addr_t *out_end, int *out_nid);
+        for_each_mem_range(i, &memblock.memory, &memblock.reserved,     \
+                           nid, p_start, p_end, p_nid)
 
 /**
  * for_each_free_mem_range_reverse - rev-iterate through free memblock areas
@@ -148,10 +201,8 @@ void __next_free_mem_range_rev(u64 *idx, int nid, phys_addr_t *out_start,
  * order.  Available as soon as memblock is initialized.
  */
 #define for_each_free_mem_range_reverse(i, nid, p_start, p_end, p_nid)  \
-        for (i = (u64)ULLONG_MAX,                                       \
-             __next_free_mem_range_rev(&i, nid, p_start, p_end, p_nid); \
-             i != (u64)ULLONG_MAX;                                      \
-             __next_free_mem_range_rev(&i, nid, p_start, p_end, p_nid))
+        for_each_mem_range_rev(i, &memblock.memory, &memblock.reserved, \
+                               nid, p_start, p_end, p_nid)
 
 static inline void memblock_set_region_flags(struct memblock_region *r,
                                              unsigned long flags)
@@ -221,6 +272,8 @@ static inline bool memblock_bottom_up(void) { return false; }
 #define MEMBLOCK_ALLOC_ANYWHERE (~(phys_addr_t)0)
 #define MEMBLOCK_ALLOC_ACCESSIBLE       0
 
+phys_addr_t __init memblock_alloc_range(phys_addr_t size, phys_addr_t align,
+                                        phys_addr_t start, phys_addr_t end);
 phys_addr_t memblock_alloc_base(phys_addr_t size, phys_addr_t align,
                                 phys_addr_t max_addr);
 phys_addr_t __memblock_alloc_base(phys_addr_t size, phys_addr_t align,
diff --git a/include/linux/memcontrol.h b/include/linux/memcontrol.h
index b569b8be5c5a..eb65d29516ca 100644
--- a/include/linux/memcontrol.h
+++ b/include/linux/memcontrol.h
@@ -492,13 +492,9 @@ void __memcg_kmem_uncharge_pages(struct page *page, int order);
 
 int memcg_cache_id(struct mem_cgroup *memcg);
 
-char *memcg_create_cache_name(struct mem_cgroup *memcg,
-                              struct kmem_cache *root_cache);
 int memcg_alloc_cache_params(struct mem_cgroup *memcg, struct kmem_cache *s,
                              struct kmem_cache *root_cache);
 void memcg_free_cache_params(struct kmem_cache *s);
-void memcg_register_cache(struct kmem_cache *s);
-void memcg_unregister_cache(struct kmem_cache *s);
 
 int memcg_update_cache_size(struct kmem_cache *s, int num_groups);
 void memcg_update_array_size(int num_groups);
@@ -506,8 +502,10 @@ void memcg_update_array_size(int num_groups);
 struct kmem_cache *
 __memcg_kmem_get_cache(struct kmem_cache *cachep, gfp_t gfp);
 
-void mem_cgroup_destroy_cache(struct kmem_cache *cachep);
-int __kmem_cache_destroy_memcg_children(struct kmem_cache *s);
+int __memcg_charge_slab(struct kmem_cache *cachep, gfp_t gfp, int order);
+void __memcg_uncharge_slab(struct kmem_cache *cachep, int order);
+
+int __memcg_cleanup_cache_params(struct kmem_cache *s);
 
 /**
  * memcg_kmem_newpage_charge: verify if a new kmem allocation is allowed.
@@ -534,7 +532,7 @@ memcg_kmem_newpage_charge(gfp_t gfp, struct mem_cgroup **memcg, int order)
          * res_counter_charge_nofail, but we hope those allocations are rare,
          * and won't be worth the trouble.
          */
-        if (!(gfp & __GFP_KMEMCG) || (gfp & __GFP_NOFAIL))
+        if (gfp & __GFP_NOFAIL)
                 return true;
         if (in_interrupt() || (!current->mm) || (current->flags & PF_KTHREAD))
                 return true;
@@ -583,17 +581,7 @@ memcg_kmem_commit_charge(struct page *page, struct mem_cgroup *memcg, int order)
  * @cachep: the original global kmem cache
  * @gfp: allocation flags.
  *
- * This function assumes that the task allocating, which determines the memcg
- * in the page allocator, belongs to the same cgroup throughout the whole
- * process.  Misacounting can happen if the task calls memcg_kmem_get_cache()
- * while belonging to a cgroup, and later on changes. This is considered
- * acceptable, and should only happen upon task migration.
- *
- * Before the cache is created by the memcg core, there is also a possible
- * imbalance: the task belongs to a memcg, but the cache being allocated from
- * is the global cache, since the child cache is not yet guaranteed to be
- * ready. This case is also fine, since in this case the GFP_KMEMCG will not be
- * passed and the page allocator will not attempt any cgroup accounting.
+ * All memory allocated from a per-memcg cache is charged to the owner memcg.
  */
 static __always_inline struct kmem_cache *
 memcg_kmem_get_cache(struct kmem_cache *cachep, gfp_t gfp)
@@ -648,14 +636,6 @@ static inline void memcg_free_cache_params(struct kmem_cache *s)
 {
 }
 
-static inline void memcg_register_cache(struct kmem_cache *s)
-{
-}
-
-static inline void memcg_unregister_cache(struct kmem_cache *s)
-{
-}
-
 static inline struct kmem_cache *
 memcg_kmem_get_cache(struct kmem_cache *cachep, gfp_t gfp)
 {
diff --git a/include/linux/memory_hotplug.h b/include/linux/memory_hotplug.h
index 4ca3d951fe91..010d125bffbf 100644
--- a/include/linux/memory_hotplug.h
+++ b/include/linux/memory_hotplug.h
@@ -187,14 +187,8 @@ extern void put_page_bootmem(struct page *page);
 extern void get_page_bootmem(unsigned long ingo, struct page *page,
                              unsigned long type);
 
-/*
- * Lock for memory hotplug guarantees 1) all callbacks for memory hotplug
- * notifier will be called under this. 2) offline/online/add/remove memory
- * will not run simultaneously.
- */
-
-void lock_memory_hotplug(void);
-void unlock_memory_hotplug(void);
+void get_online_mems(void);
+void put_online_mems(void);
 
 #else /* ! CONFIG_MEMORY_HOTPLUG */
 /*
@@ -232,8 +226,8 @@ static inline int try_online_node(int nid)
         return 0;
 }
 
-static inline void lock_memory_hotplug(void) {}
-static inline void unlock_memory_hotplug(void) {}
+static inline void get_online_mems(void) {}
+static inline void put_online_mems(void) {}
 
 #endif /* ! CONFIG_MEMORY_HOTPLUG */
 
diff --git a/include/linux/mempolicy.h b/include/linux/mempolicy.h
index 3c1b968da0ca..f230a978e6ba 100644
--- a/include/linux/mempolicy.h
+++ b/include/linux/mempolicy.h
@@ -175,6 +175,12 @@ static inline int vma_migratable(struct vm_area_struct *vma)
 {
         if (vma->vm_flags & (VM_IO | VM_PFNMAP))
                 return 0;
+
+#ifndef CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION
+        if (vma->vm_flags & VM_HUGETLB)
+                return 0;
+#endif
+
         /*
          * Migration allocates pages in the highest zone. If we cannot
          * do so then migration (at least from node to node) is not
diff --git a/include/linux/mfd/abx500.h b/include/linux/mfd/abx500.h
index 3301b2031c8d..552cc1d61cc7 100644
--- a/include/linux/mfd/abx500.h
+++ b/include/linux/mfd/abx500.h
@@ -330,7 +330,6 @@ int abx500_mask_and_set_register_interruptible(struct device *dev, u8 bank,
 int abx500_get_chip_id(struct device *dev);
 int abx500_event_registers_startup_state_get(struct device *dev, u8 *event);
 int abx500_startup_irq_enabled(struct device *dev, unsigned int irq);
-void abx500_dump_all_banks(void);
 
 struct abx500_ops {
         int (*get_chip_id) (struct device *);
diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h
index 5cf8b91ce996..6d9371f88875 100644
--- a/include/linux/mfd/arizona/core.h
+++ b/include/linux/mfd/arizona/core.h
@@ -124,4 +124,7 @@ int wm5102_patch(struct arizona *arizona);
 int wm5110_patch(struct arizona *arizona);
 int wm8997_patch(struct arizona *arizona);
 
+extern int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop,
+                                     bool mandatory);
+
 #endif
diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h
index 7b35c21170d5..7204d8138b24 100644
--- a/include/linux/mfd/arizona/registers.h
+++ b/include/linux/mfd/arizona/registers.h
@@ -42,12 +42,14 @@
 #define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_2    0x62
 #define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_3    0x63
 #define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_4    0x64
-#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_1 0x68
-#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_2 0x69
-#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_3 0x6A
-#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_4 0x6B
-#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_5 0x6C
-#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_6 0x6D
+#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_1 0x66
+#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_2 0x67
+#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_3 0x68
+#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_4 0x69
+#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_5 0x6A
+#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_6 0x6B
+#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_7 0x6C
+#define ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_8 0x6D
 #define ARIZONA_COMFORT_NOISE_GENERATOR          0x70
 #define ARIZONA_HAPTICS_CONTROL_1                0x90
 #define ARIZONA_HAPTICS_CONTROL_2                0x91
diff --git a/include/linux/mfd/axp20x.h b/include/linux/mfd/axp20x.h
new file mode 100644
index 000000000000..d0e31a2287ac
--- /dev/null
+++ b/include/linux/mfd/axp20x.h
@@ -0,0 +1,180 @@
+/*
+ * Functions and registers to access AXP20X power management chip.
+ *
+ * Copyright (C) 2013, Carlo Caione <carlo@caione.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __LINUX_MFD_AXP20X_H
+#define __LINUX_MFD_AXP20X_H
+
+enum {
+        AXP202_ID = 0,
+        AXP209_ID,
+};
+
+#define AXP20X_DATACACHE(m)             (0x04 + (m))
+
+/* Power supply */
+#define AXP20X_PWR_INPUT_STATUS         0x00
+#define AXP20X_PWR_OP_MODE              0x01
+#define AXP20X_USB_OTG_STATUS           0x02
+#define AXP20X_PWR_OUT_CTRL             0x12
+#define AXP20X_DCDC2_V_OUT              0x23
+#define AXP20X_DCDC2_LDO3_V_SCAL        0x25
+#define AXP20X_DCDC3_V_OUT              0x27
+#define AXP20X_LDO24_V_OUT              0x28
+#define AXP20X_LDO3_V_OUT               0x29
+#define AXP20X_VBUS_IPSOUT_MGMT         0x30
+#define AXP20X_V_OFF                    0x31
+#define AXP20X_OFF_CTRL                 0x32
+#define AXP20X_CHRG_CTRL1               0x33
+#define AXP20X_CHRG_CTRL2               0x34
+#define AXP20X_CHRG_BAK_CTRL            0x35
+#define AXP20X_PEK_KEY                  0x36
+#define AXP20X_DCDC_FREQ                0x37
+#define AXP20X_V_LTF_CHRG               0x38
+#define AXP20X_V_HTF_CHRG               0x39
+#define AXP20X_APS_WARN_L1              0x3a
+#define AXP20X_APS_WARN_L2              0x3b
+#define AXP20X_V_LTF_DISCHRG            0x3c
+#define AXP20X_V_HTF_DISCHRG            0x3d
+
+/* Interrupt */
+#define AXP20X_IRQ1_EN                  0x40
+#define AXP20X_IRQ2_EN                  0x41
+#define AXP20X_IRQ3_EN                  0x42
+#define AXP20X_IRQ4_EN                  0x43
+#define AXP20X_IRQ5_EN                  0x44
+#define AXP20X_IRQ1_STATE               0x48
+#define AXP20X_IRQ2_STATE               0x49
+#define AXP20X_IRQ3_STATE               0x4a
+#define AXP20X_IRQ4_STATE               0x4b
+#define AXP20X_IRQ5_STATE               0x4c
+
+/* ADC */
+#define AXP20X_ACIN_V_ADC_H             0x56
+#define AXP20X_ACIN_V_ADC_L             0x57
+#define AXP20X_ACIN_I_ADC_H             0x58
+#define AXP20X_ACIN_I_ADC_L             0x59
+#define AXP20X_VBUS_V_ADC_H             0x5a
+#define AXP20X_VBUS_V_ADC_L             0x5b
+#define AXP20X_VBUS_I_ADC_H             0x5c
+#define AXP20X_VBUS_I_ADC_L             0x5d
+#define AXP20X_TEMP_ADC_H               0x5e
+#define AXP20X_TEMP_ADC_L               0x5f
+#define AXP20X_TS_IN_H                  0x62
+#define AXP20X_TS_IN_L                  0x63
+#define AXP20X_GPIO0_V_ADC_H            0x64
+#define AXP20X_GPIO0_V_ADC_L            0x65
+#define AXP20X_GPIO1_V_ADC_H            0x66
+#define AXP20X_GPIO1_V_ADC_L            0x67
+#define AXP20X_PWR_BATT_H               0x70
+#define AXP20X_PWR_BATT_M               0x71
+#define AXP20X_PWR_BATT_L               0x72
+#define AXP20X_BATT_V_H                 0x78
+#define AXP20X_BATT_V_L                 0x79
+#define AXP20X_BATT_CHRG_I_H            0x7a
+#define AXP20X_BATT_CHRG_I_L            0x7b
+#define AXP20X_BATT_DISCHRG_I_H         0x7c
+#define AXP20X_BATT_DISCHRG_I_L         0x7d
+#define AXP20X_IPSOUT_V_HIGH_H          0x7e
+#define AXP20X_IPSOUT_V_HIGH_L          0x7f
+
+/* Power supply */
+#define AXP20X_DCDC_MODE                0x80
+#define AXP20X_ADC_EN1                  0x82
+#define AXP20X_ADC_EN2                  0x83
+#define AXP20X_ADC_RATE                 0x84
+#define AXP20X_GPIO10_IN_RANGE          0x85
+#define AXP20X_GPIO1_ADC_IRQ_RIS        0x86
+#define AXP20X_GPIO1_ADC_IRQ_FAL        0x87
+#define AXP20X_TIMER_CTRL               0x8a
+#define AXP20X_VBUS_MON                 0x8b
+#define AXP20X_OVER_TMP                 0x8f
+
+/* GPIO */
+#define AXP20X_GPIO0_CTRL               0x90
+#define AXP20X_LDO5_V_OUT               0x91
+#define AXP20X_GPIO1_CTRL               0x92
+#define AXP20X_GPIO2_CTRL               0x93
+#define AXP20X_GPIO20_SS                0x94
+#define AXP20X_GPIO3_CTRL               0x95
+
+/* Battery */
+#define AXP20X_CHRG_CC_31_24            0xb0
+#define AXP20X_CHRG_CC_23_16            0xb1
+#define AXP20X_CHRG_CC_15_8             0xb2
+#define AXP20X_CHRG_CC_7_0              0xb3
+#define AXP20X_DISCHRG_CC_31_24         0xb4
+#define AXP20X_DISCHRG_CC_23_16         0xb5
+#define AXP20X_DISCHRG_CC_15_8          0xb6
+#define AXP20X_DISCHRG_CC_7_0           0xb7
+#define AXP20X_CC_CTRL                  0xb8
+#define AXP20X_FG_RES                   0xb9
+
+/* Regulators IDs */
+enum {
+        AXP20X_LDO1 = 0,
+        AXP20X_LDO2,
+        AXP20X_LDO3,
+        AXP20X_LDO4,
+        AXP20X_LDO5,
+        AXP20X_DCDC2,
+        AXP20X_DCDC3,
+        AXP20X_REG_ID_MAX,
+};
+
+/* IRQs */
+enum {
+        AXP20X_IRQ_ACIN_OVER_V = 1,
+        AXP20X_IRQ_ACIN_PLUGIN,
+        AXP20X_IRQ_ACIN_REMOVAL,
+        AXP20X_IRQ_VBUS_OVER_V,
+        AXP20X_IRQ_VBUS_PLUGIN,
+        AXP20X_IRQ_VBUS_REMOVAL,
+        AXP20X_IRQ_VBUS_V_LOW,
+        AXP20X_IRQ_BATT_PLUGIN,
+        AXP20X_IRQ_BATT_REMOVAL,
+        AXP20X_IRQ_BATT_ENT_ACT_MODE,
+        AXP20X_IRQ_BATT_EXIT_ACT_MODE,
+        AXP20X_IRQ_CHARG,
+        AXP20X_IRQ_CHARG_DONE,
+        AXP20X_IRQ_BATT_TEMP_HIGH,
+        AXP20X_IRQ_BATT_TEMP_LOW,
+        AXP20X_IRQ_DIE_TEMP_HIGH,
+        AXP20X_IRQ_CHARG_I_LOW,
+        AXP20X_IRQ_DCDC1_V_LONG,
+        AXP20X_IRQ_DCDC2_V_LONG,
+        AXP20X_IRQ_DCDC3_V_LONG,
+        AXP20X_IRQ_PEK_SHORT = 22,
+        AXP20X_IRQ_PEK_LONG,
+        AXP20X_IRQ_N_OE_PWR_ON,
+        AXP20X_IRQ_N_OE_PWR_OFF,
+        AXP20X_IRQ_VBUS_VALID,
+        AXP20X_IRQ_VBUS_NOT_VALID,
+        AXP20X_IRQ_VBUS_SESS_VALID,
+        AXP20X_IRQ_VBUS_SESS_END,
+        AXP20X_IRQ_LOW_PWR_LVL1,
+        AXP20X_IRQ_LOW_PWR_LVL2,
+        AXP20X_IRQ_TIMER,
+        AXP20X_IRQ_PEK_RIS_EDGE,
+        AXP20X_IRQ_PEK_FAL_EDGE,
+        AXP20X_IRQ_GPIO3_INPUT,
+        AXP20X_IRQ_GPIO2_INPUT,
+        AXP20X_IRQ_GPIO1_INPUT,
+        AXP20X_IRQ_GPIO0_INPUT,
+};
+
+struct axp20x_dev {
+        struct device                   *dev;
+        struct i2c_client               *i2c_client;
+        struct regmap                   *regmap;
+        struct regmap_irq_chip_data     *regmap_irqc;
+        long                            variant;
+};
+
+#endif /* __LINUX_MFD_AXP20X_H */
diff --git a/include/linux/mfd/bcm590xx.h b/include/linux/mfd/bcm590xx.h
index 434df2d4e587..267aedee1c7a 100644
--- a/include/linux/mfd/bcm590xx.h
+++ b/include/linux/mfd/bcm590xx.h
@@ -19,12 +19,15 @@
 #include <linux/regmap.h>
 
 /* max register address */
-#define BCM590XX_MAX_REGISTER   0xe7
+#define BCM590XX_MAX_REGISTER_PRI       0xe7
+#define BCM590XX_MAX_REGISTER_SEC       0xf0
 
 struct bcm590xx {
         struct device *dev;
-        struct i2c_client *i2c_client;
-        struct regmap *regmap;
+        struct i2c_client *i2c_pri;
+        struct i2c_client *i2c_sec;
+        struct regmap *regmap_pri;
+        struct regmap *regmap_sec;
         unsigned int id;
 };
 
diff --git a/include/linux/mfd/core.h b/include/linux/mfd/core.h
index bdba8c61207b..f543de91ce19 100644
--- a/include/linux/mfd/core.h
+++ b/include/linux/mfd/core.h
@@ -63,7 +63,7 @@ struct mfd_cell {
         /* A list of regulator supplies that should be mapped to the MFD
          * device rather than the child device when requested
          */
-        const char              **parent_supplies;
+        const char * const      *parent_supplies;
         int                     num_parent_supplies;
 };
 
diff --git a/include/linux/mfd/cros_ec.h b/include/linux/mfd/cros_ec.h
index 032af7fc5b2e..887ef4f7bef7 100644
--- a/include/linux/mfd/cros_ec.h
+++ b/include/linux/mfd/cros_ec.h
@@ -29,8 +29,8 @@ enum {
         EC_MSG_RX_PROTO_BYTES   = 3,
 
         /* Max length of messages */
-        EC_MSG_BYTES            = EC_HOST_PARAM_SIZE + EC_MSG_TX_PROTO_BYTES,
-
+        EC_MSG_BYTES            = EC_PROTO2_MAX_PARAM_SIZE +
+                                        EC_MSG_TX_PROTO_BYTES,
 };
 
 /**
diff --git a/include/linux/mfd/cros_ec_commands.h b/include/linux/mfd/cros_ec_commands.h
index 86fd06953bcd..7853a6410d14 100644
--- a/include/linux/mfd/cros_ec_commands.h
+++ b/include/linux/mfd/cros_ec_commands.h
@@ -24,25 +24,12 @@
 #define __CROS_EC_COMMANDS_H
 
 /*
- * Protocol overview
+ * Current version of this protocol
  *
- * request:  CMD [ P0 P1 P2 ... Pn S ]
- * response: ERR [ P0 P1 P2 ... Pn S ]
- *
- * where the bytes are defined as follow :
- *      - CMD is the command code. (defined by EC_CMD_ constants)
- *      - ERR is the error code. (defined by EC_RES_ constants)
- *      - Px is the optional payload.
- *        it is not sent if the error code is not success.
- *        (defined by ec_params_ and ec_response_ structures)
- *      - S is the checksum which is the sum of all payload bytes.
- *
- * On LPC, CMD and ERR are sent/received at EC_LPC_ADDR_KERNEL|USER_CMD
- * and the payloads are sent/received at EC_LPC_ADDR_KERNEL|USER_PARAM.
- * On I2C, all bytes are sent serially in the same message.
+ * TODO(crosbug.com/p/11223): This is effectively useless; protocol is
+ * determined in other ways.  Remove this once the kernel code no longer
+ * depends on it.
  */
-
-/* Current version of this protocol */
 #define EC_PROTO_VERSION          0x00000002
 
 /* Command version mask */
@@ -57,13 +44,19 @@
 #define EC_LPC_ADDR_HOST_CMD   0x204
 
 /* I/O addresses for host command args and params */
-#define EC_LPC_ADDR_HOST_ARGS  0x800
-#define EC_LPC_ADDR_HOST_PARAM 0x804
-#define EC_HOST_PARAM_SIZE     0x0fc  /* Size of param area in bytes */
-
-/* I/O addresses for host command params, old interface */
-#define EC_LPC_ADDR_OLD_PARAM  0x880
-#define EC_OLD_PARAM_SIZE      0x080  /* Size of param area in bytes */
+/* Protocol version 2 */
+#define EC_LPC_ADDR_HOST_ARGS    0x800  /* And 0x801, 0x802, 0x803 */
+#define EC_LPC_ADDR_HOST_PARAM   0x804  /* For version 2 params; size is
+                                         * EC_PROTO2_MAX_PARAM_SIZE */
+/* Protocol version 3 */
+#define EC_LPC_ADDR_HOST_PACKET  0x800  /* Offset of version 3 packet */
+#define EC_LPC_HOST_PACKET_SIZE  0x100  /* Max size of version 3 packet */
+
+/* The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff
+ * and they tell the kernel that so we have to think of it as two parts. */
+#define EC_HOST_CMD_REGION0    0x800
+#define EC_HOST_CMD_REGION1    0x880
+#define EC_HOST_CMD_REGION_SIZE 0x80
 
 /* EC command register bit functions */
 #define EC_LPC_CMDR_DATA        (1 << 0)  /* Data ready for host to read */
@@ -79,18 +72,22 @@
 #define EC_MEMMAP_TEXT_MAX     8   /* Size of a string in the memory map */
 
 /* The offset address of each type of data in mapped memory. */
-#define EC_MEMMAP_TEMP_SENSOR      0x00 /* Temp sensors */
-#define EC_MEMMAP_FAN              0x10 /* Fan speeds */
-#define EC_MEMMAP_TEMP_SENSOR_B    0x18 /* Temp sensors (second set) */
-#define EC_MEMMAP_ID               0x20 /* 'E' 'C' */
+#define EC_MEMMAP_TEMP_SENSOR      0x00 /* Temp sensors 0x00 - 0x0f */
+#define EC_MEMMAP_FAN              0x10 /* Fan speeds 0x10 - 0x17 */
+#define EC_MEMMAP_TEMP_SENSOR_B    0x18 /* More temp sensors 0x18 - 0x1f */
+#define EC_MEMMAP_ID               0x20 /* 0x20 == 'E', 0x21 == 'C' */
 #define EC_MEMMAP_ID_VERSION       0x22 /* Version of data in 0x20 - 0x2f */
 #define EC_MEMMAP_THERMAL_VERSION  0x23 /* Version of data in 0x00 - 0x1f */
 #define EC_MEMMAP_BATTERY_VERSION  0x24 /* Version of data in 0x40 - 0x7f */
 #define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */
 #define EC_MEMMAP_EVENTS_VERSION   0x26 /* Version of data in 0x34 - 0x3f */
-#define EC_MEMMAP_HOST_CMD_FLAGS   0x27 /* Host command interface flags */
-#define EC_MEMMAP_SWITCHES         0x30
-#define EC_MEMMAP_HOST_EVENTS      0x34
+#define EC_MEMMAP_HOST_CMD_FLAGS   0x27 /* Host cmd interface flags (8 bits) */
+/* Unused 0x28 - 0x2f */
+#define EC_MEMMAP_SWITCHES         0x30 /* 8 bits */
+/* Unused 0x31 - 0x33 */
+#define EC_MEMMAP_HOST_EVENTS      0x34 /* 32 bits */
+/* Reserve 0x38 - 0x3f for additional host event-related stuff */
+/* Battery values are all 32 bits */
 #define EC_MEMMAP_BATT_VOLT        0x40 /* Battery Present Voltage */
 #define EC_MEMMAP_BATT_RATE        0x44 /* Battery Present Rate */
 #define EC_MEMMAP_BATT_CAP         0x48 /* Battery Remaining Capacity */
@@ -99,10 +96,24 @@
 #define EC_MEMMAP_BATT_DVLT        0x54 /* Battery Design Voltage */
 #define EC_MEMMAP_BATT_LFCC        0x58 /* Battery Last Full Charge Capacity */
 #define EC_MEMMAP_BATT_CCNT        0x5c /* Battery Cycle Count */
+/* Strings are all 8 bytes (EC_MEMMAP_TEXT_MAX) */
 #define EC_MEMMAP_BATT_MFGR        0x60 /* Battery Manufacturer String */
 #define EC_MEMMAP_BATT_MODEL       0x68 /* Battery Model Number String */
 #define EC_MEMMAP_BATT_SERIAL      0x70 /* Battery Serial Number String */
 #define EC_MEMMAP_BATT_TYPE        0x78 /* Battery Type String */
+#define EC_MEMMAP_ALS              0x80 /* ALS readings in lux (2 X 16 bits) */
+/* Unused 0x84 - 0x8f */
+#define EC_MEMMAP_ACC_STATUS       0x90 /* Accelerometer status (8 bits )*/
+/* Unused 0x91 */
+#define EC_MEMMAP_ACC_DATA         0x92 /* Accelerometer data 0x92 - 0x9f */
+#define EC_MEMMAP_GYRO_DATA        0xa0 /* Gyroscope data 0xa0 - 0xa5 */
+/* Unused 0xa6 - 0xfe (remember, 0xff is NOT part of the memmap region) */
+
+
+/* Define the format of the accelerometer mapped memory status byte. */
+#define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK  0x0f
+#define EC_MEMMAP_ACC_STATUS_BUSY_BIT        (1 << 4)
+#define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT    (1 << 7)
 
 /* Number of temp sensors at EC_MEMMAP_TEMP_SENSOR */
 #define EC_TEMP_SENSOR_ENTRIES     16
@@ -112,6 +123,8 @@
  * Valid only if EC_MEMMAP_THERMAL_VERSION returns >= 2.
  */
 #define EC_TEMP_SENSOR_B_ENTRIES      8
+
+/* Special values for mapped temperature sensors */
 #define EC_TEMP_SENSOR_NOT_PRESENT    0xff
 #define EC_TEMP_SENSOR_ERROR          0xfe
 #define EC_TEMP_SENSOR_NOT_POWERED    0xfd
@@ -122,6 +135,18 @@
  */
 #define EC_TEMP_SENSOR_OFFSET      200
 
+/*
+ * Number of ALS readings at EC_MEMMAP_ALS
+ */
+#define EC_ALS_ENTRIES             2
+
+/*
+ * The default value a temperature sensor will return when it is present but
+ * has not been read this boot.  This is a reasonable number to avoid
+ * triggering alarms on the host.
+ */
+#define EC_TEMP_SENSOR_DEFAULT     (296 - EC_TEMP_SENSOR_OFFSET)
+
 #define EC_FAN_SPEED_ENTRIES       4       /* Number of fans at EC_MEMMAP_FAN */
 #define EC_FAN_SPEED_NOT_PRESENT   0xffff  /* Entry not present */
 #define EC_FAN_SPEED_STALLED       0xfffe  /* Fan stalled */
@@ -137,8 +162,8 @@
 #define EC_SWITCH_LID_OPEN               0x01
 #define EC_SWITCH_POWER_BUTTON_PRESSED   0x02
 #define EC_SWITCH_WRITE_PROTECT_DISABLED 0x04
-/* Recovery requested via keyboard */
-#define EC_SWITCH_KEYBOARD_RECOVERY      0x08
+/* Was recovery requested via keyboard; now unused. */
+#define EC_SWITCH_IGNORE1                0x08
 /* Recovery requested via dedicated signal (from servo board) */
 #define EC_SWITCH_DEDICATED_RECOVERY     0x10
 /* Was fake developer mode switch; now unused.  Remove in next refactor. */
@@ -147,10 +172,15 @@
 /* Host command interface flags */
 /* Host command interface supports LPC args (LPC interface only) */
 #define EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED  0x01
+/* Host command interface supports version 3 protocol */
+#define EC_HOST_CMD_FLAG_VERSION_3   0x02
 
 /* Wireless switch flags */
-#define EC_WIRELESS_SWITCH_WLAN      0x01
-#define EC_WIRELESS_SWITCH_BLUETOOTH 0x02
+#define EC_WIRELESS_SWITCH_ALL       ~0x00  /* All flags */
+#define EC_WIRELESS_SWITCH_WLAN       0x01  /* WLAN radio */
+#define EC_WIRELESS_SWITCH_BLUETOOTH  0x02  /* Bluetooth radio */
+#define EC_WIRELESS_SWITCH_WWAN       0x04  /* WWAN power */
+#define EC_WIRELESS_SWITCH_WLAN_POWER 0x08  /* WLAN power */
 
 /*
  * This header file is used in coreboot both in C and ACPI code.  The ACPI code
@@ -159,6 +189,14 @@
  */
 #ifndef __ACPI__
 
+/*
+ * Define __packed if someone hasn't beat us to it.  Linux kernel style
+ * checking prefers __packed over __attribute__((packed)).
+ */
+#ifndef __packed
+#define __packed __attribute__((packed))
+#endif
+
 /* LPC command status byte masks */
 /* EC has written a byte in the data register and host hasn't read it yet */
 #define EC_LPC_STATUS_TO_HOST     0x01
@@ -198,6 +236,9 @@ enum ec_status {
         EC_RES_UNAVAILABLE = 9,         /* No response available */
         EC_RES_TIMEOUT = 10,            /* We got a timeout */
         EC_RES_OVERFLOW = 11,           /* Table / data overflow */
+        EC_RES_INVALID_HEADER = 12,     /* Header contains invalid data */
+        EC_RES_REQUEST_TRUNCATED = 13,  /* Didn't get the entire request */
+        EC_RES_RESPONSE_TOO_BIG = 14    /* Response was too big to handle */
 };
 
 /*
@@ -235,6 +276,16 @@ enum host_event_code {
         /* Shutdown due to battery level too low */
         EC_HOST_EVENT_BATTERY_SHUTDOWN = 17,
 
+        /* Suggest that the AP throttle itself */
+        EC_HOST_EVENT_THROTTLE_START = 18,
+        /* Suggest that the AP resume normal speed */
+        EC_HOST_EVENT_THROTTLE_STOP = 19,
+
+        /* Hang detect logic detected a hang and host event timeout expired */
+        EC_HOST_EVENT_HANG_DETECT = 20,
+        /* Hang detect logic detected a hang and warm rebooted the AP */
+        EC_HOST_EVENT_HANG_REBOOT = 21,
+
         /*
          * The high bit of the event mask is not used as a host event code.  If
          * it reads back as set, then the entire event mask should be
@@ -279,6 +330,188 @@ struct ec_lpc_host_args {
  */
 #define EC_HOST_ARGS_FLAG_TO_HOST   0x02
 
+/*****************************************************************************/
+/*
+ * Byte codes returned by EC over SPI interface.
+ *
+ * These can be used by the AP to debug the EC interface, and to determine
+ * when the EC is not in a state where it will ever get around to responding
+ * to the AP.
+ *
+ * Example of sequence of bytes read from EC for a current good transfer:
+ *   1. -                  - AP asserts chip select (CS#)
+ *   2. EC_SPI_OLD_READY   - AP sends first byte(s) of request
+ *   3. -                  - EC starts handling CS# interrupt
+ *   4. EC_SPI_RECEIVING   - AP sends remaining byte(s) of request
+ *   5. EC_SPI_PROCESSING  - EC starts processing request; AP is clocking in
+ *                           bytes looking for EC_SPI_FRAME_START
+ *   6. -                  - EC finishes processing and sets up response
+ *   7. EC_SPI_FRAME_START - AP reads frame byte
+ *   8. (response packet)  - AP reads response packet
+ *   9. EC_SPI_PAST_END    - Any additional bytes read by AP
+ *   10 -                  - AP deasserts chip select
+ *   11 -                  - EC processes CS# interrupt and sets up DMA for
+ *                           next request
+ *
+ * If the AP is waiting for EC_SPI_FRAME_START and sees any value other than
+ * the following byte values:
+ *   EC_SPI_OLD_READY
+ *   EC_SPI_RX_READY
+ *   EC_SPI_RECEIVING
+ *   EC_SPI_PROCESSING
+ *
+ * Then the EC found an error in the request, or was not ready for the request
+ * and lost data.  The AP should give up waiting for EC_SPI_FRAME_START,
+ * because the EC is unable to tell when the AP is done sending its request.
+ */
+
+/*
+ * Framing byte which precedes a response packet from the EC.  After sending a
+ * request, the AP will clock in bytes until it sees the framing byte, then
+ * clock in the response packet.
+ */
+#define EC_SPI_FRAME_START    0xec
+
+/*
+ * Padding bytes which are clocked out after the end of a response packet.
+ */
+#define EC_SPI_PAST_END       0xed
+
+/*
+ * EC is ready to receive, and has ignored the byte sent by the AP.  EC expects
+ * that the AP will send a valid packet header (starting with
+ * EC_COMMAND_PROTOCOL_3) in the next 32 bytes.
+ */
+#define EC_SPI_RX_READY       0xf8
+
+/*
+ * EC has started receiving the request from the AP, but hasn't started
+ * processing it yet.
+ */
+#define EC_SPI_RECEIVING      0xf9
+
+/* EC has received the entire request from the AP and is processing it. */
+#define EC_SPI_PROCESSING     0xfa
+
+/*
+ * EC received bad data from the AP, such as a packet header with an invalid
+ * length.  EC will ignore all data until chip select deasserts.
+ */
+#define EC_SPI_RX_BAD_DATA    0xfb
+
+/*
+ * EC received data from the AP before it was ready.  That is, the AP asserted
+ * chip select and started clocking data before the EC was ready to receive it.
+ * EC will ignore all data until chip select deasserts.
+ */
+#define EC_SPI_NOT_READY      0xfc
+
+/*
+ * EC was ready to receive a request from the AP.  EC has treated the byte sent
+ * by the AP as part of a request packet, or (for old-style ECs) is processing
+ * a fully received packet but is not ready to respond yet.
+ */
+#define EC_SPI_OLD_READY      0xfd
+
+/*****************************************************************************/
+
+/*
+ * Protocol version 2 for I2C and SPI send a request this way:
+ *
+ *      0       EC_CMD_VERSION0 + (command version)
+ *      1       Command number
+ *      2       Length of params = N
+ *      3..N+2  Params, if any
+ *      N+3     8-bit checksum of bytes 0..N+2
+ *
+ * The corresponding response is:
+ *
+ *      0       Result code (EC_RES_*)
+ *      1       Length of params = M
+ *      2..M+1  Params, if any
+ *      M+2     8-bit checksum of bytes 0..M+1
+ */
+#define EC_PROTO2_REQUEST_HEADER_BYTES 3
+#define EC_PROTO2_REQUEST_TRAILER_BYTES 1
+#define EC_PROTO2_REQUEST_OVERHEAD (EC_PROTO2_REQUEST_HEADER_BYTES +    \
+                                    EC_PROTO2_REQUEST_TRAILER_BYTES)
+
+#define EC_PROTO2_RESPONSE_HEADER_BYTES 2
+#define EC_PROTO2_RESPONSE_TRAILER_BYTES 1
+#define EC_PROTO2_RESPONSE_OVERHEAD (EC_PROTO2_RESPONSE_HEADER_BYTES +  \
+                                     EC_PROTO2_RESPONSE_TRAILER_BYTES)
+
+/* Parameter length was limited by the LPC interface */
+#define EC_PROTO2_MAX_PARAM_SIZE 0xfc
+
+/* Maximum request and response packet sizes for protocol version 2 */
+#define EC_PROTO2_MAX_REQUEST_SIZE (EC_PROTO2_REQUEST_OVERHEAD +        \
+                                    EC_PROTO2_MAX_PARAM_SIZE)
+#define EC_PROTO2_MAX_RESPONSE_SIZE (EC_PROTO2_RESPONSE_OVERHEAD +      \
+                                     EC_PROTO2_MAX_PARAM_SIZE)
+
+/*****************************************************************************/
+
+/*
+ * Value written to legacy command port / prefix byte to indicate protocol
+ * 3+ structs are being used.  Usage is bus-dependent.
+ */
+#define EC_COMMAND_PROTOCOL_3 0xda
+
+#define EC_HOST_REQUEST_VERSION 3
+
+/* Version 3 request from host */
+struct ec_host_request {
+        /* Struct version (=3)
+         *
+         * EC will return EC_RES_INVALID_HEADER if it receives a header with a
+         * version it doesn't know how to parse.
+         */
+        uint8_t struct_version;
+
+        /*
+         * Checksum of request and data; sum of all bytes including checksum
+         * should total to 0.
+         */
+        uint8_t checksum;
+
+        /* Command code */
+        uint16_t command;
+
+        /* Command version */
+        uint8_t command_version;
+
+        /* Unused byte in current protocol version; set to 0 */
+        uint8_t reserved;
+
+        /* Length of data which follows this header */
+        uint16_t data_len;
+} __packed;
+
+#define EC_HOST_RESPONSE_VERSION 3
+
+/* Version 3 response from EC */
+struct ec_host_response {
+        /* Struct version (=3) */
+        uint8_t struct_version;
+
+        /*
+         * Checksum of response and data; sum of all bytes including checksum
+         * should total to 0.
+         */
+        uint8_t checksum;
+
+        /* Result code (EC_RES_*) */
+        uint16_t result;
+
+        /* Length of data which follows this header */
+        uint16_t data_len;
+
+        /* Unused bytes in current protocol version; set to 0 */
+        uint16_t reserved;
+} __packed;
+
+/*****************************************************************************/
 /*
  * Notes on commands:
  *
@@ -418,6 +651,68 @@ struct ec_response_get_comms_status {
         uint32_t flags;         /* Mask of enum ec_comms_status */
 } __packed;
 
+/* Fake a variety of responses, purely for testing purposes. */
+#define EC_CMD_TEST_PROTOCOL            0x0a
+
+/* Tell the EC what to send back to us. */
+struct ec_params_test_protocol {
+        uint32_t ec_result;
+        uint32_t ret_len;
+        uint8_t buf[32];
+} __packed;
+
+/* Here it comes... */
+struct ec_response_test_protocol {
+        uint8_t buf[32];
+} __packed;
+
+/* Get prococol information */
+#define EC_CMD_GET_PROTOCOL_INFO        0x0b
+
+/* Flags for ec_response_get_protocol_info.flags */
+/* EC_RES_IN_PROGRESS may be returned if a command is slow */
+#define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED (1 << 0)
+
+struct ec_response_get_protocol_info {
+        /* Fields which exist if at least protocol version 3 supported */
+
+        /* Bitmask of protocol versions supported (1 << n means version n)*/
+        uint32_t protocol_versions;
+
+        /* Maximum request packet size, in bytes */
+        uint16_t max_request_packet_size;
+
+        /* Maximum response packet size, in bytes */
+        uint16_t max_response_packet_size;
+
+        /* Flags; see EC_PROTOCOL_INFO_* */
+        uint32_t flags;
+} __packed;
+
+
+/*****************************************************************************/
+/* Get/Set miscellaneous values */
+
+/* The upper byte of .flags tells what to do (nothing means "get") */
+#define EC_GSV_SET        0x80000000
+
+/* The lower three bytes of .flags identifies the parameter, if that has
+   meaning for an individual command. */
+#define EC_GSV_PARAM_MASK 0x00ffffff
+
+struct ec_params_get_set_value {
+        uint32_t flags;
+        uint32_t value;
+} __packed;
+
+struct ec_response_get_set_value {
+        uint32_t flags;
+        uint32_t value;
+} __packed;
+
+/* More than one command can use these structs to get/set paramters. */
+#define EC_CMD_GSV_PAUSE_IN_S5  0x0c
+
 
 /*****************************************************************************/
 /* Flash commands */
@@ -425,6 +720,7 @@ struct ec_response_get_comms_status {
 /* Get flash info */
 #define EC_CMD_FLASH_INFO 0x10
 
+/* Version 0 returns these fields */
 struct ec_response_flash_info {
         /* Usable flash size, in bytes */
         uint32_t flash_size;
@@ -445,6 +741,37 @@ struct ec_response_flash_info {
         uint32_t protect_block_size;
 } __packed;
 
+/* Flags for version 1+ flash info command */
+/* EC flash erases bits to 0 instead of 1 */
+#define EC_FLASH_INFO_ERASE_TO_0 (1 << 0)
+
+/*
+ * Version 1 returns the same initial fields as version 0, with additional
+ * fields following.
+ *
+ * gcc anonymous structs don't seem to get along with the __packed directive;
+ * if they did we'd define the version 0 struct as a sub-struct of this one.
+ */
+struct ec_response_flash_info_1 {
+        /* Version 0 fields; see above for description */
+        uint32_t flash_size;
+        uint32_t write_block_size;
+        uint32_t erase_block_size;
+        uint32_t protect_block_size;
+
+        /* Version 1 adds these fields: */
+        /*
+         * Ideal write size in bytes.  Writes will be fastest if size is
+         * exactly this and offset is a multiple of this.  For example, an EC
+         * may have a write buffer which can do half-page operations if data is
+         * aligned, and a slower word-at-a-time write mode.
+         */
+        uint32_t write_ideal_size;
+
+        /* Flags; see EC_FLASH_INFO_* */
+        uint32_t flags;
+} __packed;
+
 /*
  * Read flash
  *
@@ -459,15 +786,15 @@ struct ec_params_flash_read {
 
 /* Write flash */
 #define EC_CMD_FLASH_WRITE 0x12
+#define EC_VER_FLASH_WRITE 1
+
+/* Version 0 of the flash command supported only 64 bytes of data */
+#define EC_FLASH_WRITE_VER0_SIZE 64
 
 struct ec_params_flash_write {
         uint32_t offset;   /* Byte offset to write */
         uint32_t size;     /* Size to write in bytes */
-        /*
-         * Data to write.  Could really use EC_PARAM_SIZE - 8, but tidiest to
-         * use a power of 2 so writes stay aligned.
-         */
-        uint8_t data[64];
+        /* Followed by data to write */
 } __packed;
 
 /* Erase flash */
@@ -543,7 +870,7 @@ struct ec_response_flash_protect {
 
 enum ec_flash_region {
         /* Region which holds read-only EC image */
-        EC_FLASH_REGION_RO,
+        EC_FLASH_REGION_RO = 0,
         /* Region which holds rewritable EC image */
         EC_FLASH_REGION_RW,
         /*
@@ -551,6 +878,8 @@ enum ec_flash_region {
          * EC_FLASH_REGION_RO)
          */
         EC_FLASH_REGION_WP_RO,
+        /* Number of regions */
+        EC_FLASH_REGION_COUNT,
 };
 
 struct ec_params_flash_region_info {
@@ -639,15 +968,15 @@ struct rgb_s {
  */
 struct lightbar_params {
         /* Timing */
-        int google_ramp_up;
-        int google_ramp_down;
-        int s3s0_ramp_up;
-        int s0_tick_delay[2];                   /* AC=0/1 */
-        int s0a_tick_delay[2];                  /* AC=0/1 */
-        int s0s3_ramp_down;
-        int s3_sleep_for;
-        int s3_ramp_up;
-        int s3_ramp_down;
+        int32_t google_ramp_up;
+        int32_t google_ramp_down;
+        int32_t s3s0_ramp_up;
+        int32_t s0_tick_delay[2];               /* AC=0/1 */
+        int32_t s0a_tick_delay[2];              /* AC=0/1 */
+        int32_t s0s3_ramp_down;
+        int32_t s3_sleep_for;
+        int32_t s3_ramp_up;
+        int32_t s3_ramp_down;
 
         /* Oscillation */
         uint8_t new_s0;
@@ -676,7 +1005,7 @@ struct ec_params_lightbar {
         union {
                 struct {
                         /* no args */
-                } dump, off, on, init, get_seq, get_params;
+                } dump, off, on, init, get_seq, get_params, version;
 
                 struct num {
                         uint8_t num;
@@ -710,6 +1039,11 @@ struct ec_response_lightbar {
 
                 struct lightbar_params get_params;
 
+                struct version {
+                        uint32_t num;
+                        uint32_t flags;
+                } version;
+
                 struct {
                         /* no return params */
                 } off, on, init, brightness, seq, reg, rgb, demo, set_params;
@@ -730,10 +1064,62 @@ enum lightbar_command {
         LIGHTBAR_CMD_DEMO = 9,
         LIGHTBAR_CMD_GET_PARAMS = 10,
         LIGHTBAR_CMD_SET_PARAMS = 11,
+        LIGHTBAR_CMD_VERSION = 12,
         LIGHTBAR_NUM_CMDS
 };
 
 /*****************************************************************************/
+/* LED control commands */
+
+#define EC_CMD_LED_CONTROL 0x29
+
+enum ec_led_id {
+        /* LED to indicate battery state of charge */
+        EC_LED_ID_BATTERY_LED = 0,
+        /*
+         * LED to indicate system power state (on or in suspend).
+         * May be on power button or on C-panel.
+         */
+        EC_LED_ID_POWER_LED,
+        /* LED on power adapter or its plug */
+        EC_LED_ID_ADAPTER_LED,
+
+        EC_LED_ID_COUNT
+};
+
+/* LED control flags */
+#define EC_LED_FLAGS_QUERY (1 << 0) /* Query LED capability only */
+#define EC_LED_FLAGS_AUTO  (1 << 1) /* Switch LED back to automatic control */
+
+enum ec_led_colors {
+        EC_LED_COLOR_RED = 0,
+        EC_LED_COLOR_GREEN,
+        EC_LED_COLOR_BLUE,
+        EC_LED_COLOR_YELLOW,
+        EC_LED_COLOR_WHITE,
+
+        EC_LED_COLOR_COUNT
+};
+
+struct ec_params_led_control {
+        uint8_t led_id;     /* Which LED to control */
+        uint8_t flags;      /* Control flags */
+
+        uint8_t brightness[EC_LED_COLOR_COUNT];
+} __packed;
+
+struct ec_response_led_control {
+        /*
+         * Available brightness value range.
+         *
+         * Range 0 means color channel not present.
+         * Range 1 means on/off control.
+         * Other values means the LED is control by PWM.
+         */
+        uint8_t brightness_range[EC_LED_COLOR_COUNT];
+} __packed;
+
+/*****************************************************************************/
 /* Verified boot commands */
 
 /*
@@ -790,6 +1176,181 @@ enum ec_vboot_hash_status {
 #define EC_VBOOT_HASH_OFFSET_RW 0xfffffffd
 
 /*****************************************************************************/
+/*
+ * Motion sense commands. We'll make separate structs for sub-commands with
+ * different input args, so that we know how much to expect.
+ */
+#define EC_CMD_MOTION_SENSE_CMD 0x2B
+
+/* Motion sense commands */
+enum motionsense_command {
+        /*
+         * Dump command returns all motion sensor data including motion sense
+         * module flags and individual sensor flags.
+         */
+        MOTIONSENSE_CMD_DUMP = 0,
+
+        /*
+         * Info command returns data describing the details of a given sensor,
+         * including enum motionsensor_type, enum motionsensor_location, and
+         * enum motionsensor_chip.
+         */
+        MOTIONSENSE_CMD_INFO = 1,
+
+        /*
+         * EC Rate command is a setter/getter command for the EC sampling rate
+         * of all motion sensors in milliseconds.
+         */
+        MOTIONSENSE_CMD_EC_RATE = 2,
+
+        /*
+         * Sensor ODR command is a setter/getter command for the output data
+         * rate of a specific motion sensor in millihertz.
+         */
+        MOTIONSENSE_CMD_SENSOR_ODR = 3,
+
+        /*
+         * Sensor range command is a setter/getter command for the range of
+         * a specified motion sensor in +/-G's or +/- deg/s.
+         */
+        MOTIONSENSE_CMD_SENSOR_RANGE = 4,
+
+        /*
+         * Setter/getter command for the keyboard wake angle. When the lid
+         * angle is greater than this value, keyboard wake is disabled in S3,
+         * and when the lid angle goes less than this value, keyboard wake is
+         * enabled. Note, the lid angle measurement is an approximate,
+         * un-calibrated value, hence the wake angle isn't exact.
+         */
+        MOTIONSENSE_CMD_KB_WAKE_ANGLE = 5,
+
+        /* Number of motionsense sub-commands. */
+        MOTIONSENSE_NUM_CMDS
+};
+
+enum motionsensor_id {
+        EC_MOTION_SENSOR_ACCEL_BASE = 0,
+        EC_MOTION_SENSOR_ACCEL_LID = 1,
+        EC_MOTION_SENSOR_GYRO = 2,
+
+        /*
+         * Note, if more sensors are added and this count changes, the padding
+         * in ec_response_motion_sense dump command must be modified.
+         */
+        EC_MOTION_SENSOR_COUNT = 3
+};
+
+/* List of motion sensor types. */
+enum motionsensor_type {
+        MOTIONSENSE_TYPE_ACCEL = 0,
+        MOTIONSENSE_TYPE_GYRO = 1,
+};
+
+/* List of motion sensor locations. */
+enum motionsensor_location {
+        MOTIONSENSE_LOC_BASE = 0,
+        MOTIONSENSE_LOC_LID = 1,
+};
+
+/* List of motion sensor chips. */
+enum motionsensor_chip {
+        MOTIONSENSE_CHIP_KXCJ9 = 0,
+};
+
+/* Module flag masks used for the dump sub-command. */
+#define MOTIONSENSE_MODULE_FLAG_ACTIVE (1<<0)
+
+/* Sensor flag masks used for the dump sub-command. */
+#define MOTIONSENSE_SENSOR_FLAG_PRESENT (1<<0)
+
+/*
+ * Send this value for the data element to only perform a read. If you
+ * send any other value, the EC will interpret it as data to set and will
+ * return the actual value set.
+ */
+#define EC_MOTION_SENSE_NO_VALUE -1
+
+struct ec_params_motion_sense {
+        uint8_t cmd;
+        union {
+                /* Used for MOTIONSENSE_CMD_DUMP. */
+                struct {
+                        /* no args */
+                } dump;
+
+                /*
+                 * Used for MOTIONSENSE_CMD_EC_RATE and
+                 * MOTIONSENSE_CMD_KB_WAKE_ANGLE.
+                 */
+                struct {
+                        /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */
+                        int16_t data;
+                } ec_rate, kb_wake_angle;
+
+                /* Used for MOTIONSENSE_CMD_INFO. */
+                struct {
+                        /* Should be element of enum motionsensor_id. */
+                        uint8_t sensor_num;
+                } info;
+
+                /*
+                 * Used for MOTIONSENSE_CMD_SENSOR_ODR and
+                 * MOTIONSENSE_CMD_SENSOR_RANGE.
+                 */
+                struct {
+                        /* Should be element of enum motionsensor_id. */
+                        uint8_t sensor_num;
+
+                        /* Rounding flag, true for round-up, false for down. */
+                        uint8_t roundup;
+
+                        uint16_t reserved;
+
+                        /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */
+                        int32_t data;
+                } sensor_odr, sensor_range;
+        };
+} __packed;
+
+struct ec_response_motion_sense {
+        union {
+                /* Used for MOTIONSENSE_CMD_DUMP. */
+                struct {
+                        /* Flags representing the motion sensor module. */
+                        uint8_t module_flags;
+
+                        /* Flags for each sensor in enum motionsensor_id. */
+                        uint8_t sensor_flags[EC_MOTION_SENSOR_COUNT];
+
+                        /* Array of all sensor data. Each sensor is 3-axis. */
+                        int16_t data[3*EC_MOTION_SENSOR_COUNT];
+                } dump;
+
+                /* Used for MOTIONSENSE_CMD_INFO. */
+                struct {
+                        /* Should be element of enum motionsensor_type. */
+                        uint8_t type;
+
+                        /* Should be element of enum motionsensor_location. */
+                        uint8_t location;
+
+                        /* Should be element of enum motionsensor_chip. */
+                        uint8_t chip;
+                } info;
+
+                /*
+                 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR,
+                 * MOTIONSENSE_CMD_SENSOR_RANGE, and
+                 * MOTIONSENSE_CMD_KB_WAKE_ANGLE.
+                 */
+                struct {
+                        /* Current value of the parameter queried. */
+                        int32_t ret;
+                } ec_rate, sensor_odr, sensor_range, kb_wake_angle;
+        };
+} __packed;
+
+/*****************************************************************************/
 /* USB charging control commands */
 
 /* Set USB port charging mode */
@@ -868,20 +1429,27 @@ struct ec_response_port80_last_boot {
 } __packed;
 
 /*****************************************************************************/
-/* Thermal engine commands */
+/* Thermal engine commands. Note that there are two implementations. We'll
+ * reuse the command number, but the data and behavior is incompatible.
+ * Version 0 is what originally shipped on Link.
+ * Version 1 separates the CPU thermal limits from the fan control.
+ */
 
-/* Set thershold value */
 #define EC_CMD_THERMAL_SET_THRESHOLD 0x50
+#define EC_CMD_THERMAL_GET_THRESHOLD 0x51
+
+/* The version 0 structs are opaque. You have to know what they are for
+ * the get/set commands to make any sense.
+ */
 
+/* Version 0 - set */
 struct ec_params_thermal_set_threshold {
         uint8_t sensor_type;
         uint8_t threshold_id;
         uint16_t value;
 } __packed;
 
-/* Get threshold value */
-#define EC_CMD_THERMAL_GET_THRESHOLD 0x51
-
+/* Version 0 - get */
 struct ec_params_thermal_get_threshold {
         uint8_t sensor_type;
         uint8_t threshold_id;
@@ -891,6 +1459,41 @@ struct ec_response_thermal_get_threshold {
         uint16_t value;
 } __packed;
 
+
+/* The version 1 structs are visible. */
+enum ec_temp_thresholds {
+        EC_TEMP_THRESH_WARN = 0,
+        EC_TEMP_THRESH_HIGH,
+        EC_TEMP_THRESH_HALT,
+
+        EC_TEMP_THRESH_COUNT
+};
+
+/* Thermal configuration for one temperature sensor. Temps are in degrees K.
+ * Zero values will be silently ignored by the thermal task.
+ */
+struct ec_thermal_config {
+        uint32_t temp_host[EC_TEMP_THRESH_COUNT]; /* levels of hotness */
+        uint32_t temp_fan_off;          /* no active cooling needed */
+        uint32_t temp_fan_max;          /* max active cooling needed */
+} __packed;
+
+/* Version 1 - get config for one sensor. */
+struct ec_params_thermal_get_threshold_v1 {
+        uint32_t sensor_num;
+} __packed;
+/* This returns a struct ec_thermal_config */
+
+/* Version 1 - set config for one sensor.
+ * Use read-modify-write for best results! */
+struct ec_params_thermal_set_threshold_v1 {
+        uint32_t sensor_num;
+        struct ec_thermal_config cfg;
+} __packed;
+/* This returns no data */
+
+/****************************************************************************/
+
 /* Toggle automatic fan control */
 #define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x52
 
@@ -920,6 +1523,18 @@ struct ec_params_tmp006_set_calibration {
         float b2;
 } __packed;
 
+/* Read raw TMP006 data */
+#define EC_CMD_TMP006_GET_RAW 0x55
+
+struct ec_params_tmp006_get_raw {
+        uint8_t index;
+} __packed;
+
+struct ec_response_tmp006_get_raw {
+        int32_t t;  /* In 1/100 K */
+        int32_t v;  /* In nV */
+};
+
 /*****************************************************************************/
 /* MKBP - Matrix KeyBoard Protocol */
 
@@ -1118,11 +1733,41 @@ struct ec_params_switch_enable_backlight {
 
 /* Enable/disable WLAN/Bluetooth */
 #define EC_CMD_SWITCH_ENABLE_WIRELESS 0x91
+#define EC_VER_SWITCH_ENABLE_WIRELESS 1
 
-struct ec_params_switch_enable_wireless {
+/* Version 0 params; no response */
+struct ec_params_switch_enable_wireless_v0 {
         uint8_t enabled;
 } __packed;
 
+/* Version 1 params */
+struct ec_params_switch_enable_wireless_v1 {
+        /* Flags to enable now */
+        uint8_t now_flags;
+
+        /* Which flags to copy from now_flags */
+        uint8_t now_mask;
+
+        /*
+         * Flags to leave enabled in S3, if they're on at the S0->S3
+         * transition.  (Other flags will be disabled by the S0->S3
+         * transition.)
+         */
+        uint8_t suspend_flags;
+
+        /* Which flags to copy from suspend_flags */
+        uint8_t suspend_mask;
+} __packed;
+
+/* Version 1 response */
+struct ec_response_switch_enable_wireless_v1 {
+        /* Flags to enable now */
+        uint8_t now_flags;
+
+        /* Flags to leave enabled in S3 */
+        uint8_t suspend_flags;
+} __packed;
+
 /*****************************************************************************/
 /* GPIO commands. Only available on EC if write protect has been disabled. */
 
@@ -1147,11 +1792,16 @@ struct ec_response_gpio_get {
 /*****************************************************************************/
 /* I2C commands. Only available when flash write protect is unlocked. */
 
+/*
+ * TODO(crosbug.com/p/23570): These commands are deprecated, and will be
+ * removed soon.  Use EC_CMD_I2C_XFER instead.
+ */
+
 /* Read I2C bus */
 #define EC_CMD_I2C_READ 0x94
 
 struct ec_params_i2c_read {
-        uint16_t addr;
+        uint16_t addr; /* 8-bit address (7-bit shifted << 1) */
         uint8_t read_size; /* Either 8 or 16. */
         uint8_t port;
         uint8_t offset;
@@ -1165,7 +1815,7 @@ struct ec_response_i2c_read {
 
 struct ec_params_i2c_write {
         uint16_t data;
-        uint16_t addr;
+        uint16_t addr; /* 8-bit address (7-bit shifted << 1) */
         uint8_t write_size; /* Either 8 or 16. */
         uint8_t port;
         uint8_t offset;
@@ -1174,11 +1824,20 @@ struct ec_params_i2c_write {
 /*****************************************************************************/
 /* Charge state commands. Only available when flash write protect unlocked. */
 
-/* Force charge state machine to stop in idle mode */
-#define EC_CMD_CHARGE_FORCE_IDLE 0x96
+/* Force charge state machine to stop charging the battery or force it to
+ * discharge the battery.
+ */
+#define EC_CMD_CHARGE_CONTROL 0x96
+#define EC_VER_CHARGE_CONTROL 1
 
-struct ec_params_force_idle {
-        uint8_t enabled;
+enum ec_charge_control_mode {
+        CHARGE_CONTROL_NORMAL = 0,
+        CHARGE_CONTROL_IDLE,
+        CHARGE_CONTROL_DISCHARGE,
+};
+
+struct ec_params_charge_control {
+        uint32_t mode;  /* enum charge_control_mode */
 } __packed;
 
 /*****************************************************************************/
@@ -1206,14 +1865,231 @@ struct ec_params_force_idle {
 #define EC_CMD_BATTERY_CUT_OFF 0x99
 
 /*****************************************************************************/
-/* Temporary debug commands. TODO: remove this crosbug.com/p/13849 */
+/* USB port mux control. */
 
 /*
- * Dump charge state machine context.
- *
- * Response is a binary dump of charge state machine context.
+ * Switch USB mux or return to automatic switching.
+ */
+#define EC_CMD_USB_MUX 0x9a
+
+struct ec_params_usb_mux {
+        uint8_t mux;
+} __packed;
+
+/*****************************************************************************/
+/* LDOs / FETs control. */
+
+enum ec_ldo_state {
+        EC_LDO_STATE_OFF = 0,   /* the LDO / FET is shut down */
+        EC_LDO_STATE_ON = 1,    /* the LDO / FET is ON / providing power */
+};
+
+/*
+ * Switch on/off a LDO.
+ */
+#define EC_CMD_LDO_SET 0x9b
+
+struct ec_params_ldo_set {
+        uint8_t index;
+        uint8_t state;
+} __packed;
+
+/*
+ * Get LDO state.
+ */
+#define EC_CMD_LDO_GET 0x9c
+
+struct ec_params_ldo_get {
+        uint8_t index;
+} __packed;
+
+struct ec_response_ldo_get {
+        uint8_t state;
+} __packed;
+
+/*****************************************************************************/
+/* Power info. */
+
+/*
+ * Get power info.
+ */
+#define EC_CMD_POWER_INFO 0x9d
+
+struct ec_response_power_info {
+        uint32_t usb_dev_type;
+        uint16_t voltage_ac;
+        uint16_t voltage_system;
+        uint16_t current_system;
+        uint16_t usb_current_limit;
+} __packed;
+
+/*****************************************************************************/
+/* I2C passthru command */
+
+#define EC_CMD_I2C_PASSTHRU 0x9e
+
+/* Slave address is 10 (not 7) bit */
+#define EC_I2C_FLAG_10BIT       (1 << 16)
+
+/* Read data; if not present, message is a write */
+#define EC_I2C_FLAG_READ        (1 << 15)
+
+/* Mask for address */
+#define EC_I2C_ADDR_MASK        0x3ff
+
+#define EC_I2C_STATUS_NAK       (1 << 0) /* Transfer was not acknowledged */
+#define EC_I2C_STATUS_TIMEOUT   (1 << 1) /* Timeout during transfer */
+
+/* Any error */
+#define EC_I2C_STATUS_ERROR     (EC_I2C_STATUS_NAK | EC_I2C_STATUS_TIMEOUT)
+
+struct ec_params_i2c_passthru_msg {
+        uint16_t addr_flags;    /* I2C slave address (7 or 10 bits) and flags */
+        uint16_t len;           /* Number of bytes to read or write */
+} __packed;
+
+struct ec_params_i2c_passthru {
+        uint8_t port;           /* I2C port number */
+        uint8_t num_msgs;       /* Number of messages */
+        struct ec_params_i2c_passthru_msg msg[];
+        /* Data to write for all messages is concatenated here */
+} __packed;
+
+struct ec_response_i2c_passthru {
+        uint8_t i2c_status;     /* Status flags (EC_I2C_STATUS_...) */
+        uint8_t num_msgs;       /* Number of messages processed */
+        uint8_t data[];         /* Data read by messages concatenated here */
+} __packed;
+
+/*****************************************************************************/
+/* Power button hang detect */
+
+#define EC_CMD_HANG_DETECT 0x9f
+
+/* Reasons to start hang detection timer */
+/* Power button pressed */
+#define EC_HANG_START_ON_POWER_PRESS  (1 << 0)
+
+/* Lid closed */
+#define EC_HANG_START_ON_LID_CLOSE    (1 << 1)
+
+ /* Lid opened */
+#define EC_HANG_START_ON_LID_OPEN     (1 << 2)
+
+/* Start of AP S3->S0 transition (booting or resuming from suspend) */
+#define EC_HANG_START_ON_RESUME       (1 << 3)
+
+/* Reasons to cancel hang detection */
+
+/* Power button released */
+#define EC_HANG_STOP_ON_POWER_RELEASE (1 << 8)
+
+/* Any host command from AP received */
+#define EC_HANG_STOP_ON_HOST_COMMAND  (1 << 9)
+
+/* Stop on end of AP S0->S3 transition (suspending or shutting down) */
+#define EC_HANG_STOP_ON_SUSPEND       (1 << 10)
+
+/*
+ * If this flag is set, all the other fields are ignored, and the hang detect
+ * timer is started.  This provides the AP a way to start the hang timer
+ * without reconfiguring any of the other hang detect settings.  Note that
+ * you must previously have configured the timeouts.
+ */
+#define EC_HANG_START_NOW             (1 << 30)
+
+/*
+ * If this flag is set, all the other fields are ignored (including
+ * EC_HANG_START_NOW).  This provides the AP a way to stop the hang timer
+ * without reconfiguring any of the other hang detect settings.
  */
-#define EC_CMD_CHARGE_DUMP 0xa0
+#define EC_HANG_STOP_NOW              (1 << 31)
+
+struct ec_params_hang_detect {
+        /* Flags; see EC_HANG_* */
+        uint32_t flags;
+
+        /* Timeout in msec before generating host event, if enabled */
+        uint16_t host_event_timeout_msec;
+
+        /* Timeout in msec before generating warm reboot, if enabled */
+        uint16_t warm_reboot_timeout_msec;
+} __packed;
+
+/*****************************************************************************/
+/* Commands for battery charging */
+
+/*
+ * This is the single catch-all host command to exchange data regarding the
+ * charge state machine (v2 and up).
+ */
+#define EC_CMD_CHARGE_STATE 0xa0
+
+/* Subcommands for this host command */
+enum charge_state_command {
+        CHARGE_STATE_CMD_GET_STATE,
+        CHARGE_STATE_CMD_GET_PARAM,
+        CHARGE_STATE_CMD_SET_PARAM,
+        CHARGE_STATE_NUM_CMDS
+};
+
+/*
+ * Known param numbers are defined here. Ranges are reserved for board-specific
+ * params, which are handled by the particular implementations.
+ */
+enum charge_state_params {
+        CS_PARAM_CHG_VOLTAGE,         /* charger voltage limit */
+        CS_PARAM_CHG_CURRENT,         /* charger current limit */
+        CS_PARAM_CHG_INPUT_CURRENT,   /* charger input current limit */
+        CS_PARAM_CHG_STATUS,          /* charger-specific status */
+        CS_PARAM_CHG_OPTION,          /* charger-specific options */
+        /* How many so far? */
+        CS_NUM_BASE_PARAMS,
+
+        /* Range for CONFIG_CHARGER_PROFILE_OVERRIDE params */
+        CS_PARAM_CUSTOM_PROFILE_MIN = 0x10000,
+        CS_PARAM_CUSTOM_PROFILE_MAX = 0x1ffff,
+
+        /* Other custom param ranges go here... */
+};
+
+struct ec_params_charge_state {
+        uint8_t cmd;                            /* enum charge_state_command */
+        union {
+                struct {
+                        /* no args */
+                } get_state;
+
+                struct {
+                        uint32_t param;         /* enum charge_state_param */
+                } get_param;
+
+                struct {
+                        uint32_t param;         /* param to set */
+                        uint32_t value;         /* value to set */
+                } set_param;
+        };
+} __packed;
+
+struct ec_response_charge_state {
+        union {
+                struct {
+                        int ac;
+                        int chg_voltage;
+                        int chg_current;
+                        int chg_input_current;
+                        int batt_state_of_charge;
+                } get_state;
+
+                struct {
+                        uint32_t value;
+                } get_param;
+                struct {
+                        /* no return values */
+                } set_param;
+        };
+} __packed;
+
 
 /*
  * Set maximum battery charging current.
@@ -1221,15 +2097,59 @@ struct ec_params_force_idle {
 #define EC_CMD_CHARGE_CURRENT_LIMIT 0xa1
 
 struct ec_params_current_limit {
-        uint32_t limit;
+        uint32_t limit; /* in mA */
+} __packed;
+
+/*
+ * Set maximum external power current.
+ */
+#define EC_CMD_EXT_POWER_CURRENT_LIMIT 0xa2
+
+struct ec_params_ext_power_current_limit {
+        uint32_t limit; /* in mA */
+} __packed;
+
+/*****************************************************************************/
+/* Smart battery pass-through */
+
+/* Get / Set 16-bit smart battery registers */
+#define EC_CMD_SB_READ_WORD   0xb0
+#define EC_CMD_SB_WRITE_WORD  0xb1
+
+/* Get / Set string smart battery parameters
+ * formatted as SMBUS "block".
+ */
+#define EC_CMD_SB_READ_BLOCK  0xb2
+#define EC_CMD_SB_WRITE_BLOCK 0xb3
+
+struct ec_params_sb_rd {
+        uint8_t reg;
+} __packed;
+
+struct ec_response_sb_rd_word {
+        uint16_t value;
+} __packed;
+
+struct ec_params_sb_wr_word {
+        uint8_t reg;
+        uint16_t value;
+} __packed;
+
+struct ec_response_sb_rd_block {
+        uint8_t data[32];
+} __packed;
+
+struct ec_params_sb_wr_block {
+        uint8_t reg;
+        uint16_t data[32];
 } __packed;
 
 /*****************************************************************************/
 /* System commands */
 
 /*
- * TODO: this is a confusing name, since it doesn't necessarily reboot the EC.
- * Rename to "set image" or something similar.
+ * TODO(crosbug.com/p/23747): This is a confusing name, since it doesn't
+ * necessarily reboot the EC.  Rename to "image" or something similar?
  */
 #define EC_CMD_REBOOT_EC 0xd2
 
@@ -1308,6 +2228,7 @@ struct ec_params_reboot_ec {
 #define EC_CMD_ACPI_QUERY_EVENT 0x84
 
 /* Valid addresses in ACPI memory space, for read/write commands */
+
 /* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */
 #define EC_ACPI_MEM_VERSION            0x00
 /*
@@ -1317,8 +2238,60 @@ struct ec_params_reboot_ec {
 #define EC_ACPI_MEM_TEST               0x01
 /* Test compliment; writes here are ignored. */
 #define EC_ACPI_MEM_TEST_COMPLIMENT    0x02
+
 /* Keyboard backlight brightness percent (0 - 100) */
 #define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03
+/* DPTF Target Fan Duty (0-100, 0xff for auto/none) */
+#define EC_ACPI_MEM_FAN_DUTY           0x04
+
+/*
+ * DPTF temp thresholds. Any of the EC's temp sensors can have up to two
+ * independent thresholds attached to them. The current value of the ID
+ * register determines which sensor is affected by the THRESHOLD and COMMIT
+ * registers. The THRESHOLD register uses the same EC_TEMP_SENSOR_OFFSET scheme
+ * as the memory-mapped sensors. The COMMIT register applies those settings.
+ *
+ * The spec does not mandate any way to read back the threshold settings
+ * themselves, but when a threshold is crossed the AP needs a way to determine
+ * which sensor(s) are responsible. Each reading of the ID register clears and
+ * returns one sensor ID that has crossed one of its threshold (in either
+ * direction) since the last read. A value of 0xFF means "no new thresholds
+ * have tripped". Setting or enabling the thresholds for a sensor will clear
+ * the unread event count for that sensor.
+ */
+#define EC_ACPI_MEM_TEMP_ID            0x05
+#define EC_ACPI_MEM_TEMP_THRESHOLD     0x06
+#define EC_ACPI_MEM_TEMP_COMMIT        0x07
+/*
+ * Here are the bits for the COMMIT register:
+ *   bit 0 selects the threshold index for the chosen sensor (0/1)
+ *   bit 1 enables/disables the selected threshold (0 = off, 1 = on)
+ * Each write to the commit register affects one threshold.
+ */
+#define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK (1 << 0)
+#define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK (1 << 1)
+/*
+ * Example:
+ *
+ * Set the thresholds for sensor 2 to 50 C and 60 C:
+ *   write 2 to [0x05]      --  select temp sensor 2
+ *   write 0x7b to [0x06]   --  C_TO_K(50) - EC_TEMP_SENSOR_OFFSET
+ *   write 0x2 to [0x07]    --  enable threshold 0 with this value
+ *   write 0x85 to [0x06]   --  C_TO_K(60) - EC_TEMP_SENSOR_OFFSET
+ *   write 0x3 to [0x07]    --  enable threshold 1 with this value
+ *
+ * Disable the 60 C threshold, leaving the 50 C threshold unchanged:
+ *   write 2 to [0x05]      --  select temp sensor 2
+ *   write 0x1 to [0x07]    --  disable threshold 1
+ */
+
+/* DPTF battery charging current limit */
+#define EC_ACPI_MEM_CHARGING_LIMIT     0x08
+
+/* Charging limit is specified in 64 mA steps */
+#define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA   64
+/* Value to disable DPTF battery charging limit */
+#define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED  0xff
 
 /* Current version of ACPI memory address space */
 #define EC_ACPI_MEM_VERSION_CURRENT 1
@@ -1360,10 +2333,21 @@ struct ec_params_reboot_ec {
  * Header bytes greater than this indicate a later version. For example,
  * EC_CMD_VERSION0 + 1 means we are using version 1.
  *
- * The old EC interface must not use commands 0dc or higher.
+ * The old EC interface must not use commands 0xdc or higher.
  */
 #define EC_CMD_VERSION0 0xdc
 
 #endif  /* !__ACPI__ */
 
+/*****************************************************************************/
+/*
+ * Deprecated constants. These constants have been renamed for clarity. The
+ * meaning and size has not changed. Programs that use the old names should
+ * switch to the new names soon, as the old names may not be carried forward
+ * forever.
+ */
+#define EC_HOST_PARAM_SIZE      EC_PROTO2_MAX_PARAM_SIZE
+#define EC_LPC_ADDR_OLD_PARAM   EC_HOST_CMD_REGION1
+#define EC_OLD_PARAM_SIZE       EC_HOST_CMD_REGION_SIZE
+
 #endif  /* __CROS_EC_COMMANDS_H */
diff --git a/include/linux/mfd/ipaq-micro.h b/include/linux/mfd/ipaq-micro.h
new file mode 100644
index 000000000000..5c4d29f6674f
--- /dev/null
+++ b/include/linux/mfd/ipaq-micro.h
@@ -0,0 +1,148 @@
+/*
+ * Header file for the compaq Micro MFD
+ */
+
+#ifndef _MFD_IPAQ_MICRO_H_
+#define _MFD_IPAQ_MICRO_H_
+
+#include <linux/spinlock.h>
+#include <linux/completion.h>
+#include <linux/list.h>
+
+#define TX_BUF_SIZE     32
+#define RX_BUF_SIZE     16
+#define CHAR_SOF        0x02
+
+/*
+ * These are the different messages that can be sent to the microcontroller
+ * to control various aspects.
+ */
+#define MSG_VERSION             0x0
+#define MSG_KEYBOARD            0x2
+#define MSG_TOUCHSCREEN         0x3
+#define MSG_EEPROM_READ         0x4
+#define MSG_EEPROM_WRITE        0x5
+#define MSG_THERMAL_SENSOR      0x6
+#define MSG_NOTIFY_LED          0x8
+#define MSG_BATTERY             0x9
+#define MSG_SPI_READ            0xb
+#define MSG_SPI_WRITE           0xc
+#define MSG_BACKLIGHT           0xd /* H3600 only */
+#define MSG_CODEC_CTRL          0xe /* H3100 only */
+#define MSG_DISPLAY_CTRL        0xf /* H3100 only */
+
+/* state of receiver parser */
+enum rx_state {
+        STATE_SOF = 0,     /* Next byte should be start of frame */
+        STATE_ID,          /* Next byte is ID & message length   */
+        STATE_DATA,        /* Next byte is a data byte           */
+        STATE_CHKSUM       /* Next byte should be checksum       */
+};
+
+/**
+ * struct ipaq_micro_txdev - TX state
+ * @len: length of message in TX buffer
+ * @index: current index into TX buffer
+ * @buf: TX buffer
+ */
+struct ipaq_micro_txdev {
+        u8 len;
+        u8 index;
+        u8 buf[TX_BUF_SIZE];
+};
+
+/**
+ * struct ipaq_micro_rxdev - RX state
+ * @state: context of RX state machine
+ * @chksum: calculated checksum
+ * @id: message ID from packet
+ * @len: RX buffer length
+ * @index: RX buffer index
+ * @buf: RX buffer
+ */
+struct ipaq_micro_rxdev {
+        enum rx_state state;
+        unsigned char chksum;
+        u8            id;
+        unsigned int  len;
+        unsigned int  index;
+        u8            buf[RX_BUF_SIZE];
+};
+
+/**
+ * struct ipaq_micro_msg - message to the iPAQ microcontroller
+ * @id: 4-bit ID of the message
+ * @tx_len: length of TX data
+ * @tx_data: TX data to send
+ * @rx_len: length of receieved RX data
+ * @rx_data: RX data to recieve
+ * @ack: a completion that will be completed when RX is complete
+ * @node: list node if message gets queued
+ */
+struct ipaq_micro_msg {
+        u8 id;
+        u8 tx_len;
+        u8 tx_data[TX_BUF_SIZE];
+        u8 rx_len;
+        u8 rx_data[RX_BUF_SIZE];
+        struct completion ack;
+        struct list_head node;
+};
+
+/**
+ * struct ipaq_micro - iPAQ microcontroller state
+ * @dev: corresponding platform device
+ * @base: virtual memory base for underlying serial device
+ * @sdlc: virtual memory base for Synchronous Data Link Controller
+ * @version: version string
+ * @tx: TX state
+ * @rx: RX state
+ * @lock: lock for this state container
+ * @msg: current message
+ * @queue: message queue
+ * @key: callback for asynchronous key events
+ * @key_data: data to pass along with key events
+ * @ts: callback for asynchronous touchscreen events
+ * @ts_data: data to pass along with key events
+ */
+struct ipaq_micro {
+        struct device *dev;
+        void __iomem *base;
+        void __iomem *sdlc;
+        char version[5];
+        struct ipaq_micro_txdev tx;     /* transmit ISR state */
+        struct ipaq_micro_rxdev rx;     /* receive ISR state */
+        spinlock_t lock;
+        struct ipaq_micro_msg *msg;
+        struct list_head queue;
+        void (*key) (void *data, int len, unsigned char *rxdata);
+        void *key_data;
+        void (*ts) (void *data, int len, unsigned char *rxdata);
+        void *ts_data;
+};
+
+extern int
+ipaq_micro_tx_msg(struct ipaq_micro *micro, struct ipaq_micro_msg *msg);
+
+static inline int
+ipaq_micro_tx_msg_sync(struct ipaq_micro *micro,
+                       struct ipaq_micro_msg *msg)
+{
+        int ret;
+
+        init_completion(&msg->ack);
+        ret = ipaq_micro_tx_msg(micro, msg);
+        wait_for_completion(&msg->ack);
+
+        return ret;
+}
+
+static inline int
+ipaq_micro_tx_msg_async(struct ipaq_micro *micro,
+                        struct ipaq_micro_msg *msg)
+{
+        init_completion(&msg->ack);
+        return ipaq_micro_tx_msg(micro, msg);
+}
+
+#endif /* _MFD_IPAQ_MICRO_H_ */
diff --git a/include/linux/mfd/kempld.h b/include/linux/mfd/kempld.h
index b911ef3add03..26e0b469e567 100644
--- a/include/linux/mfd/kempld.h
+++ b/include/linux/mfd/kempld.h
@@ -51,6 +51,8 @@
 #define KEMPLD_TYPE_DEBUG               0x1
 #define KEMPLD_TYPE_CUSTOM              0x2
 
+#define KEMPLD_VERSION_LEN              10
+
 /**
  * struct kempld_info - PLD device information structure
  * @major:      PLD major revision
@@ -60,6 +62,7 @@
  * @type:       PLD type
  * @spec_major: PLD FW specification major revision
  * @spec_minor: PLD FW specification minor revision
+ * @version:    PLD version string
  */
 struct kempld_info {
         unsigned int major;
@@ -69,6 +72,7 @@ struct kempld_info {
         unsigned int type;
         unsigned int spec_major;
         unsigned int spec_minor;
+        char version[KEMPLD_VERSION_LEN];
 };
 
 /**
diff --git a/include/linux/mfd/max14577-private.h b/include/linux/mfd/max14577-private.h
index c9b332fb0d5d..499253604026 100644
--- a/include/linux/mfd/max14577-private.h
+++ b/include/linux/mfd/max14577-private.h
@@ -1,7 +1,7 @@
 /*
- * max14577-private.h - Common API for the Maxim 14577 internal sub chip
+ * max14577-private.h - Common API for the Maxim 14577/77836 internal sub chip
  *
- * Copyright (C) 2013 Samsung Electrnoics
+ * Copyright (C) 2014 Samsung Electrnoics
  * Chanwoo Choi <cw00.choi@samsung.com>
  * Krzysztof Kozlowski <k.kozlowski@samsung.com>
  *
@@ -22,9 +22,19 @@
 #include <linux/i2c.h>
 #include <linux/regmap.h>
 
-#define MAX14577_REG_INVALID            (0xff)
+#define I2C_ADDR_PMIC   (0x46 >> 1)
+#define I2C_ADDR_MUIC   (0x4A >> 1)
+#define I2C_ADDR_FG     (0x6C >> 1)
 
-/* Slave addr = 0x4A: Interrupt */
+enum maxim_device_type {
+        MAXIM_DEVICE_TYPE_UNKNOWN       = 0,
+        MAXIM_DEVICE_TYPE_MAX14577,
+        MAXIM_DEVICE_TYPE_MAX77836,
+
+        MAXIM_DEVICE_TYPE_NUM,
+};
+
+/* Slave addr = 0x4A: MUIC and Charger */
 enum max14577_reg {
         MAX14577_REG_DEVICEID           = 0x00,
         MAX14577_REG_INT1               = 0x01,
@@ -74,20 +84,22 @@ enum max14577_muic_charger_type {
 };
 
 /* MAX14577 interrupts */
-#define INT1_ADC_MASK                   (0x1 << 0)
-#define INT1_ADCLOW_MASK                (0x1 << 1)
-#define INT1_ADCERR_MASK                (0x1 << 2)
-
-#define INT2_CHGTYP_MASK                (0x1 << 0)
-#define INT2_CHGDETRUN_MASK             (0x1 << 1)
-#define INT2_DCDTMR_MASK                (0x1 << 2)
-#define INT2_DBCHG_MASK                 (0x1 << 3)
-#define INT2_VBVOLT_MASK                (0x1 << 4)
-
-#define INT3_EOC_MASK                   (0x1 << 0)
-#define INT3_CGMBC_MASK                 (0x1 << 1)
-#define INT3_OVP_MASK                   (0x1 << 2)
-#define INT3_MBCCHGERR_MASK             (0x1 << 3)
+#define MAX14577_INT1_ADC_MASK          BIT(0)
+#define MAX14577_INT1_ADCLOW_MASK       BIT(1)
+#define MAX14577_INT1_ADCERR_MASK       BIT(2)
+#define MAX77836_INT1_ADC1K_MASK        BIT(3)
+
+#define MAX14577_INT2_CHGTYP_MASK       BIT(0)
+#define MAX14577_INT2_CHGDETRUN_MASK    BIT(1)
+#define MAX14577_INT2_DCDTMR_MASK       BIT(2)
+#define MAX14577_INT2_DBCHG_MASK        BIT(3)
+#define MAX14577_INT2_VBVOLT_MASK       BIT(4)
+#define MAX77836_INT2_VIDRM_MASK        BIT(5)
+
+#define MAX14577_INT3_EOC_MASK          BIT(0)
+#define MAX14577_INT3_CGMBC_MASK        BIT(1)
+#define MAX14577_INT3_OVP_MASK          BIT(2)
+#define MAX14577_INT3_MBCCHGERR_MASK    BIT(3)
 
 /* MAX14577 DEVICE ID register */
 #define DEVID_VENDORID_SHIFT            0
@@ -99,9 +111,11 @@ enum max14577_muic_charger_type {
 #define STATUS1_ADC_SHIFT               0
 #define STATUS1_ADCLOW_SHIFT            5
 #define STATUS1_ADCERR_SHIFT            6
+#define MAX77836_STATUS1_ADC1K_SHIFT    7
 #define STATUS1_ADC_MASK                (0x1f << STATUS1_ADC_SHIFT)
-#define STATUS1_ADCLOW_MASK             (0x1 << STATUS1_ADCLOW_SHIFT)
-#define STATUS1_ADCERR_MASK             (0x1 << STATUS1_ADCERR_SHIFT)
+#define STATUS1_ADCLOW_MASK             BIT(STATUS1_ADCLOW_SHIFT)
+#define STATUS1_ADCERR_MASK             BIT(STATUS1_ADCERR_SHIFT)
+#define MAX77836_STATUS1_ADC1K_MASK     BIT(MAX77836_STATUS1_ADC1K_SHIFT)
 
 /* MAX14577 STATUS2 register */
 #define STATUS2_CHGTYP_SHIFT            0
@@ -109,11 +123,13 @@ enum max14577_muic_charger_type {
 #define STATUS2_DCDTMR_SHIFT            4
 #define STATUS2_DBCHG_SHIFT             5
 #define STATUS2_VBVOLT_SHIFT            6
+#define MAX77836_STATUS2_VIDRM_SHIFT    7
 #define STATUS2_CHGTYP_MASK             (0x7 << STATUS2_CHGTYP_SHIFT)
-#define STATUS2_CHGDETRUN_MASK          (0x1 << STATUS2_CHGDETRUN_SHIFT)
-#define STATUS2_DCDTMR_MASK             (0x1 << STATUS2_DCDTMR_SHIFT)
-#define STATUS2_DBCHG_MASK              (0x1 << STATUS2_DBCHG_SHIFT)
-#define STATUS2_VBVOLT_MASK             (0x1 << STATUS2_VBVOLT_SHIFT)
+#define STATUS2_CHGDETRUN_MASK          BIT(STATUS2_CHGDETRUN_SHIFT)
+#define STATUS2_DCDTMR_MASK             BIT(STATUS2_DCDTMR_SHIFT)
+#define STATUS2_DBCHG_MASK              BIT(STATUS2_DBCHG_SHIFT)
+#define STATUS2_VBVOLT_MASK             BIT(STATUS2_VBVOLT_SHIFT)
+#define MAX77836_STATUS2_VIDRM_MASK     BIT(MAX77836_STATUS2_VIDRM_SHIFT)
 
 /* MAX14577 CONTROL1 register */
 #define COMN1SW_SHIFT                   0
@@ -122,8 +138,8 @@ enum max14577_muic_charger_type {
 #define IDBEN_SHIFT                     7
 #define COMN1SW_MASK                    (0x7 << COMN1SW_SHIFT)
 #define COMP2SW_MASK                    (0x7 << COMP2SW_SHIFT)
-#define MICEN_MASK                      (0x1 << MICEN_SHIFT)
-#define IDBEN_MASK                      (0x1 << IDBEN_SHIFT)
+#define MICEN_MASK                      BIT(MICEN_SHIFT)
+#define IDBEN_MASK                      BIT(IDBEN_SHIFT)
 #define CLEAR_IDBEN_MICEN_MASK          (COMN1SW_MASK | COMP2SW_MASK)
 #define CTRL1_SW_USB                    ((1 << COMP2SW_SHIFT) \
                                                 | (1 << COMN1SW_SHIFT))
@@ -143,14 +159,14 @@ enum max14577_muic_charger_type {
 #define CTRL2_ACCDET_SHIFT              (5)
 #define CTRL2_USBCPINT_SHIFT            (6)
 #define CTRL2_RCPS_SHIFT                (7)
-#define CTRL2_LOWPWR_MASK               (0x1 << CTRL2_LOWPWR_SHIFT)
-#define CTRL2_ADCEN_MASK                (0x1 << CTRL2_ADCEN_SHIFT)
-#define CTRL2_CPEN_MASK                 (0x1 << CTRL2_CPEN_SHIFT)
-#define CTRL2_SFOUTASRT_MASK            (0x1 << CTRL2_SFOUTASRT_SHIFT)
-#define CTRL2_SFOUTORD_MASK             (0x1 << CTRL2_SFOUTORD_SHIFT)
-#define CTRL2_ACCDET_MASK               (0x1 << CTRL2_ACCDET_SHIFT)
-#define CTRL2_USBCPINT_MASK             (0x1 << CTRL2_USBCPINT_SHIFT)
-#define CTRL2_RCPS_MASK                 (0x1 << CTR2_RCPS_SHIFT)
+#define CTRL2_LOWPWR_MASK               BIT(CTRL2_LOWPWR_SHIFT)
+#define CTRL2_ADCEN_MASK                BIT(CTRL2_ADCEN_SHIFT)
+#define CTRL2_CPEN_MASK                 BIT(CTRL2_CPEN_SHIFT)
+#define CTRL2_SFOUTASRT_MASK            BIT(CTRL2_SFOUTASRT_SHIFT)
+#define CTRL2_SFOUTORD_MASK             BIT(CTRL2_SFOUTORD_SHIFT)
+#define CTRL2_ACCDET_MASK               BIT(CTRL2_ACCDET_SHIFT)
+#define CTRL2_USBCPINT_MASK             BIT(CTRL2_USBCPINT_SHIFT)
+#define CTRL2_RCPS_MASK                 BIT(CTRL2_RCPS_SHIFT)
 
 #define CTRL2_CPEN1_LOWPWR0 ((1 << CTRL2_CPEN_SHIFT) | \
                                 (0 << CTRL2_LOWPWR_SHIFT))
@@ -198,14 +214,14 @@ enum max14577_charger_reg {
 #define CDETCTRL1_DBEXIT_SHIFT          5
 #define CDETCTRL1_DBIDLE_SHIFT          6
 #define CDETCTRL1_CDPDET_SHIFT          7
-#define CDETCTRL1_CHGDETEN_MASK         (0x1 << CDETCTRL1_CHGDETEN_SHIFT)
-#define CDETCTRL1_CHGTYPMAN_MASK        (0x1 << CDETCTRL1_CHGTYPMAN_SHIFT)
-#define CDETCTRL1_DCDEN_MASK            (0x1 << CDETCTRL1_DCDEN_SHIFT)
-#define CDETCTRL1_DCD2SCT_MASK          (0x1 << CDETCTRL1_DCD2SCT_SHIFT)
-#define CDETCTRL1_DCHKTM_MASK           (0x1 << CDETCTRL1_DCHKTM_SHIFT)
-#define CDETCTRL1_DBEXIT_MASK           (0x1 << CDETCTRL1_DBEXIT_SHIFT)
-#define CDETCTRL1_DBIDLE_MASK           (0x1 << CDETCTRL1_DBIDLE_SHIFT)
-#define CDETCTRL1_CDPDET_MASK           (0x1 << CDETCTRL1_CDPDET_SHIFT)
+#define CDETCTRL1_CHGDETEN_MASK         BIT(CDETCTRL1_CHGDETEN_SHIFT)
+#define CDETCTRL1_CHGTYPMAN_MASK        BIT(CDETCTRL1_CHGTYPMAN_SHIFT)
+#define CDETCTRL1_DCDEN_MASK            BIT(CDETCTRL1_DCDEN_SHIFT)
+#define CDETCTRL1_DCD2SCT_MASK          BIT(CDETCTRL1_DCD2SCT_SHIFT)
+#define CDETCTRL1_DCHKTM_MASK           BIT(CDETCTRL1_DCHKTM_SHIFT)
+#define CDETCTRL1_DBEXIT_MASK           BIT(CDETCTRL1_DBEXIT_SHIFT)
+#define CDETCTRL1_DBIDLE_MASK           BIT(CDETCTRL1_DBIDLE_SHIFT)
+#define CDETCTRL1_CDPDET_MASK           BIT(CDETCTRL1_CDPDET_SHIFT)
 
 /* MAX14577 CHGCTRL1 register */
 #define CHGCTRL1_TCHW_SHIFT             4
@@ -213,9 +229,9 @@ enum max14577_charger_reg {
 
 /* MAX14577 CHGCTRL2 register */
 #define CHGCTRL2_MBCHOSTEN_SHIFT        6
-#define CHGCTRL2_MBCHOSTEN_MASK         (0x1 << CHGCTRL2_MBCHOSTEN_SHIFT)
+#define CHGCTRL2_MBCHOSTEN_MASK         BIT(CHGCTRL2_MBCHOSTEN_SHIFT)
 #define CHGCTRL2_VCHGR_RC_SHIFT         7
-#define CHGCTRL2_VCHGR_RC_MASK          (0x1 << CHGCTRL2_VCHGR_RC_SHIFT)
+#define CHGCTRL2_VCHGR_RC_MASK          BIT(CHGCTRL2_VCHGR_RC_SHIFT)
 
 /* MAX14577 CHGCTRL3 register */
 #define CHGCTRL3_MBCCVWRC_SHIFT         0
@@ -225,7 +241,7 @@ enum max14577_charger_reg {
 #define CHGCTRL4_MBCICHWRCH_SHIFT       0
 #define CHGCTRL4_MBCICHWRCH_MASK        (0xf << CHGCTRL4_MBCICHWRCH_SHIFT)
 #define CHGCTRL4_MBCICHWRCL_SHIFT       4
-#define CHGCTRL4_MBCICHWRCL_MASK        (0x1 << CHGCTRL4_MBCICHWRCL_SHIFT)
+#define CHGCTRL4_MBCICHWRCL_MASK        BIT(CHGCTRL4_MBCICHWRCL_SHIFT)
 
 /* MAX14577 CHGCTRL5 register */
 #define CHGCTRL5_EOCS_SHIFT             0
@@ -233,7 +249,7 @@ enum max14577_charger_reg {
 
 /* MAX14577 CHGCTRL6 register */
 #define CHGCTRL6_AUTOSTOP_SHIFT         5
-#define CHGCTRL6_AUTOSTOP_MASK          (0x1 << CHGCTRL6_AUTOSTOP_SHIFT)
+#define CHGCTRL6_AUTOSTOP_MASK          BIT(CHGCTRL6_AUTOSTOP_SHIFT)
 
 /* MAX14577 CHGCTRL7 register */
 #define CHGCTRL7_OTPCGHCVS_SHIFT        0
@@ -245,14 +261,111 @@ enum max14577_charger_reg {
 #define MAX14577_REGULATOR_CURRENT_LIMIT_HIGH_STEP       50000
 #define MAX14577_REGULATOR_CURRENT_LIMIT_MAX            950000
 
+/* MAX77836 regulator current limits (as in CHGCTRL4 register), uA */
+#define MAX77836_REGULATOR_CURRENT_LIMIT_MIN             45000
+#define MAX77836_REGULATOR_CURRENT_LIMIT_HIGH_START     100000
+#define MAX77836_REGULATOR_CURRENT_LIMIT_HIGH_STEP       25000
+#define MAX77836_REGULATOR_CURRENT_LIMIT_MAX            475000
+
 /* MAX14577 regulator SFOUT LDO voltage, fixed, uV */
 #define MAX14577_REGULATOR_SAFEOUT_VOLTAGE              4900000
 
+/* MAX77836 regulator LDOx voltage, uV */
+#define MAX77836_REGULATOR_LDO_VOLTAGE_MIN              800000
+#define MAX77836_REGULATOR_LDO_VOLTAGE_MAX              3950000
+#define MAX77836_REGULATOR_LDO_VOLTAGE_STEP             50000
+#define MAX77836_REGULATOR_LDO_VOLTAGE_STEPS_NUM        64
+
+/* Slave addr = 0x46: PMIC */
+enum max77836_pmic_reg {
+        MAX77836_PMIC_REG_PMIC_ID               = 0x20,
+        MAX77836_PMIC_REG_PMIC_REV              = 0x21,
+        MAX77836_PMIC_REG_INTSRC                = 0x22,
+        MAX77836_PMIC_REG_INTSRC_MASK           = 0x23,
+        MAX77836_PMIC_REG_TOPSYS_INT            = 0x24,
+        MAX77836_PMIC_REG_TOPSYS_INT_MASK       = 0x26,
+        MAX77836_PMIC_REG_TOPSYS_STAT           = 0x28,
+        MAX77836_PMIC_REG_MRSTB_CNTL            = 0x2A,
+        MAX77836_PMIC_REG_LSCNFG                = 0x2B,
+
+        MAX77836_LDO_REG_CNFG1_LDO1             = 0x51,
+        MAX77836_LDO_REG_CNFG2_LDO1             = 0x52,
+        MAX77836_LDO_REG_CNFG1_LDO2             = 0x53,
+        MAX77836_LDO_REG_CNFG2_LDO2             = 0x54,
+        MAX77836_LDO_REG_CNFG_LDO_BIAS          = 0x55,
+
+        MAX77836_COMP_REG_COMP1                 = 0x60,
+
+        MAX77836_PMIC_REG_END,
+};
+
+#define MAX77836_INTSRC_MASK_TOP_INT_SHIFT      1
+#define MAX77836_INTSRC_MASK_MUIC_CHG_INT_SHIFT 3
+#define MAX77836_INTSRC_MASK_TOP_INT_MASK       BIT(MAX77836_INTSRC_MASK_TOP_INT_SHIFT)
+#define MAX77836_INTSRC_MASK_MUIC_CHG_INT_MASK  BIT(MAX77836_INTSRC_MASK_MUIC_CHG_INT_SHIFT)
+
+/* MAX77836 PMIC interrupts */
+#define MAX77836_TOPSYS_INT_T120C_SHIFT         0
+#define MAX77836_TOPSYS_INT_T140C_SHIFT         1
+#define MAX77836_TOPSYS_INT_T120C_MASK          BIT(MAX77836_TOPSYS_INT_T120C_SHIFT)
+#define MAX77836_TOPSYS_INT_T140C_MASK          BIT(MAX77836_TOPSYS_INT_T140C_SHIFT)
+
+/* LDO1/LDO2 CONFIG1 register */
+#define MAX77836_CNFG1_LDO_PWRMD_SHIFT          6
+#define MAX77836_CNFG1_LDO_TV_SHIFT             0
+#define MAX77836_CNFG1_LDO_PWRMD_MASK           (0x3 << MAX77836_CNFG1_LDO_PWRMD_SHIFT)
+#define MAX77836_CNFG1_LDO_TV_MASK              (0x3f << MAX77836_CNFG1_LDO_TV_SHIFT)
+
+/* LDO1/LDO2 CONFIG2 register */
+#define MAX77836_CNFG2_LDO_OVCLMPEN_SHIFT       7
+#define MAX77836_CNFG2_LDO_ALPMEN_SHIFT         6
+#define MAX77836_CNFG2_LDO_COMP_SHIFT           4
+#define MAX77836_CNFG2_LDO_POK_SHIFT            3
+#define MAX77836_CNFG2_LDO_ADE_SHIFT            1
+#define MAX77836_CNFG2_LDO_SS_SHIFT             0
+#define MAX77836_CNFG2_LDO_OVCLMPEN_MASK        BIT(MAX77836_CNFG2_LDO_OVCLMPEN_SHIFT)
+#define MAX77836_CNFG2_LDO_ALPMEN_MASK          BIT(MAX77836_CNFG2_LDO_ALPMEN_SHIFT)
+#define MAX77836_CNFG2_LDO_COMP_MASK            (0x3 << MAX77836_CNFG2_LDO_COMP_SHIFT)
+#define MAX77836_CNFG2_LDO_POK_MASK             BIT(MAX77836_CNFG2_LDO_POK_SHIFT)
+#define MAX77836_CNFG2_LDO_ADE_MASK             BIT(MAX77836_CNFG2_LDO_ADE_SHIFT)
+#define MAX77836_CNFG2_LDO_SS_MASK              BIT(MAX77836_CNFG2_LDO_SS_SHIFT)
+
+/* Slave addr = 0x6C: Fuel-Gauge/Battery */
+enum max77836_fg_reg {
+        MAX77836_FG_REG_VCELL_MSB       = 0x02,
+        MAX77836_FG_REG_VCELL_LSB       = 0x03,
+        MAX77836_FG_REG_SOC_MSB         = 0x04,
+        MAX77836_FG_REG_SOC_LSB         = 0x05,
+        MAX77836_FG_REG_MODE_H          = 0x06,
+        MAX77836_FG_REG_MODE_L          = 0x07,
+        MAX77836_FG_REG_VERSION_MSB     = 0x08,
+        MAX77836_FG_REG_VERSION_LSB     = 0x09,
+        MAX77836_FG_REG_HIBRT_H         = 0x0A,
+        MAX77836_FG_REG_HIBRT_L         = 0x0B,
+        MAX77836_FG_REG_CONFIG_H        = 0x0C,
+        MAX77836_FG_REG_CONFIG_L        = 0x0D,
+        MAX77836_FG_REG_VALRT_MIN       = 0x14,
+        MAX77836_FG_REG_VALRT_MAX       = 0x15,
+        MAX77836_FG_REG_CRATE_MSB       = 0x16,
+        MAX77836_FG_REG_CRATE_LSB       = 0x17,
+        MAX77836_FG_REG_VRESET          = 0x18,
+        MAX77836_FG_REG_FGID            = 0x19,
+        MAX77836_FG_REG_STATUS_H        = 0x1A,
+        MAX77836_FG_REG_STATUS_L        = 0x1B,
+        /*
+         * TODO: TABLE registers
+         * TODO: CMD register
+         */
+
+        MAX77836_FG_REG_END,
+};
+
 enum max14577_irq {
         /* INT1 */
         MAX14577_IRQ_INT1_ADC,
         MAX14577_IRQ_INT1_ADCLOW,
         MAX14577_IRQ_INT1_ADCERR,
+        MAX77836_IRQ_INT1_ADC1K,
 
         /* INT2 */
         MAX14577_IRQ_INT2_CHGTYP,
@@ -260,6 +373,7 @@ enum max14577_irq {
         MAX14577_IRQ_INT2_DCDTMR,
         MAX14577_IRQ_INT2_DBCHG,
         MAX14577_IRQ_INT2_VBVOLT,
+        MAX77836_IRQ_INT2_VIDRM,
 
         /* INT3 */
         MAX14577_IRQ_INT3_EOC,
@@ -267,21 +381,25 @@ enum max14577_irq {
         MAX14577_IRQ_INT3_OVP,
         MAX14577_IRQ_INT3_MBCCHGERR,
 
+        /* TOPSYS_INT, only MAX77836 */
+        MAX77836_IRQ_TOPSYS_T140C,
+        MAX77836_IRQ_TOPSYS_T120C,
+
         MAX14577_IRQ_NUM,
 };
 
 struct max14577 {
         struct device *dev;
         struct i2c_client *i2c; /* Slave addr = 0x4A */
+        struct i2c_client *i2c_pmic; /* Slave addr = 0x46 */
+        enum maxim_device_type dev_type;
 
-        struct regmap *regmap;
+        struct regmap *regmap; /* For MUIC and Charger */
+        struct regmap *regmap_pmic;
 
-        struct regmap_irq_chip_data *irq_data;
+        struct regmap_irq_chip_data *irq_data; /* For MUIC and Charger */
+        struct regmap_irq_chip_data *irq_data_pmic;
         int irq;
-
-        /* Device ID */
-        u8 vendor_id;   /* Vendor Identification */
-        u8 device_id;   /* Chip Version */
 };
 
 /* MAX14577 shared regmap API function */
diff --git a/include/linux/mfd/max14577.h b/include/linux/mfd/max14577.h
index 736d39c3ec0d..c83fbed1c7b6 100644
--- a/include/linux/mfd/max14577.h
+++ b/include/linux/mfd/max14577.h
@@ -1,7 +1,7 @@
 /*
- * max14577.h - Driver for the Maxim 14577
+ * max14577.h - Driver for the Maxim 14577/77836
  *
- * Copyright (C) 2013 Samsung Electrnoics
+ * Copyright (C) 2014 Samsung Electrnoics
  * Chanwoo Choi <cw00.choi@samsung.com>
  * Krzysztof Kozlowski <k.kozlowski@samsung.com>
  *
@@ -20,6 +20,9 @@
  * MAX14577 has MUIC, Charger devices.
  * The devices share the same I2C bus and interrupt line
  * included in this mfd driver.
+ *
+ * MAX77836 has additional PMIC and Fuel-Gauge on different I2C slave
+ * addresses.
  */
 
 #ifndef __MAX14577_H__
@@ -32,7 +35,17 @@ enum max14577_regulators {
         MAX14577_SAFEOUT = 0,
         MAX14577_CHARGER,
 
-        MAX14577_REG_MAX,
+        MAX14577_REGULATOR_NUM,
+};
+
+/* MAX77836 regulator IDs */
+enum max77836_regulators {
+        MAX77836_SAFEOUT = 0,
+        MAX77836_CHARGER,
+        MAX77836_LDO1,
+        MAX77836_LDO2,
+
+        MAX77836_REGULATOR_NUM,
 };
 
 struct max14577_regulator_platform_data {
diff --git a/include/linux/mfd/mc13xxx.h b/include/linux/mfd/mc13xxx.h
index a326c850f046..d63b1d309106 100644
--- a/include/linux/mfd/mc13xxx.h
+++ b/include/linux/mfd/mc13xxx.h
@@ -117,10 +117,6 @@ struct mc13xxx_led_platform_data {
 
 #define MAX_LED_CONTROL_REGS    6
 
-struct mc13xxx_leds_platform_data {
-        struct mc13xxx_led_platform_data *led;
-        int num_leds;
-
 /* MC13783 LED Control 0 */
 #define MC13783_LED_C0_ENABLE           (1 << 0)
 #define MC13783_LED_C0_TRIODE_MD        (1 << 7)
@@ -169,10 +165,13 @@ struct mc13xxx_leds_platform_data {
 /* MC34708 LED Control 0 */
 #define MC34708_LED_C0_CURRENT_R(x)     (((x) & 0x3) << 9)
 #define MC34708_LED_C0_CURRENT_G(x)     (((x) & 0x3) << 21)
+
+struct mc13xxx_leds_platform_data {
+        struct mc13xxx_led_platform_data *led;
+        int num_leds;
         u32 led_control[MAX_LED_CONTROL_REGS];
 };
 
-struct mc13xxx_buttons_platform_data {
 #define MC13783_BUTTON_DBNC_0MS         0
 #define MC13783_BUTTON_DBNC_30MS        1
 #define MC13783_BUTTON_DBNC_150MS       2
@@ -180,6 +179,8 @@ struct mc13xxx_buttons_platform_data {
 #define MC13783_BUTTON_ENABLE           (1 << 2)
 #define MC13783_BUTTON_POL_INVERT       (1 << 3)
 #define MC13783_BUTTON_RESET_EN         (1 << 4)
+
+struct mc13xxx_buttons_platform_data {
         int b1on_flags;
         unsigned short b1on_key;
         int b2on_flags;
@@ -188,14 +189,14 @@ struct mc13xxx_buttons_platform_data {
         unsigned short b3on_key;
 };
 
+#define MC13783_TS_ATO_FIRST    false
+#define MC13783_TS_ATO_EACH     true
+
 struct mc13xxx_ts_platform_data {
         /* Delay between Touchscreen polarization and ADC Conversion.
          * Given in clock ticks of a 32 kHz clock which gives a granularity of
          * about 30.5ms */
         u8 ato;
-
-#define MC13783_TS_ATO_FIRST false
-#define MC13783_TS_ATO_EACH  true
         /* Use the ATO delay only for the first conversion or for each one */
         bool atox;
 };
@@ -210,11 +211,12 @@ struct mc13xxx_codec_platform_data {
         enum mc13783_ssi_port dac_ssi_port;
 };
 
-struct mc13xxx_platform_data {
-#define MC13XXX_USE_TOUCHSCREEN (1 << 0)
+#define MC13XXX_USE_TOUCHSCREEN (1 << 0)
 #define MC13XXX_USE_CODEC       (1 << 1)
 #define MC13XXX_USE_ADC         (1 << 2)
 #define MC13XXX_USE_RTC         (1 << 3)
+
+struct mc13xxx_platform_data {
         unsigned int flags;
 
         struct mc13xxx_regulator_platform_data regulators;
diff --git a/include/linux/mfd/palmas.h b/include/linux/mfd/palmas.h
index 9974e387e483..3420e09e2e20 100644
--- a/include/linux/mfd/palmas.h
+++ b/include/linux/mfd/palmas.h
@@ -415,7 +415,7 @@ struct palmas_usb {
         struct palmas *palmas;
         struct device *dev;
 
-        struct extcon_dev edev;
+        struct extcon_dev *edev;
 
         int id_otg_irq;
         int id_irq;
@@ -482,10 +482,10 @@ enum usb_irq_events {
 
 /* helper macro to get correct slave number */
 #define PALMAS_BASE_TO_SLAVE(x)         ((x >> 8) - 1)
-#define PALMAS_BASE_TO_REG(x, y)        ((x & 0xff) + y)
+#define PALMAS_BASE_TO_REG(x, y)        ((x & 0xFF) + y)
 
 /* Base addresses of IP blocks in Palmas */
-#define PALMAS_SMPS_DVS_BASE                                    0x20
+#define PALMAS_SMPS_DVS_BASE                                    0x020
 #define PALMAS_RTC_BASE                                         0x100
 #define PALMAS_VALIDITY_BASE                                    0x118
 #define PALMAS_SMPS_BASE                                        0x120
@@ -504,19 +504,19 @@ enum usb_irq_events {
 #define PALMAS_TRIM_GPADC_BASE                                  0x3CD
 
 /* Registers for function RTC */
-#define PALMAS_SECONDS_REG                                      0x0
-#define PALMAS_MINUTES_REG                                      0x1
-#define PALMAS_HOURS_REG                                        0x2
-#define PALMAS_DAYS_REG                                         0x3
-#define PALMAS_MONTHS_REG                                       0x4
-#define PALMAS_YEARS_REG                                        0x5
-#define PALMAS_WEEKS_REG                                        0x6
-#define PALMAS_ALARM_SECONDS_REG                                0x8
-#define PALMAS_ALARM_MINUTES_REG                                0x9
-#define PALMAS_ALARM_HOURS_REG                                  0xA
-#define PALMAS_ALARM_DAYS_REG                                   0xB
-#define PALMAS_ALARM_MONTHS_REG                                 0xC
-#define PALMAS_ALARM_YEARS_REG                                  0xD
+#define PALMAS_SECONDS_REG                                      0x00
+#define PALMAS_MINUTES_REG                                      0x01
+#define PALMAS_HOURS_REG                                        0x02
+#define PALMAS_DAYS_REG                                         0x03
+#define PALMAS_MONTHS_REG                                       0x04
+#define PALMAS_YEARS_REG                                        0x05
+#define PALMAS_WEEKS_REG                                        0x06
+#define PALMAS_ALARM_SECONDS_REG                                0x08
+#define PALMAS_ALARM_MINUTES_REG                                0x09
+#define PALMAS_ALARM_HOURS_REG                                  0x0A
+#define PALMAS_ALARM_DAYS_REG                                   0x0B
+#define PALMAS_ALARM_MONTHS_REG                                 0x0C
+#define PALMAS_ALARM_YEARS_REG                                  0x0D
 #define PALMAS_RTC_CTRL_REG                                     0x10
 #define PALMAS_RTC_STATUS_REG                                   0x11
 #define PALMAS_RTC_INTERRUPTS_REG                               0x12
@@ -527,201 +527,201 @@ enum usb_irq_events {
 
 /* Bit definitions for SECONDS_REG */
 #define PALMAS_SECONDS_REG_SEC1_MASK                            0x70
-#define PALMAS_SECONDS_REG_SEC1_SHIFT                           4
-#define PALMAS_SECONDS_REG_SEC0_MASK                            0x0f
-#define PALMAS_SECONDS_REG_SEC0_SHIFT                           0
+#define PALMAS_SECONDS_REG_SEC1_SHIFT                           0x04
+#define PALMAS_SECONDS_REG_SEC0_MASK                            0x0F
+#define PALMAS_SECONDS_REG_SEC0_SHIFT                           0x00
 
 /* Bit definitions for MINUTES_REG */
 #define PALMAS_MINUTES_REG_MIN1_MASK                            0x70
-#define PALMAS_MINUTES_REG_MIN1_SHIFT                           4
-#define PALMAS_MINUTES_REG_MIN0_MASK                            0x0f
-#define PALMAS_MINUTES_REG_MIN0_SHIFT                           0
+#define PALMAS_MINUTES_REG_MIN1_SHIFT                           0x04
+#define PALMAS_MINUTES_REG_MIN0_MASK                            0x0F
+#define PALMAS_MINUTES_REG_MIN0_SHIFT                           0x00
 
 /* Bit definitions for HOURS_REG */
 #define PALMAS_HOURS_REG_PM_NAM                                 0x80
-#define PALMAS_HOURS_REG_PM_NAM_SHIFT                           7
+#define PALMAS_HOURS_REG_PM_NAM_SHIFT                           0x07
 #define PALMAS_HOURS_REG_HOUR1_MASK                             0x30
-#define PALMAS_HOURS_REG_HOUR1_SHIFT                            4
-#define PALMAS_HOURS_REG_HOUR0_MASK                             0x0f
-#define PALMAS_HOURS_REG_HOUR0_SHIFT                            0
+#define PALMAS_HOURS_REG_HOUR1_SHIFT                            0x04
+#define PALMAS_HOURS_REG_HOUR0_MASK                             0x0F
+#define PALMAS_HOURS_REG_HOUR0_SHIFT                            0x00
 
 /* Bit definitions for DAYS_REG */
 #define PALMAS_DAYS_REG_DAY1_MASK                               0x30
-#define PALMAS_DAYS_REG_DAY1_SHIFT                              4
-#define PALMAS_DAYS_REG_DAY0_MASK                               0x0f
-#define PALMAS_DAYS_REG_DAY0_SHIFT                              0
+#define PALMAS_DAYS_REG_DAY1_SHIFT                              0x04
+#define PALMAS_DAYS_REG_DAY0_MASK                               0x0F
+#define PALMAS_DAYS_REG_DAY0_SHIFT                              0x00
 
 /* Bit definitions for MONTHS_REG */
 #define PALMAS_MONTHS_REG_MONTH1                                0x10
-#define PALMAS_MONTHS_REG_MONTH1_SHIFT                          4
-#define PALMAS_MONTHS_REG_MONTH0_MASK                           0x0f
-#define PALMAS_MONTHS_REG_MONTH0_SHIFT                          0
+#define PALMAS_MONTHS_REG_MONTH1_SHIFT                          0x04
+#define PALMAS_MONTHS_REG_MONTH0_MASK                           0x0F
+#define PALMAS_MONTHS_REG_MONTH0_SHIFT                          0x00
 
 /* Bit definitions for YEARS_REG */
 #define PALMAS_YEARS_REG_YEAR1_MASK                             0xf0
-#define PALMAS_YEARS_REG_YEAR1_SHIFT                            4
-#define PALMAS_YEARS_REG_YEAR0_MASK                             0x0f
-#define PALMAS_YEARS_REG_YEAR0_SHIFT                            0
+#define PALMAS_YEARS_REG_YEAR1_SHIFT                            0x04
+#define PALMAS_YEARS_REG_YEAR0_MASK                             0x0F
+#define PALMAS_YEARS_REG_YEAR0_SHIFT                            0x00
 
 /* Bit definitions for WEEKS_REG */
 #define PALMAS_WEEKS_REG_WEEK_MASK                              0x07
-#define PALMAS_WEEKS_REG_WEEK_SHIFT                             0
+#define PALMAS_WEEKS_REG_WEEK_SHIFT                             0x00
 
 /* Bit definitions for ALARM_SECONDS_REG */
 #define PALMAS_ALARM_SECONDS_REG_ALARM_SEC1_MASK                0x70
-#define PALMAS_ALARM_SECONDS_REG_ALARM_SEC1_SHIFT               4
-#define PALMAS_ALARM_SECONDS_REG_ALARM_SEC0_MASK                0x0f
-#define PALMAS_ALARM_SECONDS_REG_ALARM_SEC0_SHIFT               0
+#define PALMAS_ALARM_SECONDS_REG_ALARM_SEC1_SHIFT               0x04
+#define PALMAS_ALARM_SECONDS_REG_ALARM_SEC0_MASK                0x0F
+#define PALMAS_ALARM_SECONDS_REG_ALARM_SEC0_SHIFT               0x00
 
 /* Bit definitions for ALARM_MINUTES_REG */
 #define PALMAS_ALARM_MINUTES_REG_ALARM_MIN1_MASK                0x70
-#define PALMAS_ALARM_MINUTES_REG_ALARM_MIN1_SHIFT               4
-#define PALMAS_ALARM_MINUTES_REG_ALARM_MIN0_MASK                0x0f
-#define PALMAS_ALARM_MINUTES_REG_ALARM_MIN0_SHIFT               0
+#define PALMAS_ALARM_MINUTES_REG_ALARM_MIN1_SHIFT               0x04
+#define PALMAS_ALARM_MINUTES_REG_ALARM_MIN0_MASK                0x0F
+#define PALMAS_ALARM_MINUTES_REG_ALARM_MIN0_SHIFT               0x00
 
 /* Bit definitions for ALARM_HOURS_REG */
 #define PALMAS_ALARM_HOURS_REG_ALARM_PM_NAM                     0x80
-#define PALMAS_ALARM_HOURS_REG_ALARM_PM_NAM_SHIFT               7
+#define PALMAS_ALARM_HOURS_REG_ALARM_PM_NAM_SHIFT               0x07
 #define PALMAS_ALARM_HOURS_REG_ALARM_HOUR1_MASK                 0x30
-#define PALMAS_ALARM_HOURS_REG_ALARM_HOUR1_SHIFT                4
-#define PALMAS_ALARM_HOURS_REG_ALARM_HOUR0_MASK                 0x0f
-#define PALMAS_ALARM_HOURS_REG_ALARM_HOUR0_SHIFT                0
+#define PALMAS_ALARM_HOURS_REG_ALARM_HOUR1_SHIFT                0x04
+#define PALMAS_ALARM_HOURS_REG_ALARM_HOUR0_MASK                 0x0F
+#define PALMAS_ALARM_HOURS_REG_ALARM_HOUR0_SHIFT                0x00
 
 /* Bit definitions for ALARM_DAYS_REG */
 #define PALMAS_ALARM_DAYS_REG_ALARM_DAY1_MASK                   0x30
-#define PALMAS_ALARM_DAYS_REG_ALARM_DAY1_SHIFT                  4
-#define PALMAS_ALARM_DAYS_REG_ALARM_DAY0_MASK                   0x0f
-#define PALMAS_ALARM_DAYS_REG_ALARM_DAY0_SHIFT                  0
+#define PALMAS_ALARM_DAYS_REG_ALARM_DAY1_SHIFT                  0x04
+#define PALMAS_ALARM_DAYS_REG_ALARM_DAY0_MASK                   0x0F
+#define PALMAS_ALARM_DAYS_REG_ALARM_DAY0_SHIFT                  0x00
 
 /* Bit definitions for ALARM_MONTHS_REG */
 #define PALMAS_ALARM_MONTHS_REG_ALARM_MONTH1                    0x10
-#define PALMAS_ALARM_MONTHS_REG_ALARM_MONTH1_SHIFT              4
-#define PALMAS_ALARM_MONTHS_REG_ALARM_MONTH0_MASK               0x0f
-#define PALMAS_ALARM_MONTHS_REG_ALARM_MONTH0_SHIFT              0
+#define PALMAS_ALARM_MONTHS_REG_ALARM_MONTH1_SHIFT              0x04
+#define PALMAS_ALARM_MONTHS_REG_ALARM_MONTH0_MASK               0x0F
+#define PALMAS_ALARM_MONTHS_REG_ALARM_MONTH0_SHIFT              0x00
 
 /* Bit definitions for ALARM_YEARS_REG */
 #define PALMAS_ALARM_YEARS_REG_ALARM_YEAR1_MASK                 0xf0
-#define PALMAS_ALARM_YEARS_REG_ALARM_YEAR1_SHIFT                4
-#define PALMAS_ALARM_YEARS_REG_ALARM_YEAR0_MASK                 0x0f
-#define PALMAS_ALARM_YEARS_REG_ALARM_YEAR0_SHIFT                0
+#define PALMAS_ALARM_YEARS_REG_ALARM_YEAR1_SHIFT                0x04
+#define PALMAS_ALARM_YEARS_REG_ALARM_YEAR0_MASK                 0x0F
+#define PALMAS_ALARM_YEARS_REG_ALARM_YEAR0_SHIFT                0x00
 
 /* Bit definitions for RTC_CTRL_REG */
 #define PALMAS_RTC_CTRL_REG_RTC_V_OPT                           0x80
-#define PALMAS_RTC_CTRL_REG_RTC_V_OPT_SHIFT                     7
+#define PALMAS_RTC_CTRL_REG_RTC_V_OPT_SHIFT                     0x07
 #define PALMAS_RTC_CTRL_REG_GET_TIME                            0x40
-#define PALMAS_RTC_CTRL_REG_GET_TIME_SHIFT                      6
+#define PALMAS_RTC_CTRL_REG_GET_TIME_SHIFT                      0x06
 #define PALMAS_RTC_CTRL_REG_SET_32_COUNTER                      0x20
-#define PALMAS_RTC_CTRL_REG_SET_32_COUNTER_SHIFT                5
+#define PALMAS_RTC_CTRL_REG_SET_32_COUNTER_SHIFT                0x05
 #define PALMAS_RTC_CTRL_REG_TEST_MODE                           0x10
-#define PALMAS_RTC_CTRL_REG_TEST_MODE_SHIFT                     4
+#define PALMAS_RTC_CTRL_REG_TEST_MODE_SHIFT                     0x04
 #define PALMAS_RTC_CTRL_REG_MODE_12_24                          0x08
-#define PALMAS_RTC_CTRL_REG_MODE_12_24_SHIFT                    3
+#define PALMAS_RTC_CTRL_REG_MODE_12_24_SHIFT                    0x03
 #define PALMAS_RTC_CTRL_REG_AUTO_COMP                           0x04
-#define PALMAS_RTC_CTRL_REG_AUTO_COMP_SHIFT                     2
+#define PALMAS_RTC_CTRL_REG_AUTO_COMP_SHIFT                     0x02
 #define PALMAS_RTC_CTRL_REG_ROUND_30S                           0x02
-#define PALMAS_RTC_CTRL_REG_ROUND_30S_SHIFT                     1
+#define PALMAS_RTC_CTRL_REG_ROUND_30S_SHIFT                     0x01
 #define PALMAS_RTC_CTRL_REG_STOP_RTC                            0x01
-#define PALMAS_RTC_CTRL_REG_STOP_RTC_SHIFT                      0
+#define PALMAS_RTC_CTRL_REG_STOP_RTC_SHIFT                      0x00
 
 /* Bit definitions for RTC_STATUS_REG */
 #define PALMAS_RTC_STATUS_REG_POWER_UP                          0x80
-#define PALMAS_RTC_STATUS_REG_POWER_UP_SHIFT                    7
+#define PALMAS_RTC_STATUS_REG_POWER_UP_SHIFT                    0x07
 #define PALMAS_RTC_STATUS_REG_ALARM                             0x40
-#define PALMAS_RTC_STATUS_REG_ALARM_SHIFT                       6
+#define PALMAS_RTC_STATUS_REG_ALARM_SHIFT                       0x06
 #define PALMAS_RTC_STATUS_REG_EVENT_1D                          0x20
-#define PALMAS_RTC_STATUS_REG_EVENT_1D_SHIFT                    5
+#define PALMAS_RTC_STATUS_REG_EVENT_1D_SHIFT                    0x05
 #define PALMAS_RTC_STATUS_REG_EVENT_1H                          0x10
-#define PALMAS_RTC_STATUS_REG_EVENT_1H_SHIFT                    4
+#define PALMAS_RTC_STATUS_REG_EVENT_1H_SHIFT                    0x04
 #define PALMAS_RTC_STATUS_REG_EVENT_1M                          0x08
-#define PALMAS_RTC_STATUS_REG_EVENT_1M_SHIFT                    3
+#define PALMAS_RTC_STATUS_REG_EVENT_1M_SHIFT                    0x03
 #define PALMAS_RTC_STATUS_REG_EVENT_1S                          0x04
-#define PALMAS_RTC_STATUS_REG_EVENT_1S_SHIFT                    2
+#define PALMAS_RTC_STATUS_REG_EVENT_1S_SHIFT                    0x02
 #define PALMAS_RTC_STATUS_REG_RUN                               0x02
-#define PALMAS_RTC_STATUS_REG_RUN_SHIFT                         1
+#define PALMAS_RTC_STATUS_REG_RUN_SHIFT                         0x01
 
 /* Bit definitions for RTC_INTERRUPTS_REG */
 #define PALMAS_RTC_INTERRUPTS_REG_IT_SLEEP_MASK_EN              0x10
-#define PALMAS_RTC_INTERRUPTS_REG_IT_SLEEP_MASK_EN_SHIFT        4
+#define PALMAS_RTC_INTERRUPTS_REG_IT_SLEEP_MASK_EN_SHIFT        0x04
 #define PALMAS_RTC_INTERRUPTS_REG_IT_ALARM                      0x08
-#define PALMAS_RTC_INTERRUPTS_REG_IT_ALARM_SHIFT                3
+#define PALMAS_RTC_INTERRUPTS_REG_IT_ALARM_SHIFT                0x03
 #define PALMAS_RTC_INTERRUPTS_REG_IT_TIMER                      0x04
-#define PALMAS_RTC_INTERRUPTS_REG_IT_TIMER_SHIFT                2
+#define PALMAS_RTC_INTERRUPTS_REG_IT_TIMER_SHIFT                0x02
 #define PALMAS_RTC_INTERRUPTS_REG_EVERY_MASK                    0x03
-#define PALMAS_RTC_INTERRUPTS_REG_EVERY_SHIFT                   0
+#define PALMAS_RTC_INTERRUPTS_REG_EVERY_SHIFT                   0x00
 
 /* Bit definitions for RTC_COMP_LSB_REG */
-#define PALMAS_RTC_COMP_LSB_REG_RTC_COMP_LSB_MASK               0xff
-#define PALMAS_RTC_COMP_LSB_REG_RTC_COMP_LSB_SHIFT              0
+#define PALMAS_RTC_COMP_LSB_REG_RTC_COMP_LSB_MASK               0xFF
+#define PALMAS_RTC_COMP_LSB_REG_RTC_COMP_LSB_SHIFT              0x00
 
 /* Bit definitions for RTC_COMP_MSB_REG */
-#define PALMAS_RTC_COMP_MSB_REG_RTC_COMP_MSB_MASK               0xff
-#define PALMAS_RTC_COMP_MSB_REG_RTC_COMP_MSB_SHIFT              0
+#define PALMAS_RTC_COMP_MSB_REG_RTC_COMP_MSB_MASK               0xFF
+#define PALMAS_RTC_COMP_MSB_REG_RTC_COMP_MSB_SHIFT              0x00
 
 /* Bit definitions for RTC_RES_PROG_REG */
-#define PALMAS_RTC_RES_PROG_REG_SW_RES_PROG_MASK                0x3f
-#define PALMAS_RTC_RES_PROG_REG_SW_RES_PROG_SHIFT               0
+#define PALMAS_RTC_RES_PROG_REG_SW_RES_PROG_MASK                0x3F
+#define PALMAS_RTC_RES_PROG_REG_SW_RES_PROG_SHIFT               0x00
 
 /* Bit definitions for RTC_RESET_STATUS_REG */
 #define PALMAS_RTC_RESET_STATUS_REG_RESET_STATUS                0x01
-#define PALMAS_RTC_RESET_STATUS_REG_RESET_STATUS_SHIFT          0
+#define PALMAS_RTC_RESET_STATUS_REG_RESET_STATUS_SHIFT          0x00
 
 /* Registers for function BACKUP */
-#define PALMAS_BACKUP0                                          0x0
-#define PALMAS_BACKUP1                                          0x1
-#define PALMAS_BACKUP2                                          0x2
-#define PALMAS_BACKUP3                                          0x3
-#define PALMAS_BACKUP4                                          0x4
-#define PALMAS_BACKUP5                                          0x5
-#define PALMAS_BACKUP6                                          0x6
-#define PALMAS_BACKUP7                                          0x7
+#define PALMAS_BACKUP0                                          0x00
+#define PALMAS_BACKUP1                                          0x01
+#define PALMAS_BACKUP2                                          0x02
+#define PALMAS_BACKUP3                                          0x03
+#define PALMAS_BACKUP4                                          0x04
+#define PALMAS_BACKUP5                                          0x05
+#define PALMAS_BACKUP6                                          0x06
+#define PALMAS_BACKUP7                                          0x07
 
 /* Bit definitions for BACKUP0 */
-#define PALMAS_BACKUP0_BACKUP_MASK                              0xff
-#define PALMAS_BACKUP0_BACKUP_SHIFT                             0
+#define PALMAS_BACKUP0_BACKUP_MASK                              0xFF
+#define PALMAS_BACKUP0_BACKUP_SHIFT                             0x00
 
 /* Bit definitions for BACKUP1 */
-#define PALMAS_BACKUP1_BACKUP_MASK                              0xff
-#define PALMAS_BACKUP1_BACKUP_SHIFT                             0
+#define PALMAS_BACKUP1_BACKUP_MASK                              0xFF
+#define PALMAS_BACKUP1_BACKUP_SHIFT                             0x00
 
 /* Bit definitions for BACKUP2 */
-#define PALMAS_BACKUP2_BACKUP_MASK                              0xff
-#define PALMAS_BACKUP2_BACKUP_SHIFT                             0
+#define PALMAS_BACKUP2_BACKUP_MASK                              0xFF
+#define PALMAS_BACKUP2_BACKUP_SHIFT                             0x00
 
 /* Bit definitions for BACKUP3 */
-#define PALMAS_BACKUP3_BACKUP_MASK                              0xff
-#define PALMAS_BACKUP3_BACKUP_SHIFT                             0
+#define PALMAS_BACKUP3_BACKUP_MASK                              0xFF
+#define PALMAS_BACKUP3_BACKUP_SHIFT                             0x00
 
 /* Bit definitions for BACKUP4 */
-#define PALMAS_BACKUP4_BACKUP_MASK                              0xff
-#define PALMAS_BACKUP4_BACKUP_SHIFT                             0
+#define PALMAS_BACKUP4_BACKUP_MASK                              0xFF
+#define PALMAS_BACKUP4_BACKUP_SHIFT                             0x00
 
 /* Bit definitions for BACKUP5 */
-#define PALMAS_BACKUP5_BACKUP_MASK                              0xff
-#define PALMAS_BACKUP5_BACKUP_SHIFT                             0
+#define PALMAS_BACKUP5_BACKUP_MASK                              0xFF
+#define PALMAS_BACKUP5_BACKUP_SHIFT                             0x00
 
 /* Bit definitions for BACKUP6 */
-#define PALMAS_BACKUP6_BACKUP_MASK                              0xff
-#define PALMAS_BACKUP6_BACKUP_SHIFT                             0
+#define PALMAS_BACKUP6_BACKUP_MASK                              0xFF
+#define PALMAS_BACKUP6_BACKUP_SHIFT                             0x00
 
 /* Bit definitions for BACKUP7 */
-#define PALMAS_BACKUP7_BACKUP_MASK                              0xff
-#define PALMAS_BACKUP7_BACKUP_SHIFT                             0
+#define PALMAS_BACKUP7_BACKUP_MASK                              0xFF
+#define PALMAS_BACKUP7_BACKUP_SHIFT                             0x00
 
 /* Registers for function SMPS */
-#define PALMAS_SMPS12_CTRL                                      0x0
-#define PALMAS_SMPS12_TSTEP                                     0x1
-#define PALMAS_SMPS12_FORCE                                     0x2
-#define PALMAS_SMPS12_VOLTAGE                                   0x3
-#define PALMAS_SMPS3_CTRL                                       0x4
-#define PALMAS_SMPS3_VOLTAGE                                    0x7
-#define PALMAS_SMPS45_CTRL                                      0x8
-#define PALMAS_SMPS45_TSTEP                                     0x9
-#define PALMAS_SMPS45_FORCE                                     0xA
-#define PALMAS_SMPS45_VOLTAGE                                   0xB
-#define PALMAS_SMPS6_CTRL                                       0xC
-#define PALMAS_SMPS6_TSTEP                                      0xD
-#define PALMAS_SMPS6_FORCE                                      0xE
-#define PALMAS_SMPS6_VOLTAGE                                    0xF
+#define PALMAS_SMPS12_CTRL                                      0x00
+#define PALMAS_SMPS12_TSTEP                                     0x01
+#define PALMAS_SMPS12_FORCE                                     0x02
+#define PALMAS_SMPS12_VOLTAGE                                   0x03
+#define PALMAS_SMPS3_CTRL                                       0x04
+#define PALMAS_SMPS3_VOLTAGE                                    0x07
+#define PALMAS_SMPS45_CTRL                                      0x08
+#define PALMAS_SMPS45_TSTEP                                     0x09
+#define PALMAS_SMPS45_FORCE                                     0x0A
+#define PALMAS_SMPS45_VOLTAGE                                   0x0B
+#define PALMAS_SMPS6_CTRL                                       0x0C
+#define PALMAS_SMPS6_TSTEP                                      0x0D
+#define PALMAS_SMPS6_FORCE                                      0x0E
+#define PALMAS_SMPS6_VOLTAGE                                    0x0F
 #define PALMAS_SMPS7_CTRL                                       0x10
 #define PALMAS_SMPS7_VOLTAGE                                    0x13
 #define PALMAS_SMPS8_CTRL                                       0x14
@@ -744,303 +744,303 @@ enum usb_irq_events {
 
 /* Bit definitions for SMPS12_CTRL */
 #define PALMAS_SMPS12_CTRL_WR_S                                 0x80
-#define PALMAS_SMPS12_CTRL_WR_S_SHIFT                           7
+#define PALMAS_SMPS12_CTRL_WR_S_SHIFT                           0x07
 #define PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN                        0x40
-#define PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN_SHIFT                  6
+#define PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN_SHIFT                  0x06
 #define PALMAS_SMPS12_CTRL_STATUS_MASK                          0x30
-#define PALMAS_SMPS12_CTRL_STATUS_SHIFT                         4
+#define PALMAS_SMPS12_CTRL_STATUS_SHIFT                         0x04
 #define PALMAS_SMPS12_CTRL_MODE_SLEEP_MASK                      0x0c
-#define PALMAS_SMPS12_CTRL_MODE_SLEEP_SHIFT                     2
+#define PALMAS_SMPS12_CTRL_MODE_SLEEP_SHIFT                     0x02
 #define PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK                     0x03
-#define PALMAS_SMPS12_CTRL_MODE_ACTIVE_SHIFT                    0
+#define PALMAS_SMPS12_CTRL_MODE_ACTIVE_SHIFT                    0x00
 
 /* Bit definitions for SMPS12_TSTEP */
 #define PALMAS_SMPS12_TSTEP_TSTEP_MASK                          0x03
-#define PALMAS_SMPS12_TSTEP_TSTEP_SHIFT                         0
+#define PALMAS_SMPS12_TSTEP_TSTEP_SHIFT                         0x00
 
 /* Bit definitions for SMPS12_FORCE */
 #define PALMAS_SMPS12_FORCE_CMD                                 0x80
-#define PALMAS_SMPS12_FORCE_CMD_SHIFT                           7
-#define PALMAS_SMPS12_FORCE_VSEL_MASK                           0x7f
-#define PALMAS_SMPS12_FORCE_VSEL_SHIFT                          0
+#define PALMAS_SMPS12_FORCE_CMD_SHIFT                           0x07
+#define PALMAS_SMPS12_FORCE_VSEL_MASK                           0x7F
+#define PALMAS_SMPS12_FORCE_VSEL_SHIFT                          0x00
 
 /* Bit definitions for SMPS12_VOLTAGE */
 #define PALMAS_SMPS12_VOLTAGE_RANGE                             0x80
-#define PALMAS_SMPS12_VOLTAGE_RANGE_SHIFT                       7
-#define PALMAS_SMPS12_VOLTAGE_VSEL_MASK                         0x7f
-#define PALMAS_SMPS12_VOLTAGE_VSEL_SHIFT                        0
+#define PALMAS_SMPS12_VOLTAGE_RANGE_SHIFT                       0x07
+#define PALMAS_SMPS12_VOLTAGE_VSEL_MASK                         0x7F
+#define PALMAS_SMPS12_VOLTAGE_VSEL_SHIFT                        0x00
 
 /* Bit definitions for SMPS3_CTRL */
 #define PALMAS_SMPS3_CTRL_WR_S                                  0x80
-#define PALMAS_SMPS3_CTRL_WR_S_SHIFT                            7
+#define PALMAS_SMPS3_CTRL_WR_S_SHIFT                            0x07
 #define PALMAS_SMPS3_CTRL_STATUS_MASK                           0x30
-#define PALMAS_SMPS3_CTRL_STATUS_SHIFT                          4
+#define PALMAS_SMPS3_CTRL_STATUS_SHIFT                          0x04
 #define PALMAS_SMPS3_CTRL_MODE_SLEEP_MASK                       0x0c
-#define PALMAS_SMPS3_CTRL_MODE_SLEEP_SHIFT                      2
+#define PALMAS_SMPS3_CTRL_MODE_SLEEP_SHIFT                      0x02
 #define PALMAS_SMPS3_CTRL_MODE_ACTIVE_MASK                      0x03
-#define PALMAS_SMPS3_CTRL_MODE_ACTIVE_SHIFT                     0
+#define PALMAS_SMPS3_CTRL_MODE_ACTIVE_SHIFT                     0x00
 
 /* Bit definitions for SMPS3_VOLTAGE */
 #define PALMAS_SMPS3_VOLTAGE_RANGE                              0x80
-#define PALMAS_SMPS3_VOLTAGE_RANGE_SHIFT                        7
-#define PALMAS_SMPS3_VOLTAGE_VSEL_MASK                          0x7f
-#define PALMAS_SMPS3_VOLTAGE_VSEL_SHIFT                         0
+#define PALMAS_SMPS3_VOLTAGE_RANGE_SHIFT                        0x07
+#define PALMAS_SMPS3_VOLTAGE_VSEL_MASK                          0x7F
+#define PALMAS_SMPS3_VOLTAGE_VSEL_SHIFT                         0x00
 
 /* Bit definitions for SMPS45_CTRL */
 #define PALMAS_SMPS45_CTRL_WR_S                                 0x80
-#define PALMAS_SMPS45_CTRL_WR_S_SHIFT                           7
+#define PALMAS_SMPS45_CTRL_WR_S_SHIFT                           0x07
 #define PALMAS_SMPS45_CTRL_ROOF_FLOOR_EN                        0x40
-#define PALMAS_SMPS45_CTRL_ROOF_FLOOR_EN_SHIFT                  6
+#define PALMAS_SMPS45_CTRL_ROOF_FLOOR_EN_SHIFT                  0x06
 #define PALMAS_SMPS45_CTRL_STATUS_MASK                          0x30
-#define PALMAS_SMPS45_CTRL_STATUS_SHIFT                         4
+#define PALMAS_SMPS45_CTRL_STATUS_SHIFT                         0x04
 #define PALMAS_SMPS45_CTRL_MODE_SLEEP_MASK                      0x0c
-#define PALMAS_SMPS45_CTRL_MODE_SLEEP_SHIFT                     2
+#define PALMAS_SMPS45_CTRL_MODE_SLEEP_SHIFT                     0x02
 #define PALMAS_SMPS45_CTRL_MODE_ACTIVE_MASK                     0x03
-#define PALMAS_SMPS45_CTRL_MODE_ACTIVE_SHIFT                    0
+#define PALMAS_SMPS45_CTRL_MODE_ACTIVE_SHIFT                    0x00
 
 /* Bit definitions for SMPS45_TSTEP */
 #define PALMAS_SMPS45_TSTEP_TSTEP_MASK                          0x03
-#define PALMAS_SMPS45_TSTEP_TSTEP_SHIFT                         0
+#define PALMAS_SMPS45_TSTEP_TSTEP_SHIFT                         0x00
 
 /* Bit definitions for SMPS45_FORCE */
 #define PALMAS_SMPS45_FORCE_CMD                                 0x80
-#define PALMAS_SMPS45_FORCE_CMD_SHIFT                           7
-#define PALMAS_SMPS45_FORCE_VSEL_MASK                           0x7f
-#define PALMAS_SMPS45_FORCE_VSEL_SHIFT                          0
+#define PALMAS_SMPS45_FORCE_CMD_SHIFT                           0x07
+#define PALMAS_SMPS45_FORCE_VSEL_MASK                           0x7F
+#define PALMAS_SMPS45_FORCE_VSEL_SHIFT                          0x00
 
 /* Bit definitions for SMPS45_VOLTAGE */
 #define PALMAS_SMPS45_VOLTAGE_RANGE                             0x80
-#define PALMAS_SMPS45_VOLTAGE_RANGE_SHIFT                       7
-#define PALMAS_SMPS45_VOLTAGE_VSEL_MASK                         0x7f
-#define PALMAS_SMPS45_VOLTAGE_VSEL_SHIFT                        0
+#define PALMAS_SMPS45_VOLTAGE_RANGE_SHIFT                       0x07
+#define PALMAS_SMPS45_VOLTAGE_VSEL_MASK                         0x7F
+#define PALMAS_SMPS45_VOLTAGE_VSEL_SHIFT                        0x00
 
 /* Bit definitions for SMPS6_CTRL */
 #define PALMAS_SMPS6_CTRL_WR_S                                  0x80
-#define PALMAS_SMPS6_CTRL_WR_S_SHIFT                            7
+#define PALMAS_SMPS6_CTRL_WR_S_SHIFT                            0x07
 #define PALMAS_SMPS6_CTRL_ROOF_FLOOR_EN                         0x40
-#define PALMAS_SMPS6_CTRL_ROOF_FLOOR_EN_SHIFT                   6
+#define PALMAS_SMPS6_CTRL_ROOF_FLOOR_EN_SHIFT                   0x06
 #define PALMAS_SMPS6_CTRL_STATUS_MASK                           0x30
-#define PALMAS_SMPS6_CTRL_STATUS_SHIFT                          4
+#define PALMAS_SMPS6_CTRL_STATUS_SHIFT                          0x04
 #define PALMAS_SMPS6_CTRL_MODE_SLEEP_MASK                       0x0c
-#define PALMAS_SMPS6_CTRL_MODE_SLEEP_SHIFT                      2
+#define PALMAS_SMPS6_CTRL_MODE_SLEEP_SHIFT                      0x02
 #define PALMAS_SMPS6_CTRL_MODE_ACTIVE_MASK                      0x03
-#define PALMAS_SMPS6_CTRL_MODE_ACTIVE_SHIFT                     0
+#define PALMAS_SMPS6_CTRL_MODE_ACTIVE_SHIFT                     0x00
 
 /* Bit definitions for SMPS6_TSTEP */
 #define PALMAS_SMPS6_TSTEP_TSTEP_MASK                           0x03
-#define PALMAS_SMPS6_TSTEP_TSTEP_SHIFT                          0
+#define PALMAS_SMPS6_TSTEP_TSTEP_SHIFT                          0x00
 
 /* Bit definitions for SMPS6_FORCE */
 #define PALMAS_SMPS6_FORCE_CMD                                  0x80
-#define PALMAS_SMPS6_FORCE_CMD_SHIFT                            7
-#define PALMAS_SMPS6_FORCE_VSEL_MASK                            0x7f
-#define PALMAS_SMPS6_FORCE_VSEL_SHIFT                           0
+#define PALMAS_SMPS6_FORCE_CMD_SHIFT                            0x07
+#define PALMAS_SMPS6_FORCE_VSEL_MASK                            0x7F
+#define PALMAS_SMPS6_FORCE_VSEL_SHIFT                           0x00
 
 /* Bit definitions for SMPS6_VOLTAGE */
 #define PALMAS_SMPS6_VOLTAGE_RANGE                              0x80
-#define PALMAS_SMPS6_VOLTAGE_RANGE_SHIFT                        7
-#define PALMAS_SMPS6_VOLTAGE_VSEL_MASK                          0x7f
-#define PALMAS_SMPS6_VOLTAGE_VSEL_SHIFT                         0
+#define PALMAS_SMPS6_VOLTAGE_RANGE_SHIFT                        0x07
+#define PALMAS_SMPS6_VOLTAGE_VSEL_MASK                          0x7F
+#define PALMAS_SMPS6_VOLTAGE_VSEL_SHIFT                         0x00
 
 /* Bit definitions for SMPS7_CTRL */
 #define PALMAS_SMPS7_CTRL_WR_S                                  0x80
-#define PALMAS_SMPS7_CTRL_WR_S_SHIFT                            7
+#define PALMAS_SMPS7_CTRL_WR_S_SHIFT                            0x07
 #define PALMAS_SMPS7_CTRL_STATUS_MASK                           0x30
-#define PALMAS_SMPS7_CTRL_STATUS_SHIFT                          4
+#define PALMAS_SMPS7_CTRL_STATUS_SHIFT                          0x04
 #define PALMAS_SMPS7_CTRL_MODE_SLEEP_MASK                       0x0c
-#define PALMAS_SMPS7_CTRL_MODE_SLEEP_SHIFT                      2
+#define PALMAS_SMPS7_CTRL_MODE_SLEEP_SHIFT                      0x02
 #define PALMAS_SMPS7_CTRL_MODE_ACTIVE_MASK                      0x03
-#define PALMAS_SMPS7_CTRL_MODE_ACTIVE_SHIFT                     0
+#define PALMAS_SMPS7_CTRL_MODE_ACTIVE_SHIFT                     0x00
 
 /* Bit definitions for SMPS7_VOLTAGE */
 #define PALMAS_SMPS7_VOLTAGE_RANGE                              0x80
-#define PALMAS_SMPS7_VOLTAGE_RANGE_SHIFT                        7
-#define PALMAS_SMPS7_VOLTAGE_VSEL_MASK                          0x7f
-#define PALMAS_SMPS7_VOLTAGE_VSEL_SHIFT                         0
+#define PALMAS_SMPS7_VOLTAGE_RANGE_SHIFT                        0x07
+#define PALMAS_SMPS7_VOLTAGE_VSEL_MASK                          0x7F
+#define PALMAS_SMPS7_VOLTAGE_VSEL_SHIFT                         0x00
 
 /* Bit definitions for SMPS8_CTRL */
 #define PALMAS_SMPS8_CTRL_WR_S                                  0x80
-#define PALMAS_SMPS8_CTRL_WR_S_SHIFT                            7
+#define PALMAS_SMPS8_CTRL_WR_S_SHIFT                            0x07
 #define PALMAS_SMPS8_CTRL_ROOF_FLOOR_EN                         0x40
-#define PALMAS_SMPS8_CTRL_ROOF_FLOOR_EN_SHIFT                   6
+#define PALMAS_SMPS8_CTRL_ROOF_FLOOR_EN_SHIFT                   0x06
 #define PALMAS_SMPS8_CTRL_STATUS_MASK                           0x30
-#define PALMAS_SMPS8_CTRL_STATUS_SHIFT                          4
+#define PALMAS_SMPS8_CTRL_STATUS_SHIFT                          0x04
 #define PALMAS_SMPS8_CTRL_MODE_SLEEP_MASK                       0x0c
-#define PALMAS_SMPS8_CTRL_MODE_SLEEP_SHIFT                      2
+#define PALMAS_SMPS8_CTRL_MODE_SLEEP_SHIFT                      0x02
 #define PALMAS_SMPS8_CTRL_MODE_ACTIVE_MASK                      0x03
-#define PALMAS_SMPS8_CTRL_MODE_ACTIVE_SHIFT                     0
+#define PALMAS_SMPS8_CTRL_MODE_ACTIVE_SHIFT                     0x00
 
 /* Bit definitions for SMPS8_TSTEP */
 #define PALMAS_SMPS8_TSTEP_TSTEP_MASK                           0x03
-#define PALMAS_SMPS8_TSTEP_TSTEP_SHIFT                          0
+#define PALMAS_SMPS8_TSTEP_TSTEP_SHIFT                          0x00
 
 /* Bit definitions for SMPS8_FORCE */
 #define PALMAS_SMPS8_FORCE_CMD                                  0x80
-#define PALMAS_SMPS8_FORCE_CMD_SHIFT                            7
-#define PALMAS_SMPS8_FORCE_VSEL_MASK                            0x7f
-#define PALMAS_SMPS8_FORCE_VSEL_SHIFT                           0
+#define PALMAS_SMPS8_FORCE_CMD_SHIFT                            0x07
+#define PALMAS_SMPS8_FORCE_VSEL_MASK                            0x7F
+#define PALMAS_SMPS8_FORCE_VSEL_SHIFT                           0x00
 
 /* Bit definitions for SMPS8_VOLTAGE */
 #define PALMAS_SMPS8_VOLTAGE_RANGE                              0x80
-#define PALMAS_SMPS8_VOLTAGE_RANGE_SHIFT                        7
-#define PALMAS_SMPS8_VOLTAGE_VSEL_MASK                          0x7f
-#define PALMAS_SMPS8_VOLTAGE_VSEL_SHIFT                         0
+#define PALMAS_SMPS8_VOLTAGE_RANGE_SHIFT                        0x07
+#define PALMAS_SMPS8_VOLTAGE_VSEL_MASK                          0x7F
+#define PALMAS_SMPS8_VOLTAGE_VSEL_SHIFT                         0x00
 
 /* Bit definitions for SMPS9_CTRL */
 #define PALMAS_SMPS9_CTRL_WR_S                                  0x80
-#define PALMAS_SMPS9_CTRL_WR_S_SHIFT                            7
+#define PALMAS_SMPS9_CTRL_WR_S_SHIFT                            0x07
 #define PALMAS_SMPS9_CTRL_STATUS_MASK                           0x30
-#define PALMAS_SMPS9_CTRL_STATUS_SHIFT                          4
+#define PALMAS_SMPS9_CTRL_STATUS_SHIFT                          0x04
 #define PALMAS_SMPS9_CTRL_MODE_SLEEP_MASK                       0x0c
-#define PALMAS_SMPS9_CTRL_MODE_SLEEP_SHIFT                      2
+#define PALMAS_SMPS9_CTRL_MODE_SLEEP_SHIFT                      0x02
 #define PALMAS_SMPS9_CTRL_MODE_ACTIVE_MASK                      0x03
-#define PALMAS_SMPS9_CTRL_MODE_ACTIVE_SHIFT                     0
+#define PALMAS_SMPS9_CTRL_MODE_ACTIVE_SHIFT                     0x00
 
 /* Bit definitions for SMPS9_VOLTAGE */
 #define PALMAS_SMPS9_VOLTAGE_RANGE                              0x80
-#define PALMAS_SMPS9_VOLTAGE_RANGE_SHIFT                        7
-#define PALMAS_SMPS9_VOLTAGE_VSEL_MASK                          0x7f
-#define PALMAS_SMPS9_VOLTAGE_VSEL_SHIFT                         0
+#define PALMAS_SMPS9_VOLTAGE_RANGE_SHIFT                        0x07
+#define PALMAS_SMPS9_VOLTAGE_VSEL_MASK                          0x7F
+#define PALMAS_SMPS9_VOLTAGE_VSEL_SHIFT                         0x00
 
 /* Bit definitions for SMPS10_CTRL */
 #define PALMAS_SMPS10_CTRL_MODE_SLEEP_MASK                      0xf0
-#define PALMAS_SMPS10_CTRL_MODE_SLEEP_SHIFT                     4
-#define PALMAS_SMPS10_CTRL_MODE_ACTIVE_MASK                     0x0f
-#define PALMAS_SMPS10_CTRL_MODE_ACTIVE_SHIFT                    0
+#define PALMAS_SMPS10_CTRL_MODE_SLEEP_SHIFT                     0x04
+#define PALMAS_SMPS10_CTRL_MODE_ACTIVE_MASK                     0x0F
+#define PALMAS_SMPS10_CTRL_MODE_ACTIVE_SHIFT                    0x00
 
 /* Bit definitions for SMPS10_STATUS */
-#define PALMAS_SMPS10_STATUS_STATUS_MASK                        0x0f
-#define PALMAS_SMPS10_STATUS_STATUS_SHIFT                       0
+#define PALMAS_SMPS10_STATUS_STATUS_MASK                        0x0F
+#define PALMAS_SMPS10_STATUS_STATUS_SHIFT                       0x00
 
 /* Bit definitions for SMPS_CTRL */
 #define PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN                      0x20
-#define PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN_SHIFT                5
+#define PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN_SHIFT                0x05
 #define PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN                      0x10
-#define PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN_SHIFT                4
+#define PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN_SHIFT                0x04
 #define PALMAS_SMPS_CTRL_SMPS45_PHASE_CTRL_MASK                 0x0c
-#define PALMAS_SMPS_CTRL_SMPS45_PHASE_CTRL_SHIFT                2
+#define PALMAS_SMPS_CTRL_SMPS45_PHASE_CTRL_SHIFT                0x02
 #define PALMAS_SMPS_CTRL_SMPS123_PHASE_CTRL_MASK                0x03
-#define PALMAS_SMPS_CTRL_SMPS123_PHASE_CTRL_SHIFT               0
+#define PALMAS_SMPS_CTRL_SMPS123_PHASE_CTRL_SHIFT               0x00
 
 /* Bit definitions for SMPS_PD_CTRL */
 #define PALMAS_SMPS_PD_CTRL_SMPS9                               0x40
-#define PALMAS_SMPS_PD_CTRL_SMPS9_SHIFT                         6
+#define PALMAS_SMPS_PD_CTRL_SMPS9_SHIFT                         0x06
 #define PALMAS_SMPS_PD_CTRL_SMPS8                               0x20
-#define PALMAS_SMPS_PD_CTRL_SMPS8_SHIFT                         5
+#define PALMAS_SMPS_PD_CTRL_SMPS8_SHIFT                         0x05
 #define PALMAS_SMPS_PD_CTRL_SMPS7                               0x10
-#define PALMAS_SMPS_PD_CTRL_SMPS7_SHIFT                         4
+#define PALMAS_SMPS_PD_CTRL_SMPS7_SHIFT                         0x04
 #define PALMAS_SMPS_PD_CTRL_SMPS6                               0x08
-#define PALMAS_SMPS_PD_CTRL_SMPS6_SHIFT                         3
+#define PALMAS_SMPS_PD_CTRL_SMPS6_SHIFT                         0x03
 #define PALMAS_SMPS_PD_CTRL_SMPS45                              0x04
-#define PALMAS_SMPS_PD_CTRL_SMPS45_SHIFT                        2
+#define PALMAS_SMPS_PD_CTRL_SMPS45_SHIFT                        0x02
 #define PALMAS_SMPS_PD_CTRL_SMPS3                               0x02
-#define PALMAS_SMPS_PD_CTRL_SMPS3_SHIFT                         1
+#define PALMAS_SMPS_PD_CTRL_SMPS3_SHIFT                         0x01
 #define PALMAS_SMPS_PD_CTRL_SMPS12                              0x01
-#define PALMAS_SMPS_PD_CTRL_SMPS12_SHIFT                        0
+#define PALMAS_SMPS_PD_CTRL_SMPS12_SHIFT                        0x00
 
 /* Bit definitions for SMPS_THERMAL_EN */
 #define PALMAS_SMPS_THERMAL_EN_SMPS9                            0x40
-#define PALMAS_SMPS_THERMAL_EN_SMPS9_SHIFT                      6
+#define PALMAS_SMPS_THERMAL_EN_SMPS9_SHIFT                      0x06
 #define PALMAS_SMPS_THERMAL_EN_SMPS8                            0x20
-#define PALMAS_SMPS_THERMAL_EN_SMPS8_SHIFT                      5
+#define PALMAS_SMPS_THERMAL_EN_SMPS8_SHIFT                      0x05
 #define PALMAS_SMPS_THERMAL_EN_SMPS6                            0x08
-#define PALMAS_SMPS_THERMAL_EN_SMPS6_SHIFT                      3
+#define PALMAS_SMPS_THERMAL_EN_SMPS6_SHIFT                      0x03
 #define PALMAS_SMPS_THERMAL_EN_SMPS457                          0x04
-#define PALMAS_SMPS_THERMAL_EN_SMPS457_SHIFT                    2
+#define PALMAS_SMPS_THERMAL_EN_SMPS457_SHIFT                    0x02
 #define PALMAS_SMPS_THERMAL_EN_SMPS123                          0x01
-#define PALMAS_SMPS_THERMAL_EN_SMPS123_SHIFT                    0
+#define PALMAS_SMPS_THERMAL_EN_SMPS123_SHIFT                    0x00
 
 /* Bit definitions for SMPS_THERMAL_STATUS */
 #define PALMAS_SMPS_THERMAL_STATUS_SMPS9                        0x40
-#define PALMAS_SMPS_THERMAL_STATUS_SMPS9_SHIFT                  6
+#define PALMAS_SMPS_THERMAL_STATUS_SMPS9_SHIFT                  0x06
 #define PALMAS_SMPS_THERMAL_STATUS_SMPS8                        0x20
-#define PALMAS_SMPS_THERMAL_STATUS_SMPS8_SHIFT                  5
+#define PALMAS_SMPS_THERMAL_STATUS_SMPS8_SHIFT                  0x05
 #define PALMAS_SMPS_THERMAL_STATUS_SMPS6                        0x08
-#define PALMAS_SMPS_THERMAL_STATUS_SMPS6_SHIFT                  3
+#define PALMAS_SMPS_THERMAL_STATUS_SMPS6_SHIFT                  0x03
 #define PALMAS_SMPS_THERMAL_STATUS_SMPS457                      0x04
-#define PALMAS_SMPS_THERMAL_STATUS_SMPS457_SHIFT                2
+#define PALMAS_SMPS_THERMAL_STATUS_SMPS457_SHIFT                0x02
 #define PALMAS_SMPS_THERMAL_STATUS_SMPS123                      0x01
-#define PALMAS_SMPS_THERMAL_STATUS_SMPS123_SHIFT                0
+#define PALMAS_SMPS_THERMAL_STATUS_SMPS123_SHIFT                0x00
 
 /* Bit definitions for SMPS_SHORT_STATUS */
 #define PALMAS_SMPS_SHORT_STATUS_SMPS10                         0x80
-#define PALMAS_SMPS_SHORT_STATUS_SMPS10_SHIFT                   7
+#define PALMAS_SMPS_SHORT_STATUS_SMPS10_SHIFT                   0x07
 #define PALMAS_SMPS_SHORT_STATUS_SMPS9                          0x40
-#define PALMAS_SMPS_SHORT_STATUS_SMPS9_SHIFT                    6
+#define PALMAS_SMPS_SHORT_STATUS_SMPS9_SHIFT                    0x06
 #define PALMAS_SMPS_SHORT_STATUS_SMPS8                          0x20
-#define PALMAS_SMPS_SHORT_STATUS_SMPS8_SHIFT                    5
+#define PALMAS_SMPS_SHORT_STATUS_SMPS8_SHIFT                    0x05
 #define PALMAS_SMPS_SHORT_STATUS_SMPS7                          0x10
-#define PALMAS_SMPS_SHORT_STATUS_SMPS7_SHIFT                    4
+#define PALMAS_SMPS_SHORT_STATUS_SMPS7_SHIFT                    0x04
 #define PALMAS_SMPS_SHORT_STATUS_SMPS6                          0x08
-#define PALMAS_SMPS_SHORT_STATUS_SMPS6_SHIFT                    3
+#define PALMAS_SMPS_SHORT_STATUS_SMPS6_SHIFT                    0x03
 #define PALMAS_SMPS_SHORT_STATUS_SMPS45                         0x04
-#define PALMAS_SMPS_SHORT_STATUS_SMPS45_SHIFT                   2
+#define PALMAS_SMPS_SHORT_STATUS_SMPS45_SHIFT                   0x02
 #define PALMAS_SMPS_SHORT_STATUS_SMPS3                          0x02
-#define PALMAS_SMPS_SHORT_STATUS_SMPS3_SHIFT                    1
+#define PALMAS_SMPS_SHORT_STATUS_SMPS3_SHIFT                    0x01
 #define PALMAS_SMPS_SHORT_STATUS_SMPS12                         0x01
-#define PALMAS_SMPS_SHORT_STATUS_SMPS12_SHIFT                   0
+#define PALMAS_SMPS_SHORT_STATUS_SMPS12_SHIFT                   0x00
 
 /* Bit definitions for SMPS_NEGATIVE_CURRENT_LIMIT_EN */
 #define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS9             0x40
-#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS9_SHIFT       6
+#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS9_SHIFT       0x06
 #define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS8             0x20
-#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS8_SHIFT       5
+#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS8_SHIFT       0x05
 #define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS7             0x10
-#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS7_SHIFT       4
+#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS7_SHIFT       0x04
 #define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS6             0x08
-#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS6_SHIFT       3
+#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS6_SHIFT       0x03
 #define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS45            0x04
-#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS45_SHIFT      2
+#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS45_SHIFT      0x02
 #define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS3             0x02
-#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS3_SHIFT       1
+#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS3_SHIFT       0x01
 #define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS12            0x01
-#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS12_SHIFT      0
+#define PALMAS_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS12_SHIFT      0x00
 
 /* Bit definitions for SMPS_POWERGOOD_MASK1 */
 #define PALMAS_SMPS_POWERGOOD_MASK1_SMPS10                      0x80
-#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS10_SHIFT                7
+#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS10_SHIFT                0x07
 #define PALMAS_SMPS_POWERGOOD_MASK1_SMPS9                       0x40
-#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS9_SHIFT                 6
+#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS9_SHIFT                 0x06
 #define PALMAS_SMPS_POWERGOOD_MASK1_SMPS8                       0x20
-#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS8_SHIFT                 5
+#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS8_SHIFT                 0x05
 #define PALMAS_SMPS_POWERGOOD_MASK1_SMPS7                       0x10
-#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS7_SHIFT                 4
+#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS7_SHIFT                 0x04
 #define PALMAS_SMPS_POWERGOOD_MASK1_SMPS6                       0x08
-#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS6_SHIFT                 3
+#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS6_SHIFT                 0x03
 #define PALMAS_SMPS_POWERGOOD_MASK1_SMPS45                      0x04
-#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS45_SHIFT                2
+#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS45_SHIFT                0x02
 #define PALMAS_SMPS_POWERGOOD_MASK1_SMPS3                       0x02
-#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS3_SHIFT                 1
+#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS3_SHIFT                 0x01
 #define PALMAS_SMPS_POWERGOOD_MASK1_SMPS12                      0x01
-#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS12_SHIFT                0
+#define PALMAS_SMPS_POWERGOOD_MASK1_SMPS12_SHIFT                0x00
 
 /* Bit definitions for SMPS_POWERGOOD_MASK2 */
 #define PALMAS_SMPS_POWERGOOD_MASK2_POWERGOOD_TYPE_SELECT       0x80
-#define PALMAS_SMPS_POWERGOOD_MASK2_POWERGOOD_TYPE_SELECT_SHIFT 7
+#define PALMAS_SMPS_POWERGOOD_MASK2_POWERGOOD_TYPE_SELECT_SHIFT 0x07
 #define PALMAS_SMPS_POWERGOOD_MASK2_GPIO_7                      0x04
-#define PALMAS_SMPS_POWERGOOD_MASK2_GPIO_7_SHIFT                2
+#define PALMAS_SMPS_POWERGOOD_MASK2_GPIO_7_SHIFT                0x02
 #define PALMAS_SMPS_POWERGOOD_MASK2_VBUS                        0x02
-#define PALMAS_SMPS_POWERGOOD_MASK2_VBUS_SHIFT                  1
+#define PALMAS_SMPS_POWERGOOD_MASK2_VBUS_SHIFT                  0x01
 #define PALMAS_SMPS_POWERGOOD_MASK2_ACOK                        0x01
-#define PALMAS_SMPS_POWERGOOD_MASK2_ACOK_SHIFT                  0
+#define PALMAS_SMPS_POWERGOOD_MASK2_ACOK_SHIFT                  0x00
 
 /* Registers for function LDO */
-#define PALMAS_LDO1_CTRL                                        0x0
-#define PALMAS_LDO1_VOLTAGE                                     0x1
-#define PALMAS_LDO2_CTRL                                        0x2
-#define PALMAS_LDO2_VOLTAGE                                     0x3
-#define PALMAS_LDO3_CTRL                                        0x4
-#define PALMAS_LDO3_VOLTAGE                                     0x5
-#define PALMAS_LDO4_CTRL                                        0x6
-#define PALMAS_LDO4_VOLTAGE                                     0x7
-#define PALMAS_LDO5_CTRL                                        0x8
-#define PALMAS_LDO5_VOLTAGE                                     0x9
-#define PALMAS_LDO6_CTRL                                        0xA
-#define PALMAS_LDO6_VOLTAGE                                     0xB
-#define PALMAS_LDO7_CTRL                                        0xC
-#define PALMAS_LDO7_VOLTAGE                                     0xD
-#define PALMAS_LDO8_CTRL                                        0xE
-#define PALMAS_LDO8_VOLTAGE                                     0xF
+#define PALMAS_LDO1_CTRL                                        0x00
+#define PALMAS_LDO1_VOLTAGE                                     0x01
+#define PALMAS_LDO2_CTRL                                        0x02
+#define PALMAS_LDO2_VOLTAGE                                     0x03
+#define PALMAS_LDO3_CTRL                                        0x04
+#define PALMAS_LDO3_VOLTAGE                                     0x05
+#define PALMAS_LDO4_CTRL                                        0x06
+#define PALMAS_LDO4_VOLTAGE                                     0x07
+#define PALMAS_LDO5_CTRL                                        0x08
+#define PALMAS_LDO5_VOLTAGE                                     0x09
+#define PALMAS_LDO6_CTRL                                        0x0A
+#define PALMAS_LDO6_VOLTAGE                                     0x0B
+#define PALMAS_LDO7_CTRL                                        0x0C
+#define PALMAS_LDO7_VOLTAGE                                     0x0D
+#define PALMAS_LDO8_CTRL                                        0x0E
+#define PALMAS_LDO8_VOLTAGE                                     0x0F
 #define PALMAS_LDO9_CTRL                                        0x10
 #define PALMAS_LDO9_VOLTAGE                                     0x11
 #define PALMAS_LDOLN_CTRL                                       0x12
@@ -1055,236 +1055,236 @@ enum usb_irq_events {
 
 /* Bit definitions for LDO1_CTRL */
 #define PALMAS_LDO1_CTRL_WR_S                                   0x80
-#define PALMAS_LDO1_CTRL_WR_S_SHIFT                             7
+#define PALMAS_LDO1_CTRL_WR_S_SHIFT                             0x07
 #define PALMAS_LDO1_CTRL_STATUS                                 0x10
-#define PALMAS_LDO1_CTRL_STATUS_SHIFT                           4
+#define PALMAS_LDO1_CTRL_STATUS_SHIFT                           0x04
 #define PALMAS_LDO1_CTRL_MODE_SLEEP                             0x04
-#define PALMAS_LDO1_CTRL_MODE_SLEEP_SHIFT                       2
+#define PALMAS_LDO1_CTRL_MODE_SLEEP_SHIFT                       0x02
 #define PALMAS_LDO1_CTRL_MODE_ACTIVE                            0x01
-#define PALMAS_LDO1_CTRL_MODE_ACTIVE_SHIFT                      0
+#define PALMAS_LDO1_CTRL_MODE_ACTIVE_SHIFT                      0x00
 
 /* Bit definitions for LDO1_VOLTAGE */
-#define PALMAS_LDO1_VOLTAGE_VSEL_MASK                           0x3f
-#define PALMAS_LDO1_VOLTAGE_VSEL_SHIFT                          0
+#define PALMAS_LDO1_VOLTAGE_VSEL_MASK                           0x3F
+#define PALMAS_LDO1_VOLTAGE_VSEL_SHIFT                          0x00
 
 /* Bit definitions for LDO2_CTRL */
 #define PALMAS_LDO2_CTRL_WR_S                                   0x80
-#define PALMAS_LDO2_CTRL_WR_S_SHIFT                             7
+#define PALMAS_LDO2_CTRL_WR_S_SHIFT                             0x07
 #define PALMAS_LDO2_CTRL_STATUS                                 0x10
-#define PALMAS_LDO2_CTRL_STATUS_SHIFT                           4
+#define PALMAS_LDO2_CTRL_STATUS_SHIFT                           0x04
 #define PALMAS_LDO2_CTRL_MODE_SLEEP                             0x04
-#define PALMAS_LDO2_CTRL_MODE_SLEEP_SHIFT                       2
+#define PALMAS_LDO2_CTRL_MODE_SLEEP_SHIFT                       0x02
 #define PALMAS_LDO2_CTRL_MODE_ACTIVE                            0x01
-#define PALMAS_LDO2_CTRL_MODE_ACTIVE_SHIFT                      0
+#define PALMAS_LDO2_CTRL_MODE_ACTIVE_SHIFT                      0x00
 
 /* Bit definitions for LDO2_VOLTAGE */
-#define PALMAS_LDO2_VOLTAGE_VSEL_MASK                           0x3f
-#define PALMAS_LDO2_VOLTAGE_VSEL_SHIFT                          0
+#define PALMAS_LDO2_VOLTAGE_VSEL_MASK                           0x3F
+#define PALMAS_LDO2_VOLTAGE_VSEL_SHIFT                          0x00
 
 /* Bit definitions for LDO3_CTRL */
 #define PALMAS_LDO3_CTRL_WR_S                                   0x80
-#define PALMAS_LDO3_CTRL_WR_S_SHIFT                             7
+#define PALMAS_LDO3_CTRL_WR_S_SHIFT                             0x07
 #define PALMAS_LDO3_CTRL_STATUS                                 0x10
-#define PALMAS_LDO3_CTRL_STATUS_SHIFT                           4
+#define PALMAS_LDO3_CTRL_STATUS_SHIFT                           0x04
 #define PALMAS_LDO3_CTRL_MODE_SLEEP                             0x04
-#define PALMAS_LDO3_CTRL_MODE_SLEEP_SHIFT                       2
+#define PALMAS_LDO3_CTRL_MODE_SLEEP_SHIFT                       0x02
 #define PALMAS_LDO3_CTRL_MODE_ACTIVE                            0x01
-#define PALMAS_LDO3_CTRL_MODE_ACTIVE_SHIFT                      0
+#define PALMAS_LDO3_CTRL_MODE_ACTIVE_SHIFT                      0x00
 
 /* Bit definitions for LDO3_VOLTAGE */
-#define PALMAS_LDO3_VOLTAGE_VSEL_MASK                           0x3f
-#define PALMAS_LDO3_VOLTAGE_VSEL_SHIFT                          0
+#define PALMAS_LDO3_VOLTAGE_VSEL_MASK                           0x3F
+#define PALMAS_LDO3_VOLTAGE_VSEL_SHIFT                          0x00
 
 /* Bit definitions for LDO4_CTRL */
 #define PALMAS_LDO4_CTRL_WR_S                                   0x80
-#define PALMAS_LDO4_CTRL_WR_S_SHIFT                             7
+#define PALMAS_LDO4_CTRL_WR_S_SHIFT                             0x07
 #define PALMAS_LDO4_CTRL_STATUS                                 0x10
-#define PALMAS_LDO4_CTRL_STATUS_SHIFT                           4
+#define PALMAS_LDO4_CTRL_STATUS_SHIFT                           0x04
 #define PALMAS_LDO4_CTRL_MODE_SLEEP                             0x04
-#define PALMAS_LDO4_CTRL_MODE_SLEEP_SHIFT                       2
+#define PALMAS_LDO4_CTRL_MODE_SLEEP_SHIFT                       0x02
 #define PALMAS_LDO4_CTRL_MODE_ACTIVE                            0x01
-#define PALMAS_LDO4_CTRL_MODE_ACTIVE_SHIFT                      0
+#define PALMAS_LDO4_CTRL_MODE_ACTIVE_SHIFT                      0x00
 
 /* Bit definitions for LDO4_VOLTAGE */
-#define PALMAS_LDO4_VOLTAGE_VSEL_MASK                           0x3f
-#define PALMAS_LDO4_VOLTAGE_VSEL_SHIFT                          0
+#define PALMAS_LDO4_VOLTAGE_VSEL_MASK                           0x3F
+#define PALMAS_LDO4_VOLTAGE_VSEL_SHIFT                          0x00
 
 /* Bit definitions for LDO5_CTRL */
 #define PALMAS_LDO5_CTRL_WR_S                                   0x80
-#define PALMAS_LDO5_CTRL_WR_S_SHIFT                             7
+#define PALMAS_LDO5_CTRL_WR_S_SHIFT                             0x07
 #define PALMAS_LDO5_CTRL_STATUS                                 0x10
-#define PALMAS_LDO5_CTRL_STATUS_SHIFT                           4
+#define PALMAS_LDO5_CTRL_STATUS_SHIFT                           0x04
 #define PALMAS_LDO5_CTRL_MODE_SLEEP                             0x04
-#define PALMAS_LDO5_CTRL_MODE_SLEEP_SHIFT                       2
+#define PALMAS_LDO5_CTRL_MODE_SLEEP_SHIFT                       0x02
 #define PALMAS_LDO5_CTRL_MODE_ACTIVE                            0x01
-#define PALMAS_LDO5_CTRL_MODE_ACTIVE_SHIFT                      0
+#define PALMAS_LDO5_CTRL_MODE_ACTIVE_SHIFT                      0x00
 
 /* Bit definitions for LDO5_VOLTAGE */
-#define PALMAS_LDO5_VOLTAGE_VSEL_MASK                           0x3f
-#define PALMAS_LDO5_VOLTAGE_VSEL_SHIFT                          0
+#define PALMAS_LDO5_VOLTAGE_VSEL_MASK                           0x3F
+#define PALMAS_LDO5_VOLTAGE_VSEL_SHIFT                          0x00
 
 /* Bit definitions for LDO6_CTRL */
 #define PALMAS_LDO6_CTRL_WR_S                                   0x80
-#define PALMAS_LDO6_CTRL_WR_S_SHIFT                             7
+#define PALMAS_LDO6_CTRL_WR_S_SHIFT                             0x07
 #define PALMAS_LDO6_CTRL_LDO_VIB_EN                             0x40
-#define PALMAS_LDO6_CTRL_LDO_VIB_EN_SHIFT                       6
+#define PALMAS_LDO6_CTRL_LDO_VIB_EN_SHIFT                       0x06
 #define PALMAS_LDO6_CTRL_STATUS                                 0x10
-#define PALMAS_LDO6_CTRL_STATUS_SHIFT                           4
+#define PALMAS_LDO6_CTRL_STATUS_SHIFT                           0x04
 #define PALMAS_LDO6_CTRL_MODE_SLEEP                             0x04
-#define PALMAS_LDO6_CTRL_MODE_SLEEP_SHIFT                       2
+#define PALMAS_LDO6_CTRL_MODE_SLEEP_SHIFT                       0x02
 #define PALMAS_LDO6_CTRL_MODE_ACTIVE                            0x01
-#define PALMAS_LDO6_CTRL_MODE_ACTIVE_SHIFT                      0
+#define PALMAS_LDO6_CTRL_MODE_ACTIVE_SHIFT                      0x00
 
 /* Bit definitions for LDO6_VOLTAGE */
-#define PALMAS_LDO6_VOLTAGE_VSEL_MASK                           0x3f
-#define PALMAS_LDO6_VOLTAGE_VSEL_SHIFT                          0
+#define PALMAS_LDO6_VOLTAGE_VSEL_MASK                           0x3F
+#define PALMAS_LDO6_VOLTAGE_VSEL_SHIFT                          0x00
 
 /* Bit definitions for LDO7_CTRL */
 #define PALMAS_LDO7_CTRL_WR_S                                   0x80
-#define PALMAS_LDO7_CTRL_WR_S_SHIFT                             7
+#define PALMAS_LDO7_CTRL_WR_S_SHIFT                             0x07
 #define PALMAS_LDO7_CTRL_STATUS                                 0x10
-#define PALMAS_LDO7_CTRL_STATUS_SHIFT                           4
+#define PALMAS_LDO7_CTRL_STATUS_SHIFT                           0x04
 #define PALMAS_LDO7_CTRL_MODE_SLEEP                             0x04
-#define PALMAS_LDO7_CTRL_MODE_SLEEP_SHIFT                       2
+#define PALMAS_LDO7_CTRL_MODE_SLEEP_SHIFT                       0x02
 #define PALMAS_LDO7_CTRL_MODE_ACTIVE                            0x01
-#define PALMAS_LDO7_CTRL_MODE_ACTIVE_SHIFT                      0
+#define PALMAS_LDO7_CTRL_MODE_ACTIVE_SHIFT                      0x00
 
 /* Bit definitions for LDO7_VOLTAGE */
-#define PALMAS_LDO7_VOLTAGE_VSEL_MASK                           0x3f
-#define PALMAS_LDO7_VOLTAGE_VSEL_SHIFT                          0
+#define PALMAS_LDO7_VOLTAGE_VSEL_MASK                           0x3F
+#define PALMAS_LDO7_VOLTAGE_VSEL_SHIFT                          0x00
 
 /* Bit definitions for LDO8_CTRL */
 #define PALMAS_LDO8_CTRL_WR_S                                   0x80
-#define PALMAS_LDO8_CTRL_WR_S_SHIFT                             7
+#define PALMAS_LDO8_CTRL_WR_S_SHIFT                             0x07
 #define PALMAS_LDO8_CTRL_LDO_TRACKING_EN                        0x40
-#define PALMAS_LDO8_CTRL_LDO_TRACKING_EN_SHIFT                  6
+#define PALMAS_LDO8_CTRL_LDO_TRACKING_EN_SHIFT                  0x06
 #define PALMAS_LDO8_CTRL_STATUS                                 0x10
-#define PALMAS_LDO8_CTRL_STATUS_SHIFT                           4
+#define PALMAS_LDO8_CTRL_STATUS_SHIFT                           0x04
 #define PALMAS_LDO8_CTRL_MODE_SLEEP                             0x04
-#define PALMAS_LDO8_CTRL_MODE_SLEEP_SHIFT                       2
+#define PALMAS_LDO8_CTRL_MODE_SLEEP_SHIFT                       0x02
 #define PALMAS_LDO8_CTRL_MODE_ACTIVE                            0x01
-#define PALMAS_LDO8_CTRL_MODE_ACTIVE_SHIFT                      0
+#define PALMAS_LDO8_CTRL_MODE_ACTIVE_SHIFT                      0x00
 
 /* Bit definitions for LDO8_VOLTAGE */
-#define PALMAS_LDO8_VOLTAGE_VSEL_MASK                           0x3f
-#define PALMAS_LDO8_VOLTAGE_VSEL_SHIFT                          0
+#define PALMAS_LDO8_VOLTAGE_VSEL_MASK                           0x3F
+#define PALMAS_LDO8_VOLTAGE_VSEL_SHIFT                          0x00
 
 /* Bit definitions for LDO9_CTRL */
 #define PALMAS_LDO9_CTRL_WR_S                                   0x80
-#define PALMAS_LDO9_CTRL_WR_S_SHIFT                             7
+#define PALMAS_LDO9_CTRL_WR_S_SHIFT                             0x07
 #define PALMAS_LDO9_CTRL_LDO_BYPASS_EN                          0x40
-#define PALMAS_LDO9_CTRL_LDO_BYPASS_EN_SHIFT                    6
+#define PALMAS_LDO9_CTRL_LDO_BYPASS_EN_SHIFT                    0x06
 #define PALMAS_LDO9_CTRL_STATUS                                 0x10
-#define PALMAS_LDO9_CTRL_STATUS_SHIFT                           4
+#define PALMAS_LDO9_CTRL_STATUS_SHIFT                           0x04
 #define PALMAS_LDO9_CTRL_MODE_SLEEP                             0x04
-#define PALMAS_LDO9_CTRL_MODE_SLEEP_SHIFT                       2
+#define PALMAS_LDO9_CTRL_MODE_SLEEP_SHIFT                       0x02
 #define PALMAS_LDO9_CTRL_MODE_ACTIVE                            0x01
-#define PALMAS_LDO9_CTRL_MODE_ACTIVE_SHIFT                      0
+#define PALMAS_LDO9_CTRL_MODE_ACTIVE_SHIFT                      0x00
 
 /* Bit definitions for LDO9_VOLTAGE */
-#define PALMAS_LDO9_VOLTAGE_VSEL_MASK                           0x3f
-#define PALMAS_LDO9_VOLTAGE_VSEL_SHIFT                          0
+#define PALMAS_LDO9_VOLTAGE_VSEL_MASK                           0x3F
+#define PALMAS_LDO9_VOLTAGE_VSEL_SHIFT                          0x00
 
 /* Bit definitions for LDOLN_CTRL */
 #define PALMAS_LDOLN_CTRL_WR_S                                  0x80
-#define PALMAS_LDOLN_CTRL_WR_S_SHIFT                            7
+#define PALMAS_LDOLN_CTRL_WR_S_SHIFT                            0x07
 #define PALMAS_LDOLN_CTRL_STATUS                                0x10
-#define PALMAS_LDOLN_CTRL_STATUS_SHIFT                          4
+#define PALMAS_LDOLN_CTRL_STATUS_SHIFT                          0x04
 #define PALMAS_LDOLN_CTRL_MODE_SLEEP                            0x04
-#define PALMAS_LDOLN_CTRL_MODE_SLEEP_SHIFT                      2
+#define PALMAS_LDOLN_CTRL_MODE_SLEEP_SHIFT                      0x02
 #define PALMAS_LDOLN_CTRL_MODE_ACTIVE                           0x01
-#define PALMAS_LDOLN_CTRL_MODE_ACTIVE_SHIFT                     0
+#define PALMAS_LDOLN_CTRL_MODE_ACTIVE_SHIFT                     0x00
 
 /* Bit definitions for LDOLN_VOLTAGE */
-#define PALMAS_LDOLN_VOLTAGE_VSEL_MASK                          0x3f
-#define PALMAS_LDOLN_VOLTAGE_VSEL_SHIFT                         0
+#define PALMAS_LDOLN_VOLTAGE_VSEL_MASK                          0x3F
+#define PALMAS_LDOLN_VOLTAGE_VSEL_SHIFT                         0x00
 
 /* Bit definitions for LDOUSB_CTRL */
 #define PALMAS_LDOUSB_CTRL_WR_S                                 0x80
-#define PALMAS_LDOUSB_CTRL_WR_S_SHIFT                           7
+#define PALMAS_LDOUSB_CTRL_WR_S_SHIFT                           0x07
 #define PALMAS_LDOUSB_CTRL_STATUS                               0x10
-#define PALMAS_LDOUSB_CTRL_STATUS_SHIFT                         4
+#define PALMAS_LDOUSB_CTRL_STATUS_SHIFT                         0x04
 #define PALMAS_LDOUSB_CTRL_MODE_SLEEP                           0x04
-#define PALMAS_LDOUSB_CTRL_MODE_SLEEP_SHIFT                     2
+#define PALMAS_LDOUSB_CTRL_MODE_SLEEP_SHIFT                     0x02
 #define PALMAS_LDOUSB_CTRL_MODE_ACTIVE                          0x01
-#define PALMAS_LDOUSB_CTRL_MODE_ACTIVE_SHIFT                    0
+#define PALMAS_LDOUSB_CTRL_MODE_ACTIVE_SHIFT                    0x00
 
 /* Bit definitions for LDOUSB_VOLTAGE */
-#define PALMAS_LDOUSB_VOLTAGE_VSEL_MASK                         0x3f
-#define PALMAS_LDOUSB_VOLTAGE_VSEL_SHIFT                        0
+#define PALMAS_LDOUSB_VOLTAGE_VSEL_MASK                         0x3F
+#define PALMAS_LDOUSB_VOLTAGE_VSEL_SHIFT                        0x00
 
 /* Bit definitions for LDO_CTRL */
 #define PALMAS_LDO_CTRL_LDOUSB_ON_VBUS_VSYS                     0x01
-#define PALMAS_LDO_CTRL_LDOUSB_ON_VBUS_VSYS_SHIFT               0
+#define PALMAS_LDO_CTRL_LDOUSB_ON_VBUS_VSYS_SHIFT               0x00
 
 /* Bit definitions for LDO_PD_CTRL1 */
 #define PALMAS_LDO_PD_CTRL1_LDO8                                0x80
-#define PALMAS_LDO_PD_CTRL1_LDO8_SHIFT                          7
+#define PALMAS_LDO_PD_CTRL1_LDO8_SHIFT                          0x07
 #define PALMAS_LDO_PD_CTRL1_LDO7                                0x40
-#define PALMAS_LDO_PD_CTRL1_LDO7_SHIFT                          6
+#define PALMAS_LDO_PD_CTRL1_LDO7_SHIFT                          0x06
 #define PALMAS_LDO_PD_CTRL1_LDO6                                0x20
-#define PALMAS_LDO_PD_CTRL1_LDO6_SHIFT                          5
+#define PALMAS_LDO_PD_CTRL1_LDO6_SHIFT                          0x05
 #define PALMAS_LDO_PD_CTRL1_LDO5                                0x10
-#define PALMAS_LDO_PD_CTRL1_LDO5_SHIFT                          4
+#define PALMAS_LDO_PD_CTRL1_LDO5_SHIFT                          0x04
 #define PALMAS_LDO_PD_CTRL1_LDO4                                0x08
-#define PALMAS_LDO_PD_CTRL1_LDO4_SHIFT                          3
+#define PALMAS_LDO_PD_CTRL1_LDO4_SHIFT                          0x03
 #define PALMAS_LDO_PD_CTRL1_LDO3                                0x04
-#define PALMAS_LDO_PD_CTRL1_LDO3_SHIFT                          2
+#define PALMAS_LDO_PD_CTRL1_LDO3_SHIFT                          0x02
 #define PALMAS_LDO_PD_CTRL1_LDO2                                0x02
-#define PALMAS_LDO_PD_CTRL1_LDO2_SHIFT                          1
+#define PALMAS_LDO_PD_CTRL1_LDO2_SHIFT                          0x01
 #define PALMAS_LDO_PD_CTRL1_LDO1                                0x01
-#define PALMAS_LDO_PD_CTRL1_LDO1_SHIFT                          0
+#define PALMAS_LDO_PD_CTRL1_LDO1_SHIFT                          0x00
 
 /* Bit definitions for LDO_PD_CTRL2 */
 #define PALMAS_LDO_PD_CTRL2_LDOUSB                              0x04
-#define PALMAS_LDO_PD_CTRL2_LDOUSB_SHIFT                        2
+#define PALMAS_LDO_PD_CTRL2_LDOUSB_SHIFT                        0x02
 #define PALMAS_LDO_PD_CTRL2_LDOLN                               0x02
-#define PALMAS_LDO_PD_CTRL2_LDOLN_SHIFT                         1
+#define PALMAS_LDO_PD_CTRL2_LDOLN_SHIFT                         0x01
 #define PALMAS_LDO_PD_CTRL2_LDO9                                0x01
-#define PALMAS_LDO_PD_CTRL2_LDO9_SHIFT                          0
+#define PALMAS_LDO_PD_CTRL2_LDO9_SHIFT                          0x00
 
 /* Bit definitions for LDO_SHORT_STATUS1 */
 #define PALMAS_LDO_SHORT_STATUS1_LDO8                           0x80
-#define PALMAS_LDO_SHORT_STATUS1_LDO8_SHIFT                     7
+#define PALMAS_LDO_SHORT_STATUS1_LDO8_SHIFT                     0x07
 #define PALMAS_LDO_SHORT_STATUS1_LDO7                           0x40
-#define PALMAS_LDO_SHORT_STATUS1_LDO7_SHIFT                     6
+#define PALMAS_LDO_SHORT_STATUS1_LDO7_SHIFT                     0x06
 #define PALMAS_LDO_SHORT_STATUS1_LDO6                           0x20
-#define PALMAS_LDO_SHORT_STATUS1_LDO6_SHIFT                     5
+#define PALMAS_LDO_SHORT_STATUS1_LDO6_SHIFT                     0x05
 #define PALMAS_LDO_SHORT_STATUS1_LDO5                           0x10
-#define PALMAS_LDO_SHORT_STATUS1_LDO5_SHIFT                     4
+#define PALMAS_LDO_SHORT_STATUS1_LDO5_SHIFT                     0x04
 #define PALMAS_LDO_SHORT_STATUS1_LDO4                           0x08
-#define PALMAS_LDO_SHORT_STATUS1_LDO4_SHIFT                     3
+#define PALMAS_LDO_SHORT_STATUS1_LDO4_SHIFT                     0x03
 #define PALMAS_LDO_SHORT_STATUS1_LDO3                           0x04
-#define PALMAS_LDO_SHORT_STATUS1_LDO3_SHIFT                     2
+#define PALMAS_LDO_SHORT_STATUS1_LDO3_SHIFT                     0x02
 #define PALMAS_LDO_SHORT_STATUS1_LDO2                           0x02
-#define PALMAS_LDO_SHORT_STATUS1_LDO2_SHIFT                     1
+#define PALMAS_LDO_SHORT_STATUS1_LDO2_SHIFT                     0x01
 #define PALMAS_LDO_SHORT_STATUS1_LDO1                           0x01
-#define PALMAS_LDO_SHORT_STATUS1_LDO1_SHIFT                     0
+#define PALMAS_LDO_SHORT_STATUS1_LDO1_SHIFT                     0x00
 
 /* Bit definitions for LDO_SHORT_STATUS2 */
 #define PALMAS_LDO_SHORT_STATUS2_LDOVANA                        0x08
-#define PALMAS_LDO_SHORT_STATUS2_LDOVANA_SHIFT                  3
+#define PALMAS_LDO_SHORT_STATUS2_LDOVANA_SHIFT                  0x03
 #define PALMAS_LDO_SHORT_STATUS2_LDOUSB                         0x04
-#define PALMAS_LDO_SHORT_STATUS2_LDOUSB_SHIFT                   2
+#define PALMAS_LDO_SHORT_STATUS2_LDOUSB_SHIFT                   0x02
 #define PALMAS_LDO_SHORT_STATUS2_LDOLN                          0x02
-#define PALMAS_LDO_SHORT_STATUS2_LDOLN_SHIFT                    1
+#define PALMAS_LDO_SHORT_STATUS2_LDOLN_SHIFT                    0x01
 #define PALMAS_LDO_SHORT_STATUS2_LDO9                           0x01
-#define PALMAS_LDO_SHORT_STATUS2_LDO9_SHIFT                     0
+#define PALMAS_LDO_SHORT_STATUS2_LDO9_SHIFT                     0x00
 
 /* Registers for function PMU_CONTROL */
-#define PALMAS_DEV_CTRL                                         0x0
-#define PALMAS_POWER_CTRL                                       0x1
-#define PALMAS_VSYS_LO                                          0x2
-#define PALMAS_VSYS_MON                                         0x3
-#define PALMAS_VBAT_MON                                         0x4
-#define PALMAS_WATCHDOG                                         0x5
-#define PALMAS_BOOT_STATUS                                      0x6
-#define PALMAS_BATTERY_BOUNCE                                   0x7
-#define PALMAS_BACKUP_BATTERY_CTRL                              0x8
-#define PALMAS_LONG_PRESS_KEY                                   0x9
-#define PALMAS_OSC_THERM_CTRL                                   0xA
-#define PALMAS_BATDEBOUNCING                                    0xB
-#define PALMAS_SWOFF_HWRST                                      0xF
+#define PALMAS_DEV_CTRL                                         0x00
+#define PALMAS_POWER_CTRL                                       0x01
+#define PALMAS_VSYS_LO                                          0x02
+#define PALMAS_VSYS_MON                                         0x03
+#define PALMAS_VBAT_MON                                         0x04
+#define PALMAS_WATCHDOG                                         0x05
+#define PALMAS_BOOT_STATUS                                      0x06
+#define PALMAS_BATTERY_BOUNCE                                   0x07
+#define PALMAS_BACKUP_BATTERY_CTRL                              0x08
+#define PALMAS_LONG_PRESS_KEY                                   0x09
+#define PALMAS_OSC_THERM_CTRL                                   0x0A
+#define PALMAS_BATDEBOUNCING                                    0x0B
+#define PALMAS_SWOFF_HWRST                                      0x0F
 #define PALMAS_SWOFF_COLDRST                                    0x10
 #define PALMAS_SWOFF_STATUS                                     0x11
 #define PALMAS_PMU_CONFIG                                       0x12
@@ -1296,668 +1296,668 @@ enum usb_irq_events {
 
 /* Bit definitions for DEV_CTRL */
 #define PALMAS_DEV_CTRL_DEV_STATUS_MASK                         0x0c
-#define PALMAS_DEV_CTRL_DEV_STATUS_SHIFT                        2
+#define PALMAS_DEV_CTRL_DEV_STATUS_SHIFT                        0x02
 #define PALMAS_DEV_CTRL_SW_RST                                  0x02
-#define PALMAS_DEV_CTRL_SW_RST_SHIFT                            1
+#define PALMAS_DEV_CTRL_SW_RST_SHIFT                            0x01
 #define PALMAS_DEV_CTRL_DEV_ON                                  0x01
-#define PALMAS_DEV_CTRL_DEV_ON_SHIFT                            0
+#define PALMAS_DEV_CTRL_DEV_ON_SHIFT                            0x00
 
 /* Bit definitions for POWER_CTRL */
 #define PALMAS_POWER_CTRL_ENABLE2_MASK                          0x04
-#define PALMAS_POWER_CTRL_ENABLE2_MASK_SHIFT                    2
+#define PALMAS_POWER_CTRL_ENABLE2_MASK_SHIFT                    0x02
 #define PALMAS_POWER_CTRL_ENABLE1_MASK                          0x02
-#define PALMAS_POWER_CTRL_ENABLE1_MASK_SHIFT                    1
+#define PALMAS_POWER_CTRL_ENABLE1_MASK_SHIFT                    0x01
 #define PALMAS_POWER_CTRL_NSLEEP_MASK                           0x01
-#define PALMAS_POWER_CTRL_NSLEEP_MASK_SHIFT                     0
+#define PALMAS_POWER_CTRL_NSLEEP_MASK_SHIFT                     0x00
 
 /* Bit definitions for VSYS_LO */
-#define PALMAS_VSYS_LO_THRESHOLD_MASK                           0x1f
-#define PALMAS_VSYS_LO_THRESHOLD_SHIFT                          0
+#define PALMAS_VSYS_LO_THRESHOLD_MASK                           0x1F
+#define PALMAS_VSYS_LO_THRESHOLD_SHIFT                          0x00
 
 /* Bit definitions for VSYS_MON */
 #define PALMAS_VSYS_MON_ENABLE                                  0x80
-#define PALMAS_VSYS_MON_ENABLE_SHIFT                            7
-#define PALMAS_VSYS_MON_THRESHOLD_MASK                          0x3f
-#define PALMAS_VSYS_MON_THRESHOLD_SHIFT                         0
+#define PALMAS_VSYS_MON_ENABLE_SHIFT                            0x07
+#define PALMAS_VSYS_MON_THRESHOLD_MASK                          0x3F
+#define PALMAS_VSYS_MON_THRESHOLD_SHIFT                         0x00
 
 /* Bit definitions for VBAT_MON */
 #define PALMAS_VBAT_MON_ENABLE                                  0x80
-#define PALMAS_VBAT_MON_ENABLE_SHIFT                            7
-#define PALMAS_VBAT_MON_THRESHOLD_MASK                          0x3f
-#define PALMAS_VBAT_MON_THRESHOLD_SHIFT                         0
+#define PALMAS_VBAT_MON_ENABLE_SHIFT                            0x07
+#define PALMAS_VBAT_MON_THRESHOLD_MASK                          0x3F
+#define PALMAS_VBAT_MON_THRESHOLD_SHIFT                         0x00
 
 /* Bit definitions for WATCHDOG */
 #define PALMAS_WATCHDOG_LOCK                                    0x20
-#define PALMAS_WATCHDOG_LOCK_SHIFT                              5
+#define PALMAS_WATCHDOG_LOCK_SHIFT                              0x05
 #define PALMAS_WATCHDOG_ENABLE                                  0x10
-#define PALMAS_WATCHDOG_ENABLE_SHIFT                            4
+#define PALMAS_WATCHDOG_ENABLE_SHIFT                            0x04
 #define PALMAS_WATCHDOG_MODE                                    0x08
-#define PALMAS_WATCHDOG_MODE_SHIFT                              3
+#define PALMAS_WATCHDOG_MODE_SHIFT                              0x03
 #define PALMAS_WATCHDOG_TIMER_MASK                              0x07
-#define PALMAS_WATCHDOG_TIMER_SHIFT                             0
+#define PALMAS_WATCHDOG_TIMER_SHIFT                             0x00
 
 /* Bit definitions for BOOT_STATUS */
 #define PALMAS_BOOT_STATUS_BOOT1                                0x02
-#define PALMAS_BOOT_STATUS_BOOT1_SHIFT                          1
+#define PALMAS_BOOT_STATUS_BOOT1_SHIFT                          0x01
 #define PALMAS_BOOT_STATUS_BOOT0                                0x01
-#define PALMAS_BOOT_STATUS_BOOT0_SHIFT                          0
+#define PALMAS_BOOT_STATUS_BOOT0_SHIFT                          0x00
 
 /* Bit definitions for BATTERY_BOUNCE */
-#define PALMAS_BATTERY_BOUNCE_BB_DELAY_MASK                     0x3f
-#define PALMAS_BATTERY_BOUNCE_BB_DELAY_SHIFT                    0
+#define PALMAS_BATTERY_BOUNCE_BB_DELAY_MASK                     0x3F
+#define PALMAS_BATTERY_BOUNCE_BB_DELAY_SHIFT                    0x00
 
 /* Bit definitions for BACKUP_BATTERY_CTRL */
 #define PALMAS_BACKUP_BATTERY_CTRL_VRTC_18_15                   0x80
-#define PALMAS_BACKUP_BATTERY_CTRL_VRTC_18_15_SHIFT             7
+#define PALMAS_BACKUP_BATTERY_CTRL_VRTC_18_15_SHIFT             0x07
 #define PALMAS_BACKUP_BATTERY_CTRL_VRTC_EN_SLP                  0x40
-#define PALMAS_BACKUP_BATTERY_CTRL_VRTC_EN_SLP_SHIFT            6
+#define PALMAS_BACKUP_BATTERY_CTRL_VRTC_EN_SLP_SHIFT            0x06
 #define PALMAS_BACKUP_BATTERY_CTRL_VRTC_EN_OFF                  0x20
-#define PALMAS_BACKUP_BATTERY_CTRL_VRTC_EN_OFF_SHIFT            5
+#define PALMAS_BACKUP_BATTERY_CTRL_VRTC_EN_OFF_SHIFT            0x05
 #define PALMAS_BACKUP_BATTERY_CTRL_VRTC_PWEN                    0x10
-#define PALMAS_BACKUP_BATTERY_CTRL_VRTC_PWEN_SHIFT              4
+#define PALMAS_BACKUP_BATTERY_CTRL_VRTC_PWEN_SHIFT              0x04
 #define PALMAS_BACKUP_BATTERY_CTRL_BBS_BBC_LOW_ICHRG            0x08
-#define PALMAS_BACKUP_BATTERY_CTRL_BBS_BBC_LOW_ICHRG_SHIFT      3
+#define PALMAS_BACKUP_BATTERY_CTRL_BBS_BBC_LOW_ICHRG_SHIFT      0x03
 #define PALMAS_BACKUP_BATTERY_CTRL_BB_SEL_MASK                  0x06
-#define PALMAS_BACKUP_BATTERY_CTRL_BB_SEL_SHIFT                 1
+#define PALMAS_BACKUP_BATTERY_CTRL_BB_SEL_SHIFT                 0x01
 #define PALMAS_BACKUP_BATTERY_CTRL_BB_CHG_EN                    0x01
-#define PALMAS_BACKUP_BATTERY_CTRL_BB_CHG_EN_SHIFT              0
+#define PALMAS_BACKUP_BATTERY_CTRL_BB_CHG_EN_SHIFT              0x00
 
 /* Bit definitions for LONG_PRESS_KEY */
 #define PALMAS_LONG_PRESS_KEY_LPK_LOCK                          0x80
-#define PALMAS_LONG_PRESS_KEY_LPK_LOCK_SHIFT                    7
+#define PALMAS_LONG_PRESS_KEY_LPK_LOCK_SHIFT                    0x07
 #define PALMAS_LONG_PRESS_KEY_LPK_INT_CLR                       0x10
-#define PALMAS_LONG_PRESS_KEY_LPK_INT_CLR_SHIFT                 4
+#define PALMAS_LONG_PRESS_KEY_LPK_INT_CLR_SHIFT                 0x04
 #define PALMAS_LONG_PRESS_KEY_LPK_TIME_MASK                     0x0c
-#define PALMAS_LONG_PRESS_KEY_LPK_TIME_SHIFT                    2
+#define PALMAS_LONG_PRESS_KEY_LPK_TIME_SHIFT                    0x02
 #define PALMAS_LONG_PRESS_KEY_PWRON_DEBOUNCE_MASK               0x03
-#define PALMAS_LONG_PRESS_KEY_PWRON_DEBOUNCE_SHIFT              0
+#define PALMAS_LONG_PRESS_KEY_PWRON_DEBOUNCE_SHIFT              0x00
 
 /* Bit definitions for OSC_THERM_CTRL */
 #define PALMAS_OSC_THERM_CTRL_VANA_ON_IN_SLEEP                  0x80
-#define PALMAS_OSC_THERM_CTRL_VANA_ON_IN_SLEEP_SHIFT            7
+#define PALMAS_OSC_THERM_CTRL_VANA_ON_IN_SLEEP_SHIFT            0x07
 #define PALMAS_OSC_THERM_CTRL_INT_MASK_IN_SLEEP                 0x40
-#define PALMAS_OSC_THERM_CTRL_INT_MASK_IN_SLEEP_SHIFT           6
+#define PALMAS_OSC_THERM_CTRL_INT_MASK_IN_SLEEP_SHIFT           0x06
 #define PALMAS_OSC_THERM_CTRL_RC15MHZ_ON_IN_SLEEP               0x20
-#define PALMAS_OSC_THERM_CTRL_RC15MHZ_ON_IN_SLEEP_SHIFT         5
+#define PALMAS_OSC_THERM_CTRL_RC15MHZ_ON_IN_SLEEP_SHIFT         0x05
 #define PALMAS_OSC_THERM_CTRL_THERM_OFF_IN_SLEEP                0x10
-#define PALMAS_OSC_THERM_CTRL_THERM_OFF_IN_SLEEP_SHIFT          4
+#define PALMAS_OSC_THERM_CTRL_THERM_OFF_IN_SLEEP_SHIFT          0x04
 #define PALMAS_OSC_THERM_CTRL_THERM_HD_SEL_MASK                 0x0c
-#define PALMAS_OSC_THERM_CTRL_THERM_HD_SEL_SHIFT                2
+#define PALMAS_OSC_THERM_CTRL_THERM_HD_SEL_SHIFT                0x02
 #define PALMAS_OSC_THERM_CTRL_OSC_BYPASS                        0x02
-#define PALMAS_OSC_THERM_CTRL_OSC_BYPASS_SHIFT                  1
+#define PALMAS_OSC_THERM_CTRL_OSC_BYPASS_SHIFT                  0x01
 #define PALMAS_OSC_THERM_CTRL_OSC_HPMODE                        0x01
-#define PALMAS_OSC_THERM_CTRL_OSC_HPMODE_SHIFT                  0
+#define PALMAS_OSC_THERM_CTRL_OSC_HPMODE_SHIFT                  0x00
 
 /* Bit definitions for BATDEBOUNCING */
 #define PALMAS_BATDEBOUNCING_BAT_DEB_BYPASS                     0x80
-#define PALMAS_BATDEBOUNCING_BAT_DEB_BYPASS_SHIFT               7
+#define PALMAS_BATDEBOUNCING_BAT_DEB_BYPASS_SHIFT               0x07
 #define PALMAS_BATDEBOUNCING_BINS_DEB_MASK                      0x78
-#define PALMAS_BATDEBOUNCING_BINS_DEB_SHIFT                     3
+#define PALMAS_BATDEBOUNCING_BINS_DEB_SHIFT                     0x03
 #define PALMAS_BATDEBOUNCING_BEXT_DEB_MASK                      0x07
-#define PALMAS_BATDEBOUNCING_BEXT_DEB_SHIFT                     0
+#define PALMAS_BATDEBOUNCING_BEXT_DEB_SHIFT                     0x00
 
 /* Bit definitions for SWOFF_HWRST */
 #define PALMAS_SWOFF_HWRST_PWRON_LPK                            0x80
-#define PALMAS_SWOFF_HWRST_PWRON_LPK_SHIFT                      7
+#define PALMAS_SWOFF_HWRST_PWRON_LPK_SHIFT                      0x07
 #define PALMAS_SWOFF_HWRST_PWRDOWN                              0x40
-#define PALMAS_SWOFF_HWRST_PWRDOWN_SHIFT                        6
+#define PALMAS_SWOFF_HWRST_PWRDOWN_SHIFT                        0x06
 #define PALMAS_SWOFF_HWRST_WTD                                  0x20
-#define PALMAS_SWOFF_HWRST_WTD_SHIFT                            5
+#define PALMAS_SWOFF_HWRST_WTD_SHIFT                            0x05
 #define PALMAS_SWOFF_HWRST_TSHUT                                0x10
-#define PALMAS_SWOFF_HWRST_TSHUT_SHIFT                          4
+#define PALMAS_SWOFF_HWRST_TSHUT_SHIFT                          0x04
 #define PALMAS_SWOFF_HWRST_RESET_IN                             0x08
-#define PALMAS_SWOFF_HWRST_RESET_IN_SHIFT                       3
+#define PALMAS_SWOFF_HWRST_RESET_IN_SHIFT                       0x03
 #define PALMAS_SWOFF_HWRST_SW_RST                               0x04
-#define PALMAS_SWOFF_HWRST_SW_RST_SHIFT                         2
+#define PALMAS_SWOFF_HWRST_SW_RST_SHIFT                         0x02
 #define PALMAS_SWOFF_HWRST_VSYS_LO                              0x02
-#define PALMAS_SWOFF_HWRST_VSYS_LO_SHIFT                        1
+#define PALMAS_SWOFF_HWRST_VSYS_LO_SHIFT                        0x01
 #define PALMAS_SWOFF_HWRST_GPADC_SHUTDOWN                       0x01
-#define PALMAS_SWOFF_HWRST_GPADC_SHUTDOWN_SHIFT                 0
+#define PALMAS_SWOFF_HWRST_GPADC_SHUTDOWN_SHIFT                 0x00
 
 /* Bit definitions for SWOFF_COLDRST */
 #define PALMAS_SWOFF_COLDRST_PWRON_LPK                          0x80
-#define PALMAS_SWOFF_COLDRST_PWRON_LPK_SHIFT                    7
+#define PALMAS_SWOFF_COLDRST_PWRON_LPK_SHIFT                    0x07
 #define PALMAS_SWOFF_COLDRST_PWRDOWN                            0x40
-#define PALMAS_SWOFF_COLDRST_PWRDOWN_SHIFT                      6
+#define PALMAS_SWOFF_COLDRST_PWRDOWN_SHIFT                      0x06
 #define PALMAS_SWOFF_COLDRST_WTD                                0x20
-#define PALMAS_SWOFF_COLDRST_WTD_SHIFT                          5
+#define PALMAS_SWOFF_COLDRST_WTD_SHIFT                          0x05
 #define PALMAS_SWOFF_COLDRST_TSHUT                              0x10
-#define PALMAS_SWOFF_COLDRST_TSHUT_SHIFT                        4
+#define PALMAS_SWOFF_COLDRST_TSHUT_SHIFT                        0x04
 #define PALMAS_SWOFF_COLDRST_RESET_IN                           0x08
-#define PALMAS_SWOFF_COLDRST_RESET_IN_SHIFT                     3
+#define PALMAS_SWOFF_COLDRST_RESET_IN_SHIFT                     0x03
 #define PALMAS_SWOFF_COLDRST_SW_RST                             0x04
-#define PALMAS_SWOFF_COLDRST_SW_RST_SHIFT                       2
+#define PALMAS_SWOFF_COLDRST_SW_RST_SHIFT                       0x02
 #define PALMAS_SWOFF_COLDRST_VSYS_LO                            0x02
-#define PALMAS_SWOFF_COLDRST_VSYS_LO_SHIFT                      1
+#define PALMAS_SWOFF_COLDRST_VSYS_LO_SHIFT                      0x01
 #define PALMAS_SWOFF_COLDRST_GPADC_SHUTDOWN                     0x01
-#define PALMAS_SWOFF_COLDRST_GPADC_SHUTDOWN_SHIFT               0
+#define PALMAS_SWOFF_COLDRST_GPADC_SHUTDOWN_SHIFT               0x00
 
 /* Bit definitions for SWOFF_STATUS */
 #define PALMAS_SWOFF_STATUS_PWRON_LPK                           0x80
-#define PALMAS_SWOFF_STATUS_PWRON_LPK_SHIFT                     7
+#define PALMAS_SWOFF_STATUS_PWRON_LPK_SHIFT                     0x07
 #define PALMAS_SWOFF_STATUS_PWRDOWN                             0x40
-#define PALMAS_SWOFF_STATUS_PWRDOWN_SHIFT                       6
+#define PALMAS_SWOFF_STATUS_PWRDOWN_SHIFT                       0x06
 #define PALMAS_SWOFF_STATUS_WTD                                 0x20
-#define PALMAS_SWOFF_STATUS_WTD_SHIFT                           5
+#define PALMAS_SWOFF_STATUS_WTD_SHIFT                           0x05
 #define PALMAS_SWOFF_STATUS_TSHUT                               0x10
-#define PALMAS_SWOFF_STATUS_TSHUT_SHIFT                         4
+#define PALMAS_SWOFF_STATUS_TSHUT_SHIFT                         0x04
 #define PALMAS_SWOFF_STATUS_RESET_IN                            0x08
-#define PALMAS_SWOFF_STATUS_RESET_IN_SHIFT                      3
+#define PALMAS_SWOFF_STATUS_RESET_IN_SHIFT                      0x03
 #define PALMAS_SWOFF_STATUS_SW_RST                              0x04
-#define PALMAS_SWOFF_STATUS_SW_RST_SHIFT                        2
+#define PALMAS_SWOFF_STATUS_SW_RST_SHIFT                        0x02
 #define PALMAS_SWOFF_STATUS_VSYS_LO                             0x02
-#define PALMAS_SWOFF_STATUS_VSYS_LO_SHIFT                       1
+#define PALMAS_SWOFF_STATUS_VSYS_LO_SHIFT                       0x01
 #define PALMAS_SWOFF_STATUS_GPADC_SHUTDOWN                      0x01
-#define PALMAS_SWOFF_STATUS_GPADC_SHUTDOWN_SHIFT                0
+#define PALMAS_SWOFF_STATUS_GPADC_SHUTDOWN_SHIFT                0x00
 
 /* Bit definitions for PMU_CONFIG */
 #define PALMAS_PMU_CONFIG_MULTI_CELL_EN                         0x40
-#define PALMAS_PMU_CONFIG_MULTI_CELL_EN_SHIFT                   6
+#define PALMAS_PMU_CONFIG_MULTI_CELL_EN_SHIFT                   0x06
 #define PALMAS_PMU_CONFIG_SPARE_MASK                            0x30
-#define PALMAS_PMU_CONFIG_SPARE_SHIFT                           4
+#define PALMAS_PMU_CONFIG_SPARE_SHIFT                           0x04
 #define PALMAS_PMU_CONFIG_SWOFF_DLY_MASK                        0x0c
-#define PALMAS_PMU_CONFIG_SWOFF_DLY_SHIFT                       2
+#define PALMAS_PMU_CONFIG_SWOFF_DLY_SHIFT                       0x02
 #define PALMAS_PMU_CONFIG_GATE_RESET_OUT                        0x02
-#define PALMAS_PMU_CONFIG_GATE_RESET_OUT_SHIFT                  1
+#define PALMAS_PMU_CONFIG_GATE_RESET_OUT_SHIFT                  0x01
 #define PALMAS_PMU_CONFIG_AUTODEVON                             0x01
-#define PALMAS_PMU_CONFIG_AUTODEVON_SHIFT                       0
+#define PALMAS_PMU_CONFIG_AUTODEVON_SHIFT                       0x00
 
 /* Bit definitions for SPARE */
 #define PALMAS_SPARE_SPARE_MASK                                 0xf8
-#define PALMAS_SPARE_SPARE_SHIFT                                3
+#define PALMAS_SPARE_SPARE_SHIFT                                0x03
 #define PALMAS_SPARE_REGEN3_OD                                  0x04
-#define PALMAS_SPARE_REGEN3_OD_SHIFT                            2
+#define PALMAS_SPARE_REGEN3_OD_SHIFT                            0x02
 #define PALMAS_SPARE_REGEN2_OD                                  0x02
-#define PALMAS_SPARE_REGEN2_OD_SHIFT                            1
+#define PALMAS_SPARE_REGEN2_OD_SHIFT                            0x01
 #define PALMAS_SPARE_REGEN1_OD                                  0x01
-#define PALMAS_SPARE_REGEN1_OD_SHIFT                            0
+#define PALMAS_SPARE_REGEN1_OD_SHIFT                            0x00
 
 /* Bit definitions for PMU_SECONDARY_INT */
 #define PALMAS_PMU_SECONDARY_INT_VBUS_OVV_INT_SRC               0x80
-#define PALMAS_PMU_SECONDARY_INT_VBUS_OVV_INT_SRC_SHIFT         7
+#define PALMAS_PMU_SECONDARY_INT_VBUS_OVV_INT_SRC_SHIFT         0x07
 #define PALMAS_PMU_SECONDARY_INT_CHARG_DET_N_INT_SRC            0x40
-#define PALMAS_PMU_SECONDARY_INT_CHARG_DET_N_INT_SRC_SHIFT      6
+#define PALMAS_PMU_SECONDARY_INT_CHARG_DET_N_INT_SRC_SHIFT      0x06
 #define PALMAS_PMU_SECONDARY_INT_BB_INT_SRC                     0x20
-#define PALMAS_PMU_SECONDARY_INT_BB_INT_SRC_SHIFT               5
+#define PALMAS_PMU_SECONDARY_INT_BB_INT_SRC_SHIFT               0x05
 #define PALMAS_PMU_SECONDARY_INT_FBI_INT_SRC                    0x10
-#define PALMAS_PMU_SECONDARY_INT_FBI_INT_SRC_SHIFT              4
+#define PALMAS_PMU_SECONDARY_INT_FBI_INT_SRC_SHIFT              0x04
 #define PALMAS_PMU_SECONDARY_INT_VBUS_OVV_MASK                  0x08
-#define PALMAS_PMU_SECONDARY_INT_VBUS_OVV_MASK_SHIFT            3
+#define PALMAS_PMU_SECONDARY_INT_VBUS_OVV_MASK_SHIFT            0x03
 #define PALMAS_PMU_SECONDARY_INT_CHARG_DET_N_MASK               0x04
-#define PALMAS_PMU_SECONDARY_INT_CHARG_DET_N_MASK_SHIFT         2
+#define PALMAS_PMU_SECONDARY_INT_CHARG_DET_N_MASK_SHIFT         0x02
 #define PALMAS_PMU_SECONDARY_INT_BB_MASK                        0x02
-#define PALMAS_PMU_SECONDARY_INT_BB_MASK_SHIFT                  1
+#define PALMAS_PMU_SECONDARY_INT_BB_MASK_SHIFT                  0x01
 #define PALMAS_PMU_SECONDARY_INT_FBI_MASK                       0x01
-#define PALMAS_PMU_SECONDARY_INT_FBI_MASK_SHIFT                 0
+#define PALMAS_PMU_SECONDARY_INT_FBI_MASK_SHIFT                 0x00
 
 /* Bit definitions for SW_REVISION */
-#define PALMAS_SW_REVISION_SW_REVISION_MASK                     0xff
-#define PALMAS_SW_REVISION_SW_REVISION_SHIFT                    0
+#define PALMAS_SW_REVISION_SW_REVISION_MASK                     0xFF
+#define PALMAS_SW_REVISION_SW_REVISION_SHIFT                    0x00
 
 /* Bit definitions for EXT_CHRG_CTRL */
 #define PALMAS_EXT_CHRG_CTRL_VBUS_OVV_STATUS                    0x80
-#define PALMAS_EXT_CHRG_CTRL_VBUS_OVV_STATUS_SHIFT              7
+#define PALMAS_EXT_CHRG_CTRL_VBUS_OVV_STATUS_SHIFT              0x07
 #define PALMAS_EXT_CHRG_CTRL_CHARG_DET_N_STATUS                 0x40
-#define PALMAS_EXT_CHRG_CTRL_CHARG_DET_N_STATUS_SHIFT           6
+#define PALMAS_EXT_CHRG_CTRL_CHARG_DET_N_STATUS_SHIFT           0x06
 #define PALMAS_EXT_CHRG_CTRL_VSYS_DEBOUNCE_DELAY                0x08
-#define PALMAS_EXT_CHRG_CTRL_VSYS_DEBOUNCE_DELAY_SHIFT          3
+#define PALMAS_EXT_CHRG_CTRL_VSYS_DEBOUNCE_DELAY_SHIFT          0x03
 #define PALMAS_EXT_CHRG_CTRL_CHRG_DET_N                         0x04
-#define PALMAS_EXT_CHRG_CTRL_CHRG_DET_N_SHIFT                   2
+#define PALMAS_EXT_CHRG_CTRL_CHRG_DET_N_SHIFT                   0x02
 #define PALMAS_EXT_CHRG_CTRL_AUTO_ACA_EN                        0x02
-#define PALMAS_EXT_CHRG_CTRL_AUTO_ACA_EN_SHIFT                  1
+#define PALMAS_EXT_CHRG_CTRL_AUTO_ACA_EN_SHIFT                  0x01
 #define PALMAS_EXT_CHRG_CTRL_AUTO_LDOUSB_EN                     0x01
-#define PALMAS_EXT_CHRG_CTRL_AUTO_LDOUSB_EN_SHIFT               0
+#define PALMAS_EXT_CHRG_CTRL_AUTO_LDOUSB_EN_SHIFT               0x00
 
 /* Bit definitions for PMU_SECONDARY_INT2 */
 #define PALMAS_PMU_SECONDARY_INT2_DVFS2_INT_SRC                 0x20
-#define PALMAS_PMU_SECONDARY_INT2_DVFS2_INT_SRC_SHIFT           5
+#define PALMAS_PMU_SECONDARY_INT2_DVFS2_INT_SRC_SHIFT           0x05
 #define PALMAS_PMU_SECONDARY_INT2_DVFS1_INT_SRC                 0x10
-#define PALMAS_PMU_SECONDARY_INT2_DVFS1_INT_SRC_SHIFT           4
+#define PALMAS_PMU_SECONDARY_INT2_DVFS1_INT_SRC_SHIFT           0x04
 #define PALMAS_PMU_SECONDARY_INT2_DVFS2_MASK                    0x02
-#define PALMAS_PMU_SECONDARY_INT2_DVFS2_MASK_SHIFT              1
+#define PALMAS_PMU_SECONDARY_INT2_DVFS2_MASK_SHIFT              0x01
 #define PALMAS_PMU_SECONDARY_INT2_DVFS1_MASK                    0x01
-#define PALMAS_PMU_SECONDARY_INT2_DVFS1_MASK_SHIFT              0
+#define PALMAS_PMU_SECONDARY_INT2_DVFS1_MASK_SHIFT              0x00
 
 /* Registers for function RESOURCE */
-#define PALMAS_CLK32KG_CTRL                                     0x0
-#define PALMAS_CLK32KGAUDIO_CTRL                                0x1
-#define PALMAS_REGEN1_CTRL                                      0x2
-#define PALMAS_REGEN2_CTRL                                      0x3
-#define PALMAS_SYSEN1_CTRL                                      0x4
-#define PALMAS_SYSEN2_CTRL                                      0x5
-#define PALMAS_NSLEEP_RES_ASSIGN                                0x6
-#define PALMAS_NSLEEP_SMPS_ASSIGN                               0x7
-#define PALMAS_NSLEEP_LDO_ASSIGN1                               0x8
-#define PALMAS_NSLEEP_LDO_ASSIGN2                               0x9
-#define PALMAS_ENABLE1_RES_ASSIGN                               0xA
-#define PALMAS_ENABLE1_SMPS_ASSIGN                              0xB
-#define PALMAS_ENABLE1_LDO_ASSIGN1                              0xC
-#define PALMAS_ENABLE1_LDO_ASSIGN2                              0xD
-#define PALMAS_ENABLE2_RES_ASSIGN                               0xE
-#define PALMAS_ENABLE2_SMPS_ASSIGN                              0xF
+#define PALMAS_CLK32KG_CTRL                                     0x00
+#define PALMAS_CLK32KGAUDIO_CTRL                                0x01
+#define PALMAS_REGEN1_CTRL                                      0x02
+#define PALMAS_REGEN2_CTRL                                      0x03
+#define PALMAS_SYSEN1_CTRL                                      0x04
+#define PALMAS_SYSEN2_CTRL                                      0x05
+#define PALMAS_NSLEEP_RES_ASSIGN                                0x06
+#define PALMAS_NSLEEP_SMPS_ASSIGN                               0x07
+#define PALMAS_NSLEEP_LDO_ASSIGN1                               0x08
+#define PALMAS_NSLEEP_LDO_ASSIGN2                               0x09
+#define PALMAS_ENABLE1_RES_ASSIGN                               0x0A
+#define PALMAS_ENABLE1_SMPS_ASSIGN                              0x0B
+#define PALMAS_ENABLE1_LDO_ASSIGN1                              0x0C
+#define PALMAS_ENABLE1_LDO_ASSIGN2                              0x0D
+#define PALMAS_ENABLE2_RES_ASSIGN                               0x0E
+#define PALMAS_ENABLE2_SMPS_ASSIGN                              0x0F
 #define PALMAS_ENABLE2_LDO_ASSIGN1                              0x10
 #define PALMAS_ENABLE2_LDO_ASSIGN2                              0x11
 #define PALMAS_REGEN3_CTRL                                      0x12
 
 /* Bit definitions for CLK32KG_CTRL */
 #define PALMAS_CLK32KG_CTRL_STATUS                              0x10
-#define PALMAS_CLK32KG_CTRL_STATUS_SHIFT                        4
+#define PALMAS_CLK32KG_CTRL_STATUS_SHIFT                        0x04
 #define PALMAS_CLK32KG_CTRL_MODE_SLEEP                          0x04
-#define PALMAS_CLK32KG_CTRL_MODE_SLEEP_SHIFT                    2
+#define PALMAS_CLK32KG_CTRL_MODE_SLEEP_SHIFT                    0x02
 #define PALMAS_CLK32KG_CTRL_MODE_ACTIVE                         0x01
-#define PALMAS_CLK32KG_CTRL_MODE_ACTIVE_SHIFT                   0
+#define PALMAS_CLK32KG_CTRL_MODE_ACTIVE_SHIFT                   0x00
 
 /* Bit definitions for CLK32KGAUDIO_CTRL */
 #define PALMAS_CLK32KGAUDIO_CTRL_STATUS                         0x10
-#define PALMAS_CLK32KGAUDIO_CTRL_STATUS_SHIFT                   4
+#define PALMAS_CLK32KGAUDIO_CTRL_STATUS_SHIFT                   0x04
 #define PALMAS_CLK32KGAUDIO_CTRL_RESERVED3                      0x08
-#define PALMAS_CLK32KGAUDIO_CTRL_RESERVED3_SHIFT                3
+#define PALMAS_CLK32KGAUDIO_CTRL_RESERVED3_SHIFT                0x03
 #define PALMAS_CLK32KGAUDIO_CTRL_MODE_SLEEP                     0x04
-#define PALMAS_CLK32KGAUDIO_CTRL_MODE_SLEEP_SHIFT               2
+#define PALMAS_CLK32KGAUDIO_CTRL_MODE_SLEEP_SHIFT               0x02
 #define PALMAS_CLK32KGAUDIO_CTRL_MODE_ACTIVE                    0x01
-#define PALMAS_CLK32KGAUDIO_CTRL_MODE_ACTIVE_SHIFT              0
+#define PALMAS_CLK32KGAUDIO_CTRL_MODE_ACTIVE_SHIFT              0x00
 
 /* Bit definitions for REGEN1_CTRL */
 #define PALMAS_REGEN1_CTRL_STATUS                               0x10
-#define PALMAS_REGEN1_CTRL_STATUS_SHIFT                         4
+#define PALMAS_REGEN1_CTRL_STATUS_SHIFT                         0x04
 #define PALMAS_REGEN1_CTRL_MODE_SLEEP                           0x04
-#define PALMAS_REGEN1_CTRL_MODE_SLEEP_SHIFT                     2
+#define PALMAS_REGEN1_CTRL_MODE_SLEEP_SHIFT                     0x02
 #define PALMAS_REGEN1_CTRL_MODE_ACTIVE                          0x01
-#define PALMAS_REGEN1_CTRL_MODE_ACTIVE_SHIFT                    0
+#define PALMAS_REGEN1_CTRL_MODE_ACTIVE_SHIFT                    0x00
 
 /* Bit definitions for REGEN2_CTRL */
 #define PALMAS_REGEN2_CTRL_STATUS                               0x10
-#define PALMAS_REGEN2_CTRL_STATUS_SHIFT                         4
+#define PALMAS_REGEN2_CTRL_STATUS_SHIFT                         0x04
 #define PALMAS_REGEN2_CTRL_MODE_SLEEP                           0x04
-#define PALMAS_REGEN2_CTRL_MODE_SLEEP_SHIFT                     2
+#define PALMAS_REGEN2_CTRL_MODE_SLEEP_SHIFT                     0x02
 #define PALMAS_REGEN2_CTRL_MODE_ACTIVE                          0x01
-#define PALMAS_REGEN2_CTRL_MODE_ACTIVE_SHIFT                    0
+#define PALMAS_REGEN2_CTRL_MODE_ACTIVE_SHIFT                    0x00
 
 /* Bit definitions for SYSEN1_CTRL */
 #define PALMAS_SYSEN1_CTRL_STATUS                               0x10
-#define PALMAS_SYSEN1_CTRL_STATUS_SHIFT                         4
+#define PALMAS_SYSEN1_CTRL_STATUS_SHIFT                         0x04
 #define PALMAS_SYSEN1_CTRL_MODE_SLEEP                           0x04
-#define PALMAS_SYSEN1_CTRL_MODE_SLEEP_SHIFT                     2
+#define PALMAS_SYSEN1_CTRL_MODE_SLEEP_SHIFT                     0x02
 #define PALMAS_SYSEN1_CTRL_MODE_ACTIVE                          0x01
-#define PALMAS_SYSEN1_CTRL_MODE_ACTIVE_SHIFT                    0
+#define PALMAS_SYSEN1_CTRL_MODE_ACTIVE_SHIFT                    0x00
 
 /* Bit definitions for SYSEN2_CTRL */
 #define PALMAS_SYSEN2_CTRL_STATUS                               0x10
-#define PALMAS_SYSEN2_CTRL_STATUS_SHIFT                         4
+#define PALMAS_SYSEN2_CTRL_STATUS_SHIFT                         0x04
 #define PALMAS_SYSEN2_CTRL_MODE_SLEEP                           0x04
-#define PALMAS_SYSEN2_CTRL_MODE_SLEEP_SHIFT                     2
+#define PALMAS_SYSEN2_CTRL_MODE_SLEEP_SHIFT                     0x02
 #define PALMAS_SYSEN2_CTRL_MODE_ACTIVE                          0x01
-#define PALMAS_SYSEN2_CTRL_MODE_ACTIVE_SHIFT                    0
+#define PALMAS_SYSEN2_CTRL_MODE_ACTIVE_SHIFT                    0x00
 
 /* Bit definitions for NSLEEP_RES_ASSIGN */
 #define PALMAS_NSLEEP_RES_ASSIGN_REGEN3                         0x40
-#define PALMAS_NSLEEP_RES_ASSIGN_REGEN3_SHIFT                   6
+#define PALMAS_NSLEEP_RES_ASSIGN_REGEN3_SHIFT                   0x06
 #define PALMAS_NSLEEP_RES_ASSIGN_CLK32KGAUDIO                   0x20
-#define PALMAS_NSLEEP_RES_ASSIGN_CLK32KGAUDIO_SHIFT             5
+#define PALMAS_NSLEEP_RES_ASSIGN_CLK32KGAUDIO_SHIFT             0x05
 #define PALMAS_NSLEEP_RES_ASSIGN_CLK32KG                        0x10
-#define PALMAS_NSLEEP_RES_ASSIGN_CLK32KG_SHIFT                  4
+#define PALMAS_NSLEEP_RES_ASSIGN_CLK32KG_SHIFT                  0x04
 #define PALMAS_NSLEEP_RES_ASSIGN_SYSEN2                         0x08
-#define PALMAS_NSLEEP_RES_ASSIGN_SYSEN2_SHIFT                   3
+#define PALMAS_NSLEEP_RES_ASSIGN_SYSEN2_SHIFT                   0x03
 #define PALMAS_NSLEEP_RES_ASSIGN_SYSEN1                         0x04
-#define PALMAS_NSLEEP_RES_ASSIGN_SYSEN1_SHIFT                   2
+#define PALMAS_NSLEEP_RES_ASSIGN_SYSEN1_SHIFT                   0x02
 #define PALMAS_NSLEEP_RES_ASSIGN_REGEN2                         0x02
-#define PALMAS_NSLEEP_RES_ASSIGN_REGEN2_SHIFT                   1
+#define PALMAS_NSLEEP_RES_ASSIGN_REGEN2_SHIFT                   0x01
 #define PALMAS_NSLEEP_RES_ASSIGN_REGEN1                         0x01
-#define PALMAS_NSLEEP_RES_ASSIGN_REGEN1_SHIFT                   0
+#define PALMAS_NSLEEP_RES_ASSIGN_REGEN1_SHIFT                   0x00
 
 /* Bit definitions for NSLEEP_SMPS_ASSIGN */
 #define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS10                        0x80
-#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS10_SHIFT                  7
+#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS10_SHIFT                  0x07
 #define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS9                         0x40
-#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS9_SHIFT                   6
+#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS9_SHIFT                   0x06
 #define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS8                         0x20
-#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS8_SHIFT                   5
+#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS8_SHIFT                   0x05
 #define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS7                         0x10
-#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS7_SHIFT                   4
+#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS7_SHIFT                   0x04
 #define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS6                         0x08
-#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS6_SHIFT                   3
+#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS6_SHIFT                   0x03
 #define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS45                        0x04
-#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS45_SHIFT                  2
+#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS45_SHIFT                  0x02
 #define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS3                         0x02
-#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS3_SHIFT                   1
+#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS3_SHIFT                   0x01
 #define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS12                        0x01
-#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS12_SHIFT                  0
+#define PALMAS_NSLEEP_SMPS_ASSIGN_SMPS12_SHIFT                  0x00
 
 /* Bit definitions for NSLEEP_LDO_ASSIGN1 */
 #define PALMAS_NSLEEP_LDO_ASSIGN1_LDO8                          0x80
-#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO8_SHIFT                    7
+#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO8_SHIFT                    0x07
 #define PALMAS_NSLEEP_LDO_ASSIGN1_LDO7                          0x40
-#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO7_SHIFT                    6
+#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO7_SHIFT                    0x06
 #define PALMAS_NSLEEP_LDO_ASSIGN1_LDO6                          0x20
-#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO6_SHIFT                    5
+#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO6_SHIFT                    0x05
 #define PALMAS_NSLEEP_LDO_ASSIGN1_LDO5                          0x10
-#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO5_SHIFT                    4
+#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO5_SHIFT                    0x04
 #define PALMAS_NSLEEP_LDO_ASSIGN1_LDO4                          0x08
-#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO4_SHIFT                    3
+#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO4_SHIFT                    0x03
 #define PALMAS_NSLEEP_LDO_ASSIGN1_LDO3                          0x04
-#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO3_SHIFT                    2
+#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO3_SHIFT                    0x02
 #define PALMAS_NSLEEP_LDO_ASSIGN1_LDO2                          0x02
-#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO2_SHIFT                    1
+#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO2_SHIFT                    0x01
 #define PALMAS_NSLEEP_LDO_ASSIGN1_LDO1                          0x01
-#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO1_SHIFT                    0
+#define PALMAS_NSLEEP_LDO_ASSIGN1_LDO1_SHIFT                    0x00
 
 /* Bit definitions for NSLEEP_LDO_ASSIGN2 */
 #define PALMAS_NSLEEP_LDO_ASSIGN2_LDOUSB                        0x04
-#define PALMAS_NSLEEP_LDO_ASSIGN2_LDOUSB_SHIFT                  2
+#define PALMAS_NSLEEP_LDO_ASSIGN2_LDOUSB_SHIFT                  0x02
 #define PALMAS_NSLEEP_LDO_ASSIGN2_LDOLN                         0x02
-#define PALMAS_NSLEEP_LDO_ASSIGN2_LDOLN_SHIFT                   1
+#define PALMAS_NSLEEP_LDO_ASSIGN2_LDOLN_SHIFT                   0x01
 #define PALMAS_NSLEEP_LDO_ASSIGN2_LDO9                          0x01
-#define PALMAS_NSLEEP_LDO_ASSIGN2_LDO9_SHIFT                    0
+#define PALMAS_NSLEEP_LDO_ASSIGN2_LDO9_SHIFT                    0x00
 
 /* Bit definitions for ENABLE1_RES_ASSIGN */
 #define PALMAS_ENABLE1_RES_ASSIGN_REGEN3                        0x40
-#define PALMAS_ENABLE1_RES_ASSIGN_REGEN3_SHIFT                  6
+#define PALMAS_ENABLE1_RES_ASSIGN_REGEN3_SHIFT                  0x06
 #define PALMAS_ENABLE1_RES_ASSIGN_CLK32KGAUDIO                  0x20
-#define PALMAS_ENABLE1_RES_ASSIGN_CLK32KGAUDIO_SHIFT            5
+#define PALMAS_ENABLE1_RES_ASSIGN_CLK32KGAUDIO_SHIFT            0x05
 #define PALMAS_ENABLE1_RES_ASSIGN_CLK32KG                       0x10
-#define PALMAS_ENABLE1_RES_ASSIGN_CLK32KG_SHIFT                 4
+#define PALMAS_ENABLE1_RES_ASSIGN_CLK32KG_SHIFT                 0x04
 #define PALMAS_ENABLE1_RES_ASSIGN_SYSEN2                        0x08
-#define PALMAS_ENABLE1_RES_ASSIGN_SYSEN2_SHIFT                  3
+#define PALMAS_ENABLE1_RES_ASSIGN_SYSEN2_SHIFT                  0x03
 #define PALMAS_ENABLE1_RES_ASSIGN_SYSEN1                        0x04
-#define PALMAS_ENABLE1_RES_ASSIGN_SYSEN1_SHIFT                  2
+#define PALMAS_ENABLE1_RES_ASSIGN_SYSEN1_SHIFT                  0x02
 #define PALMAS_ENABLE1_RES_ASSIGN_REGEN2                        0x02
-#define PALMAS_ENABLE1_RES_ASSIGN_REGEN2_SHIFT                  1
+#define PALMAS_ENABLE1_RES_ASSIGN_REGEN2_SHIFT                  0x01
 #define PALMAS_ENABLE1_RES_ASSIGN_REGEN1                        0x01
-#define PALMAS_ENABLE1_RES_ASSIGN_REGEN1_SHIFT                  0
+#define PALMAS_ENABLE1_RES_ASSIGN_REGEN1_SHIFT                  0x00
 
 /* Bit definitions for ENABLE1_SMPS_ASSIGN */
 #define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS10                       0x80
-#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS10_SHIFT                 7
+#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS10_SHIFT                 0x07
 #define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS9                        0x40
-#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS9_SHIFT                  6
+#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS9_SHIFT                  0x06
 #define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS8                        0x20
-#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS8_SHIFT                  5
+#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS8_SHIFT                  0x05
 #define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS7                        0x10
-#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS7_SHIFT                  4
+#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS7_SHIFT                  0x04
 #define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS6                        0x08
-#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS6_SHIFT                  3
+#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS6_SHIFT                  0x03
 #define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS45                       0x04
-#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS45_SHIFT                 2
+#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS45_SHIFT                 0x02
 #define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS3                        0x02
-#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS3_SHIFT                  1
+#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS3_SHIFT                  0x01
 #define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS12                       0x01
-#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS12_SHIFT                 0
+#define PALMAS_ENABLE1_SMPS_ASSIGN_SMPS12_SHIFT                 0x00
 
 /* Bit definitions for ENABLE1_LDO_ASSIGN1 */
 #define PALMAS_ENABLE1_LDO_ASSIGN1_LDO8                         0x80
-#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO8_SHIFT                   7
+#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO8_SHIFT                   0x07
 #define PALMAS_ENABLE1_LDO_ASSIGN1_LDO7                         0x40
-#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO7_SHIFT                   6
+#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO7_SHIFT                   0x06
 #define PALMAS_ENABLE1_LDO_ASSIGN1_LDO6                         0x20
-#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO6_SHIFT                   5
+#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO6_SHIFT                   0x05
 #define PALMAS_ENABLE1_LDO_ASSIGN1_LDO5                         0x10
-#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO5_SHIFT                   4
+#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO5_SHIFT                   0x04
 #define PALMAS_ENABLE1_LDO_ASSIGN1_LDO4                         0x08
-#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO4_SHIFT                   3
+#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO4_SHIFT                   0x03
 #define PALMAS_ENABLE1_LDO_ASSIGN1_LDO3                         0x04
-#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO3_SHIFT                   2
+#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO3_SHIFT                   0x02
 #define PALMAS_ENABLE1_LDO_ASSIGN1_LDO2                         0x02
-#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO2_SHIFT                   1
+#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO2_SHIFT                   0x01
 #define PALMAS_ENABLE1_LDO_ASSIGN1_LDO1                         0x01
-#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO1_SHIFT                   0
+#define PALMAS_ENABLE1_LDO_ASSIGN1_LDO1_SHIFT                   0x00
 
 /* Bit definitions for ENABLE1_LDO_ASSIGN2 */
 #define PALMAS_ENABLE1_LDO_ASSIGN2_LDOUSB                       0x04
-#define PALMAS_ENABLE1_LDO_ASSIGN2_LDOUSB_SHIFT                 2
+#define PALMAS_ENABLE1_LDO_ASSIGN2_LDOUSB_SHIFT                 0x02
 #define PALMAS_ENABLE1_LDO_ASSIGN2_LDOLN                        0x02
-#define PALMAS_ENABLE1_LDO_ASSIGN2_LDOLN_SHIFT                  1
+#define PALMAS_ENABLE1_LDO_ASSIGN2_LDOLN_SHIFT                  0x01
 #define PALMAS_ENABLE1_LDO_ASSIGN2_LDO9                         0x01
-#define PALMAS_ENABLE1_LDO_ASSIGN2_LDO9_SHIFT                   0
+#define PALMAS_ENABLE1_LDO_ASSIGN2_LDO9_SHIFT                   0x00
 
 /* Bit definitions for ENABLE2_RES_ASSIGN */
 #define PALMAS_ENABLE2_RES_ASSIGN_REGEN3                        0x40
-#define PALMAS_ENABLE2_RES_ASSIGN_REGEN3_SHIFT                  6
+#define PALMAS_ENABLE2_RES_ASSIGN_REGEN3_SHIFT                  0x06
 #define PALMAS_ENABLE2_RES_ASSIGN_CLK32KGAUDIO                  0x20
-#define PALMAS_ENABLE2_RES_ASSIGN_CLK32KGAUDIO_SHIFT            5
+#define PALMAS_ENABLE2_RES_ASSIGN_CLK32KGAUDIO_SHIFT            0x05
 #define PALMAS_ENABLE2_RES_ASSIGN_CLK32KG                       0x10
-#define PALMAS_ENABLE2_RES_ASSIGN_CLK32KG_SHIFT                 4
+#define PALMAS_ENABLE2_RES_ASSIGN_CLK32KG_SHIFT                 0x04
 #define PALMAS_ENABLE2_RES_ASSIGN_SYSEN2                        0x08
-#define PALMAS_ENABLE2_RES_ASSIGN_SYSEN2_SHIFT                  3
+#define PALMAS_ENABLE2_RES_ASSIGN_SYSEN2_SHIFT                  0x03
 #define PALMAS_ENABLE2_RES_ASSIGN_SYSEN1                        0x04
-#define PALMAS_ENABLE2_RES_ASSIGN_SYSEN1_SHIFT                  2
+#define PALMAS_ENABLE2_RES_ASSIGN_SYSEN1_SHIFT                  0x02
 #define PALMAS_ENABLE2_RES_ASSIGN_REGEN2                        0x02
-#define PALMAS_ENABLE2_RES_ASSIGN_REGEN2_SHIFT                  1
+#define PALMAS_ENABLE2_RES_ASSIGN_REGEN2_SHIFT                  0x01
 #define PALMAS_ENABLE2_RES_ASSIGN_REGEN1                        0x01
-#define PALMAS_ENABLE2_RES_ASSIGN_REGEN1_SHIFT                  0
+#define PALMAS_ENABLE2_RES_ASSIGN_REGEN1_SHIFT                  0x00
 
 /* Bit definitions for ENABLE2_SMPS_ASSIGN */
 #define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS10                       0x80
-#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS10_SHIFT                 7
+#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS10_SHIFT                 0x07
 #define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS9                        0x40
-#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS9_SHIFT                  6
+#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS9_SHIFT                  0x06
 #define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS8                        0x20
-#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS8_SHIFT                  5
+#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS8_SHIFT                  0x05
 #define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS7                        0x10
-#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS7_SHIFT                  4
+#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS7_SHIFT                  0x04
 #define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS6                        0x08
-#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS6_SHIFT                  3
+#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS6_SHIFT                  0x03
 #define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS45                       0x04
-#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS45_SHIFT                 2
+#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS45_SHIFT                 0x02
 #define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS3                        0x02
-#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS3_SHIFT                  1
+#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS3_SHIFT                  0x01
 #define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS12                       0x01
-#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS12_SHIFT                 0
+#define PALMAS_ENABLE2_SMPS_ASSIGN_SMPS12_SHIFT                 0x00
 
 /* Bit definitions for ENABLE2_LDO_ASSIGN1 */
 #define PALMAS_ENABLE2_LDO_ASSIGN1_LDO8                         0x80
-#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO8_SHIFT                   7
+#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO8_SHIFT                   0x07
 #define PALMAS_ENABLE2_LDO_ASSIGN1_LDO7                         0x40
-#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO7_SHIFT                   6
+#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO7_SHIFT                   0x06
 #define PALMAS_ENABLE2_LDO_ASSIGN1_LDO6                         0x20
-#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO6_SHIFT                   5
+#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO6_SHIFT                   0x05
 #define PALMAS_ENABLE2_LDO_ASSIGN1_LDO5                         0x10
-#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO5_SHIFT                   4
+#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO5_SHIFT                   0x04
 #define PALMAS_ENABLE2_LDO_ASSIGN1_LDO4                         0x08
-#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO4_SHIFT                   3
+#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO4_SHIFT                   0x03
 #define PALMAS_ENABLE2_LDO_ASSIGN1_LDO3                         0x04
-#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO3_SHIFT                   2
+#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO3_SHIFT                   0x02
 #define PALMAS_ENABLE2_LDO_ASSIGN1_LDO2                         0x02
-#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO2_SHIFT                   1
+#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO2_SHIFT                   0x01
 #define PALMAS_ENABLE2_LDO_ASSIGN1_LDO1                         0x01
-#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO1_SHIFT                   0
+#define PALMAS_ENABLE2_LDO_ASSIGN1_LDO1_SHIFT                   0x00
 
 /* Bit definitions for ENABLE2_LDO_ASSIGN2 */
 #define PALMAS_ENABLE2_LDO_ASSIGN2_LDOUSB                       0x04
-#define PALMAS_ENABLE2_LDO_ASSIGN2_LDOUSB_SHIFT                 2
+#define PALMAS_ENABLE2_LDO_ASSIGN2_LDOUSB_SHIFT                 0x02
 #define PALMAS_ENABLE2_LDO_ASSIGN2_LDOLN                        0x02
-#define PALMAS_ENABLE2_LDO_ASSIGN2_LDOLN_SHIFT                  1
+#define PALMAS_ENABLE2_LDO_ASSIGN2_LDOLN_SHIFT                  0x01
 #define PALMAS_ENABLE2_LDO_ASSIGN2_LDO9                         0x01
-#define PALMAS_ENABLE2_LDO_ASSIGN2_LDO9_SHIFT                   0
+#define PALMAS_ENABLE2_LDO_ASSIGN2_LDO9_SHIFT                   0x00
 
 /* Bit definitions for REGEN3_CTRL */
 #define PALMAS_REGEN3_CTRL_STATUS                               0x10
-#define PALMAS_REGEN3_CTRL_STATUS_SHIFT                         4
+#define PALMAS_REGEN3_CTRL_STATUS_SHIFT                         0x04
 #define PALMAS_REGEN3_CTRL_MODE_SLEEP                           0x04
-#define PALMAS_REGEN3_CTRL_MODE_SLEEP_SHIFT                     2
+#define PALMAS_REGEN3_CTRL_MODE_SLEEP_SHIFT                     0x02
 #define PALMAS_REGEN3_CTRL_MODE_ACTIVE                          0x01
-#define PALMAS_REGEN3_CTRL_MODE_ACTIVE_SHIFT                    0
+#define PALMAS_REGEN3_CTRL_MODE_ACTIVE_SHIFT                    0x00
 
 /* Registers for function PAD_CONTROL */
-#define PALMAS_OD_OUTPUT_CTRL2                                  0x2
-#define PALMAS_POLARITY_CTRL2                                   0x3
-#define PALMAS_PU_PD_INPUT_CTRL1                                0x4
-#define PALMAS_PU_PD_INPUT_CTRL2                                0x5
-#define PALMAS_PU_PD_INPUT_CTRL3                                0x6
-#define PALMAS_PU_PD_INPUT_CTRL5                                0x7
-#define PALMAS_OD_OUTPUT_CTRL                                   0x8
-#define PALMAS_POLARITY_CTRL                                    0x9
-#define PALMAS_PRIMARY_SECONDARY_PAD1                           0xA
-#define PALMAS_PRIMARY_SECONDARY_PAD2                           0xB
-#define PALMAS_I2C_SPI                                          0xC
-#define PALMAS_PU_PD_INPUT_CTRL4                                0xD
-#define PALMAS_PRIMARY_SECONDARY_PAD3                           0xE
-#define PALMAS_PRIMARY_SECONDARY_PAD4                           0xF
+#define PALMAS_OD_OUTPUT_CTRL2                                  0x02
+#define PALMAS_POLARITY_CTRL2                                   0x03
+#define PALMAS_PU_PD_INPUT_CTRL1                                0x04
+#define PALMAS_PU_PD_INPUT_CTRL2                                0x05
+#define PALMAS_PU_PD_INPUT_CTRL3                                0x06
+#define PALMAS_PU_PD_INPUT_CTRL5                                0x07
+#define PALMAS_OD_OUTPUT_CTRL                                   0x08
+#define PALMAS_POLARITY_CTRL                                    0x09
+#define PALMAS_PRIMARY_SECONDARY_PAD1                           0x0A
+#define PALMAS_PRIMARY_SECONDARY_PAD2                           0x0B
+#define PALMAS_I2C_SPI                                          0x0C
+#define PALMAS_PU_PD_INPUT_CTRL4                                0x0D
+#define PALMAS_PRIMARY_SECONDARY_PAD3                           0x0E
+#define PALMAS_PRIMARY_SECONDARY_PAD4                           0x0F
 
 /* Bit definitions for PU_PD_INPUT_CTRL1 */
 #define PALMAS_PU_PD_INPUT_CTRL1_RESET_IN_PD                    0x40
-#define PALMAS_PU_PD_INPUT_CTRL1_RESET_IN_PD_SHIFT              6
+#define PALMAS_PU_PD_INPUT_CTRL1_RESET_IN_PD_SHIFT              0x06
 #define PALMAS_PU_PD_INPUT_CTRL1_GPADC_START_PU                 0x20
-#define PALMAS_PU_PD_INPUT_CTRL1_GPADC_START_PU_SHIFT           5
+#define PALMAS_PU_PD_INPUT_CTRL1_GPADC_START_PU_SHIFT           0x05
 #define PALMAS_PU_PD_INPUT_CTRL1_GPADC_START_PD                 0x10
-#define PALMAS_PU_PD_INPUT_CTRL1_GPADC_START_PD_SHIFT           4
+#define PALMAS_PU_PD_INPUT_CTRL1_GPADC_START_PD_SHIFT           0x04
 #define PALMAS_PU_PD_INPUT_CTRL1_PWRDOWN_PD                     0x04
-#define PALMAS_PU_PD_INPUT_CTRL1_PWRDOWN_PD_SHIFT               2
+#define PALMAS_PU_PD_INPUT_CTRL1_PWRDOWN_PD_SHIFT               0x02
 #define PALMAS_PU_PD_INPUT_CTRL1_NRESWARM_PU                    0x02
-#define PALMAS_PU_PD_INPUT_CTRL1_NRESWARM_PU_SHIFT              1
+#define PALMAS_PU_PD_INPUT_CTRL1_NRESWARM_PU_SHIFT              0x01
 
 /* Bit definitions for PU_PD_INPUT_CTRL2 */
 #define PALMAS_PU_PD_INPUT_CTRL2_ENABLE2_PU                     0x20
-#define PALMAS_PU_PD_INPUT_CTRL2_ENABLE2_PU_SHIFT               5
+#define PALMAS_PU_PD_INPUT_CTRL2_ENABLE2_PU_SHIFT               0x05
 #define PALMAS_PU_PD_INPUT_CTRL2_ENABLE2_PD                     0x10
-#define PALMAS_PU_PD_INPUT_CTRL2_ENABLE2_PD_SHIFT               4
+#define PALMAS_PU_PD_INPUT_CTRL2_ENABLE2_PD_SHIFT               0x04
 #define PALMAS_PU_PD_INPUT_CTRL2_ENABLE1_PU                     0x08
-#define PALMAS_PU_PD_INPUT_CTRL2_ENABLE1_PU_SHIFT               3
+#define PALMAS_PU_PD_INPUT_CTRL2_ENABLE1_PU_SHIFT               0x03
 #define PALMAS_PU_PD_INPUT_CTRL2_ENABLE1_PD                     0x04
-#define PALMAS_PU_PD_INPUT_CTRL2_ENABLE1_PD_SHIFT               2
+#define PALMAS_PU_PD_INPUT_CTRL2_ENABLE1_PD_SHIFT               0x02
 #define PALMAS_PU_PD_INPUT_CTRL2_NSLEEP_PU                      0x02
-#define PALMAS_PU_PD_INPUT_CTRL2_NSLEEP_PU_SHIFT                1
+#define PALMAS_PU_PD_INPUT_CTRL2_NSLEEP_PU_SHIFT                0x01
 #define PALMAS_PU_PD_INPUT_CTRL2_NSLEEP_PD                      0x01
-#define PALMAS_PU_PD_INPUT_CTRL2_NSLEEP_PD_SHIFT                0
+#define PALMAS_PU_PD_INPUT_CTRL2_NSLEEP_PD_SHIFT                0x00
 
 /* Bit definitions for PU_PD_INPUT_CTRL3 */
 #define PALMAS_PU_PD_INPUT_CTRL3_ACOK_PD                        0x40
-#define PALMAS_PU_PD_INPUT_CTRL3_ACOK_PD_SHIFT                  6
+#define PALMAS_PU_PD_INPUT_CTRL3_ACOK_PD_SHIFT                  0x06
 #define PALMAS_PU_PD_INPUT_CTRL3_CHRG_DET_N_PD                  0x10
-#define PALMAS_PU_PD_INPUT_CTRL3_CHRG_DET_N_PD_SHIFT            4
+#define PALMAS_PU_PD_INPUT_CTRL3_CHRG_DET_N_PD_SHIFT            0x04
 #define PALMAS_PU_PD_INPUT_CTRL3_POWERHOLD_PD                   0x04
-#define PALMAS_PU_PD_INPUT_CTRL3_POWERHOLD_PD_SHIFT             2
+#define PALMAS_PU_PD_INPUT_CTRL3_POWERHOLD_PD_SHIFT             0x02
 #define PALMAS_PU_PD_INPUT_CTRL3_MSECURE_PD                     0x01
-#define PALMAS_PU_PD_INPUT_CTRL3_MSECURE_PD_SHIFT               0
+#define PALMAS_PU_PD_INPUT_CTRL3_MSECURE_PD_SHIFT               0x00
 
 /* Bit definitions for OD_OUTPUT_CTRL */
 #define PALMAS_OD_OUTPUT_CTRL_PWM_2_OD                          0x80
-#define PALMAS_OD_OUTPUT_CTRL_PWM_2_OD_SHIFT                    7
+#define PALMAS_OD_OUTPUT_CTRL_PWM_2_OD_SHIFT                    0x07
 #define PALMAS_OD_OUTPUT_CTRL_VBUSDET_OD                        0x40
-#define PALMAS_OD_OUTPUT_CTRL_VBUSDET_OD_SHIFT                  6
+#define PALMAS_OD_OUTPUT_CTRL_VBUSDET_OD_SHIFT                  0x06
 #define PALMAS_OD_OUTPUT_CTRL_PWM_1_OD                          0x20
-#define PALMAS_OD_OUTPUT_CTRL_PWM_1_OD_SHIFT                    5
+#define PALMAS_OD_OUTPUT_CTRL_PWM_1_OD_SHIFT                    0x05
 #define PALMAS_OD_OUTPUT_CTRL_INT_OD                            0x08
-#define PALMAS_OD_OUTPUT_CTRL_INT_OD_SHIFT                      3
+#define PALMAS_OD_OUTPUT_CTRL_INT_OD_SHIFT                      0x03
 
 /* Bit definitions for POLARITY_CTRL */
 #define PALMAS_POLARITY_CTRL_INT_POLARITY                       0x80
-#define PALMAS_POLARITY_CTRL_INT_POLARITY_SHIFT                 7
+#define PALMAS_POLARITY_CTRL_INT_POLARITY_SHIFT                 0x07
 #define PALMAS_POLARITY_CTRL_ENABLE2_POLARITY                   0x40
-#define PALMAS_POLARITY_CTRL_ENABLE2_POLARITY_SHIFT             6
+#define PALMAS_POLARITY_CTRL_ENABLE2_POLARITY_SHIFT             0x06
 #define PALMAS_POLARITY_CTRL_ENABLE1_POLARITY                   0x20
-#define PALMAS_POLARITY_CTRL_ENABLE1_POLARITY_SHIFT             5
+#define PALMAS_POLARITY_CTRL_ENABLE1_POLARITY_SHIFT             0x05
 #define PALMAS_POLARITY_CTRL_NSLEEP_POLARITY                    0x10
-#define PALMAS_POLARITY_CTRL_NSLEEP_POLARITY_SHIFT              4
+#define PALMAS_POLARITY_CTRL_NSLEEP_POLARITY_SHIFT              0x04
 #define PALMAS_POLARITY_CTRL_RESET_IN_POLARITY                  0x08
-#define PALMAS_POLARITY_CTRL_RESET_IN_POLARITY_SHIFT            3
+#define PALMAS_POLARITY_CTRL_RESET_IN_POLARITY_SHIFT            0x03
 #define PALMAS_POLARITY_CTRL_GPIO_3_CHRG_DET_N_POLARITY         0x04
-#define PALMAS_POLARITY_CTRL_GPIO_3_CHRG_DET_N_POLARITY_SHIFT   2
+#define PALMAS_POLARITY_CTRL_GPIO_3_CHRG_DET_N_POLARITY_SHIFT   0x02
 #define PALMAS_POLARITY_CTRL_POWERGOOD_USB_PSEL_POLARITY        0x02
-#define PALMAS_POLARITY_CTRL_POWERGOOD_USB_PSEL_POLARITY_SHIFT  1
+#define PALMAS_POLARITY_CTRL_POWERGOOD_USB_PSEL_POLARITY_SHIFT  0x01
 #define PALMAS_POLARITY_CTRL_PWRDOWN_POLARITY                   0x01
-#define PALMAS_POLARITY_CTRL_PWRDOWN_POLARITY_SHIFT             0
+#define PALMAS_POLARITY_CTRL_PWRDOWN_POLARITY_SHIFT             0x00
 
 /* Bit definitions for PRIMARY_SECONDARY_PAD1 */
 #define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_3                    0x80
-#define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_3_SHIFT              7
+#define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_3_SHIFT              0x07
 #define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_MASK               0x60
-#define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_SHIFT              5
+#define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_SHIFT              0x05
 #define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_MASK               0x18
-#define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_SHIFT              3
+#define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_SHIFT              0x03
 #define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_0                    0x04
-#define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_0_SHIFT              2
+#define PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_0_SHIFT              0x02
 #define PALMAS_PRIMARY_SECONDARY_PAD1_VAC                       0x02
-#define PALMAS_PRIMARY_SECONDARY_PAD1_VAC_SHIFT                 1
+#define PALMAS_PRIMARY_SECONDARY_PAD1_VAC_SHIFT                 0x01
 #define PALMAS_PRIMARY_SECONDARY_PAD1_POWERGOOD                 0x01
-#define PALMAS_PRIMARY_SECONDARY_PAD1_POWERGOOD_SHIFT           0
+#define PALMAS_PRIMARY_SECONDARY_PAD1_POWERGOOD_SHIFT           0x00
 
 /* Bit definitions for PRIMARY_SECONDARY_PAD2 */
 #define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_7_MASK               0x30
-#define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_7_SHIFT              4
+#define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_7_SHIFT              0x04
 #define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_6                    0x08
-#define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_6_SHIFT              3
+#define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_6_SHIFT              0x03
 #define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_5_MASK               0x06
-#define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_5_SHIFT              1
+#define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_5_SHIFT              0x01
 #define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_4                    0x01
-#define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_4_SHIFT              0
+#define PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_4_SHIFT              0x00
 
 /* Bit definitions for I2C_SPI */
 #define PALMAS_I2C_SPI_I2C2OTP_EN                               0x80
-#define PALMAS_I2C_SPI_I2C2OTP_EN_SHIFT                         7
+#define PALMAS_I2C_SPI_I2C2OTP_EN_SHIFT                         0x07
 #define PALMAS_I2C_SPI_I2C2OTP_PAGESEL                          0x40
-#define PALMAS_I2C_SPI_I2C2OTP_PAGESEL_SHIFT                    6
+#define PALMAS_I2C_SPI_I2C2OTP_PAGESEL_SHIFT                    0x06
 #define PALMAS_I2C_SPI_ID_I2C2                                  0x20
-#define PALMAS_I2C_SPI_ID_I2C2_SHIFT                            5
+#define PALMAS_I2C_SPI_ID_I2C2_SHIFT                            0x05
 #define PALMAS_I2C_SPI_I2C_SPI                                  0x10
-#define PALMAS_I2C_SPI_I2C_SPI_SHIFT                            4
-#define PALMAS_I2C_SPI_ID_I2C1_MASK                             0x0f
-#define PALMAS_I2C_SPI_ID_I2C1_SHIFT                            0
+#define PALMAS_I2C_SPI_I2C_SPI_SHIFT                            0x04
+#define PALMAS_I2C_SPI_ID_I2C1_MASK                             0x0F
+#define PALMAS_I2C_SPI_ID_I2C1_SHIFT                            0x00
 
 /* Bit definitions for PU_PD_INPUT_CTRL4 */
 #define PALMAS_PU_PD_INPUT_CTRL4_DVFS2_DAT_PD                   0x40
-#define PALMAS_PU_PD_INPUT_CTRL4_DVFS2_DAT_PD_SHIFT             6
+#define PALMAS_PU_PD_INPUT_CTRL4_DVFS2_DAT_PD_SHIFT             0x06
 #define PALMAS_PU_PD_INPUT_CTRL4_DVFS2_CLK_PD                   0x10
-#define PALMAS_PU_PD_INPUT_CTRL4_DVFS2_CLK_PD_SHIFT             4
+#define PALMAS_PU_PD_INPUT_CTRL4_DVFS2_CLK_PD_SHIFT             0x04
 #define PALMAS_PU_PD_INPUT_CTRL4_DVFS1_DAT_PD                   0x04
-#define PALMAS_PU_PD_INPUT_CTRL4_DVFS1_DAT_PD_SHIFT             2
+#define PALMAS_PU_PD_INPUT_CTRL4_DVFS1_DAT_PD_SHIFT             0x02
 #define PALMAS_PU_PD_INPUT_CTRL4_DVFS1_CLK_PD                   0x01
-#define PALMAS_PU_PD_INPUT_CTRL4_DVFS1_CLK_PD_SHIFT             0
+#define PALMAS_PU_PD_INPUT_CTRL4_DVFS1_CLK_PD_SHIFT             0x00
 
 /* Bit definitions for PRIMARY_SECONDARY_PAD3 */
 #define PALMAS_PRIMARY_SECONDARY_PAD3_DVFS2                     0x02
-#define PALMAS_PRIMARY_SECONDARY_PAD3_DVFS2_SHIFT               1
+#define PALMAS_PRIMARY_SECONDARY_PAD3_DVFS2_SHIFT               0x01
 #define PALMAS_PRIMARY_SECONDARY_PAD3_DVFS1                     0x01
-#define PALMAS_PRIMARY_SECONDARY_PAD3_DVFS1_SHIFT               0
+#define PALMAS_PRIMARY_SECONDARY_PAD3_DVFS1_SHIFT               0x00
 
 /* Registers for function LED_PWM */
-#define PALMAS_LED_PERIOD_CTRL                                  0x0
-#define PALMAS_LED_CTRL                                         0x1
-#define PALMAS_PWM_CTRL1                                        0x2
-#define PALMAS_PWM_CTRL2                                        0x3
+#define PALMAS_LED_PERIOD_CTRL                                  0x00
+#define PALMAS_LED_CTRL                                         0x01
+#define PALMAS_PWM_CTRL1                                        0x02
+#define PALMAS_PWM_CTRL2                                        0x03
 
 /* Bit definitions for LED_PERIOD_CTRL */
 #define PALMAS_LED_PERIOD_CTRL_LED_2_PERIOD_MASK                0x38
-#define PALMAS_LED_PERIOD_CTRL_LED_2_PERIOD_SHIFT               3
+#define PALMAS_LED_PERIOD_CTRL_LED_2_PERIOD_SHIFT               0x03
 #define PALMAS_LED_PERIOD_CTRL_LED_1_PERIOD_MASK                0x07
-#define PALMAS_LED_PERIOD_CTRL_LED_1_PERIOD_SHIFT               0
+#define PALMAS_LED_PERIOD_CTRL_LED_1_PERIOD_SHIFT               0x00
 
 /* Bit definitions for LED_CTRL */
 #define PALMAS_LED_CTRL_LED_2_SEQ                               0x20
-#define PALMAS_LED_CTRL_LED_2_SEQ_SHIFT                         5
+#define PALMAS_LED_CTRL_LED_2_SEQ_SHIFT                         0x05
 #define PALMAS_LED_CTRL_LED_1_SEQ                               0x10
-#define PALMAS_LED_CTRL_LED_1_SEQ_SHIFT                         4
+#define PALMAS_LED_CTRL_LED_1_SEQ_SHIFT                         0x04
 #define PALMAS_LED_CTRL_LED_2_ON_TIME_MASK                      0x0c
-#define PALMAS_LED_CTRL_LED_2_ON_TIME_SHIFT                     2
+#define PALMAS_LED_CTRL_LED_2_ON_TIME_SHIFT                     0x02
 #define PALMAS_LED_CTRL_LED_1_ON_TIME_MASK                      0x03
-#define PALMAS_LED_CTRL_LED_1_ON_TIME_SHIFT                     0
+#define PALMAS_LED_CTRL_LED_1_ON_TIME_SHIFT                     0x00
 
 /* Bit definitions for PWM_CTRL1 */
 #define PALMAS_PWM_CTRL1_PWM_FREQ_EN                            0x02
-#define PALMAS_PWM_CTRL1_PWM_FREQ_EN_SHIFT                      1
+#define PALMAS_PWM_CTRL1_PWM_FREQ_EN_SHIFT                      0x01
 #define PALMAS_PWM_CTRL1_PWM_FREQ_SEL                           0x01
-#define PALMAS_PWM_CTRL1_PWM_FREQ_SEL_SHIFT                     0
+#define PALMAS_PWM_CTRL1_PWM_FREQ_SEL_SHIFT                     0x00
 
 /* Bit definitions for PWM_CTRL2 */
-#define PALMAS_PWM_CTRL2_PWM_DUTY_SEL_MASK                      0xff
-#define PALMAS_PWM_CTRL2_PWM_DUTY_SEL_SHIFT                     0
+#define PALMAS_PWM_CTRL2_PWM_DUTY_SEL_MASK                      0xFF
+#define PALMAS_PWM_CTRL2_PWM_DUTY_SEL_SHIFT                     0x00
 
 /* Registers for function INTERRUPT */
-#define PALMAS_INT1_STATUS                                      0x0
-#define PALMAS_INT1_MASK                                        0x1
-#define PALMAS_INT1_LINE_STATE                                  0x2
-#define PALMAS_INT1_EDGE_DETECT1_RESERVED                       0x3
-#define PALMAS_INT1_EDGE_DETECT2_RESERVED                       0x4
-#define PALMAS_INT2_STATUS                                      0x5
-#define PALMAS_INT2_MASK                                        0x6
-#define PALMAS_INT2_LINE_STATE                                  0x7
-#define PALMAS_INT2_EDGE_DETECT1_RESERVED                       0x8
-#define PALMAS_INT2_EDGE_DETECT2_RESERVED                       0x9
-#define PALMAS_INT3_STATUS                                      0xA
-#define PALMAS_INT3_MASK                                        0xB
-#define PALMAS_INT3_LINE_STATE                                  0xC
-#define PALMAS_INT3_EDGE_DETECT1_RESERVED                       0xD
-#define PALMAS_INT3_EDGE_DETECT2_RESERVED                       0xE
-#define PALMAS_INT4_STATUS                                      0xF
+#define PALMAS_INT1_STATUS                                      0x00
+#define PALMAS_INT1_MASK                                        0x01
+#define PALMAS_INT1_LINE_STATE                                  0x02
+#define PALMAS_INT1_EDGE_DETECT1_RESERVED                       0x03
+#define PALMAS_INT1_EDGE_DETECT2_RESERVED                       0x04
+#define PALMAS_INT2_STATUS                                      0x05
+#define PALMAS_INT2_MASK                                        0x06
+#define PALMAS_INT2_LINE_STATE                                  0x07
+#define PALMAS_INT2_EDGE_DETECT1_RESERVED                       0x08
+#define PALMAS_INT2_EDGE_DETECT2_RESERVED                       0x09
+#define PALMAS_INT3_STATUS                                      0x0A
+#define PALMAS_INT3_MASK                                        0x0B
+#define PALMAS_INT3_LINE_STATE                                  0x0C
+#define PALMAS_INT3_EDGE_DETECT1_RESERVED                       0x0D
+#define PALMAS_INT3_EDGE_DETECT2_RESERVED                       0x0E
+#define PALMAS_INT4_STATUS                                      0x0F
 #define PALMAS_INT4_MASK                                        0x10
 #define PALMAS_INT4_LINE_STATE                                  0x11
 #define PALMAS_INT4_EDGE_DETECT1                                0x12
@@ -1966,276 +1966,276 @@ enum usb_irq_events {
 
 /* Bit definitions for INT1_STATUS */
 #define PALMAS_INT1_STATUS_VBAT_MON                             0x80
-#define PALMAS_INT1_STATUS_VBAT_MON_SHIFT                       7
+#define PALMAS_INT1_STATUS_VBAT_MON_SHIFT                       0x07
 #define PALMAS_INT1_STATUS_VSYS_MON                             0x40
-#define PALMAS_INT1_STATUS_VSYS_MON_SHIFT                       6
+#define PALMAS_INT1_STATUS_VSYS_MON_SHIFT                       0x06
 #define PALMAS_INT1_STATUS_HOTDIE                               0x20
-#define PALMAS_INT1_STATUS_HOTDIE_SHIFT                         5
+#define PALMAS_INT1_STATUS_HOTDIE_SHIFT                         0x05
 #define PALMAS_INT1_STATUS_PWRDOWN                              0x10
-#define PALMAS_INT1_STATUS_PWRDOWN_SHIFT                        4
+#define PALMAS_INT1_STATUS_PWRDOWN_SHIFT                        0x04
 #define PALMAS_INT1_STATUS_RPWRON                               0x08
-#define PALMAS_INT1_STATUS_RPWRON_SHIFT                         3
+#define PALMAS_INT1_STATUS_RPWRON_SHIFT                         0x03
 #define PALMAS_INT1_STATUS_LONG_PRESS_KEY                       0x04
-#define PALMAS_INT1_STATUS_LONG_PRESS_KEY_SHIFT                 2
+#define PALMAS_INT1_STATUS_LONG_PRESS_KEY_SHIFT                 0x02
 #define PALMAS_INT1_STATUS_PWRON                                0x02
-#define PALMAS_INT1_STATUS_PWRON_SHIFT                          1
+#define PALMAS_INT1_STATUS_PWRON_SHIFT                          0x01
 #define PALMAS_INT1_STATUS_CHARG_DET_N_VBUS_OVV                 0x01
-#define PALMAS_INT1_STATUS_CHARG_DET_N_VBUS_OVV_SHIFT           0
+#define PALMAS_INT1_STATUS_CHARG_DET_N_VBUS_OVV_SHIFT           0x00
 
 /* Bit definitions for INT1_MASK */
 #define PALMAS_INT1_MASK_VBAT_MON                               0x80
-#define PALMAS_INT1_MASK_VBAT_MON_SHIFT                         7
+#define PALMAS_INT1_MASK_VBAT_MON_SHIFT                         0x07
 #define PALMAS_INT1_MASK_VSYS_MON                               0x40
-#define PALMAS_INT1_MASK_VSYS_MON_SHIFT                         6
+#define PALMAS_INT1_MASK_VSYS_MON_SHIFT                         0x06
 #define PALMAS_INT1_MASK_HOTDIE                                 0x20
-#define PALMAS_INT1_MASK_HOTDIE_SHIFT                           5
+#define PALMAS_INT1_MASK_HOTDIE_SHIFT                           0x05
 #define PALMAS_INT1_MASK_PWRDOWN                                0x10
-#define PALMAS_INT1_MASK_PWRDOWN_SHIFT                          4
+#define PALMAS_INT1_MASK_PWRDOWN_SHIFT                          0x04
 #define PALMAS_INT1_MASK_RPWRON                                 0x08
-#define PALMAS_INT1_MASK_RPWRON_SHIFT                           3
+#define PALMAS_INT1_MASK_RPWRON_SHIFT                           0x03
 #define PALMAS_INT1_MASK_LONG_PRESS_KEY                         0x04
-#define PALMAS_INT1_MASK_LONG_PRESS_KEY_SHIFT                   2
+#define PALMAS_INT1_MASK_LONG_PRESS_KEY_SHIFT                   0x02
 #define PALMAS_INT1_MASK_PWRON                                  0x02
-#define PALMAS_INT1_MASK_PWRON_SHIFT                            1
+#define PALMAS_INT1_MASK_PWRON_SHIFT                            0x01
 #define PALMAS_INT1_MASK_CHARG_DET_N_VBUS_OVV                   0x01
-#define PALMAS_INT1_MASK_CHARG_DET_N_VBUS_OVV_SHIFT             0
+#define PALMAS_INT1_MASK_CHARG_DET_N_VBUS_OVV_SHIFT             0x00
 
 /* Bit definitions for INT1_LINE_STATE */
 #define PALMAS_INT1_LINE_STATE_VBAT_MON                         0x80
-#define PALMAS_INT1_LINE_STATE_VBAT_MON_SHIFT                   7
+#define PALMAS_INT1_LINE_STATE_VBAT_MON_SHIFT                   0x07
 #define PALMAS_INT1_LINE_STATE_VSYS_MON                         0x40
-#define PALMAS_INT1_LINE_STATE_VSYS_MON_SHIFT                   6
+#define PALMAS_INT1_LINE_STATE_VSYS_MON_SHIFT                   0x06
 #define PALMAS_INT1_LINE_STATE_HOTDIE                           0x20
-#define PALMAS_INT1_LINE_STATE_HOTDIE_SHIFT                     5
+#define PALMAS_INT1_LINE_STATE_HOTDIE_SHIFT                     0x05
 #define PALMAS_INT1_LINE_STATE_PWRDOWN                          0x10
-#define PALMAS_INT1_LINE_STATE_PWRDOWN_SHIFT                    4
+#define PALMAS_INT1_LINE_STATE_PWRDOWN_SHIFT                    0x04
 #define PALMAS_INT1_LINE_STATE_RPWRON                           0x08
-#define PALMAS_INT1_LINE_STATE_RPWRON_SHIFT                     3
+#define PALMAS_INT1_LINE_STATE_RPWRON_SHIFT                     0x03
 #define PALMAS_INT1_LINE_STATE_LONG_PRESS_KEY                   0x04
-#define PALMAS_INT1_LINE_STATE_LONG_PRESS_KEY_SHIFT             2
+#define PALMAS_INT1_LINE_STATE_LONG_PRESS_KEY_SHIFT             0x02
 #define PALMAS_INT1_LINE_STATE_PWRON                            0x02
-#define PALMAS_INT1_LINE_STATE_PWRON_SHIFT                      1
+#define PALMAS_INT1_LINE_STATE_PWRON_SHIFT                      0x01
 #define PALMAS_INT1_LINE_STATE_CHARG_DET_N_VBUS_OVV             0x01
-#define PALMAS_INT1_LINE_STATE_CHARG_DET_N_VBUS_OVV_SHIFT       0
+#define PALMAS_INT1_LINE_STATE_CHARG_DET_N_VBUS_OVV_SHIFT       0x00
 
 /* Bit definitions for INT2_STATUS */
 #define PALMAS_INT2_STATUS_VAC_ACOK                             0x80
-#define PALMAS_INT2_STATUS_VAC_ACOK_SHIFT                       7
+#define PALMAS_INT2_STATUS_VAC_ACOK_SHIFT                       0x07
 #define PALMAS_INT2_STATUS_SHORT                                0x40
-#define PALMAS_INT2_STATUS_SHORT_SHIFT                          6
+#define PALMAS_INT2_STATUS_SHORT_SHIFT                          0x06
 #define PALMAS_INT2_STATUS_FBI_BB                               0x20
-#define PALMAS_INT2_STATUS_FBI_BB_SHIFT                         5
+#define PALMAS_INT2_STATUS_FBI_BB_SHIFT                         0x05
 #define PALMAS_INT2_STATUS_RESET_IN                             0x10
-#define PALMAS_INT2_STATUS_RESET_IN_SHIFT                       4
+#define PALMAS_INT2_STATUS_RESET_IN_SHIFT                       0x04
 #define PALMAS_INT2_STATUS_BATREMOVAL                           0x08
-#define PALMAS_INT2_STATUS_BATREMOVAL_SHIFT                     3
+#define PALMAS_INT2_STATUS_BATREMOVAL_SHIFT                     0x03
 #define PALMAS_INT2_STATUS_WDT                                  0x04
-#define PALMAS_INT2_STATUS_WDT_SHIFT                            2
+#define PALMAS_INT2_STATUS_WDT_SHIFT                            0x02
 #define PALMAS_INT2_STATUS_RTC_TIMER                            0x02
-#define PALMAS_INT2_STATUS_RTC_TIMER_SHIFT                      1
+#define PALMAS_INT2_STATUS_RTC_TIMER_SHIFT                      0x01
 #define PALMAS_INT2_STATUS_RTC_ALARM                            0x01
-#define PALMAS_INT2_STATUS_RTC_ALARM_SHIFT                      0
+#define PALMAS_INT2_STATUS_RTC_ALARM_SHIFT                      0x00
 
 /* Bit definitions for INT2_MASK */
 #define PALMAS_INT2_MASK_VAC_ACOK                               0x80
-#define PALMAS_INT2_MASK_VAC_ACOK_SHIFT                         7
+#define PALMAS_INT2_MASK_VAC_ACOK_SHIFT                         0x07
 #define PALMAS_INT2_MASK_SHORT                                  0x40
-#define PALMAS_INT2_MASK_SHORT_SHIFT                            6
+#define PALMAS_INT2_MASK_SHORT_SHIFT                            0x06
 #define PALMAS_INT2_MASK_FBI_BB                                 0x20
-#define PALMAS_INT2_MASK_FBI_BB_SHIFT                           5
+#define PALMAS_INT2_MASK_FBI_BB_SHIFT                           0x05
 #define PALMAS_INT2_MASK_RESET_IN                               0x10
-#define PALMAS_INT2_MASK_RESET_IN_SHIFT                         4
+#define PALMAS_INT2_MASK_RESET_IN_SHIFT                         0x04
 #define PALMAS_INT2_MASK_BATREMOVAL                             0x08
-#define PALMAS_INT2_MASK_BATREMOVAL_SHIFT                       3
+#define PALMAS_INT2_MASK_BATREMOVAL_SHIFT                       0x03
 #define PALMAS_INT2_MASK_WDT                                    0x04
-#define PALMAS_INT2_MASK_WDT_SHIFT                              2
+#define PALMAS_INT2_MASK_WDT_SHIFT                              0x02
 #define PALMAS_INT2_MASK_RTC_TIMER                              0x02
-#define PALMAS_INT2_MASK_RTC_TIMER_SHIFT                        1
+#define PALMAS_INT2_MASK_RTC_TIMER_SHIFT                        0x01
 #define PALMAS_INT2_MASK_RTC_ALARM                              0x01
-#define PALMAS_INT2_MASK_RTC_ALARM_SHIFT                        0
+#define PALMAS_INT2_MASK_RTC_ALARM_SHIFT                        0x00
 
 /* Bit definitions for INT2_LINE_STATE */
 #define PALMAS_INT2_LINE_STATE_VAC_ACOK                         0x80
-#define PALMAS_INT2_LINE_STATE_VAC_ACOK_SHIFT                   7
+#define PALMAS_INT2_LINE_STATE_VAC_ACOK_SHIFT                   0x07
 #define PALMAS_INT2_LINE_STATE_SHORT                            0x40
-#define PALMAS_INT2_LINE_STATE_SHORT_SHIFT                      6
+#define PALMAS_INT2_LINE_STATE_SHORT_SHIFT                      0x06
 #define PALMAS_INT2_LINE_STATE_FBI_BB                           0x20
-#define PALMAS_INT2_LINE_STATE_FBI_BB_SHIFT                     5
+#define PALMAS_INT2_LINE_STATE_FBI_BB_SHIFT                     0x05
 #define PALMAS_INT2_LINE_STATE_RESET_IN                         0x10
-#define PALMAS_INT2_LINE_STATE_RESET_IN_SHIFT                   4
+#define PALMAS_INT2_LINE_STATE_RESET_IN_SHIFT                   0x04
 #define PALMAS_INT2_LINE_STATE_BATREMOVAL                       0x08
-#define PALMAS_INT2_LINE_STATE_BATREMOVAL_SHIFT                 3
+#define PALMAS_INT2_LINE_STATE_BATREMOVAL_SHIFT                 0x03
 #define PALMAS_INT2_LINE_STATE_WDT                              0x04
-#define PALMAS_INT2_LINE_STATE_WDT_SHIFT                        2
+#define PALMAS_INT2_LINE_STATE_WDT_SHIFT                        0x02
 #define PALMAS_INT2_LINE_STATE_RTC_TIMER                        0x02
-#define PALMAS_INT2_LINE_STATE_RTC_TIMER_SHIFT                  1
+#define PALMAS_INT2_LINE_STATE_RTC_TIMER_SHIFT                  0x01
 #define PALMAS_INT2_LINE_STATE_RTC_ALARM                        0x01
-#define PALMAS_INT2_LINE_STATE_RTC_ALARM_SHIFT                  0
+#define PALMAS_INT2_LINE_STATE_RTC_ALARM_SHIFT                  0x00
 
 /* Bit definitions for INT3_STATUS */
 #define PALMAS_INT3_STATUS_VBUS                                 0x80
-#define PALMAS_INT3_STATUS_VBUS_SHIFT                           7
+#define PALMAS_INT3_STATUS_VBUS_SHIFT                           0x07
 #define PALMAS_INT3_STATUS_VBUS_OTG                             0x40
-#define PALMAS_INT3_STATUS_VBUS_OTG_SHIFT                       6
+#define PALMAS_INT3_STATUS_VBUS_OTG_SHIFT                       0x06
 #define PALMAS_INT3_STATUS_ID                                   0x20
-#define PALMAS_INT3_STATUS_ID_SHIFT                             5
+#define PALMAS_INT3_STATUS_ID_SHIFT                             0x05
 #define PALMAS_INT3_STATUS_ID_OTG                               0x10
-#define PALMAS_INT3_STATUS_ID_OTG_SHIFT                         4
+#define PALMAS_INT3_STATUS_ID_OTG_SHIFT                         0x04
 #define PALMAS_INT3_STATUS_GPADC_EOC_RT                         0x08
-#define PALMAS_INT3_STATUS_GPADC_EOC_RT_SHIFT                   3
+#define PALMAS_INT3_STATUS_GPADC_EOC_RT_SHIFT                   0x03
 #define PALMAS_INT3_STATUS_GPADC_EOC_SW                         0x04
-#define PALMAS_INT3_STATUS_GPADC_EOC_SW_SHIFT                   2
+#define PALMAS_INT3_STATUS_GPADC_EOC_SW_SHIFT                   0x02
 #define PALMAS_INT3_STATUS_GPADC_AUTO_1                         0x02
-#define PALMAS_INT3_STATUS_GPADC_AUTO_1_SHIFT                   1
+#define PALMAS_INT3_STATUS_GPADC_AUTO_1_SHIFT                   0x01
 #define PALMAS_INT3_STATUS_GPADC_AUTO_0                         0x01
-#define PALMAS_INT3_STATUS_GPADC_AUTO_0_SHIFT                   0
+#define PALMAS_INT3_STATUS_GPADC_AUTO_0_SHIFT                   0x00
 
 /* Bit definitions for INT3_MASK */
 #define PALMAS_INT3_MASK_VBUS                                   0x80
-#define PALMAS_INT3_MASK_VBUS_SHIFT                             7
+#define PALMAS_INT3_MASK_VBUS_SHIFT                             0x07
 #define PALMAS_INT3_MASK_VBUS_OTG                               0x40
-#define PALMAS_INT3_MASK_VBUS_OTG_SHIFT                         6
+#define PALMAS_INT3_MASK_VBUS_OTG_SHIFT                         0x06
 #define PALMAS_INT3_MASK_ID                                     0x20
-#define PALMAS_INT3_MASK_ID_SHIFT                               5
+#define PALMAS_INT3_MASK_ID_SHIFT                               0x05
 #define PALMAS_INT3_MASK_ID_OTG                                 0x10
-#define PALMAS_INT3_MASK_ID_OTG_SHIFT                           4
+#define PALMAS_INT3_MASK_ID_OTG_SHIFT                           0x04
 #define PALMAS_INT3_MASK_GPADC_EOC_RT                           0x08
-#define PALMAS_INT3_MASK_GPADC_EOC_RT_SHIFT                     3
+#define PALMAS_INT3_MASK_GPADC_EOC_RT_SHIFT                     0x03
 #define PALMAS_INT3_MASK_GPADC_EOC_SW                           0x04
-#define PALMAS_INT3_MASK_GPADC_EOC_SW_SHIFT                     2
+#define PALMAS_INT3_MASK_GPADC_EOC_SW_SHIFT                     0x02
 #define PALMAS_INT3_MASK_GPADC_AUTO_1                           0x02
-#define PALMAS_INT3_MASK_GPADC_AUTO_1_SHIFT                     1
+#define PALMAS_INT3_MASK_GPADC_AUTO_1_SHIFT                     0x01
 #define PALMAS_INT3_MASK_GPADC_AUTO_0                           0x01
-#define PALMAS_INT3_MASK_GPADC_AUTO_0_SHIFT                     0
+#define PALMAS_INT3_MASK_GPADC_AUTO_0_SHIFT                     0x00
 
 /* Bit definitions for INT3_LINE_STATE */
 #define PALMAS_INT3_LINE_STATE_VBUS                             0x80
-#define PALMAS_INT3_LINE_STATE_VBUS_SHIFT                       7
+#define PALMAS_INT3_LINE_STATE_VBUS_SHIFT                       0x07
 #define PALMAS_INT3_LINE_STATE_VBUS_OTG                         0x40
-#define PALMAS_INT3_LINE_STATE_VBUS_OTG_SHIFT                   6
+#define PALMAS_INT3_LINE_STATE_VBUS_OTG_SHIFT                   0x06
 #define PALMAS_INT3_LINE_STATE_ID                               0x20
-#define PALMAS_INT3_LINE_STATE_ID_SHIFT                         5
+#define PALMAS_INT3_LINE_STATE_ID_SHIFT                         0x05
 #define PALMAS_INT3_LINE_STATE_ID_OTG                           0x10
-#define PALMAS_INT3_LINE_STATE_ID_OTG_SHIFT                     4
+#define PALMAS_INT3_LINE_STATE_ID_OTG_SHIFT                     0x04
 #define PALMAS_INT3_LINE_STATE_GPADC_EOC_RT                     0x08
-#define PALMAS_INT3_LINE_STATE_GPADC_EOC_RT_SHIFT               3
+#define PALMAS_INT3_LINE_STATE_GPADC_EOC_RT_SHIFT               0x03
 #define PALMAS_INT3_LINE_STATE_GPADC_EOC_SW                     0x04
-#define PALMAS_INT3_LINE_STATE_GPADC_EOC_SW_SHIFT               2
+#define PALMAS_INT3_LINE_STATE_GPADC_EOC_SW_SHIFT               0x02
 #define PALMAS_INT3_LINE_STATE_GPADC_AUTO_1                     0x02
-#define PALMAS_INT3_LINE_STATE_GPADC_AUTO_1_SHIFT               1
+#define PALMAS_INT3_LINE_STATE_GPADC_AUTO_1_SHIFT               0x01
 #define PALMAS_INT3_LINE_STATE_GPADC_AUTO_0                     0x01
-#define PALMAS_INT3_LINE_STATE_GPADC_AUTO_0_SHIFT               0
+#define PALMAS_INT3_LINE_STATE_GPADC_AUTO_0_SHIFT               0x00
 
 /* Bit definitions for INT4_STATUS */
 #define PALMAS_INT4_STATUS_GPIO_7                               0x80
-#define PALMAS_INT4_STATUS_GPIO_7_SHIFT                         7
+#define PALMAS_INT4_STATUS_GPIO_7_SHIFT                         0x07
 #define PALMAS_INT4_STATUS_GPIO_6                               0x40
-#define PALMAS_INT4_STATUS_GPIO_6_SHIFT                         6
+#define PALMAS_INT4_STATUS_GPIO_6_SHIFT                         0x06
 #define PALMAS_INT4_STATUS_GPIO_5                               0x20
-#define PALMAS_INT4_STATUS_GPIO_5_SHIFT                         5
+#define PALMAS_INT4_STATUS_GPIO_5_SHIFT                         0x05
 #define PALMAS_INT4_STATUS_GPIO_4                               0x10
-#define PALMAS_INT4_STATUS_GPIO_4_SHIFT                         4
+#define PALMAS_INT4_STATUS_GPIO_4_SHIFT                         0x04
 #define PALMAS_INT4_STATUS_GPIO_3                               0x08
-#define PALMAS_INT4_STATUS_GPIO_3_SHIFT                         3
+#define PALMAS_INT4_STATUS_GPIO_3_SHIFT                         0x03
 #define PALMAS_INT4_STATUS_GPIO_2                               0x04
-#define PALMAS_INT4_STATUS_GPIO_2_SHIFT                         2
+#define PALMAS_INT4_STATUS_GPIO_2_SHIFT                         0x02
 #define PALMAS_INT4_STATUS_GPIO_1                               0x02
-#define PALMAS_INT4_STATUS_GPIO_1_SHIFT                         1
+#define PALMAS_INT4_STATUS_GPIO_1_SHIFT                         0x01
 #define PALMAS_INT4_STATUS_GPIO_0                               0x01
-#define PALMAS_INT4_STATUS_GPIO_0_SHIFT                         0
+#define PALMAS_INT4_STATUS_GPIO_0_SHIFT                         0x00
 
 /* Bit definitions for INT4_MASK */
 #define PALMAS_INT4_MASK_GPIO_7                                 0x80
-#define PALMAS_INT4_MASK_GPIO_7_SHIFT                           7
+#define PALMAS_INT4_MASK_GPIO_7_SHIFT                           0x07
 #define PALMAS_INT4_MASK_GPIO_6                                 0x40
-#define PALMAS_INT4_MASK_GPIO_6_SHIFT                           6
+#define PALMAS_INT4_MASK_GPIO_6_SHIFT                           0x06
 #define PALMAS_INT4_MASK_GPIO_5                                 0x20
-#define PALMAS_INT4_MASK_GPIO_5_SHIFT                           5
+#define PALMAS_INT4_MASK_GPIO_5_SHIFT                           0x05
 #define PALMAS_INT4_MASK_GPIO_4                                 0x10
-#define PALMAS_INT4_MASK_GPIO_4_SHIFT                           4
+#define PALMAS_INT4_MASK_GPIO_4_SHIFT                           0x04
 #define PALMAS_INT4_MASK_GPIO_3                                 0x08
-#define PALMAS_INT4_MASK_GPIO_3_SHIFT                           3
+#define PALMAS_INT4_MASK_GPIO_3_SHIFT                           0x03
 #define PALMAS_INT4_MASK_GPIO_2                                 0x04
-#define PALMAS_INT4_MASK_GPIO_2_SHIFT                           2
+#define PALMAS_INT4_MASK_GPIO_2_SHIFT                           0x02
 #define PALMAS_INT4_MASK_GPIO_1                                 0x02
-#define PALMAS_INT4_MASK_GPIO_1_SHIFT                           1
+#define PALMAS_INT4_MASK_GPIO_1_SHIFT                           0x01
 #define PALMAS_INT4_MASK_GPIO_0                                 0x01
-#define PALMAS_INT4_MASK_GPIO_0_SHIFT                           0
+#define PALMAS_INT4_MASK_GPIO_0_SHIFT                           0x00
 
 /* Bit definitions for INT4_LINE_STATE */
 #define PALMAS_INT4_LINE_STATE_GPIO_7                           0x80
-#define PALMAS_INT4_LINE_STATE_GPIO_7_SHIFT                     7
+#define PALMAS_INT4_LINE_STATE_GPIO_7_SHIFT                     0x07
 #define PALMAS_INT4_LINE_STATE_GPIO_6                           0x40
-#define PALMAS_INT4_LINE_STATE_GPIO_6_SHIFT                     6
+#define PALMAS_INT4_LINE_STATE_GPIO_6_SHIFT                     0x06
 #define PALMAS_INT4_LINE_STATE_GPIO_5                           0x20
-#define PALMAS_INT4_LINE_STATE_GPIO_5_SHIFT                     5
+#define PALMAS_INT4_LINE_STATE_GPIO_5_SHIFT                     0x05
 #define PALMAS_INT4_LINE_STATE_GPIO_4                           0x10
-#define PALMAS_INT4_LINE_STATE_GPIO_4_SHIFT                     4
+#define PALMAS_INT4_LINE_STATE_GPIO_4_SHIFT                     0x04
 #define PALMAS_INT4_LINE_STATE_GPIO_3                           0x08
-#define PALMAS_INT4_LINE_STATE_GPIO_3_SHIFT                     3
+#define PALMAS_INT4_LINE_STATE_GPIO_3_SHIFT                     0x03
 #define PALMAS_INT4_LINE_STATE_GPIO_2                           0x04
-#define PALMAS_INT4_LINE_STATE_GPIO_2_SHIFT                     2
+#define PALMAS_INT4_LINE_STATE_GPIO_2_SHIFT                     0x02
 #define PALMAS_INT4_LINE_STATE_GPIO_1                           0x02
-#define PALMAS_INT4_LINE_STATE_GPIO_1_SHIFT                     1
+#define PALMAS_INT4_LINE_STATE_GPIO_1_SHIFT                     0x01
 #define PALMAS_INT4_LINE_STATE_GPIO_0                           0x01
-#define PALMAS_INT4_LINE_STATE_GPIO_0_SHIFT                     0
+#define PALMAS_INT4_LINE_STATE_GPIO_0_SHIFT                     0x00
 
 /* Bit definitions for INT4_EDGE_DETECT1 */
 #define PALMAS_INT4_EDGE_DETECT1_GPIO_3_RISING                  0x80
-#define PALMAS_INT4_EDGE_DETECT1_GPIO_3_RISING_SHIFT            7
+#define PALMAS_INT4_EDGE_DETECT1_GPIO_3_RISING_SHIFT            0x07
 #define PALMAS_INT4_EDGE_DETECT1_GPIO_3_FALLING                 0x40
-#define PALMAS_INT4_EDGE_DETECT1_GPIO_3_FALLING_SHIFT           6
+#define PALMAS_INT4_EDGE_DETECT1_GPIO_3_FALLING_SHIFT           0x06
 #define PALMAS_INT4_EDGE_DETECT1_GPIO_2_RISING                  0x20
-#define PALMAS_INT4_EDGE_DETECT1_GPIO_2_RISING_SHIFT            5
+#define PALMAS_INT4_EDGE_DETECT1_GPIO_2_RISING_SHIFT            0x05
 #define PALMAS_INT4_EDGE_DETECT1_GPIO_2_FALLING                 0x10
-#define PALMAS_INT4_EDGE_DETECT1_GPIO_2_FALLING_SHIFT           4
+#define PALMAS_INT4_EDGE_DETECT1_GPIO_2_FALLING_SHIFT           0x04
 #define PALMAS_INT4_EDGE_DETECT1_GPIO_1_RISING                  0x08
-#define PALMAS_INT4_EDGE_DETECT1_GPIO_1_RISING_SHIFT            3
+#define PALMAS_INT4_EDGE_DETECT1_GPIO_1_RISING_SHIFT            0x03
 #define PALMAS_INT4_EDGE_DETECT1_GPIO_1_FALLING                 0x04
-#define PALMAS_INT4_EDGE_DETECT1_GPIO_1_FALLING_SHIFT           2
+#define PALMAS_INT4_EDGE_DETECT1_GPIO_1_FALLING_SHIFT           0x02
 #define PALMAS_INT4_EDGE_DETECT1_GPIO_0_RISING                  0x02
-#define PALMAS_INT4_EDGE_DETECT1_GPIO_0_RISING_SHIFT            1
+#define PALMAS_INT4_EDGE_DETECT1_GPIO_0_RISING_SHIFT            0x01
 #define PALMAS_INT4_EDGE_DETECT1_GPIO_0_FALLING                 0x01
-#define PALMAS_INT4_EDGE_DETECT1_GPIO_0_FALLING_SHIFT           0
+#define PALMAS_INT4_EDGE_DETECT1_GPIO_0_FALLING_SHIFT           0x00
 
 /* Bit definitions for INT4_EDGE_DETECT2 */
 #define PALMAS_INT4_EDGE_DETECT2_GPIO_7_RISING                  0x80
-#define PALMAS_INT4_EDGE_DETECT2_GPIO_7_RISING_SHIFT            7
+#define PALMAS_INT4_EDGE_DETECT2_GPIO_7_RISING_SHIFT            0x07
 #define PALMAS_INT4_EDGE_DETECT2_GPIO_7_FALLING                 0x40
-#define PALMAS_INT4_EDGE_DETECT2_GPIO_7_FALLING_SHIFT           6
+#define PALMAS_INT4_EDGE_DETECT2_GPIO_7_FALLING_SHIFT           0x06
 #define PALMAS_INT4_EDGE_DETECT2_GPIO_6_RISING                  0x20
-#define PALMAS_INT4_EDGE_DETECT2_GPIO_6_RISING_SHIFT            5
+#define PALMAS_INT4_EDGE_DETECT2_GPIO_6_RISING_SHIFT            0x05
 #define PALMAS_INT4_EDGE_DETECT2_GPIO_6_FALLING                 0x10
-#define PALMAS_INT4_EDGE_DETECT2_GPIO_6_FALLING_SHIFT           4
+#define PALMAS_INT4_EDGE_DETECT2_GPIO_6_FALLING_SHIFT           0x04
 #define PALMAS_INT4_EDGE_DETECT2_GPIO_5_RISING                  0x08
-#define PALMAS_INT4_EDGE_DETECT2_GPIO_5_RISING_SHIFT            3
+#define PALMAS_INT4_EDGE_DETECT2_GPIO_5_RISING_SHIFT            0x03
 #define PALMAS_INT4_EDGE_DETECT2_GPIO_5_FALLING                 0x04
-#define PALMAS_INT4_EDGE_DETECT2_GPIO_5_FALLING_SHIFT           2
+#define PALMAS_INT4_EDGE_DETECT2_GPIO_5_FALLING_SHIFT           0x02
 #define PALMAS_INT4_EDGE_DETECT2_GPIO_4_RISING                  0x02
-#define PALMAS_INT4_EDGE_DETECT2_GPIO_4_RISING_SHIFT            1
+#define PALMAS_INT4_EDGE_DETECT2_GPIO_4_RISING_SHIFT            0x01
 #define PALMAS_INT4_EDGE_DETECT2_GPIO_4_FALLING                 0x01
-#define PALMAS_INT4_EDGE_DETECT2_GPIO_4_FALLING_SHIFT           0
+#define PALMAS_INT4_EDGE_DETECT2_GPIO_4_FALLING_SHIFT           0x00
 
 /* Bit definitions for INT_CTRL */
 #define PALMAS_INT_CTRL_INT_PENDING                             0x04
-#define PALMAS_INT_CTRL_INT_PENDING_SHIFT                       2
+#define PALMAS_INT_CTRL_INT_PENDING_SHIFT                       0x02
 #define PALMAS_INT_CTRL_INT_CLEAR                               0x01
-#define PALMAS_INT_CTRL_INT_CLEAR_SHIFT                         0
+#define PALMAS_INT_CTRL_INT_CLEAR_SHIFT                         0x00
 
 /* Registers for function USB_OTG */
-#define PALMAS_USB_WAKEUP                                       0x3
-#define PALMAS_USB_VBUS_CTRL_SET                                0x4
-#define PALMAS_USB_VBUS_CTRL_CLR                                0x5
-#define PALMAS_USB_ID_CTRL_SET                                  0x6
-#define PALMAS_USB_ID_CTRL_CLEAR                                0x7
-#define PALMAS_USB_VBUS_INT_SRC                                 0x8
-#define PALMAS_USB_VBUS_INT_LATCH_SET                           0x9
-#define PALMAS_USB_VBUS_INT_LATCH_CLR                           0xA
-#define PALMAS_USB_VBUS_INT_EN_LO_SET                           0xB
-#define PALMAS_USB_VBUS_INT_EN_LO_CLR                           0xC
-#define PALMAS_USB_VBUS_INT_EN_HI_SET                           0xD
-#define PALMAS_USB_VBUS_INT_EN_HI_CLR                           0xE
-#define PALMAS_USB_ID_INT_SRC                                   0xF
+#define PALMAS_USB_WAKEUP                                       0x03
+#define PALMAS_USB_VBUS_CTRL_SET                                0x04
+#define PALMAS_USB_VBUS_CTRL_CLR                                0x05
+#define PALMAS_USB_ID_CTRL_SET                                  0x06
+#define PALMAS_USB_ID_CTRL_CLEAR                                0x07
+#define PALMAS_USB_VBUS_INT_SRC                                 0x08
+#define PALMAS_USB_VBUS_INT_LATCH_SET                           0x09
+#define PALMAS_USB_VBUS_INT_LATCH_CLR                           0x0A
+#define PALMAS_USB_VBUS_INT_EN_LO_SET                           0x0B
+#define PALMAS_USB_VBUS_INT_EN_LO_CLR                           0x0C
+#define PALMAS_USB_VBUS_INT_EN_HI_SET                           0x0D
+#define PALMAS_USB_VBUS_INT_EN_HI_CLR                           0x0E
+#define PALMAS_USB_ID_INT_SRC                                   0x0F
 #define PALMAS_USB_ID_INT_LATCH_SET                             0x10
 #define PALMAS_USB_ID_INT_LATCH_CLR                             0x11
 #define PALMAS_USB_ID_INT_EN_LO_SET                             0x12
@@ -2250,306 +2250,306 @@ enum usb_irq_events {
 
 /* Bit definitions for USB_WAKEUP */
 #define PALMAS_USB_WAKEUP_ID_WK_UP_COMP                         0x01
-#define PALMAS_USB_WAKEUP_ID_WK_UP_COMP_SHIFT                   0
+#define PALMAS_USB_WAKEUP_ID_WK_UP_COMP_SHIFT                   0x00
 
 /* Bit definitions for USB_VBUS_CTRL_SET */
 #define PALMAS_USB_VBUS_CTRL_SET_VBUS_CHRG_VSYS                 0x80
-#define PALMAS_USB_VBUS_CTRL_SET_VBUS_CHRG_VSYS_SHIFT           7
+#define PALMAS_USB_VBUS_CTRL_SET_VBUS_CHRG_VSYS_SHIFT           0x07
 #define PALMAS_USB_VBUS_CTRL_SET_VBUS_DISCHRG                   0x20
-#define PALMAS_USB_VBUS_CTRL_SET_VBUS_DISCHRG_SHIFT             5
+#define PALMAS_USB_VBUS_CTRL_SET_VBUS_DISCHRG_SHIFT             0x05
 #define PALMAS_USB_VBUS_CTRL_SET_VBUS_IADP_SRC                  0x10
-#define PALMAS_USB_VBUS_CTRL_SET_VBUS_IADP_SRC_SHIFT            4
+#define PALMAS_USB_VBUS_CTRL_SET_VBUS_IADP_SRC_SHIFT            0x04
 #define PALMAS_USB_VBUS_CTRL_SET_VBUS_IADP_SINK                 0x08
-#define PALMAS_USB_VBUS_CTRL_SET_VBUS_IADP_SINK_SHIFT           3
+#define PALMAS_USB_VBUS_CTRL_SET_VBUS_IADP_SINK_SHIFT           0x03
 #define PALMAS_USB_VBUS_CTRL_SET_VBUS_ACT_COMP                  0x04
-#define PALMAS_USB_VBUS_CTRL_SET_VBUS_ACT_COMP_SHIFT            2
+#define PALMAS_USB_VBUS_CTRL_SET_VBUS_ACT_COMP_SHIFT            0x02
 
 /* Bit definitions for USB_VBUS_CTRL_CLR */
 #define PALMAS_USB_VBUS_CTRL_CLR_VBUS_CHRG_VSYS                 0x80
-#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_CHRG_VSYS_SHIFT           7
+#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_CHRG_VSYS_SHIFT           0x07
 #define PALMAS_USB_VBUS_CTRL_CLR_VBUS_DISCHRG                   0x20
-#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_DISCHRG_SHIFT             5
+#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_DISCHRG_SHIFT             0x05
 #define PALMAS_USB_VBUS_CTRL_CLR_VBUS_IADP_SRC                  0x10
-#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_IADP_SRC_SHIFT            4
+#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_IADP_SRC_SHIFT            0x04
 #define PALMAS_USB_VBUS_CTRL_CLR_VBUS_IADP_SINK                 0x08
-#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_IADP_SINK_SHIFT           3
+#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_IADP_SINK_SHIFT           0x03
 #define PALMAS_USB_VBUS_CTRL_CLR_VBUS_ACT_COMP                  0x04
-#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_ACT_COMP_SHIFT            2
+#define PALMAS_USB_VBUS_CTRL_CLR_VBUS_ACT_COMP_SHIFT            0x02
 
 /* Bit definitions for USB_ID_CTRL_SET */
 #define PALMAS_USB_ID_CTRL_SET_ID_PU_220K                       0x80
-#define PALMAS_USB_ID_CTRL_SET_ID_PU_220K_SHIFT                 7
+#define PALMAS_USB_ID_CTRL_SET_ID_PU_220K_SHIFT                 0x07
 #define PALMAS_USB_ID_CTRL_SET_ID_PU_100K                       0x40
-#define PALMAS_USB_ID_CTRL_SET_ID_PU_100K_SHIFT                 6
+#define PALMAS_USB_ID_CTRL_SET_ID_PU_100K_SHIFT                 0x06
 #define PALMAS_USB_ID_CTRL_SET_ID_GND_DRV                       0x20
-#define PALMAS_USB_ID_CTRL_SET_ID_GND_DRV_SHIFT                 5
+#define PALMAS_USB_ID_CTRL_SET_ID_GND_DRV_SHIFT                 0x05
 #define PALMAS_USB_ID_CTRL_SET_ID_SRC_16U                       0x10
-#define PALMAS_USB_ID_CTRL_SET_ID_SRC_16U_SHIFT                 4
+#define PALMAS_USB_ID_CTRL_SET_ID_SRC_16U_SHIFT                 0x04
 #define PALMAS_USB_ID_CTRL_SET_ID_SRC_5U                        0x08
-#define PALMAS_USB_ID_CTRL_SET_ID_SRC_5U_SHIFT                  3
+#define PALMAS_USB_ID_CTRL_SET_ID_SRC_5U_SHIFT                  0x03
 #define PALMAS_USB_ID_CTRL_SET_ID_ACT_COMP                      0x04
-#define PALMAS_USB_ID_CTRL_SET_ID_ACT_COMP_SHIFT                2
+#define PALMAS_USB_ID_CTRL_SET_ID_ACT_COMP_SHIFT                0x02
 
 /* Bit definitions for USB_ID_CTRL_CLEAR */
 #define PALMAS_USB_ID_CTRL_CLEAR_ID_PU_220K                     0x80
-#define PALMAS_USB_ID_CTRL_CLEAR_ID_PU_220K_SHIFT               7
+#define PALMAS_USB_ID_CTRL_CLEAR_ID_PU_220K_SHIFT               0x07
 #define PALMAS_USB_ID_CTRL_CLEAR_ID_PU_100K                     0x40
-#define PALMAS_USB_ID_CTRL_CLEAR_ID_PU_100K_SHIFT               6
+#define PALMAS_USB_ID_CTRL_CLEAR_ID_PU_100K_SHIFT               0x06
 #define PALMAS_USB_ID_CTRL_CLEAR_ID_GND_DRV                     0x20
-#define PALMAS_USB_ID_CTRL_CLEAR_ID_GND_DRV_SHIFT               5
+#define PALMAS_USB_ID_CTRL_CLEAR_ID_GND_DRV_SHIFT               0x05
 #define PALMAS_USB_ID_CTRL_CLEAR_ID_SRC_16U                     0x10
-#define PALMAS_USB_ID_CTRL_CLEAR_ID_SRC_16U_SHIFT               4
+#define PALMAS_USB_ID_CTRL_CLEAR_ID_SRC_16U_SHIFT               0x04
 #define PALMAS_USB_ID_CTRL_CLEAR_ID_SRC_5U                      0x08
-#define PALMAS_USB_ID_CTRL_CLEAR_ID_SRC_5U_SHIFT                3
+#define PALMAS_USB_ID_CTRL_CLEAR_ID_SRC_5U_SHIFT                0x03
 #define PALMAS_USB_ID_CTRL_CLEAR_ID_ACT_COMP                    0x04
-#define PALMAS_USB_ID_CTRL_CLEAR_ID_ACT_COMP_SHIFT              2
+#define PALMAS_USB_ID_CTRL_CLEAR_ID_ACT_COMP_SHIFT              0x02
 
 /* Bit definitions for USB_VBUS_INT_SRC */
 #define PALMAS_USB_VBUS_INT_SRC_VOTG_SESS_VLD                   0x80
-#define PALMAS_USB_VBUS_INT_SRC_VOTG_SESS_VLD_SHIFT             7
+#define PALMAS_USB_VBUS_INT_SRC_VOTG_SESS_VLD_SHIFT             0x07
 #define PALMAS_USB_VBUS_INT_SRC_VADP_PRB                        0x40
-#define PALMAS_USB_VBUS_INT_SRC_VADP_PRB_SHIFT                  6
+#define PALMAS_USB_VBUS_INT_SRC_VADP_PRB_SHIFT                  0x06
 #define PALMAS_USB_VBUS_INT_SRC_VADP_SNS                        0x20
-#define PALMAS_USB_VBUS_INT_SRC_VADP_SNS_SHIFT                  5
+#define PALMAS_USB_VBUS_INT_SRC_VADP_SNS_SHIFT                  0x05
 #define PALMAS_USB_VBUS_INT_SRC_VA_VBUS_VLD                     0x08
-#define PALMAS_USB_VBUS_INT_SRC_VA_VBUS_VLD_SHIFT               3
+#define PALMAS_USB_VBUS_INT_SRC_VA_VBUS_VLD_SHIFT               0x03
 #define PALMAS_USB_VBUS_INT_SRC_VA_SESS_VLD                     0x04
-#define PALMAS_USB_VBUS_INT_SRC_VA_SESS_VLD_SHIFT               2
+#define PALMAS_USB_VBUS_INT_SRC_VA_SESS_VLD_SHIFT               0x02
 #define PALMAS_USB_VBUS_INT_SRC_VB_SESS_VLD                     0x02
-#define PALMAS_USB_VBUS_INT_SRC_VB_SESS_VLD_SHIFT               1
+#define PALMAS_USB_VBUS_INT_SRC_VB_SESS_VLD_SHIFT               0x01
 #define PALMAS_USB_VBUS_INT_SRC_VB_SESS_END                     0x01
-#define PALMAS_USB_VBUS_INT_SRC_VB_SESS_END_SHIFT               0
+#define PALMAS_USB_VBUS_INT_SRC_VB_SESS_END_SHIFT               0x00
 
 /* Bit definitions for USB_VBUS_INT_LATCH_SET */
 #define PALMAS_USB_VBUS_INT_LATCH_SET_VOTG_SESS_VLD             0x80
-#define PALMAS_USB_VBUS_INT_LATCH_SET_VOTG_SESS_VLD_SHIFT       7
+#define PALMAS_USB_VBUS_INT_LATCH_SET_VOTG_SESS_VLD_SHIFT       0x07
 #define PALMAS_USB_VBUS_INT_LATCH_SET_VADP_PRB                  0x40
-#define PALMAS_USB_VBUS_INT_LATCH_SET_VADP_PRB_SHIFT            6
+#define PALMAS_USB_VBUS_INT_LATCH_SET_VADP_PRB_SHIFT            0x06
 #define PALMAS_USB_VBUS_INT_LATCH_SET_VADP_SNS                  0x20
-#define PALMAS_USB_VBUS_INT_LATCH_SET_VADP_SNS_SHIFT            5
+#define PALMAS_USB_VBUS_INT_LATCH_SET_VADP_SNS_SHIFT            0x05
 #define PALMAS_USB_VBUS_INT_LATCH_SET_ADP                       0x10
-#define PALMAS_USB_VBUS_INT_LATCH_SET_ADP_SHIFT                 4
+#define PALMAS_USB_VBUS_INT_LATCH_SET_ADP_SHIFT                 0x04
 #define PALMAS_USB_VBUS_INT_LATCH_SET_VA_VBUS_VLD               0x08
-#define PALMAS_USB_VBUS_INT_LATCH_SET_VA_VBUS_VLD_SHIFT         3
+#define PALMAS_USB_VBUS_INT_LATCH_SET_VA_VBUS_VLD_SHIFT         0x03
 #define PALMAS_USB_VBUS_INT_LATCH_SET_VA_SESS_VLD               0x04
-#define PALMAS_USB_VBUS_INT_LATCH_SET_VA_SESS_VLD_SHIFT         2
+#define PALMAS_USB_VBUS_INT_LATCH_SET_VA_SESS_VLD_SHIFT         0x02
 #define PALMAS_USB_VBUS_INT_LATCH_SET_VB_SESS_VLD               0x02
-#define PALMAS_USB_VBUS_INT_LATCH_SET_VB_SESS_VLD_SHIFT         1
+#define PALMAS_USB_VBUS_INT_LATCH_SET_VB_SESS_VLD_SHIFT         0x01
 #define PALMAS_USB_VBUS_INT_LATCH_SET_VB_SESS_END               0x01
-#define PALMAS_USB_VBUS_INT_LATCH_SET_VB_SESS_END_SHIFT         0
+#define PALMAS_USB_VBUS_INT_LATCH_SET_VB_SESS_END_SHIFT         0x00
 
 /* Bit definitions for USB_VBUS_INT_LATCH_CLR */
 #define PALMAS_USB_VBUS_INT_LATCH_CLR_VOTG_SESS_VLD             0x80
-#define PALMAS_USB_VBUS_INT_LATCH_CLR_VOTG_SESS_VLD_SHIFT       7
+#define PALMAS_USB_VBUS_INT_LATCH_CLR_VOTG_SESS_VLD_SHIFT       0x07
 #define PALMAS_USB_VBUS_INT_LATCH_CLR_VADP_PRB                  0x40
-#define PALMAS_USB_VBUS_INT_LATCH_CLR_VADP_PRB_SHIFT            6
+#define PALMAS_USB_VBUS_INT_LATCH_CLR_VADP_PRB_SHIFT            0x06
 #define PALMAS_USB_VBUS_INT_LATCH_CLR_VADP_SNS                  0x20
-#define PALMAS_USB_VBUS_INT_LATCH_CLR_VADP_SNS_SHIFT            5
+#define PALMAS_USB_VBUS_INT_LATCH_CLR_VADP_SNS_SHIFT            0x05
 #define PALMAS_USB_VBUS_INT_LATCH_CLR_ADP                       0x10
-#define PALMAS_USB_VBUS_INT_LATCH_CLR_ADP_SHIFT                 4
+#define PALMAS_USB_VBUS_INT_LATCH_CLR_ADP_SHIFT                 0x04
 #define PALMAS_USB_VBUS_INT_LATCH_CLR_VA_VBUS_VLD               0x08
-#define PALMAS_USB_VBUS_INT_LATCH_CLR_VA_VBUS_VLD_SHIFT         3
+#define PALMAS_USB_VBUS_INT_LATCH_CLR_VA_VBUS_VLD_SHIFT         0x03
 #define PALMAS_USB_VBUS_INT_LATCH_CLR_VA_SESS_VLD               0x04
-#define PALMAS_USB_VBUS_INT_LATCH_CLR_VA_SESS_VLD_SHIFT         2
+#define PALMAS_USB_VBUS_INT_LATCH_CLR_VA_SESS_VLD_SHIFT         0x02
 #define PALMAS_USB_VBUS_INT_LATCH_CLR_VB_SESS_VLD               0x02
-#define PALMAS_USB_VBUS_INT_LATCH_CLR_VB_SESS_VLD_SHIFT         1
+#define PALMAS_USB_VBUS_INT_LATCH_CLR_VB_SESS_VLD_SHIFT         0x01
 #define PALMAS_USB_VBUS_INT_LATCH_CLR_VB_SESS_END               0x01
-#define PALMAS_USB_VBUS_INT_LATCH_CLR_VB_SESS_END_SHIFT         0
+#define PALMAS_USB_VBUS_INT_LATCH_CLR_VB_SESS_END_SHIFT         0x00
 
 /* Bit definitions for USB_VBUS_INT_EN_LO_SET */
 #define PALMAS_USB_VBUS_INT_EN_LO_SET_VOTG_SESS_VLD             0x80
-#define PALMAS_USB_VBUS_INT_EN_LO_SET_VOTG_SESS_VLD_SHIFT       7
+#define PALMAS_USB_VBUS_INT_EN_LO_SET_VOTG_SESS_VLD_SHIFT       0x07
 #define PALMAS_USB_VBUS_INT_EN_LO_SET_VADP_PRB                  0x40
-#define PALMAS_USB_VBUS_INT_EN_LO_SET_VADP_PRB_SHIFT            6
+#define PALMAS_USB_VBUS_INT_EN_LO_SET_VADP_PRB_SHIFT            0x06
 #define PALMAS_USB_VBUS_INT_EN_LO_SET_VADP_SNS                  0x20
-#define PALMAS_USB_VBUS_INT_EN_LO_SET_VADP_SNS_SHIFT            5
+#define PALMAS_USB_VBUS_INT_EN_LO_SET_VADP_SNS_SHIFT            0x05
 #define PALMAS_USB_VBUS_INT_EN_LO_SET_VA_VBUS_VLD               0x08
-#define PALMAS_USB_VBUS_INT_EN_LO_SET_VA_VBUS_VLD_SHIFT         3
+#define PALMAS_USB_VBUS_INT_EN_LO_SET_VA_VBUS_VLD_SHIFT         0x03
 #define PALMAS_USB_VBUS_INT_EN_LO_SET_VA_SESS_VLD               0x04
-#define PALMAS_USB_VBUS_INT_EN_LO_SET_VA_SESS_VLD_SHIFT         2
+#define PALMAS_USB_VBUS_INT_EN_LO_SET_VA_SESS_VLD_SHIFT         0x02
 #define PALMAS_USB_VBUS_INT_EN_LO_SET_VB_SESS_VLD               0x02
-#define PALMAS_USB_VBUS_INT_EN_LO_SET_VB_SESS_VLD_SHIFT         1
+#define PALMAS_USB_VBUS_INT_EN_LO_SET_VB_SESS_VLD_SHIFT         0x01
 #define PALMAS_USB_VBUS_INT_EN_LO_SET_VB_SESS_END               0x01
-#define PALMAS_USB_VBUS_INT_EN_LO_SET_VB_SESS_END_SHIFT         0
+#define PALMAS_USB_VBUS_INT_EN_LO_SET_VB_SESS_END_SHIFT         0x00
 
 /* Bit definitions for USB_VBUS_INT_EN_LO_CLR */
 #define PALMAS_USB_VBUS_INT_EN_LO_CLR_VOTG_SESS_VLD             0x80
-#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VOTG_SESS_VLD_SHIFT       7
+#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VOTG_SESS_VLD_SHIFT       0x07
 #define PALMAS_USB_VBUS_INT_EN_LO_CLR_VADP_PRB                  0x40
-#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VADP_PRB_SHIFT            6
+#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VADP_PRB_SHIFT            0x06
 #define PALMAS_USB_VBUS_INT_EN_LO_CLR_VADP_SNS                  0x20
-#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VADP_SNS_SHIFT            5
+#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VADP_SNS_SHIFT            0x05
 #define PALMAS_USB_VBUS_INT_EN_LO_CLR_VA_VBUS_VLD               0x08
-#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VA_VBUS_VLD_SHIFT         3
+#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VA_VBUS_VLD_SHIFT         0x03
 #define PALMAS_USB_VBUS_INT_EN_LO_CLR_VA_SESS_VLD               0x04
-#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VA_SESS_VLD_SHIFT         2
+#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VA_SESS_VLD_SHIFT         0x02
 #define PALMAS_USB_VBUS_INT_EN_LO_CLR_VB_SESS_VLD               0x02
-#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VB_SESS_VLD_SHIFT         1
+#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VB_SESS_VLD_SHIFT         0x01
 #define PALMAS_USB_VBUS_INT_EN_LO_CLR_VB_SESS_END               0x01
-#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VB_SESS_END_SHIFT         0
+#define PALMAS_USB_VBUS_INT_EN_LO_CLR_VB_SESS_END_SHIFT         0x00
 
 /* Bit definitions for USB_VBUS_INT_EN_HI_SET */
 #define PALMAS_USB_VBUS_INT_EN_HI_SET_VOTG_SESS_VLD             0x80
-#define PALMAS_USB_VBUS_INT_EN_HI_SET_VOTG_SESS_VLD_SHIFT       7
+#define PALMAS_USB_VBUS_INT_EN_HI_SET_VOTG_SESS_VLD_SHIFT       0x07
 #define PALMAS_USB_VBUS_INT_EN_HI_SET_VADP_PRB                  0x40
-#define PALMAS_USB_VBUS_INT_EN_HI_SET_VADP_PRB_SHIFT            6
+#define PALMAS_USB_VBUS_INT_EN_HI_SET_VADP_PRB_SHIFT            0x06
 #define PALMAS_USB_VBUS_INT_EN_HI_SET_VADP_SNS                  0x20
-#define PALMAS_USB_VBUS_INT_EN_HI_SET_VADP_SNS_SHIFT            5
+#define PALMAS_USB_VBUS_INT_EN_HI_SET_VADP_SNS_SHIFT            0x05
 #define PALMAS_USB_VBUS_INT_EN_HI_SET_ADP                       0x10
-#define PALMAS_USB_VBUS_INT_EN_HI_SET_ADP_SHIFT                 4
+#define PALMAS_USB_VBUS_INT_EN_HI_SET_ADP_SHIFT                 0x04
 #define PALMAS_USB_VBUS_INT_EN_HI_SET_VA_VBUS_VLD               0x08
-#define PALMAS_USB_VBUS_INT_EN_HI_SET_VA_VBUS_VLD_SHIFT         3
+#define PALMAS_USB_VBUS_INT_EN_HI_SET_VA_VBUS_VLD_SHIFT         0x03
 #define PALMAS_USB_VBUS_INT_EN_HI_SET_VA_SESS_VLD               0x04
-#define PALMAS_USB_VBUS_INT_EN_HI_SET_VA_SESS_VLD_SHIFT         2
+#define PALMAS_USB_VBUS_INT_EN_HI_SET_VA_SESS_VLD_SHIFT         0x02
 #define PALMAS_USB_VBUS_INT_EN_HI_SET_VB_SESS_VLD               0x02
-#define PALMAS_USB_VBUS_INT_EN_HI_SET_VB_SESS_VLD_SHIFT         1
+#define PALMAS_USB_VBUS_INT_EN_HI_SET_VB_SESS_VLD_SHIFT         0x01
 #define PALMAS_USB_VBUS_INT_EN_HI_SET_VB_SESS_END               0x01
-#define PALMAS_USB_VBUS_INT_EN_HI_SET_VB_SESS_END_SHIFT         0
+#define PALMAS_USB_VBUS_INT_EN_HI_SET_VB_SESS_END_SHIFT         0x00
 
 /* Bit definitions for USB_VBUS_INT_EN_HI_CLR */
 #define PALMAS_USB_VBUS_INT_EN_HI_CLR_VOTG_SESS_VLD             0x80
-#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VOTG_SESS_VLD_SHIFT       7
+#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VOTG_SESS_VLD_SHIFT       0x07
 #define PALMAS_USB_VBUS_INT_EN_HI_CLR_VADP_PRB                  0x40
-#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VADP_PRB_SHIFT            6
+#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VADP_PRB_SHIFT            0x06
 #define PALMAS_USB_VBUS_INT_EN_HI_CLR_VADP_SNS                  0x20
-#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VADP_SNS_SHIFT            5
+#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VADP_SNS_SHIFT            0x05
 #define PALMAS_USB_VBUS_INT_EN_HI_CLR_ADP                       0x10
-#define PALMAS_USB_VBUS_INT_EN_HI_CLR_ADP_SHIFT                 4
+#define PALMAS_USB_VBUS_INT_EN_HI_CLR_ADP_SHIFT                 0x04
 #define PALMAS_USB_VBUS_INT_EN_HI_CLR_VA_VBUS_VLD               0x08
-#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VA_VBUS_VLD_SHIFT         3
+#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VA_VBUS_VLD_SHIFT         0x03
 #define PALMAS_USB_VBUS_INT_EN_HI_CLR_VA_SESS_VLD               0x04
-#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VA_SESS_VLD_SHIFT         2
+#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VA_SESS_VLD_SHIFT         0x02
 #define PALMAS_USB_VBUS_INT_EN_HI_CLR_VB_SESS_VLD               0x02
-#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VB_SESS_VLD_SHIFT         1
+#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VB_SESS_VLD_SHIFT         0x01
 #define PALMAS_USB_VBUS_INT_EN_HI_CLR_VB_SESS_END               0x01
-#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VB_SESS_END_SHIFT         0
+#define PALMAS_USB_VBUS_INT_EN_HI_CLR_VB_SESS_END_SHIFT         0x00
 
 /* Bit definitions for USB_ID_INT_SRC */
 #define PALMAS_USB_ID_INT_SRC_ID_FLOAT                          0x10
-#define PALMAS_USB_ID_INT_SRC_ID_FLOAT_SHIFT                    4
+#define PALMAS_USB_ID_INT_SRC_ID_FLOAT_SHIFT                    0x04
 #define PALMAS_USB_ID_INT_SRC_ID_A                              0x08
-#define PALMAS_USB_ID_INT_SRC_ID_A_SHIFT                        3
+#define PALMAS_USB_ID_INT_SRC_ID_A_SHIFT                        0x03
 #define PALMAS_USB_ID_INT_SRC_ID_B                              0x04
-#define PALMAS_USB_ID_INT_SRC_ID_B_SHIFT                        2
+#define PALMAS_USB_ID_INT_SRC_ID_B_SHIFT                        0x02
 #define PALMAS_USB_ID_INT_SRC_ID_C                              0x02
-#define PALMAS_USB_ID_INT_SRC_ID_C_SHIFT                        1
+#define PALMAS_USB_ID_INT_SRC_ID_C_SHIFT                        0x01
 #define PALMAS_USB_ID_INT_SRC_ID_GND                            0x01
-#define PALMAS_USB_ID_INT_SRC_ID_GND_SHIFT                      0
+#define PALMAS_USB_ID_INT_SRC_ID_GND_SHIFT                      0x00
 
 /* Bit definitions for USB_ID_INT_LATCH_SET */
 #define PALMAS_USB_ID_INT_LATCH_SET_ID_FLOAT                    0x10
-#define PALMAS_USB_ID_INT_LATCH_SET_ID_FLOAT_SHIFT              4
+#define PALMAS_USB_ID_INT_LATCH_SET_ID_FLOAT_SHIFT              0x04
 #define PALMAS_USB_ID_INT_LATCH_SET_ID_A                        0x08
-#define PALMAS_USB_ID_INT_LATCH_SET_ID_A_SHIFT                  3
+#define PALMAS_USB_ID_INT_LATCH_SET_ID_A_SHIFT                  0x03
 #define PALMAS_USB_ID_INT_LATCH_SET_ID_B                        0x04
-#define PALMAS_USB_ID_INT_LATCH_SET_ID_B_SHIFT                  2
+#define PALMAS_USB_ID_INT_LATCH_SET_ID_B_SHIFT                  0x02
 #define PALMAS_USB_ID_INT_LATCH_SET_ID_C                        0x02
-#define PALMAS_USB_ID_INT_LATCH_SET_ID_C_SHIFT                  1
+#define PALMAS_USB_ID_INT_LATCH_SET_ID_C_SHIFT                  0x01
 #define PALMAS_USB_ID_INT_LATCH_SET_ID_GND                      0x01
-#define PALMAS_USB_ID_INT_LATCH_SET_ID_GND_SHIFT                0
+#define PALMAS_USB_ID_INT_LATCH_SET_ID_GND_SHIFT                0x00
 
 /* Bit definitions for USB_ID_INT_LATCH_CLR */
 #define PALMAS_USB_ID_INT_LATCH_CLR_ID_FLOAT                    0x10
-#define PALMAS_USB_ID_INT_LATCH_CLR_ID_FLOAT_SHIFT              4
+#define PALMAS_USB_ID_INT_LATCH_CLR_ID_FLOAT_SHIFT              0x04
 #define PALMAS_USB_ID_INT_LATCH_CLR_ID_A                        0x08
-#define PALMAS_USB_ID_INT_LATCH_CLR_ID_A_SHIFT                  3
+#define PALMAS_USB_ID_INT_LATCH_CLR_ID_A_SHIFT                  0x03
 #define PALMAS_USB_ID_INT_LATCH_CLR_ID_B                        0x04
-#define PALMAS_USB_ID_INT_LATCH_CLR_ID_B_SHIFT                  2
+#define PALMAS_USB_ID_INT_LATCH_CLR_ID_B_SHIFT                  0x02
 #define PALMAS_USB_ID_INT_LATCH_CLR_ID_C                        0x02
-#define PALMAS_USB_ID_INT_LATCH_CLR_ID_C_SHIFT                  1
+#define PALMAS_USB_ID_INT_LATCH_CLR_ID_C_SHIFT                  0x01
 #define PALMAS_USB_ID_INT_LATCH_CLR_ID_GND                      0x01
-#define PALMAS_USB_ID_INT_LATCH_CLR_ID_GND_SHIFT                0
+#define PALMAS_USB_ID_INT_LATCH_CLR_ID_GND_SHIFT                0x00
 
 /* Bit definitions for USB_ID_INT_EN_LO_SET */
 #define PALMAS_USB_ID_INT_EN_LO_SET_ID_FLOAT                    0x10
-#define PALMAS_USB_ID_INT_EN_LO_SET_ID_FLOAT_SHIFT              4
+#define PALMAS_USB_ID_INT_EN_LO_SET_ID_FLOAT_SHIFT              0x04
 #define PALMAS_USB_ID_INT_EN_LO_SET_ID_A                        0x08
-#define PALMAS_USB_ID_INT_EN_LO_SET_ID_A_SHIFT                  3
+#define PALMAS_USB_ID_INT_EN_LO_SET_ID_A_SHIFT                  0x03
 #define PALMAS_USB_ID_INT_EN_LO_SET_ID_B                        0x04
-#define PALMAS_USB_ID_INT_EN_LO_SET_ID_B_SHIFT                  2
+#define PALMAS_USB_ID_INT_EN_LO_SET_ID_B_SHIFT                  0x02
 #define PALMAS_USB_ID_INT_EN_LO_SET_ID_C                        0x02
-#define PALMAS_USB_ID_INT_EN_LO_SET_ID_C_SHIFT                  1
+#define PALMAS_USB_ID_INT_EN_LO_SET_ID_C_SHIFT                  0x01
 #define PALMAS_USB_ID_INT_EN_LO_SET_ID_GND                      0x01
-#define PALMAS_USB_ID_INT_EN_LO_SET_ID_GND_SHIFT                0
+#define PALMAS_USB_ID_INT_EN_LO_SET_ID_GND_SHIFT                0x00
 
 /* Bit definitions for USB_ID_INT_EN_LO_CLR */
 #define PALMAS_USB_ID_INT_EN_LO_CLR_ID_FLOAT                    0x10
-#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_FLOAT_SHIFT              4
+#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_FLOAT_SHIFT              0x04
 #define PALMAS_USB_ID_INT_EN_LO_CLR_ID_A                        0x08
-#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_A_SHIFT                  3
+#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_A_SHIFT                  0x03
 #define PALMAS_USB_ID_INT_EN_LO_CLR_ID_B                        0x04
-#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_B_SHIFT                  2
+#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_B_SHIFT                  0x02
 #define PALMAS_USB_ID_INT_EN_LO_CLR_ID_C                        0x02
-#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_C_SHIFT                  1
+#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_C_SHIFT                  0x01
 #define PALMAS_USB_ID_INT_EN_LO_CLR_ID_GND                      0x01
-#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_GND_SHIFT                0
+#define PALMAS_USB_ID_INT_EN_LO_CLR_ID_GND_SHIFT                0x00
 
 /* Bit definitions for USB_ID_INT_EN_HI_SET */
 #define PALMAS_USB_ID_INT_EN_HI_SET_ID_FLOAT                    0x10
-#define PALMAS_USB_ID_INT_EN_HI_SET_ID_FLOAT_SHIFT              4
+#define PALMAS_USB_ID_INT_EN_HI_SET_ID_FLOAT_SHIFT              0x04
 #define PALMAS_USB_ID_INT_EN_HI_SET_ID_A                        0x08
-#define PALMAS_USB_ID_INT_EN_HI_SET_ID_A_SHIFT                  3
+#define PALMAS_USB_ID_INT_EN_HI_SET_ID_A_SHIFT                  0x03
 #define PALMAS_USB_ID_INT_EN_HI_SET_ID_B                        0x04
-#define PALMAS_USB_ID_INT_EN_HI_SET_ID_B_SHIFT                  2
+#define PALMAS_USB_ID_INT_EN_HI_SET_ID_B_SHIFT                  0x02
 #define PALMAS_USB_ID_INT_EN_HI_SET_ID_C                        0x02
-#define PALMAS_USB_ID_INT_EN_HI_SET_ID_C_SHIFT                  1
+#define PALMAS_USB_ID_INT_EN_HI_SET_ID_C_SHIFT                  0x01
 #define PALMAS_USB_ID_INT_EN_HI_SET_ID_GND                      0x01
-#define PALMAS_USB_ID_INT_EN_HI_SET_ID_GND_SHIFT                0
+#define PALMAS_USB_ID_INT_EN_HI_SET_ID_GND_SHIFT                0x00
 
 /* Bit definitions for USB_ID_INT_EN_HI_CLR */
 #define PALMAS_USB_ID_INT_EN_HI_CLR_ID_FLOAT                    0x10
-#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_FLOAT_SHIFT              4
+#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_FLOAT_SHIFT              0x04
 #define PALMAS_USB_ID_INT_EN_HI_CLR_ID_A                        0x08
-#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_A_SHIFT                  3
+#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_A_SHIFT                  0x03
 #define PALMAS_USB_ID_INT_EN_HI_CLR_ID_B                        0x04
-#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_B_SHIFT                  2
+#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_B_SHIFT                  0x02
 #define PALMAS_USB_ID_INT_EN_HI_CLR_ID_C                        0x02
-#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_C_SHIFT                  1
+#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_C_SHIFT                  0x01
 #define PALMAS_USB_ID_INT_EN_HI_CLR_ID_GND                      0x01
-#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_GND_SHIFT                0
+#define PALMAS_USB_ID_INT_EN_HI_CLR_ID_GND_SHIFT                0x00
 
 /* Bit definitions for USB_OTG_ADP_CTRL */
 #define PALMAS_USB_OTG_ADP_CTRL_ADP_EN                          0x04
-#define PALMAS_USB_OTG_ADP_CTRL_ADP_EN_SHIFT                    2
+#define PALMAS_USB_OTG_ADP_CTRL_ADP_EN_SHIFT                    0x02
 #define PALMAS_USB_OTG_ADP_CTRL_ADP_MODE_MASK                   0x03
-#define PALMAS_USB_OTG_ADP_CTRL_ADP_MODE_SHIFT                  0
+#define PALMAS_USB_OTG_ADP_CTRL_ADP_MODE_SHIFT                  0x00
 
 /* Bit definitions for USB_OTG_ADP_HIGH */
-#define PALMAS_USB_OTG_ADP_HIGH_T_ADP_HIGH_MASK                 0xff
-#define PALMAS_USB_OTG_ADP_HIGH_T_ADP_HIGH_SHIFT                0
+#define PALMAS_USB_OTG_ADP_HIGH_T_ADP_HIGH_MASK                 0xFF
+#define PALMAS_USB_OTG_ADP_HIGH_T_ADP_HIGH_SHIFT                0x00
 
 /* Bit definitions for USB_OTG_ADP_LOW */
-#define PALMAS_USB_OTG_ADP_LOW_T_ADP_LOW_MASK                   0xff
-#define PALMAS_USB_OTG_ADP_LOW_T_ADP_LOW_SHIFT                  0
+#define PALMAS_USB_OTG_ADP_LOW_T_ADP_LOW_MASK                   0xFF
+#define PALMAS_USB_OTG_ADP_LOW_T_ADP_LOW_SHIFT                  0x00
 
 /* Bit definitions for USB_OTG_ADP_RISE */
-#define PALMAS_USB_OTG_ADP_RISE_T_ADP_RISE_MASK                 0xff
-#define PALMAS_USB_OTG_ADP_RISE_T_ADP_RISE_SHIFT                0
+#define PALMAS_USB_OTG_ADP_RISE_T_ADP_RISE_MASK                 0xFF
+#define PALMAS_USB_OTG_ADP_RISE_T_ADP_RISE_SHIFT                0x00
 
 /* Bit definitions for USB_OTG_REVISION */
 #define PALMAS_USB_OTG_REVISION_OTG_REV                         0x01
-#define PALMAS_USB_OTG_REVISION_OTG_REV_SHIFT                   0
+#define PALMAS_USB_OTG_REVISION_OTG_REV_SHIFT                   0x00
 
 /* Registers for function VIBRATOR */
-#define PALMAS_VIBRA_CTRL                                       0x0
+#define PALMAS_VIBRA_CTRL                                       0x00
 
 /* Bit definitions for VIBRA_CTRL */
 #define PALMAS_VIBRA_CTRL_PWM_DUTY_SEL_MASK                     0x06
-#define PALMAS_VIBRA_CTRL_PWM_DUTY_SEL_SHIFT                    1
+#define PALMAS_VIBRA_CTRL_PWM_DUTY_SEL_SHIFT                    0x01
 #define PALMAS_VIBRA_CTRL_PWM_FREQ_SEL                          0x01
-#define PALMAS_VIBRA_CTRL_PWM_FREQ_SEL_SHIFT                    0
+#define PALMAS_VIBRA_CTRL_PWM_FREQ_SEL_SHIFT                    0x00
 
 /* Registers for function GPIO */
-#define PALMAS_GPIO_DATA_IN                                     0x0
-#define PALMAS_GPIO_DATA_DIR                                    0x1
-#define PALMAS_GPIO_DATA_OUT                                    0x2
-#define PALMAS_GPIO_DEBOUNCE_EN                                 0x3
-#define PALMAS_GPIO_CLEAR_DATA_OUT                              0x4
-#define PALMAS_GPIO_SET_DATA_OUT                                0x5
-#define PALMAS_PU_PD_GPIO_CTRL1                                 0x6
-#define PALMAS_PU_PD_GPIO_CTRL2                                 0x7
-#define PALMAS_OD_OUTPUT_GPIO_CTRL                              0x8
-#define PALMAS_GPIO_DATA_IN2                                    0x9
+#define PALMAS_GPIO_DATA_IN                                     0x00
+#define PALMAS_GPIO_DATA_DIR                                    0x01
+#define PALMAS_GPIO_DATA_OUT                                    0x02
+#define PALMAS_GPIO_DEBOUNCE_EN                                 0x03
+#define PALMAS_GPIO_CLEAR_DATA_OUT                              0x04
+#define PALMAS_GPIO_SET_DATA_OUT                                0x05
+#define PALMAS_PU_PD_GPIO_CTRL1                                 0x06
+#define PALMAS_PU_PD_GPIO_CTRL2                                 0x07
+#define PALMAS_OD_OUTPUT_GPIO_CTRL                              0x08
+#define PALMAS_GPIO_DATA_IN2                                    0x09
 #define PALMAS_GPIO_DATA_DIR2                                   0x0A
 #define PALMAS_GPIO_DATA_OUT2                                   0x0B
 #define PALMAS_GPIO_DEBOUNCE_EN2                                0x0C
@@ -2561,167 +2561,167 @@ enum usb_irq_events {
 
 /* Bit definitions for GPIO_DATA_IN */
 #define PALMAS_GPIO_DATA_IN_GPIO_7_IN                           0x80
-#define PALMAS_GPIO_DATA_IN_GPIO_7_IN_SHIFT                     7
+#define PALMAS_GPIO_DATA_IN_GPIO_7_IN_SHIFT                     0x07
 #define PALMAS_GPIO_DATA_IN_GPIO_6_IN                           0x40
-#define PALMAS_GPIO_DATA_IN_GPIO_6_IN_SHIFT                     6
+#define PALMAS_GPIO_DATA_IN_GPIO_6_IN_SHIFT                     0x06
 #define PALMAS_GPIO_DATA_IN_GPIO_5_IN                           0x20
-#define PALMAS_GPIO_DATA_IN_GPIO_5_IN_SHIFT                     5
+#define PALMAS_GPIO_DATA_IN_GPIO_5_IN_SHIFT                     0x05
 #define PALMAS_GPIO_DATA_IN_GPIO_4_IN                           0x10
-#define PALMAS_GPIO_DATA_IN_GPIO_4_IN_SHIFT                     4
+#define PALMAS_GPIO_DATA_IN_GPIO_4_IN_SHIFT                     0x04
 #define PALMAS_GPIO_DATA_IN_GPIO_3_IN                           0x08
-#define PALMAS_GPIO_DATA_IN_GPIO_3_IN_SHIFT                     3
+#define PALMAS_GPIO_DATA_IN_GPIO_3_IN_SHIFT                     0x03
 #define PALMAS_GPIO_DATA_IN_GPIO_2_IN                           0x04
-#define PALMAS_GPIO_DATA_IN_GPIO_2_IN_SHIFT                     2
+#define PALMAS_GPIO_DATA_IN_GPIO_2_IN_SHIFT                     0x02
 #define PALMAS_GPIO_DATA_IN_GPIO_1_IN                           0x02
-#define PALMAS_GPIO_DATA_IN_GPIO_1_IN_SHIFT                     1
+#define PALMAS_GPIO_DATA_IN_GPIO_1_IN_SHIFT                     0x01
 #define PALMAS_GPIO_DATA_IN_GPIO_0_IN                           0x01
-#define PALMAS_GPIO_DATA_IN_GPIO_0_IN_SHIFT                     0
+#define PALMAS_GPIO_DATA_IN_GPIO_0_IN_SHIFT                     0x00
 
 /* Bit definitions for GPIO_DATA_DIR */
 #define PALMAS_GPIO_DATA_DIR_GPIO_7_DIR                         0x80
-#define PALMAS_GPIO_DATA_DIR_GPIO_7_DIR_SHIFT                   7
+#define PALMAS_GPIO_DATA_DIR_GPIO_7_DIR_SHIFT                   0x07
 #define PALMAS_GPIO_DATA_DIR_GPIO_6_DIR                         0x40
-#define PALMAS_GPIO_DATA_DIR_GPIO_6_DIR_SHIFT                   6
+#define PALMAS_GPIO_DATA_DIR_GPIO_6_DIR_SHIFT                   0x06
 #define PALMAS_GPIO_DATA_DIR_GPIO_5_DIR                         0x20
-#define PALMAS_GPIO_DATA_DIR_GPIO_5_DIR_SHIFT                   5
+#define PALMAS_GPIO_DATA_DIR_GPIO_5_DIR_SHIFT                   0x05
 #define PALMAS_GPIO_DATA_DIR_GPIO_4_DIR                         0x10
-#define PALMAS_GPIO_DATA_DIR_GPIO_4_DIR_SHIFT                   4
+#define PALMAS_GPIO_DATA_DIR_GPIO_4_DIR_SHIFT                   0x04
 #define PALMAS_GPIO_DATA_DIR_GPIO_3_DIR                         0x08
-#define PALMAS_GPIO_DATA_DIR_GPIO_3_DIR_SHIFT                   3
+#define PALMAS_GPIO_DATA_DIR_GPIO_3_DIR_SHIFT                   0x03
 #define PALMAS_GPIO_DATA_DIR_GPIO_2_DIR                         0x04
-#define PALMAS_GPIO_DATA_DIR_GPIO_2_DIR_SHIFT                   2
+#define PALMAS_GPIO_DATA_DIR_GPIO_2_DIR_SHIFT                   0x02
 #define PALMAS_GPIO_DATA_DIR_GPIO_1_DIR                         0x02
-#define PALMAS_GPIO_DATA_DIR_GPIO_1_DIR_SHIFT                   1
+#define PALMAS_GPIO_DATA_DIR_GPIO_1_DIR_SHIFT                   0x01
 #define PALMAS_GPIO_DATA_DIR_GPIO_0_DIR                         0x01
-#define PALMAS_GPIO_DATA_DIR_GPIO_0_DIR_SHIFT                   0
+#define PALMAS_GPIO_DATA_DIR_GPIO_0_DIR_SHIFT                   0x00
 
 /* Bit definitions for GPIO_DATA_OUT */
 #define PALMAS_GPIO_DATA_OUT_GPIO_7_OUT                         0x80
-#define PALMAS_GPIO_DATA_OUT_GPIO_7_OUT_SHIFT                   7
+#define PALMAS_GPIO_DATA_OUT_GPIO_7_OUT_SHIFT                   0x07
 #define PALMAS_GPIO_DATA_OUT_GPIO_6_OUT                         0x40
-#define PALMAS_GPIO_DATA_OUT_GPIO_6_OUT_SHIFT                   6
+#define PALMAS_GPIO_DATA_OUT_GPIO_6_OUT_SHIFT                   0x06
 #define PALMAS_GPIO_DATA_OUT_GPIO_5_OUT                         0x20
-#define PALMAS_GPIO_DATA_OUT_GPIO_5_OUT_SHIFT                   5
+#define PALMAS_GPIO_DATA_OUT_GPIO_5_OUT_SHIFT                   0x05
 #define PALMAS_GPIO_DATA_OUT_GPIO_4_OUT                         0x10
-#define PALMAS_GPIO_DATA_OUT_GPIO_4_OUT_SHIFT                   4
+#define PALMAS_GPIO_DATA_OUT_GPIO_4_OUT_SHIFT                   0x04
 #define PALMAS_GPIO_DATA_OUT_GPIO_3_OUT                         0x08
-#define PALMAS_GPIO_DATA_OUT_GPIO_3_OUT_SHIFT                   3
+#define PALMAS_GPIO_DATA_OUT_GPIO_3_OUT_SHIFT                   0x03
 #define PALMAS_GPIO_DATA_OUT_GPIO_2_OUT                         0x04
-#define PALMAS_GPIO_DATA_OUT_GPIO_2_OUT_SHIFT                   2
+#define PALMAS_GPIO_DATA_OUT_GPIO_2_OUT_SHIFT                   0x02
 #define PALMAS_GPIO_DATA_OUT_GPIO_1_OUT                         0x02
-#define PALMAS_GPIO_DATA_OUT_GPIO_1_OUT_SHIFT                   1
+#define PALMAS_GPIO_DATA_OUT_GPIO_1_OUT_SHIFT                   0x01
 #define PALMAS_GPIO_DATA_OUT_GPIO_0_OUT                         0x01
-#define PALMAS_GPIO_DATA_OUT_GPIO_0_OUT_SHIFT                   0
+#define PALMAS_GPIO_DATA_OUT_GPIO_0_OUT_SHIFT                   0x00
 
 /* Bit definitions for GPIO_DEBOUNCE_EN */
 #define PALMAS_GPIO_DEBOUNCE_EN_GPIO_7_DEBOUNCE_EN              0x80
-#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_7_DEBOUNCE_EN_SHIFT        7
+#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_7_DEBOUNCE_EN_SHIFT        0x07
 #define PALMAS_GPIO_DEBOUNCE_EN_GPIO_6_DEBOUNCE_EN              0x40
-#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_6_DEBOUNCE_EN_SHIFT        6
+#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_6_DEBOUNCE_EN_SHIFT        0x06
 #define PALMAS_GPIO_DEBOUNCE_EN_GPIO_5_DEBOUNCE_EN              0x20
-#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_5_DEBOUNCE_EN_SHIFT        5
+#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_5_DEBOUNCE_EN_SHIFT        0x05
 #define PALMAS_GPIO_DEBOUNCE_EN_GPIO_4_DEBOUNCE_EN              0x10
-#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_4_DEBOUNCE_EN_SHIFT        4
+#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_4_DEBOUNCE_EN_SHIFT        0x04
 #define PALMAS_GPIO_DEBOUNCE_EN_GPIO_3_DEBOUNCE_EN              0x08
-#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_3_DEBOUNCE_EN_SHIFT        3
+#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_3_DEBOUNCE_EN_SHIFT        0x03
 #define PALMAS_GPIO_DEBOUNCE_EN_GPIO_2_DEBOUNCE_EN              0x04
-#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_2_DEBOUNCE_EN_SHIFT        2
+#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_2_DEBOUNCE_EN_SHIFT        0x02
 #define PALMAS_GPIO_DEBOUNCE_EN_GPIO_1_DEBOUNCE_EN              0x02
-#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_1_DEBOUNCE_EN_SHIFT        1
+#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_1_DEBOUNCE_EN_SHIFT        0x01
 #define PALMAS_GPIO_DEBOUNCE_EN_GPIO_0_DEBOUNCE_EN              0x01
-#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_0_DEBOUNCE_EN_SHIFT        0
+#define PALMAS_GPIO_DEBOUNCE_EN_GPIO_0_DEBOUNCE_EN_SHIFT        0x00
 
 /* Bit definitions for GPIO_CLEAR_DATA_OUT */
 #define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_7_CLEAR_DATA_OUT        0x80
-#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_7_CLEAR_DATA_OUT_SHIFT  7
+#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_7_CLEAR_DATA_OUT_SHIFT  0x07
 #define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_6_CLEAR_DATA_OUT        0x40
-#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_6_CLEAR_DATA_OUT_SHIFT  6
+#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_6_CLEAR_DATA_OUT_SHIFT  0x06
 #define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_5_CLEAR_DATA_OUT        0x20
-#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_5_CLEAR_DATA_OUT_SHIFT  5
+#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_5_CLEAR_DATA_OUT_SHIFT  0x05
 #define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_4_CLEAR_DATA_OUT        0x10
-#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_4_CLEAR_DATA_OUT_SHIFT  4
+#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_4_CLEAR_DATA_OUT_SHIFT  0x04
 #define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_3_CLEAR_DATA_OUT        0x08
-#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_3_CLEAR_DATA_OUT_SHIFT  3
+#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_3_CLEAR_DATA_OUT_SHIFT  0x03
 #define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_2_CLEAR_DATA_OUT        0x04
-#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_2_CLEAR_DATA_OUT_SHIFT  2
+#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_2_CLEAR_DATA_OUT_SHIFT  0x02
 #define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_1_CLEAR_DATA_OUT        0x02
-#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_1_CLEAR_DATA_OUT_SHIFT  1
+#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_1_CLEAR_DATA_OUT_SHIFT  0x01
 #define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_0_CLEAR_DATA_OUT        0x01
-#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_0_CLEAR_DATA_OUT_SHIFT  0
+#define PALMAS_GPIO_CLEAR_DATA_OUT_GPIO_0_CLEAR_DATA_OUT_SHIFT  0x00
 
 /* Bit definitions for GPIO_SET_DATA_OUT */
 #define PALMAS_GPIO_SET_DATA_OUT_GPIO_7_SET_DATA_OUT            0x80
-#define PALMAS_GPIO_SET_DATA_OUT_GPIO_7_SET_DATA_OUT_SHIFT      7
+#define PALMAS_GPIO_SET_DATA_OUT_GPIO_7_SET_DATA_OUT_SHIFT      0x07
 #define PALMAS_GPIO_SET_DATA_OUT_GPIO_6_SET_DATA_OUT            0x40
-#define PALMAS_GPIO_SET_DATA_OUT_GPIO_6_SET_DATA_OUT_SHIFT      6
+#define PALMAS_GPIO_SET_DATA_OUT_GPIO_6_SET_DATA_OUT_SHIFT      0x06
 #define PALMAS_GPIO_SET_DATA_OUT_GPIO_5_SET_DATA_OUT            0x20
-#define PALMAS_GPIO_SET_DATA_OUT_GPIO_5_SET_DATA_OUT_SHIFT      5
+#define PALMAS_GPIO_SET_DATA_OUT_GPIO_5_SET_DATA_OUT_SHIFT      0x05
 #define PALMAS_GPIO_SET_DATA_OUT_GPIO_4_SET_DATA_OUT            0x10
-#define PALMAS_GPIO_SET_DATA_OUT_GPIO_4_SET_DATA_OUT_SHIFT      4
+#define PALMAS_GPIO_SET_DATA_OUT_GPIO_4_SET_DATA_OUT_SHIFT      0x04
 #define PALMAS_GPIO_SET_DATA_OUT_GPIO_3_SET_DATA_OUT            0x08
-#define PALMAS_GPIO_SET_DATA_OUT_GPIO_3_SET_DATA_OUT_SHIFT      3
+#define PALMAS_GPIO_SET_DATA_OUT_GPIO_3_SET_DATA_OUT_SHIFT      0x03
 #define PALMAS_GPIO_SET_DATA_OUT_GPIO_2_SET_DATA_OUT            0x04
-#define PALMAS_GPIO_SET_DATA_OUT_GPIO_2_SET_DATA_OUT_SHIFT      2
+#define PALMAS_GPIO_SET_DATA_OUT_GPIO_2_SET_DATA_OUT_SHIFT      0x02
 #define PALMAS_GPIO_SET_DATA_OUT_GPIO_1_SET_DATA_OUT            0x02
-#define PALMAS_GPIO_SET_DATA_OUT_GPIO_1_SET_DATA_OUT_SHIFT      1
+#define PALMAS_GPIO_SET_DATA_OUT_GPIO_1_SET_DATA_OUT_SHIFT      0x01
 #define PALMAS_GPIO_SET_DATA_OUT_GPIO_0_SET_DATA_OUT            0x01
-#define PALMAS_GPIO_SET_DATA_OUT_GPIO_0_SET_DATA_OUT_SHIFT      0
+#define PALMAS_GPIO_SET_DATA_OUT_GPIO_0_SET_DATA_OUT_SHIFT      0x00
 
 /* Bit definitions for PU_PD_GPIO_CTRL1 */
 #define PALMAS_PU_PD_GPIO_CTRL1_GPIO_3_PD                       0x40
-#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_3_PD_SHIFT                 6
+#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_3_PD_SHIFT                 0x06
 #define PALMAS_PU_PD_GPIO_CTRL1_GPIO_2_PU                       0x20
-#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_2_PU_SHIFT                 5
+#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_2_PU_SHIFT                 0x05
 #define PALMAS_PU_PD_GPIO_CTRL1_GPIO_2_PD                       0x10
-#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_2_PD_SHIFT                 4
+#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_2_PD_SHIFT                 0x04
 #define PALMAS_PU_PD_GPIO_CTRL1_GPIO_1_PU                       0x08
-#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_1_PU_SHIFT                 3
+#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_1_PU_SHIFT                 0x03
 #define PALMAS_PU_PD_GPIO_CTRL1_GPIO_1_PD                       0x04
-#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_1_PD_SHIFT                 2
+#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_1_PD_SHIFT                 0x02
 #define PALMAS_PU_PD_GPIO_CTRL1_GPIO_0_PD                       0x01
-#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_0_PD_SHIFT                 0
+#define PALMAS_PU_PD_GPIO_CTRL1_GPIO_0_PD_SHIFT                 0x00
 
 /* Bit definitions for PU_PD_GPIO_CTRL2 */
 #define PALMAS_PU_PD_GPIO_CTRL2_GPIO_7_PD                       0x40
-#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_7_PD_SHIFT                 6
+#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_7_PD_SHIFT                 0x06
 #define PALMAS_PU_PD_GPIO_CTRL2_GPIO_6_PU                       0x20
-#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_6_PU_SHIFT                 5
+#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_6_PU_SHIFT                 0x05
 #define PALMAS_PU_PD_GPIO_CTRL2_GPIO_6_PD                       0x10
-#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_6_PD_SHIFT                 4
+#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_6_PD_SHIFT                 0x04
 #define PALMAS_PU_PD_GPIO_CTRL2_GPIO_5_PU                       0x08
-#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_5_PU_SHIFT                 3
+#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_5_PU_SHIFT                 0x03
 #define PALMAS_PU_PD_GPIO_CTRL2_GPIO_5_PD                       0x04
-#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_5_PD_SHIFT                 2
+#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_5_PD_SHIFT                 0x02
 #define PALMAS_PU_PD_GPIO_CTRL2_GPIO_4_PU                       0x02
-#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_4_PU_SHIFT                 1
+#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_4_PU_SHIFT                 0x01
 #define PALMAS_PU_PD_GPIO_CTRL2_GPIO_4_PD                       0x01
-#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_4_PD_SHIFT                 0
+#define PALMAS_PU_PD_GPIO_CTRL2_GPIO_4_PD_SHIFT                 0x00
 
 /* Bit definitions for OD_OUTPUT_GPIO_CTRL */
 #define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_5_OD                    0x20
-#define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_5_OD_SHIFT              5
+#define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_5_OD_SHIFT              0x05
 #define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_2_OD                    0x04
-#define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_2_OD_SHIFT              2
+#define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_2_OD_SHIFT              0x02
 #define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_1_OD                    0x02
-#define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_1_OD_SHIFT              1
+#define PALMAS_OD_OUTPUT_GPIO_CTRL_GPIO_1_OD_SHIFT              0x01
 
 /* Registers for function GPADC */
-#define PALMAS_GPADC_CTRL1                                      0x0
-#define PALMAS_GPADC_CTRL2                                      0x1
-#define PALMAS_GPADC_RT_CTRL                                    0x2
-#define PALMAS_GPADC_AUTO_CTRL                                  0x3
-#define PALMAS_GPADC_STATUS                                     0x4
-#define PALMAS_GPADC_RT_SELECT                                  0x5
-#define PALMAS_GPADC_RT_CONV0_LSB                               0x6
-#define PALMAS_GPADC_RT_CONV0_MSB                               0x7
-#define PALMAS_GPADC_AUTO_SELECT                                0x8
-#define PALMAS_GPADC_AUTO_CONV0_LSB                             0x9
-#define PALMAS_GPADC_AUTO_CONV0_MSB                             0xA
-#define PALMAS_GPADC_AUTO_CONV1_LSB                             0xB
-#define PALMAS_GPADC_AUTO_CONV1_MSB                             0xC
-#define PALMAS_GPADC_SW_SELECT                                  0xD
-#define PALMAS_GPADC_SW_CONV0_LSB                               0xE
-#define PALMAS_GPADC_SW_CONV0_MSB                               0xF
+#define PALMAS_GPADC_CTRL1                                      0x00
+#define PALMAS_GPADC_CTRL2                                      0x01
+#define PALMAS_GPADC_RT_CTRL                                    0x02
+#define PALMAS_GPADC_AUTO_CTRL                                  0x03
+#define PALMAS_GPADC_STATUS                                     0x04
+#define PALMAS_GPADC_RT_SELECT                                  0x05
+#define PALMAS_GPADC_RT_CONV0_LSB                               0x06
+#define PALMAS_GPADC_RT_CONV0_MSB                               0x07
+#define PALMAS_GPADC_AUTO_SELECT                                0x08
+#define PALMAS_GPADC_AUTO_CONV0_LSB                             0x09
+#define PALMAS_GPADC_AUTO_CONV0_MSB                             0x0A
+#define PALMAS_GPADC_AUTO_CONV1_LSB                             0x0B
+#define PALMAS_GPADC_AUTO_CONV1_MSB                             0x0C
+#define PALMAS_GPADC_SW_SELECT                                  0x0D
+#define PALMAS_GPADC_SW_CONV0_LSB                               0x0E
+#define PALMAS_GPADC_SW_CONV0_MSB                               0x0F
 #define PALMAS_GPADC_THRES_CONV0_LSB                            0x10
 #define PALMAS_GPADC_THRES_CONV0_MSB                            0x11
 #define PALMAS_GPADC_THRES_CONV1_LSB                            0x12
@@ -2731,150 +2731,150 @@ enum usb_irq_events {
 
 /* Bit definitions for GPADC_CTRL1 */
 #define PALMAS_GPADC_CTRL1_RESERVED_MASK                        0xc0
-#define PALMAS_GPADC_CTRL1_RESERVED_SHIFT                       6
+#define PALMAS_GPADC_CTRL1_RESERVED_SHIFT                       0x06
 #define PALMAS_GPADC_CTRL1_CURRENT_SRC_CH3_MASK                 0x30
-#define PALMAS_GPADC_CTRL1_CURRENT_SRC_CH3_SHIFT                4
+#define PALMAS_GPADC_CTRL1_CURRENT_SRC_CH3_SHIFT                0x04
 #define PALMAS_GPADC_CTRL1_CURRENT_SRC_CH0_MASK                 0x0c
-#define PALMAS_GPADC_CTRL1_CURRENT_SRC_CH0_SHIFT                2
+#define PALMAS_GPADC_CTRL1_CURRENT_SRC_CH0_SHIFT                0x02
 #define PALMAS_GPADC_CTRL1_BAT_REMOVAL_DET                      0x02
-#define PALMAS_GPADC_CTRL1_BAT_REMOVAL_DET_SHIFT                1
+#define PALMAS_GPADC_CTRL1_BAT_REMOVAL_DET_SHIFT                0x01
 #define PALMAS_GPADC_CTRL1_GPADC_FORCE                          0x01
-#define PALMAS_GPADC_CTRL1_GPADC_FORCE_SHIFT                    0
+#define PALMAS_GPADC_CTRL1_GPADC_FORCE_SHIFT                    0x00
 
 /* Bit definitions for GPADC_CTRL2 */
 #define PALMAS_GPADC_CTRL2_RESERVED_MASK                        0x06
-#define PALMAS_GPADC_CTRL2_RESERVED_SHIFT                       1
+#define PALMAS_GPADC_CTRL2_RESERVED_SHIFT                       0x01
 
 /* Bit definitions for GPADC_RT_CTRL */
 #define PALMAS_GPADC_RT_CTRL_EXTEND_DELAY                       0x02
-#define PALMAS_GPADC_RT_CTRL_EXTEND_DELAY_SHIFT                 1
+#define PALMAS_GPADC_RT_CTRL_EXTEND_DELAY_SHIFT                 0x01
 #define PALMAS_GPADC_RT_CTRL_START_POLARITY                     0x01
-#define PALMAS_GPADC_RT_CTRL_START_POLARITY_SHIFT               0
+#define PALMAS_GPADC_RT_CTRL_START_POLARITY_SHIFT               0x00
 
 /* Bit definitions for GPADC_AUTO_CTRL */
 #define PALMAS_GPADC_AUTO_CTRL_SHUTDOWN_CONV1                   0x80
-#define PALMAS_GPADC_AUTO_CTRL_SHUTDOWN_CONV1_SHIFT             7
+#define PALMAS_GPADC_AUTO_CTRL_SHUTDOWN_CONV1_SHIFT             0x07
 #define PALMAS_GPADC_AUTO_CTRL_SHUTDOWN_CONV0                   0x40
-#define PALMAS_GPADC_AUTO_CTRL_SHUTDOWN_CONV0_SHIFT             6
+#define PALMAS_GPADC_AUTO_CTRL_SHUTDOWN_CONV0_SHIFT             0x06
 #define PALMAS_GPADC_AUTO_CTRL_AUTO_CONV1_EN                    0x20
-#define PALMAS_GPADC_AUTO_CTRL_AUTO_CONV1_EN_SHIFT              5
+#define PALMAS_GPADC_AUTO_CTRL_AUTO_CONV1_EN_SHIFT              0x05
 #define PALMAS_GPADC_AUTO_CTRL_AUTO_CONV0_EN                    0x10
-#define PALMAS_GPADC_AUTO_CTRL_AUTO_CONV0_EN_SHIFT              4
-#define PALMAS_GPADC_AUTO_CTRL_COUNTER_CONV_MASK                0x0f
-#define PALMAS_GPADC_AUTO_CTRL_COUNTER_CONV_SHIFT               0
+#define PALMAS_GPADC_AUTO_CTRL_AUTO_CONV0_EN_SHIFT              0x04
+#define PALMAS_GPADC_AUTO_CTRL_COUNTER_CONV_MASK                0x0F
+#define PALMAS_GPADC_AUTO_CTRL_COUNTER_CONV_SHIFT               0x00
 
 /* Bit definitions for GPADC_STATUS */
 #define PALMAS_GPADC_STATUS_GPADC_AVAILABLE                     0x10
-#define PALMAS_GPADC_STATUS_GPADC_AVAILABLE_SHIFT               4
+#define PALMAS_GPADC_STATUS_GPADC_AVAILABLE_SHIFT               0x04
 
 /* Bit definitions for GPADC_RT_SELECT */
 #define PALMAS_GPADC_RT_SELECT_RT_CONV_EN                       0x80
-#define PALMAS_GPADC_RT_SELECT_RT_CONV_EN_SHIFT                 7
-#define PALMAS_GPADC_RT_SELECT_RT_CONV0_SEL_MASK                0x0f
-#define PALMAS_GPADC_RT_SELECT_RT_CONV0_SEL_SHIFT               0
+#define PALMAS_GPADC_RT_SELECT_RT_CONV_EN_SHIFT                 0x07
+#define PALMAS_GPADC_RT_SELECT_RT_CONV0_SEL_MASK                0x0F
+#define PALMAS_GPADC_RT_SELECT_RT_CONV0_SEL_SHIFT               0x00
 
 /* Bit definitions for GPADC_RT_CONV0_LSB */
-#define PALMAS_GPADC_RT_CONV0_LSB_RT_CONV0_LSB_MASK             0xff
-#define PALMAS_GPADC_RT_CONV0_LSB_RT_CONV0_LSB_SHIFT            0
+#define PALMAS_GPADC_RT_CONV0_LSB_RT_CONV0_LSB_MASK             0xFF
+#define PALMAS_GPADC_RT_CONV0_LSB_RT_CONV0_LSB_SHIFT            0x00
 
 /* Bit definitions for GPADC_RT_CONV0_MSB */
-#define PALMAS_GPADC_RT_CONV0_MSB_RT_CONV0_MSB_MASK             0x0f
-#define PALMAS_GPADC_RT_CONV0_MSB_RT_CONV0_MSB_SHIFT            0
+#define PALMAS_GPADC_RT_CONV0_MSB_RT_CONV0_MSB_MASK             0x0F
+#define PALMAS_GPADC_RT_CONV0_MSB_RT_CONV0_MSB_SHIFT            0x00
 
 /* Bit definitions for GPADC_AUTO_SELECT */
-#define PALMAS_GPADC_AUTO_SELECT_AUTO_CONV1_SEL_MASK            0xf0
-#define PALMAS_GPADC_AUTO_SELECT_AUTO_CONV1_SEL_SHIFT           4
-#define PALMAS_GPADC_AUTO_SELECT_AUTO_CONV0_SEL_MASK            0x0f
-#define PALMAS_GPADC_AUTO_SELECT_AUTO_CONV0_SEL_SHIFT           0
+#define PALMAS_GPADC_AUTO_SELECT_AUTO_CONV1_SEL_MASK            0xF0
+#define PALMAS_GPADC_AUTO_SELECT_AUTO_CONV1_SEL_SHIFT           0x04
+#define PALMAS_GPADC_AUTO_SELECT_AUTO_CONV0_SEL_MASK            0x0F
+#define PALMAS_GPADC_AUTO_SELECT_AUTO_CONV0_SEL_SHIFT           0x00
 
 /* Bit definitions for GPADC_AUTO_CONV0_LSB */
-#define PALMAS_GPADC_AUTO_CONV0_LSB_AUTO_CONV0_LSB_MASK         0xff
-#define PALMAS_GPADC_AUTO_CONV0_LSB_AUTO_CONV0_LSB_SHIFT        0
+#define PALMAS_GPADC_AUTO_CONV0_LSB_AUTO_CONV0_LSB_MASK         0xFF
+#define PALMAS_GPADC_AUTO_CONV0_LSB_AUTO_CONV0_LSB_SHIFT        0x00
 
 /* Bit definitions for GPADC_AUTO_CONV0_MSB */
-#define PALMAS_GPADC_AUTO_CONV0_MSB_AUTO_CONV0_MSB_MASK         0x0f
-#define PALMAS_GPADC_AUTO_CONV0_MSB_AUTO_CONV0_MSB_SHIFT        0
+#define PALMAS_GPADC_AUTO_CONV0_MSB_AUTO_CONV0_MSB_MASK         0x0F
+#define PALMAS_GPADC_AUTO_CONV0_MSB_AUTO_CONV0_MSB_SHIFT        0x00
 
 /* Bit definitions for GPADC_AUTO_CONV1_LSB */
-#define PALMAS_GPADC_AUTO_CONV1_LSB_AUTO_CONV1_LSB_MASK         0xff
-#define PALMAS_GPADC_AUTO_CONV1_LSB_AUTO_CONV1_LSB_SHIFT        0
+#define PALMAS_GPADC_AUTO_CONV1_LSB_AUTO_CONV1_LSB_MASK         0xFF
+#define PALMAS_GPADC_AUTO_CONV1_LSB_AUTO_CONV1_LSB_SHIFT        0x00
 
 /* Bit definitions for GPADC_AUTO_CONV1_MSB */
-#define PALMAS_GPADC_AUTO_CONV1_MSB_AUTO_CONV1_MSB_MASK         0x0f
-#define PALMAS_GPADC_AUTO_CONV1_MSB_AUTO_CONV1_MSB_SHIFT        0
+#define PALMAS_GPADC_AUTO_CONV1_MSB_AUTO_CONV1_MSB_MASK         0x0F
+#define PALMAS_GPADC_AUTO_CONV1_MSB_AUTO_CONV1_MSB_SHIFT        0x00
 
 /* Bit definitions for GPADC_SW_SELECT */
 #define PALMAS_GPADC_SW_SELECT_SW_CONV_EN                       0x80
-#define PALMAS_GPADC_SW_SELECT_SW_CONV_EN_SHIFT                 7
+#define PALMAS_GPADC_SW_SELECT_SW_CONV_EN_SHIFT                 0x07
 #define PALMAS_GPADC_SW_SELECT_SW_START_CONV0                   0x10
-#define PALMAS_GPADC_SW_SELECT_SW_START_CONV0_SHIFT             4
-#define PALMAS_GPADC_SW_SELECT_SW_CONV0_SEL_MASK                0x0f
-#define PALMAS_GPADC_SW_SELECT_SW_CONV0_SEL_SHIFT               0
+#define PALMAS_GPADC_SW_SELECT_SW_START_CONV0_SHIFT             0x04
+#define PALMAS_GPADC_SW_SELECT_SW_CONV0_SEL_MASK                0x0F
+#define PALMAS_GPADC_SW_SELECT_SW_CONV0_SEL_SHIFT               0x00
 
 /* Bit definitions for GPADC_SW_CONV0_LSB */
-#define PALMAS_GPADC_SW_CONV0_LSB_SW_CONV0_LSB_MASK             0xff
-#define PALMAS_GPADC_SW_CONV0_LSB_SW_CONV0_LSB_SHIFT            0
+#define PALMAS_GPADC_SW_CONV0_LSB_SW_CONV0_LSB_MASK             0xFF
+#define PALMAS_GPADC_SW_CONV0_LSB_SW_CONV0_LSB_SHIFT            0x00
 
 /* Bit definitions for GPADC_SW_CONV0_MSB */
-#define PALMAS_GPADC_SW_CONV0_MSB_SW_CONV0_MSB_MASK             0x0f
-#define PALMAS_GPADC_SW_CONV0_MSB_SW_CONV0_MSB_SHIFT            0
+#define PALMAS_GPADC_SW_CONV0_MSB_SW_CONV0_MSB_MASK             0x0F
+#define PALMAS_GPADC_SW_CONV0_MSB_SW_CONV0_MSB_SHIFT            0x00
 
 /* Bit definitions for GPADC_THRES_CONV0_LSB */
-#define PALMAS_GPADC_THRES_CONV0_LSB_THRES_CONV0_LSB_MASK       0xff
-#define PALMAS_GPADC_THRES_CONV0_LSB_THRES_CONV0_LSB_SHIFT      0
+#define PALMAS_GPADC_THRES_CONV0_LSB_THRES_CONV0_LSB_MASK       0xFF
+#define PALMAS_GPADC_THRES_CONV0_LSB_THRES_CONV0_LSB_SHIFT      0x00
 
 /* Bit definitions for GPADC_THRES_CONV0_MSB */
 #define PALMAS_GPADC_THRES_CONV0_MSB_THRES_CONV0_POL            0x80
-#define PALMAS_GPADC_THRES_CONV0_MSB_THRES_CONV0_POL_SHIFT      7
-#define PALMAS_GPADC_THRES_CONV0_MSB_THRES_CONV0_MSB_MASK       0x0f
-#define PALMAS_GPADC_THRES_CONV0_MSB_THRES_CONV0_MSB_SHIFT      0
+#define PALMAS_GPADC_THRES_CONV0_MSB_THRES_CONV0_POL_SHIFT      0x07
+#define PALMAS_GPADC_THRES_CONV0_MSB_THRES_CONV0_MSB_MASK       0x0F
+#define PALMAS_GPADC_THRES_CONV0_MSB_THRES_CONV0_MSB_SHIFT      0x00
 
 /* Bit definitions for GPADC_THRES_CONV1_LSB */
-#define PALMAS_GPADC_THRES_CONV1_LSB_THRES_CONV1_LSB_MASK       0xff
-#define PALMAS_GPADC_THRES_CONV1_LSB_THRES_CONV1_LSB_SHIFT      0
+#define PALMAS_GPADC_THRES_CONV1_LSB_THRES_CONV1_LSB_MASK       0xFF
+#define PALMAS_GPADC_THRES_CONV1_LSB_THRES_CONV1_LSB_SHIFT      0x00
 
 /* Bit definitions for GPADC_THRES_CONV1_MSB */
 #define PALMAS_GPADC_THRES_CONV1_MSB_THRES_CONV1_POL            0x80
-#define PALMAS_GPADC_THRES_CONV1_MSB_THRES_CONV1_POL_SHIFT      7
-#define PALMAS_GPADC_THRES_CONV1_MSB_THRES_CONV1_MSB_MASK       0x0f
-#define PALMAS_GPADC_THRES_CONV1_MSB_THRES_CONV1_MSB_SHIFT      0
+#define PALMAS_GPADC_THRES_CONV1_MSB_THRES_CONV1_POL_SHIFT      0x07
+#define PALMAS_GPADC_THRES_CONV1_MSB_THRES_CONV1_MSB_MASK       0x0F
+#define PALMAS_GPADC_THRES_CONV1_MSB_THRES_CONV1_MSB_SHIFT      0x00
 
 /* Bit definitions for GPADC_SMPS_ILMONITOR_EN */
 #define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_EN            0x20
-#define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_EN_SHIFT      5
+#define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_EN_SHIFT      0x05
 #define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_REXT          0x10
-#define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_REXT_SHIFT    4
-#define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_SEL_MASK      0x0f
-#define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_SEL_SHIFT     0
+#define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_REXT_SHIFT    0x04
+#define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_SEL_MASK      0x0F
+#define PALMAS_GPADC_SMPS_ILMONITOR_EN_SMPS_ILMON_SEL_SHIFT     0x00
 
 /* Bit definitions for GPADC_SMPS_VSEL_MONITORING */
 #define PALMAS_GPADC_SMPS_VSEL_MONITORING_ACTIVE_PHASE          0x80
-#define PALMAS_GPADC_SMPS_VSEL_MONITORING_ACTIVE_PHASE_SHIFT    7
-#define PALMAS_GPADC_SMPS_VSEL_MONITORING_SMPS_VSEL_MONITORING_MASK     0x7f
-#define PALMAS_GPADC_SMPS_VSEL_MONITORING_SMPS_VSEL_MONITORING_SHIFT    0
+#define PALMAS_GPADC_SMPS_VSEL_MONITORING_ACTIVE_PHASE_SHIFT    0x07
+#define PALMAS_GPADC_SMPS_VSEL_MONITORING_SMPS_VSEL_MONITORING_MASK     0x7F
+#define PALMAS_GPADC_SMPS_VSEL_MONITORING_SMPS_VSEL_MONITORING_SHIFT    0x00
 
 /* Registers for function GPADC */
-#define PALMAS_GPADC_TRIM1                                      0x0
-#define PALMAS_GPADC_TRIM2                                      0x1
-#define PALMAS_GPADC_TRIM3                                      0x2
-#define PALMAS_GPADC_TRIM4                                      0x3
-#define PALMAS_GPADC_TRIM5                                      0x4
-#define PALMAS_GPADC_TRIM6                                      0x5
-#define PALMAS_GPADC_TRIM7                                      0x6
-#define PALMAS_GPADC_TRIM8                                      0x7
-#define PALMAS_GPADC_TRIM9                                      0x8
-#define PALMAS_GPADC_TRIM10                                     0x9
-#define PALMAS_GPADC_TRIM11                                     0xA
-#define PALMAS_GPADC_TRIM12                                     0xB
-#define PALMAS_GPADC_TRIM13                                     0xC
-#define PALMAS_GPADC_TRIM14                                     0xD
-#define PALMAS_GPADC_TRIM15                                     0xE
-#define PALMAS_GPADC_TRIM16                                     0xF
+#define PALMAS_GPADC_TRIM1                                      0x00
+#define PALMAS_GPADC_TRIM2                                      0x01
+#define PALMAS_GPADC_TRIM3                                      0x02
+#define PALMAS_GPADC_TRIM4                                      0x03
+#define PALMAS_GPADC_TRIM5                                      0x04
+#define PALMAS_GPADC_TRIM6                                      0x05
+#define PALMAS_GPADC_TRIM7                                      0x06
+#define PALMAS_GPADC_TRIM8                                      0x07
+#define PALMAS_GPADC_TRIM9                                      0x08
+#define PALMAS_GPADC_TRIM10                                     0x09
+#define PALMAS_GPADC_TRIM11                                     0x0A
+#define PALMAS_GPADC_TRIM12                                     0x0B
+#define PALMAS_GPADC_TRIM13                                     0x0C
+#define PALMAS_GPADC_TRIM14                                     0x0D
+#define PALMAS_GPADC_TRIM15                                     0x0E
+#define PALMAS_GPADC_TRIM16                                     0x0F
 
 static inline int palmas_read(struct palmas *palmas, unsigned int base,
                 unsigned int reg, unsigned int *val)
 {
-        unsigned int addr =  PALMAS_BASE_TO_REG(base, reg);
+        unsigned int addr = PALMAS_BASE_TO_REG(base, reg);
         int slave_id = PALMAS_BASE_TO_SLAVE(base);
 
         return regmap_read(palmas->regmap[slave_id], addr, val);
diff --git a/include/linux/mfd/pm8xxx/core.h b/include/linux/mfd/pm8xxx/core.h
deleted file mode 100644
index bd2f4f64e931..000000000000
--- a/include/linux/mfd/pm8xxx/core.h
+++ /dev/null
@@ -1,81 +0,0 @@
-/*
- * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-/*
- * Qualcomm PMIC 8xxx driver header file
- *
- */
-
-#ifndef __MFD_PM8XXX_CORE_H
-#define __MFD_PM8XXX_CORE_H
-
-#include <linux/mfd/core.h>
-
-struct pm8xxx_drvdata {
-        int     (*pmic_readb) (const struct device *dev, u16 addr, u8 *val);
-        int     (*pmic_writeb) (const struct device *dev, u16 addr, u8 val);
-        int     (*pmic_read_buf) (const struct device *dev, u16 addr, u8 *buf,
-                                                                        int n);
-        int     (*pmic_write_buf) (const struct device *dev, u16 addr, u8 *buf,
-                                                                        int n);
-        int     (*pmic_read_irq_stat) (const struct device *dev, int irq);
-        void    *pm_chip_data;
-};
-
-static inline int pm8xxx_readb(const struct device *dev, u16 addr, u8 *val)
-{
-        struct pm8xxx_drvdata *dd = dev_get_drvdata(dev);
-
-        if (!dd)
-                return -EINVAL;
-        return dd->pmic_readb(dev, addr, val);
-}
-
-static inline int pm8xxx_writeb(const struct device *dev, u16 addr, u8 val)
-{
-        struct pm8xxx_drvdata *dd = dev_get_drvdata(dev);
-
-        if (!dd)
-                return -EINVAL;
-        return dd->pmic_writeb(dev, addr, val);
-}
-
-static inline int pm8xxx_read_buf(const struct device *dev, u16 addr, u8 *buf,
-                                                                        int n)
-{
-        struct pm8xxx_drvdata *dd = dev_get_drvdata(dev);
-
-        if (!dd)
-                return -EINVAL;
-        return dd->pmic_read_buf(dev, addr, buf, n);
-}
-
-static inline int pm8xxx_write_buf(const struct device *dev, u16 addr, u8 *buf,
-                                                                        int n)
-{
-        struct pm8xxx_drvdata *dd = dev_get_drvdata(dev);
-
-        if (!dd)
-                return -EINVAL;
-        return dd->pmic_write_buf(dev, addr, buf, n);
-}
-
-static inline int pm8xxx_read_irq_stat(const struct device *dev, int irq)
-{
-        struct pm8xxx_drvdata *dd = dev_get_drvdata(dev);
-
-        if (!dd)
-                return -EINVAL;
-        return dd->pmic_read_irq_stat(dev, irq);
-}
-
-#endif
diff --git a/include/linux/mfd/rdc321x.h b/include/linux/mfd/rdc321x.h
index 4bdf19c8eedf..442743a8f915 100644
--- a/include/linux/mfd/rdc321x.h
+++ b/include/linux/mfd/rdc321x.h
@@ -12,7 +12,7 @@
 #define RDC321X_GPIO_CTRL_REG2  0x84
 #define RDC321X_GPIO_DATA_REG2  0x88
 
-#define RDC321X_MAX_GPIO        58
+#define RDC321X_NUM_GPIO        59
 
 struct rdc321x_gpio_pdata {
         struct pci_dev *sb_pdev;
diff --git a/include/linux/mfd/samsung/core.h b/include/linux/mfd/samsung/core.h
index 157e32b6ca28..47d84242940b 100644
--- a/include/linux/mfd/samsung/core.h
+++ b/include/linux/mfd/samsung/core.h
@@ -24,35 +24,36 @@ enum sec_device_type {
 };
 
 /**
- * struct sec_pmic_dev - s5m87xx master device for sub-drivers
- * @dev: master device of the chip (can be used to access platform data)
- * @pdata: pointer to private data used to pass platform data to child
- * @i2c: i2c client private data for regulator
- * @rtc: i2c client private data for rtc
- * @iolock: mutex for serializing io access
- * @irqlock: mutex for buslock
- * @irq_base: base IRQ number for sec-pmic, required for IRQs
- * @irq: generic IRQ number for s5m87xx
- * @ono: power onoff IRQ number for s5m87xx
- * @irq_masks_cur: currently active value
- * @irq_masks_cache: cached hardware value
- * @type: indicate which s5m87xx "variant" is used
+ * struct sec_pmic_dev - s2m/s5m master device for sub-drivers
+ * @dev:                Master device of the chip
+ * @pdata:              Platform data populated with data from DTS
+ *                      or board files
+ * @regmap_pmic:        Regmap associated with PMIC's I2C address
+ * @i2c:                I2C client of the main driver
+ * @device_type:        Type of device, matches enum sec_device_type
+ * @irq_base:           Base IRQ number for device, required for IRQs
+ * @irq:                Generic IRQ number for device
+ * @irq_data:           Runtime data structure for IRQ controller
+ * @ono:                Power onoff IRQ number for s5m87xx
+ * @wakeup:             Whether or not this is a wakeup device
+ * @wtsr_smpl:          Whether or not to enable in RTC driver the Watchdog
+ *                      Timer Software Reset (registers set to default value
+ *                      after PWRHOLD falling) and Sudden Momentary Power Loss
+ *                      (PMIC will enter power on sequence after short drop in
+ *                      VBATT voltage).
  */
 struct sec_pmic_dev {
         struct device *dev;
         struct sec_platform_data *pdata;
         struct regmap *regmap_pmic;
-        struct regmap *regmap_rtc;
         struct i2c_client *i2c;
-        struct i2c_client *rtc;
 
-        int device_type;
+        unsigned long device_type;
         int irq_base;
         int irq;
         struct regmap_irq_chip_data *irq_data;
 
         int ono;
-        unsigned long type;
         bool wakeup;
         bool wtsr_smpl;
 };
diff --git a/include/linux/mfd/samsung/s2mps14.h b/include/linux/mfd/samsung/s2mps14.h
index 4b449b8ac548..900cd7a04314 100644
--- a/include/linux/mfd/samsung/s2mps14.h
+++ b/include/linux/mfd/samsung/s2mps14.h
@@ -148,6 +148,8 @@ enum s2mps14_regulators {
 #define S2MPS14_ENABLE_SHIFT            6
 /* On/Off controlled by PWREN */
 #define S2MPS14_ENABLE_SUSPEND          (0x01 << S2MPS14_ENABLE_SHIFT)
+/* On/Off controlled by LDO10EN or EMMCEN */
+#define S2MPS14_ENABLE_EXT_CONTROL      (0x00 << S2MPS14_ENABLE_SHIFT)
 #define S2MPS14_LDO_N_VOLTAGES          (S2MPS14_LDO_VSEL_MASK + 1)
 #define S2MPS14_BUCK_N_VOLTAGES         (S2MPS14_BUCK_VSEL_MASK + 1)
 
diff --git a/include/linux/mfd/stmpe.h b/include/linux/mfd/stmpe.h
index 48395a69a7e9..575a86c7fcbd 100644
--- a/include/linux/mfd/stmpe.h
+++ b/include/linux/mfd/stmpe.h
@@ -11,6 +11,7 @@
 #include <linux/mutex.h>
 
 struct device;
+struct regulator;
 
 enum stmpe_block {
         STMPE_BLOCK_GPIO        = 1 << 0,
@@ -62,6 +63,8 @@ struct stmpe_client_info;
 
 /**
  * struct stmpe - STMPE MFD structure
+ * @vcc: optional VCC regulator
+ * @vio: optional VIO regulator
  * @lock: lock protecting I/O operations
  * @irq_lock: IRQ bus lock
  * @dev: device, mostly for dev_dbg()
@@ -73,13 +76,14 @@ struct stmpe_client_info;
  * @regs: list of addresses of registers which are at different addresses on
  *        different variants.  Indexed by one of STMPE_IDX_*.
  * @irq: irq number for stmpe
- * @irq_base: starting IRQ number for internal IRQs
  * @num_gpios: number of gpios, differs for variants
  * @ier: cache of IER registers for bus_lock
  * @oldier: cache of IER registers for bus_lock
  * @pdata: platform data
  */
 struct stmpe {
+        struct regulator *vcc;
+        struct regulator *vio;
         struct mutex lock;
         struct mutex irq_lock;
         struct device *dev;
@@ -91,7 +95,6 @@ struct stmpe {
         const u8 *regs;
 
         int irq;
-        int irq_base;
         int num_gpios;
         u8 ier[2];
         u8 oldier[2];
@@ -132,8 +135,6 @@ struct stmpe_keypad_platform_data {
 
 /**
  * struct stmpe_gpio_platform_data - STMPE GPIO platform data
- * @gpio_base: first gpio number assigned.  A maximum of
- *             %STMPE_NR_GPIOS GPIOs will be allocated.
  * @norequest_mask: bitmask specifying which GPIOs should _not_ be
  *                  requestable due to different usage (e.g. touch, keypad)
  *                  STMPE_GPIO_NOREQ_* macros can be used here.
@@ -141,7 +142,6 @@ struct stmpe_keypad_platform_data {
  * @remove: board specific remove callback
  */
 struct stmpe_gpio_platform_data {
-        int gpio_base;
         unsigned norequest_mask;
         void (*setup)(struct stmpe *stmpe, unsigned gpio_base);
         void (*remove)(struct stmpe *stmpe, unsigned gpio_base);
@@ -195,8 +195,6 @@ struct stmpe_ts_platform_data {
  * @irq_trigger: IRQ trigger to use for the interrupt to the host
  * @autosleep: bool to enable/disable stmpe autosleep
  * @autosleep_timeout: inactivity timeout in milliseconds for autosleep
- * @irq_base: base IRQ number.  %STMPE_NR_IRQS irqs will be used, or
- *            %STMPE_NR_INTERNAL_IRQS if the GPIO driver is not used.
  * @irq_over_gpio: true if gpio is used to get irq
  * @irq_gpio: gpio number over which irq will be requested (significant only if
  *            irq_over_gpio is true)
@@ -207,7 +205,6 @@ struct stmpe_ts_platform_data {
 struct stmpe_platform_data {
         int id;
         unsigned int blocks;
-        int irq_base;
         unsigned int irq_trigger;
         bool autosleep;
         bool irq_over_gpio;
@@ -219,10 +216,4 @@ struct stmpe_platform_data {
         struct stmpe_ts_platform_data *ts;
 };
 
-#define STMPE_NR_INTERNAL_IRQS  9
-#define STMPE_INT_GPIO(x)       (STMPE_NR_INTERNAL_IRQS + (x))
-
-#define STMPE_NR_GPIOS          24
-#define STMPE_NR_IRQS           STMPE_INT_GPIO(STMPE_NR_GPIOS)
-
 #endif
diff --git a/include/linux/mfd/syscon.h b/include/linux/mfd/syscon.h
index 8789fa3c7fd9..75e543b78f53 100644
--- a/include/linux/mfd/syscon.h
+++ b/include/linux/mfd/syscon.h
@@ -15,6 +15,8 @@
 #ifndef __LINUX_MFD_SYSCON_H__
 #define __LINUX_MFD_SYSCON_H__
 
+#include <linux/err.h>
+
 struct device_node;
 
 #ifdef CONFIG_MFD_SYSCON
diff --git a/include/linux/mfd/syscon/exynos5-pmu.h b/include/linux/mfd/syscon/exynos5-pmu.h
new file mode 100644
index 000000000000..00ef24bf6ede
--- /dev/null
+++ b/include/linux/mfd/syscon/exynos5-pmu.h
@@ -0,0 +1,44 @@
+/*
+ * Exynos5 SoC series Power Management Unit (PMU) register offsets
+ * and bit definitions.
+ *
+ * Copyright (C) 2014 Samsung Electronics Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _LINUX_MFD_SYSCON_PMU_EXYNOS5_H_
+#define _LINUX_MFD_SYSCON_PMU_EXYNOS5_H_
+
+/* Exynos5 PMU register definitions */
+#define EXYNOS5_HDMI_PHY_CONTROL                (0x700)
+#define EXYNOS5_USBDRD_PHY_CONTROL              (0x704)
+
+/* Exynos5250 specific register definitions */
+#define EXYNOS5_USBHOST_PHY_CONTROL             (0x708)
+#define EXYNOS5_EFNAND_PHY_CONTROL              (0x70c)
+#define EXYNOS5_MIPI_PHY0_CONTROL               (0x710)
+#define EXYNOS5_MIPI_PHY1_CONTROL               (0x714)
+#define EXYNOS5_ADC_PHY_CONTROL                 (0x718)
+#define EXYNOS5_MTCADC_PHY_CONTROL              (0x71c)
+#define EXYNOS5_DPTX_PHY_CONTROL                (0x720)
+#define EXYNOS5_SATA_PHY_CONTROL                (0x724)
+
+/* Exynos5420 specific register definitions */
+#define EXYNOS5420_USBDRD1_PHY_CONTROL          (0x708)
+#define EXYNOS5420_USBHOST_PHY_CONTROL          (0x70c)
+#define EXYNOS5420_MIPI_PHY0_CONTROL            (0x714)
+#define EXYNOS5420_MIPI_PHY1_CONTROL            (0x718)
+#define EXYNOS5420_MIPI_PHY2_CONTROL            (0x71c)
+#define EXYNOS5420_ADC_PHY_CONTROL              (0x720)
+#define EXYNOS5420_MTCADC_PHY_CONTROL           (0x724)
+#define EXYNOS5420_DPTX_PHY_CONTROL             (0x728)
+
+#define EXYNOS5_PHY_ENABLE                      BIT(0)
+
+#define EXYNOS5_MIPI_PHY_S_RESETN               BIT(1)
+#define EXYNOS5_MIPI_PHY_M_RESETN               BIT(2)
+
+#endif /* _LINUX_MFD_SYSCON_PMU_EXYNOS5_H_ */
diff --git a/include/linux/mfd/tc3589x.h b/include/linux/mfd/tc3589x.h
index 6b8e1ff4672b..e6088c2e2092 100644
--- a/include/linux/mfd/tc3589x.h
+++ b/include/linux/mfd/tc3589x.h
@@ -111,7 +111,6 @@ enum tx3589x_block {
 #define TC3589x_INT_PORIRQ      7
 
 #define TC3589x_NR_INTERNAL_IRQS        8
-#define TC3589x_INT_GPIO(x)     (TC3589x_NR_INTERNAL_IRQS + (x))
 
 struct tc3589x {
         struct mutex lock;
diff --git a/include/linux/mfd/tps65090.h b/include/linux/mfd/tps65090.h
index 3f43069413e7..0bf2708df150 100644
--- a/include/linux/mfd/tps65090.h
+++ b/include/linux/mfd/tps65090.h
@@ -64,6 +64,20 @@ enum {
         TPS65090_REGULATOR_MAX,
 };
 
+/* Register addresses */
+#define TPS65090_REG_INTR_STS   0x00
+#define TPS65090_REG_INTR_STS2  0x01
+#define TPS65090_REG_INTR_MASK  0x02
+#define TPS65090_REG_INTR_MASK2 0x03
+#define TPS65090_REG_CG_CTRL0   0x04
+#define TPS65090_REG_CG_CTRL1   0x05
+#define TPS65090_REG_CG_CTRL2   0x06
+#define TPS65090_REG_CG_CTRL3   0x07
+#define TPS65090_REG_CG_CTRL4   0x08
+#define TPS65090_REG_CG_CTRL5   0x09
+#define TPS65090_REG_CG_STATUS1 0x0a
+#define TPS65090_REG_CG_STATUS2 0x0b
+
 struct tps65090 {
         struct device           *dev;
         struct regmap           *rmap;
@@ -78,11 +92,16 @@ struct tps65090 {
  *     DCDC1, DCDC2 and DCDC3.
  * @gpio: Gpio number if external control is enabled and controlled through
  *     gpio.
+ * @overcurrent_wait_valid: True if the overcurrent_wait should be applied.
+ * @overcurrent_wait: Value to set as the overcurrent wait time.  This is the
+ *     actual bitfield value, not a time in ms (valid value are 0 - 3).
  */
 struct tps65090_regulator_plat_data {
         struct regulator_init_data *reg_init_data;
         bool enable_ext_control;
         int gpio;
+        bool overcurrent_wait_valid;
+        int overcurrent_wait;
 };
 
 struct tps65090_platform_data {
diff --git a/include/linux/mfd/tps65217.h b/include/linux/mfd/tps65217.h
index 54b5458ec084..95d6938737fd 100644
--- a/include/linux/mfd/tps65217.h
+++ b/include/linux/mfd/tps65217.h
@@ -254,7 +254,6 @@ struct tps65217 {
         struct tps65217_board *pdata;
         unsigned long id;
         struct regulator_desc desc[TPS65217_NUM_REGULATOR];
-        struct regulator_dev *rdev[TPS65217_NUM_REGULATOR];
         struct regmap *regmap;
 };
 
diff --git a/include/linux/mfd/tps65218.h b/include/linux/mfd/tps65218.h
index d2e357df5a0e..2f9b593246ee 100644
--- a/include/linux/mfd/tps65218.h
+++ b/include/linux/mfd/tps65218.h
@@ -267,7 +267,6 @@ struct tps65218 {
         u32 irq_mask;
         struct regmap_irq_chip_data *irq_data;
         struct regulator_desc desc[TPS65218_NUM_REGULATOR];
-        struct regulator_dev *rdev[TPS65218_NUM_REGULATOR];
         struct tps_info *info[TPS65218_NUM_REGULATOR];
         struct regmap *regmap;
 };
diff --git a/include/linux/mfd/tps6586x.h b/include/linux/mfd/tps6586x.h
index cbecec2e353a..96187ed9f9bb 100644
--- a/include/linux/mfd/tps6586x.h
+++ b/include/linux/mfd/tps6586x.h
@@ -17,6 +17,8 @@
 #define TPS658621A      0x15
 #define TPS658621CD     0x2c
 #define TPS658623       0x1b
+#define TPS658640       0x01
+#define TPS658640v2     0x02
 #define TPS658643       0x03
 
 enum {
diff --git a/include/linux/mfd/twl6040.h b/include/linux/mfd/twl6040.h
index 81f639bc1ae6..8f9fc3d26e6d 100644
--- a/include/linux/mfd/twl6040.h
+++ b/include/linux/mfd/twl6040.h
@@ -28,6 +28,7 @@
 #include <linux/interrupt.h>
 #include <linux/mfd/core.h>
 #include <linux/regulator/consumer.h>
+#include <linux/clk.h>
 
 #define TWL6040_REG_ASICID              0x01
 #define TWL6040_REG_ASICREV             0x02
@@ -157,6 +158,7 @@
 #define TWL6040_I2CSEL                  0x01
 #define TWL6040_RESETSPLIT              0x04
 #define TWL6040_INTCLRMODE              0x08
+#define TWL6040_I2CMODE(x)              ((x & 0x3) << 4)
 
 /* STATUS (0x2E) fields */
 
@@ -222,6 +224,7 @@ struct twl6040 {
         struct regmap *regmap;
         struct regmap_irq_chip_data *irq_data;
         struct regulator_bulk_data supplies[2]; /* supplies for vio, v2v1 */
+        struct clk *clk32k;
         struct mutex mutex;
         struct mutex irq_mutex;
         struct mfd_cell cells[TWL6040_CELLS];
diff --git a/include/linux/migrate.h b/include/linux/migrate.h
index 84a31ad0b791..a2901c414664 100644
--- a/include/linux/migrate.h
+++ b/include/linux/migrate.h
@@ -5,7 +5,9 @@
 #include <linux/mempolicy.h>
 #include <linux/migrate_mode.h>
 
-typedef struct page *new_page_t(struct page *, unsigned long private, int **);
+typedef struct page *new_page_t(struct page *page, unsigned long private,
+                                int **reason);
+typedef void free_page_t(struct page *page, unsigned long private);
 
 /*
  * Return values from addresss_space_operations.migratepage():
@@ -38,7 +40,7 @@ enum migrate_reason {
 extern void putback_movable_pages(struct list_head *l);
 extern int migrate_page(struct address_space *,
                         struct page *, struct page *, enum migrate_mode);
-extern int migrate_pages(struct list_head *l, new_page_t x,
+extern int migrate_pages(struct list_head *l, new_page_t new, free_page_t free,
                 unsigned long private, enum migrate_mode mode, int reason);
 
 extern int migrate_prep(void);
@@ -56,8 +58,9 @@ extern int migrate_page_move_mapping(struct address_space *mapping,
 #else
 
 static inline void putback_movable_pages(struct list_head *l) {}
-static inline int migrate_pages(struct list_head *l, new_page_t x,
-                unsigned long private, enum migrate_mode mode, int reason)
+static inline int migrate_pages(struct list_head *l, new_page_t new,
+                free_page_t free, unsigned long private, enum migrate_mode mode,
+                int reason)
         { return -ENOSYS; }
 
 static inline int migrate_prep(void) { return -ENOSYS; }
diff --git a/include/linux/miscdevice.h b/include/linux/miscdevice.h
index 51e26f3cd3b3..ee80dd7d9f60 100644
--- a/include/linux/miscdevice.h
+++ b/include/linux/miscdevice.h
@@ -64,7 +64,7 @@ struct miscdevice  {
         umode_t mode;
 };
 
-extern int misc_register(struct miscdevice * misc);
+extern int misc_register(struct miscdevice *misc);
 extern int misc_deregister(struct miscdevice *misc);
 
 #define MODULE_ALIAS_MISCDEV(minor)                             \
diff --git a/include/linux/mm.h b/include/linux/mm.h
index d6777060449f..e03dd29145a0 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -239,6 +239,12 @@ struct vm_operations_struct {
          */
         int (*access)(struct vm_area_struct *vma, unsigned long addr,
                       void *buf, int len, int write);
+
+        /* Called by the /proc/PID/maps code to ask the vma whether it
+         * has a special name.  Returning non-NULL will also cause this
+         * vma to be dumped unconditionally. */
+        const char *(*name)(struct vm_area_struct *vma);
+
 #ifdef CONFIG_NUMA
         /*
          * set_policy() op must add a reference to any non-NULL @new mempolicy
@@ -407,20 +413,25 @@ static inline void compound_unlock_irqrestore(struct page *page,
 #endif
 }
 
+static inline struct page *compound_head_by_tail(struct page *tail)
+{
+        struct page *head = tail->first_page;
+
+        /*
+         * page->first_page may be a dangling pointer to an old
+         * compound page, so recheck that it is still a tail
+         * page before returning.
+         */
+        smp_rmb();
+        if (likely(PageTail(tail)))
+                return head;
+        return tail;
+}
+
 static inline struct page *compound_head(struct page *page)
 {
-        if (unlikely(PageTail(page))) {
-                struct page *head = page->first_page;
-
-                /*
-                 * page->first_page may be a dangling pointer to an old
-                 * compound page, so recheck that it is still a tail
-                 * page before returning.
-                 */
-                smp_rmb();
-                if (likely(PageTail(page)))
-                        return head;
-        }
+        if (unlikely(PageTail(page)))
+                return compound_head_by_tail(page);
         return page;
 }
 
@@ -1778,7 +1789,9 @@ extern struct file *get_mm_exe_file(struct mm_struct *mm);
 extern int may_expand_vm(struct mm_struct *mm, unsigned long npages);
 extern struct vm_area_struct *_install_special_mapping(struct mm_struct *mm,
                                    unsigned long addr, unsigned long len,
-                                   unsigned long flags, struct page **pages);
+                                   unsigned long flags,
+                                   const struct vm_special_mapping *spec);
+/* This is an obsolete alternative to _install_special_mapping. */
 extern int install_special_mapping(struct mm_struct *mm,
                                    unsigned long addr, unsigned long len,
                                    unsigned long flags, struct page **pages);
diff --git a/include/linux/mm_types.h b/include/linux/mm_types.h
index 8967e20cbe57..96c5750e3110 100644
--- a/include/linux/mm_types.h
+++ b/include/linux/mm_types.h
@@ -406,7 +406,7 @@ struct mm_struct {
         spinlock_t                      ioctx_lock;
         struct kioctx_table __rcu       *ioctx_table;
 #endif
-#ifdef CONFIG_MM_OWNER
+#ifdef CONFIG_MEMCG
         /*
          * "owner" points to a task that is regarded as the canonical
          * user/owner of this mm. All of the following must be true in
@@ -510,4 +510,10 @@ static inline void clear_tlb_flush_pending(struct mm_struct *mm)
 }
 #endif
 
+struct vm_special_mapping
+{
+        const char *name;
+        struct page **pages;
+};
+
 #endif /* _LINUX_MM_TYPES_H */
diff --git a/include/linux/mmdebug.h b/include/linux/mmdebug.h
index 2d57efa64cc1..edd82a105220 100644
--- a/include/linux/mmdebug.h
+++ b/include/linux/mmdebug.h
@@ -1,6 +1,8 @@
 #ifndef LINUX_MM_DEBUG_H
 #define LINUX_MM_DEBUG_H 1
 
+#include <linux/stringify.h>
+
 struct page;
 
 extern void dump_page(struct page *page, const char *reason);
@@ -9,11 +11,20 @@ extern void dump_page_badflags(struct page *page, const char *reason,
 
 #ifdef CONFIG_DEBUG_VM
 #define VM_BUG_ON(cond) BUG_ON(cond)
-#define VM_BUG_ON_PAGE(cond, page) \
-        do { if (unlikely(cond)) { dump_page(page, NULL); BUG(); } } while (0)
+#define VM_BUG_ON_PAGE(cond, page)                                      \
+        do {                                                            \
+                if (unlikely(cond)) {                                   \
+                        dump_page(page, "VM_BUG_ON_PAGE(" __stringify(cond)")");\
+                        BUG();                                          \
+                }                                                       \
+        } while (0)
+#define VM_WARN_ON(cond) WARN_ON(cond)
+#define VM_WARN_ON_ONCE(cond) WARN_ON_ONCE(cond)
 #else
 #define VM_BUG_ON(cond) BUILD_BUG_ON_INVALID(cond)
 #define VM_BUG_ON_PAGE(cond, page) VM_BUG_ON(cond)
+#define VM_WARN_ON(cond) BUILD_BUG_ON_INVALID(cond)
+#define VM_WARN_ON_ONCE(cond) BUILD_BUG_ON_INVALID(cond)
 #endif
 
 #ifdef CONFIG_DEBUG_VIRTUAL
diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h
index fac5509c18f0..6cbd1b6c3d20 100644
--- a/include/linux/mmzone.h
+++ b/include/linux/mmzone.h
@@ -75,9 +75,18 @@ enum {
 
 extern int page_group_by_mobility_disabled;
 
-static inline int get_pageblock_migratetype(struct page *page)
+#define NR_MIGRATETYPE_BITS (PB_migrate_end - PB_migrate + 1)
+#define MIGRATETYPE_MASK ((1UL << NR_MIGRATETYPE_BITS) - 1)
+
+#define get_pageblock_migratetype(page)                                 \
+        get_pfnblock_flags_mask(page, page_to_pfn(page),                \
+                        PB_migrate_end, MIGRATETYPE_MASK)
+
+static inline int get_pfnblock_migratetype(struct page *page, unsigned long pfn)
 {
-        return get_pageblock_flags_group(page, PB_migrate, PB_migrate_end);
+        BUILD_BUG_ON(PB_migrate_end - PB_migrate != 2);
+        return get_pfnblock_flags_mask(page, pfn, PB_migrate_end,
+                                        MIGRATETYPE_MASK);
 }
 
 struct free_area {
@@ -360,9 +369,10 @@ struct zone {
         /* Set to true when the PG_migrate_skip bits should be cleared */
         bool                    compact_blockskip_flush;
 
-        /* pfns where compaction scanners should start */
+        /* pfn where compaction free scanner should start */
         unsigned long           compact_cached_free_pfn;
-        unsigned long           compact_cached_migrate_pfn;
+        /* pfn where async and sync compaction migration scanner should start */
+        unsigned long           compact_cached_migrate_pfn[2];
 #endif
 #ifdef CONFIG_MEMORY_HOTPLUG
         /* see spanned/present_pages for more description */
@@ -481,9 +491,8 @@ struct zone {
          * give them a chance of being in the same cacheline.
          *
          * Write access to present_pages at runtime should be protected by
-         * lock_memory_hotplug()/unlock_memory_hotplug().  Any reader who can't
-         * tolerant drift of present_pages should hold memory hotplug lock to
-         * get a stable value.
+         * mem_hotplug_begin/end(). Any reader who can't tolerant drift of
+         * present_pages should get_online_mems() to get a stable value.
          *
          * Read access to managed_pages should be safe because it's unsigned
          * long. Write access to zone->managed_pages and totalram_pages are
@@ -763,10 +772,10 @@ typedef struct pglist_data {
         unsigned long node_spanned_pages; /* total size of physical page
                                              range, including holes */
         int node_id;
-        nodemask_t reclaim_nodes;       /* Nodes allowed to reclaim from */
         wait_queue_head_t kswapd_wait;
         wait_queue_head_t pfmemalloc_wait;
-        struct task_struct *kswapd;     /* Protected by lock_memory_hotplug() */
+        struct task_struct *kswapd;     /* Protected by
+                                           mem_hotplug_begin/end() */
         int kswapd_max_order;
         enum zone_type classzone_idx;
 #ifdef CONFIG_NUMA_BALANCING
@@ -808,10 +817,10 @@ static inline bool pgdat_is_empty(pg_data_t *pgdat)
 extern struct mutex zonelists_mutex;
 void build_all_zonelists(pg_data_t *pgdat, struct zone *zone);
 void wakeup_kswapd(struct zone *zone, int order, enum zone_type classzone_idx);
-bool zone_watermark_ok(struct zone *z, int order, unsigned long mark,
-                int classzone_idx, int alloc_flags);
-bool zone_watermark_ok_safe(struct zone *z, int order, unsigned long mark,
-                int classzone_idx, int alloc_flags);
+bool zone_watermark_ok(struct zone *z, unsigned int order,
+                unsigned long mark, int classzone_idx, int alloc_flags);
+bool zone_watermark_ok_safe(struct zone *z, unsigned int order,
+                unsigned long mark, int classzone_idx, int alloc_flags);
 enum memmap_context {
         MEMMAP_EARLY,
         MEMMAP_HOTPLUG,
diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h
index b42d07b0390b..6c1ae9fd9505 100644
--- a/include/linux/netdevice.h
+++ b/include/linux/netdevice.h
@@ -493,7 +493,7 @@ static inline void napi_disable(struct napi_struct *n)
 static inline void napi_enable(struct napi_struct *n)
 {
         BUG_ON(!test_bit(NAPI_STATE_SCHED, &n->state));
-        smp_mb__before_clear_bit();
+        smp_mb__before_atomic();
         clear_bit(NAPI_STATE_SCHED, &n->state);
 }
 
diff --git a/include/linux/of.h b/include/linux/of.h
index e6f0988c1c68..196b34c1ef4e 100644
--- a/include/linux/of.h
+++ b/include/linux/of.h
@@ -130,6 +130,12 @@ static inline int of_node_check_flag(struct device_node *n, unsigned long flag)
         return test_bit(flag, &n->_flags);
 }
 
+static inline int of_node_test_and_set_flag(struct device_node *n,
+                                            unsigned long flag)
+{
+        return test_and_set_bit(flag, &n->_flags);
+}
+
 static inline void of_node_set_flag(struct device_node *n, unsigned long flag)
 {
         set_bit(flag, &n->_flags);
@@ -197,6 +203,7 @@ static inline unsigned long of_read_ulong(const __be32 *cell, int size)
 /* flag descriptions */
 #define OF_DYNAMIC      1 /* node and properties were allocated via kmalloc */
 #define OF_DETACHED     2 /* node has been detached from the device tree */
+#define OF_POPULATED    3 /* device already created for the node */
 
 #define OF_IS_DYNAMIC(x) test_bit(OF_DYNAMIC, &x->_flags)
 #define OF_MARK_DYNAMIC(x) set_bit(OF_DYNAMIC, &x->_flags)
@@ -757,4 +764,26 @@ static inline int of_get_available_child_count(const struct device_node *np)
         return num;
 }
 
+#ifdef CONFIG_OF
+#define _OF_DECLARE(table, name, compat, fn, fn_type)                   \
+        static const struct of_device_id __of_table_##name              \
+                __used __section(__##table##_of_table)                  \
+                 = { .compatible = compat,                              \
+                     .data = (fn == (fn_type)NULL) ? fn : fn  }
+#else
+#define _OF_DECLARE(table, name, compat, fn, fn_type)                                   \
+        static const struct of_device_id __of_table_##name              \
+                __attribute__((unused))                                 \
+                 = { .compatible = compat,                              \
+                     .data = (fn == (fn_type)NULL) ? fn : fn }
+#endif
+
+typedef int (*of_init_fn_2)(struct device_node *, struct device_node *);
+typedef void (*of_init_fn_1)(struct device_node *);
+
+#define OF_DECLARE_1(table, name, compat, fn) \
+                _OF_DECLARE(table, name, compat, fn, of_init_fn_1)
+#define OF_DECLARE_2(table, name, compat, fn) \
+                _OF_DECLARE(table, name, compat, fn, of_init_fn_2)
+
 #endif /* _LINUX_OF_H */
diff --git a/include/linux/of_address.h b/include/linux/of_address.h
index 5f6ed6b182b8..c13b8782a4eb 100644
--- a/include/linux/of_address.h
+++ b/include/linux/of_address.h
@@ -40,7 +40,6 @@ extern u64 of_translate_dma_address(struct device_node *dev,
 
 #ifdef CONFIG_OF_ADDRESS
 extern u64 of_translate_address(struct device_node *np, const __be32 *addr);
-extern bool of_can_translate_address(struct device_node *dev);
 extern int of_address_to_resource(struct device_node *dev, int index,
                                   struct resource *r);
 extern struct device_node *of_find_matching_node_by_address(
@@ -63,6 +62,9 @@ extern int of_pci_range_parser_init(struct of_pci_range_parser *parser,
 extern struct of_pci_range *of_pci_range_parser_one(
                                         struct of_pci_range_parser *parser,
                                         struct of_pci_range *range);
+extern int of_dma_get_range(struct device_node *np, u64 *dma_addr,
+                                u64 *paddr, u64 *size);
+extern bool of_dma_is_coherent(struct device_node *np);
 #else /* CONFIG_OF_ADDRESS */
 static inline struct device_node *of_find_matching_node_by_address(
                                         struct device_node *from,
@@ -90,6 +92,17 @@ static inline struct of_pci_range *of_pci_range_parser_one(
 {
         return NULL;
 }
+
+static inline int of_dma_get_range(struct device_node *np, u64 *dma_addr,
+                                u64 *paddr, u64 *size)
+{
+        return -ENODEV;
+}
+
+static inline bool of_dma_is_coherent(struct device_node *np)
+{
+        return false;
+}
 #endif /* CONFIG_OF_ADDRESS */
 
 #ifdef CONFIG_OF
diff --git a/include/linux/of_fdt.h b/include/linux/of_fdt.h
index ddd7219af8ac..05117899fcb4 100644
--- a/include/linux/of_fdt.h
+++ b/include/linux/of_fdt.h
@@ -17,60 +17,23 @@
 
 /* Definitions used by the flattened device tree */
 #define OF_DT_HEADER            0xd00dfeed      /* marker */
-#define OF_DT_BEGIN_NODE        0x1             /* Start of node, full name */
-#define OF_DT_END_NODE          0x2             /* End node */
-#define OF_DT_PROP              0x3             /* Property: name off, size,
-                                                 * content */
-#define OF_DT_NOP               0x4             /* nop */
-#define OF_DT_END               0x9
-
-#define OF_DT_VERSION           0x10
 
 #ifndef __ASSEMBLY__
-/*
- * This is what gets passed to the kernel by prom_init or kexec
- *
- * The dt struct contains the device tree structure, full pathes and
- * property contents. The dt strings contain a separate block with just
- * the strings for the property names, and is fully page aligned and
- * self contained in a page, so that it can be kept around by the kernel,
- * each property name appears only once in this page (cheap compression)
- *
- * the mem_rsvmap contains a map of reserved ranges of physical memory,
- * passing it here instead of in the device-tree itself greatly simplifies
- * the job of everybody. It's just a list of u64 pairs (base/size) that
- * ends when size is 0
- */
-struct boot_param_header {
-        __be32  magic;                  /* magic word OF_DT_HEADER */
-        __be32  totalsize;              /* total size of DT block */
-        __be32  off_dt_struct;          /* offset to structure */
-        __be32  off_dt_strings;         /* offset to strings */
-        __be32  off_mem_rsvmap;         /* offset to memory reserve map */
-        __be32  version;                /* format version */
-        __be32  last_comp_version;      /* last compatible version */
-        /* version 2 fields below */
-        __be32  boot_cpuid_phys;        /* Physical CPU id we're booting on */
-        /* version 3 fields below */
-        __be32  dt_strings_size;        /* size of the DT strings block */
-        /* version 17 fields below */
-        __be32  dt_struct_size;         /* size of the DT structure block */
-};
 
 #if defined(CONFIG_OF_FLATTREE)
 
 struct device_node;
 
 /* For scanning an arbitrary device-tree at any time */
-extern char *of_fdt_get_string(struct boot_param_header *blob, u32 offset);
-extern void *of_fdt_get_property(struct boot_param_header *blob,
+extern char *of_fdt_get_string(const void *blob, u32 offset);
+extern void *of_fdt_get_property(const void *blob,
                                  unsigned long node,
                                  const char *name,
-                                 unsigned long *size);
-extern int of_fdt_is_compatible(struct boot_param_header *blob,
+                                 int *size);
+extern int of_fdt_is_compatible(const void *blob,
                                 unsigned long node,
                                 const char *compat);
-extern int of_fdt_match(struct boot_param_header *blob, unsigned long node,
+extern int of_fdt_match(const void *blob, unsigned long node,
                         const char *const *compat);
 extern void of_fdt_unflatten_tree(unsigned long *blob,
                                struct device_node **mynodes);
@@ -78,21 +41,21 @@ extern void of_fdt_unflatten_tree(unsigned long *blob,
 /* TBD: Temporary export of fdt globals - remove when code fully merged */
 extern int __initdata dt_root_addr_cells;
 extern int __initdata dt_root_size_cells;
-extern struct boot_param_header *initial_boot_params;
+extern void *initial_boot_params;
+
+extern char __dtb_start[];
+extern char __dtb_end[];
 
 /* For scanning the flat device-tree at boot time */
-extern char *find_flat_dt_string(u32 offset);
 extern int of_scan_flat_dt(int (*it)(unsigned long node, const char *uname,
                                      int depth, void *data),
                            void *data);
-extern void *of_get_flat_dt_prop(unsigned long node, const char *name,
-                                 unsigned long *size);
+extern const void *of_get_flat_dt_prop(unsigned long node, const char *name,
+                                       int *size);
 extern int of_flat_dt_is_compatible(unsigned long node, const char *name);
 extern int of_flat_dt_match(unsigned long node, const char *const *matches);
 extern unsigned long of_get_flat_dt_root(void);
-extern int of_scan_flat_dt_by_path(const char *path,
-        int (*it)(unsigned long node, const char *name, int depth, void *data),
-        void *data);
+extern int of_get_flat_dt_size(void);
 
 extern int early_init_dt_scan_chosen(unsigned long node, const char *uname,
                                      int depth, void *data);
@@ -103,7 +66,7 @@ extern void early_init_dt_add_memory_arch(u64 base, u64 size);
 extern int early_init_dt_reserve_memory_arch(phys_addr_t base, phys_addr_t size,
                                              bool no_map);
 extern void * early_init_dt_alloc_memory_arch(u64 size, u64 align);
-extern u64 dt_mem_next_cell(int s, __be32 **cellp);
+extern u64 dt_mem_next_cell(int s, const __be32 **cellp);
 
 /* Early flat tree scan hooks */
 extern int early_init_dt_scan_root(unsigned long node, const char *uname,
@@ -120,6 +83,7 @@ extern void unflatten_device_tree(void);
 extern void unflatten_and_copy_device_tree(void);
 extern void early_init_devtree(void *);
 extern void early_get_first_memblock_info(void *, phys_addr_t *);
+extern u64 fdt_translate_address(const void *blob, int node_offset);
 #else /* CONFIG_OF_FLATTREE */
 static inline void early_init_fdt_scan_reserved_mem(void) {}
 static inline const char *of_flat_dt_get_machine_name(void) { return NULL; }
diff --git a/include/linux/of_gpio.h b/include/linux/of_gpio.h
index f14123a5a9df..38fc05036015 100644
--- a/include/linux/of_gpio.h
+++ b/include/linux/of_gpio.h
@@ -19,7 +19,6 @@
 #include <linux/errno.h>
 #include <linux/gpio.h>
 #include <linux/of.h>
-#include <linux/gpio/consumer.h>
 
 struct device_node;
 
@@ -48,7 +47,7 @@ static inline struct of_mm_gpio_chip *to_of_mm_gpio_chip(struct gpio_chip *gc)
         return container_of(gc, struct of_mm_gpio_chip, gc);
 }
 
-extern struct gpio_desc *of_get_named_gpiod_flags(struct device_node *np,
+extern int of_get_named_gpio_flags(struct device_node *np,
                 const char *list_name, int index, enum of_gpio_flags *flags);
 
 extern int of_mm_gpiochip_add(struct device_node *np,
@@ -63,10 +62,10 @@ extern int of_gpio_simple_xlate(struct gpio_chip *gc,
 #else /* CONFIG_OF_GPIO */
 
 /* Drivers may not strictly depend on the GPIO support, so let them link. */
-static inline struct gpio_desc *of_get_named_gpiod_flags(struct device_node *np,
+static inline int of_get_named_gpio_flags(struct device_node *np,
                 const char *list_name, int index, enum of_gpio_flags *flags)
 {
-        return ERR_PTR(-ENOSYS);
+        return -ENOSYS;
 }
 
 static inline int of_gpio_simple_xlate(struct gpio_chip *gc,
@@ -81,18 +80,6 @@ static inline void of_gpiochip_remove(struct gpio_chip *gc) { }
 
 #endif /* CONFIG_OF_GPIO */
 
-static inline int of_get_named_gpio_flags(struct device_node *np,
-                const char *list_name, int index, enum of_gpio_flags *flags)
-{
-        struct gpio_desc *desc;
-        desc = of_get_named_gpiod_flags(np, list_name, index, flags);
-
-        if (IS_ERR(desc))
-                return PTR_ERR(desc);
-        else
-                return desc_to_gpio(desc);
-}
-
 /**
  * of_gpio_named_count() - Count GPIOs for a device
  * @np:         device node to count GPIOs for
@@ -129,22 +116,6 @@ static inline int of_gpio_count(struct device_node *np)
         return of_gpio_named_count(np, "gpios");
 }
 
-/**
- * of_get_gpiod_flags() - Get a GPIO descriptor and flags to use with GPIO API
- * @np:         device node to get GPIO from
- * @index:      index of the GPIO
- * @flags:      a flags pointer to fill in
- *
- * Returns GPIO descriptor to use with Linux generic GPIO API, or a errno
- * value on the error condition. If @flags is not NULL the function also fills
- * in flags for the GPIO.
- */
-static inline struct gpio_desc *of_get_gpiod_flags(struct device_node *np,
-                                        int index, enum of_gpio_flags *flags)
-{
-        return of_get_named_gpiod_flags(np, "gpios", index, flags);
-}
-
 static inline int of_get_gpio_flags(struct device_node *np, int index,
                       enum of_gpio_flags *flags)
 {
diff --git a/include/linux/of_irq.h b/include/linux/of_irq.h
index 6404253d810d..bfec136a6d1e 100644
--- a/include/linux/of_irq.h
+++ b/include/linux/of_irq.h
@@ -45,6 +45,7 @@ extern void of_irq_init(const struct of_device_id *matches);
 #ifdef CONFIG_OF_IRQ
 extern int of_irq_count(struct device_node *dev);
 extern int of_irq_get(struct device_node *dev, int index);
+extern int of_irq_get_byname(struct device_node *dev, const char *name);
 #else
 static inline int of_irq_count(struct device_node *dev)
 {
@@ -54,6 +55,10 @@ static inline int of_irq_get(struct device_node *dev, int index)
 {
         return 0;
 }
+static inline int of_irq_get_byname(struct device_node *dev, const char *name)
+{
+        return 0;
+}
 #endif
 
 #if defined(CONFIG_OF)
diff --git a/include/linux/of_pci.h b/include/linux/of_pci.h
index 1a1f5ffd5288..dde3a4a0fa5d 100644
--- a/include/linux/of_pci.h
+++ b/include/linux/of_pci.h
@@ -6,14 +6,44 @@
 
 struct pci_dev;
 struct of_phandle_args;
-int of_irq_parse_pci(const struct pci_dev *pdev, struct of_phandle_args *out_irq);
-int of_irq_parse_and_map_pci(const struct pci_dev *dev, u8 slot, u8 pin);
-
 struct device_node;
+
+#ifdef CONFIG_OF
+int of_irq_parse_pci(const struct pci_dev *pdev, struct of_phandle_args *out_irq);
 struct device_node *of_pci_find_child_device(struct device_node *parent,
                                              unsigned int devfn);
 int of_pci_get_devfn(struct device_node *np);
+int of_irq_parse_and_map_pci(const struct pci_dev *dev, u8 slot, u8 pin);
 int of_pci_parse_bus_range(struct device_node *node, struct resource *res);
+#else
+static inline int of_irq_parse_pci(const struct pci_dev *pdev, struct of_phandle_args *out_irq)
+{
+        return 0;
+}
+
+static inline struct device_node *of_pci_find_child_device(struct device_node *parent,
+                                             unsigned int devfn)
+{
+        return NULL;
+}
+
+static inline int of_pci_get_devfn(struct device_node *np)
+{
+        return -EINVAL;
+}
+
+static inline int
+of_irq_parse_and_map_pci(const struct pci_dev *dev, u8 slot, u8 pin)
+{
+        return 0;
+}
+
+static inline int
+of_pci_parse_bus_range(struct device_node *node, struct resource *res)
+{
+        return -EINVAL;
+}
+#endif
 
 #if defined(CONFIG_OF) && defined(CONFIG_PCI_MSI)
 int of_pci_msi_chip_add(struct msi_chip *chip);
diff --git a/include/linux/of_platform.h b/include/linux/of_platform.h
index 05cb4a928252..d96e1badbee0 100644
--- a/include/linux/of_platform.h
+++ b/include/linux/of_platform.h
@@ -37,7 +37,7 @@
  * Note: Using an auxdata lookup table should be considered a last resort when
  * converting a platform to use the DT.  Normally the automatically generated
  * device name will not matter, and drivers should obtain data from the device
- * node instead of from an anonymouns platform_data pointer.
+ * node instead of from an anonymous platform_data pointer.
  */
 struct of_dev_auxdata {
         char *compatible;
@@ -72,6 +72,7 @@ extern int of_platform_populate(struct device_node *root,
                                 const struct of_device_id *matches,
                                 const struct of_dev_auxdata *lookup,
                                 struct device *parent);
+extern int of_platform_depopulate(struct device *parent);
 #else
 static inline int of_platform_populate(struct device_node *root,
                                         const struct of_device_id *matches,
@@ -80,6 +81,10 @@ static inline int of_platform_populate(struct device_node *root,
 {
         return -ENODEV;
 }
+static inline int of_platform_depopulate(struct device *parent)
+{
+        return -ENODEV;
+}
 #endif
 
 #endif  /* _LINUX_OF_PLATFORM_H */
diff --git a/include/linux/of_reserved_mem.h b/include/linux/of_reserved_mem.h
index 9b1fbb7f29fc..4669ddfdd5af 100644
--- a/include/linux/of_reserved_mem.h
+++ b/include/linux/of_reserved_mem.h
@@ -21,33 +21,19 @@ struct reserved_mem_ops {
                                   struct device *dev);
 };
 
-typedef int (*reservedmem_of_init_fn)(struct reserved_mem *rmem,
-                                      unsigned long node, const char *uname);
+typedef int (*reservedmem_of_init_fn)(struct reserved_mem *rmem);
+
+#define RESERVEDMEM_OF_DECLARE(name, compat, init)                      \
+        _OF_DECLARE(reservedmem, name, compat, init, reservedmem_of_init_fn)
 
 #ifdef CONFIG_OF_RESERVED_MEM
 void fdt_init_reserved_mem(void);
 void fdt_reserved_mem_save_node(unsigned long node, const char *uname,
                                phys_addr_t base, phys_addr_t size);
-
-#define RESERVEDMEM_OF_DECLARE(name, compat, init)                      \
-        static const struct of_device_id __reservedmem_of_table_##name  \
-                __used __section(__reservedmem_of_table)                \
-                 = { .compatible = compat,                              \
-                     .data = (init == (reservedmem_of_init_fn)NULL) ?   \
-                                init : init }
-
 #else
 static inline void fdt_init_reserved_mem(void) { }
 static inline void fdt_reserved_mem_save_node(unsigned long node,
                 const char *uname, phys_addr_t base, phys_addr_t size) { }
-
-#define RESERVEDMEM_OF_DECLARE(name, compat, init)                      \
-        static const struct of_device_id __reservedmem_of_table_##name  \
-                __attribute__((unused))                                 \
-                 = { .compatible = compat,                              \
-                     .data = (init == (reservedmem_of_init_fn)NULL) ?   \
-                                init : init }
-
 #endif
 
 #endif /* __OF_RESERVED_MEM_H */
diff --git a/include/linux/omap-dma.h b/include/linux/omap-dma.h
index 7944cdc27bed..c29a6dee6bec 100644
--- a/include/linux/omap-dma.h
+++ b/include/linux/omap-dma.h
@@ -393,7 +393,7 @@ extern int omap_modify_dma_chain_params(int chain_id,
 extern int omap_dma_chain_status(int chain_id);
 #endif
 
-#if defined(CONFIG_ARCH_OMAP1) && defined(CONFIG_FB_OMAP)
+#if defined(CONFIG_ARCH_OMAP1) && IS_ENABLED(CONFIG_FB_OMAP)
 #include <mach/lcd_dma.h>
 #else
 static inline int omap_lcd_dma_running(void)
diff --git a/include/linux/page-flags.h b/include/linux/page-flags.h
index d1fe1a761047..2093eb72785e 100644
--- a/include/linux/page-flags.h
+++ b/include/linux/page-flags.h
@@ -198,6 +198,7 @@ struct page;	/* forward declaration */
 TESTPAGEFLAG(Locked, locked)
 PAGEFLAG(Error, error) TESTCLEARFLAG(Error, error)
 PAGEFLAG(Referenced, referenced) TESTCLEARFLAG(Referenced, referenced)
+        __SETPAGEFLAG(Referenced, referenced)
 PAGEFLAG(Dirty, dirty) TESTSCFLAG(Dirty, dirty) __CLEARPAGEFLAG(Dirty, dirty)
 PAGEFLAG(LRU, lru) __CLEARPAGEFLAG(LRU, lru)
 PAGEFLAG(Active, active) __CLEARPAGEFLAG(Active, active)
@@ -208,6 +209,7 @@ PAGEFLAG(Pinned, pinned) TESTSCFLAG(Pinned, pinned)	/* Xen */
 PAGEFLAG(SavePinned, savepinned);                       /* Xen */
 PAGEFLAG(Reserved, reserved) __CLEARPAGEFLAG(Reserved, reserved)
 PAGEFLAG(SwapBacked, swapbacked) __CLEARPAGEFLAG(SwapBacked, swapbacked)
+        __SETPAGEFLAG(SwapBacked, swapbacked)
 
 __PAGEFLAG(SlobFree, slob_free)
 
diff --git a/include/linux/pageblock-flags.h b/include/linux/pageblock-flags.h
index 2ee8cd2466b5..2baeee12f48e 100644
--- a/include/linux/pageblock-flags.h
+++ b/include/linux/pageblock-flags.h
@@ -30,9 +30,12 @@ enum pageblock_bits {
         PB_migrate,
         PB_migrate_end = PB_migrate + 3 - 1,
                         /* 3 bits required for migrate types */
-#ifdef CONFIG_COMPACTION
         PB_migrate_skip,/* If set the block is skipped by compaction */
-#endif /* CONFIG_COMPACTION */
+
+        /*
+         * Assume the bits will always align on a word. If this assumption
+         * changes then get/set pageblock needs updating.
+         */
         NR_PAGEBLOCK_BITS
 };
 
@@ -62,11 +65,26 @@ extern int pageblock_order;
 /* Forward declaration */
 struct page;
 
+unsigned long get_pfnblock_flags_mask(struct page *page,
+                                unsigned long pfn,
+                                unsigned long end_bitidx,
+                                unsigned long mask);
+
+void set_pfnblock_flags_mask(struct page *page,
+                                unsigned long flags,
+                                unsigned long pfn,
+                                unsigned long end_bitidx,
+                                unsigned long mask);
+
 /* Declarations for getting and setting flags. See mm/page_alloc.c */
-unsigned long get_pageblock_flags_group(struct page *page,
-                                        int start_bitidx, int end_bitidx);
-void set_pageblock_flags_group(struct page *page, unsigned long flags,
-                                        int start_bitidx, int end_bitidx);
+#define get_pageblock_flags_group(page, start_bitidx, end_bitidx) \
+        get_pfnblock_flags_mask(page, page_to_pfn(page),                \
+                        end_bitidx,                                     \
+                        (1 << (end_bitidx - start_bitidx + 1)) - 1)
+#define set_pageblock_flags_group(page, flags, start_bitidx, end_bitidx) \
+        set_pfnblock_flags_mask(page, flags, page_to_pfn(page),         \
+                        end_bitidx,                                     \
+                        (1 << (end_bitidx - start_bitidx + 1)) - 1)
 
 #ifdef CONFIG_COMPACTION
 #define get_pageblock_skip(page) \
diff --git a/include/linux/pagemap.h b/include/linux/pagemap.h
index 45598f1e9aa3..0a97b583ee8d 100644
--- a/include/linux/pagemap.h
+++ b/include/linux/pagemap.h
@@ -110,7 +110,7 @@ static inline void mapping_set_gfp_mask(struct address_space *m, gfp_t mask)
 
 #define page_cache_get(page)            get_page(page)
 #define page_cache_release(page)        put_page(page)
-void release_pages(struct page **pages, int nr, int cold);
+void release_pages(struct page **pages, int nr, bool cold);
 
 /*
  * speculatively take a reference to a page.
@@ -259,12 +259,109 @@ pgoff_t page_cache_next_hole(struct address_space *mapping,
 pgoff_t page_cache_prev_hole(struct address_space *mapping,
                              pgoff_t index, unsigned long max_scan);
 
+#define FGP_ACCESSED            0x00000001
+#define FGP_LOCK                0x00000002
+#define FGP_CREAT               0x00000004
+#define FGP_WRITE               0x00000008
+#define FGP_NOFS                0x00000010
+#define FGP_NOWAIT              0x00000020
+
+struct page *pagecache_get_page(struct address_space *mapping, pgoff_t offset,
+                int fgp_flags, gfp_t cache_gfp_mask, gfp_t radix_gfp_mask);
+
+/**
+ * find_get_page - find and get a page reference
+ * @mapping: the address_space to search
+ * @offset: the page index
+ *
+ * Looks up the page cache slot at @mapping & @offset.  If there is a
+ * page cache page, it is returned with an increased refcount.
+ *
+ * Otherwise, %NULL is returned.
+ */
+static inline struct page *find_get_page(struct address_space *mapping,
+                                        pgoff_t offset)
+{
+        return pagecache_get_page(mapping, offset, 0, 0, 0);
+}
+
+static inline struct page *find_get_page_flags(struct address_space *mapping,
+                                        pgoff_t offset, int fgp_flags)
+{
+        return pagecache_get_page(mapping, offset, fgp_flags, 0, 0);
+}
+
+/**
+ * find_lock_page - locate, pin and lock a pagecache page
+ * pagecache_get_page - find and get a page reference
+ * @mapping: the address_space to search
+ * @offset: the page index
+ *
+ * Looks up the page cache slot at @mapping & @offset.  If there is a
+ * page cache page, it is returned locked and with an increased
+ * refcount.
+ *
+ * Otherwise, %NULL is returned.
+ *
+ * find_lock_page() may sleep.
+ */
+static inline struct page *find_lock_page(struct address_space *mapping,
+                                        pgoff_t offset)
+{
+        return pagecache_get_page(mapping, offset, FGP_LOCK, 0, 0);
+}
+
+/**
+ * find_or_create_page - locate or add a pagecache page
+ * @mapping: the page's address_space
+ * @index: the page's index into the mapping
+ * @gfp_mask: page allocation mode
+ *
+ * Looks up the page cache slot at @mapping & @offset.  If there is a
+ * page cache page, it is returned locked and with an increased
+ * refcount.
+ *
+ * If the page is not present, a new page is allocated using @gfp_mask
+ * and added to the page cache and the VM's LRU list.  The page is
+ * returned locked and with an increased refcount.
+ *
+ * On memory exhaustion, %NULL is returned.
+ *
+ * find_or_create_page() may sleep, even if @gfp_flags specifies an
+ * atomic allocation!
+ */
+static inline struct page *find_or_create_page(struct address_space *mapping,
+                                        pgoff_t offset, gfp_t gfp_mask)
+{
+        return pagecache_get_page(mapping, offset,
+                                        FGP_LOCK|FGP_ACCESSED|FGP_CREAT,
+                                        gfp_mask, gfp_mask & GFP_RECLAIM_MASK);
+}
+
+/**
+ * grab_cache_page_nowait - returns locked page at given index in given cache
+ * @mapping: target address_space
+ * @index: the page index
+ *
+ * Same as grab_cache_page(), but do not wait if the page is unavailable.
+ * This is intended for speculative data generators, where the data can
+ * be regenerated if the page couldn't be grabbed.  This routine should
+ * be safe to call while holding the lock for another page.
+ *
+ * Clear __GFP_FS when allocating the page to avoid recursion into the fs
+ * and deadlock against the caller's locked page.
+ */
+static inline struct page *grab_cache_page_nowait(struct address_space *mapping,
+                                pgoff_t index)
+{
+        return pagecache_get_page(mapping, index,
+                        FGP_LOCK|FGP_CREAT|FGP_NOFS|FGP_NOWAIT,
+                        mapping_gfp_mask(mapping),
+                        GFP_NOFS);
+}
+
 struct page *find_get_entry(struct address_space *mapping, pgoff_t offset);
-struct page *find_get_page(struct address_space *mapping, pgoff_t offset);
 struct page *find_lock_entry(struct address_space *mapping, pgoff_t offset);
-struct page *find_lock_page(struct address_space *mapping, pgoff_t offset);
-struct page *find_or_create_page(struct address_space *mapping, pgoff_t index,
-                                 gfp_t gfp_mask);
 unsigned find_get_entries(struct address_space *mapping, pgoff_t start,
                           unsigned int nr_entries, struct page **entries,
                           pgoff_t *indices);
@@ -287,8 +384,6 @@ static inline struct page *grab_cache_page(struct address_space *mapping,
         return find_or_create_page(mapping, index, mapping_gfp_mask(mapping));
 }
 
-extern struct page * grab_cache_page_nowait(struct address_space *mapping,
-                                pgoff_t index);
 extern struct page * read_cache_page(struct address_space *mapping,
                                 pgoff_t index, filler_t *filler, void *data);
 extern struct page * read_cache_page_gfp(struct address_space *mapping,
@@ -425,6 +520,8 @@ static inline void wait_on_page_writeback(struct page *page)
 extern void end_page_writeback(struct page *page);
 void wait_for_stable_page(struct page *page);
 
+void page_endio(struct page *page, int rw, int err);
+
 /*
  * Add an arbitrary waiter to a page's wait queue
  */
diff --git a/include/linux/pci.h b/include/linux/pci.h
index aab57b4abe7f..71d9673c1b2c 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -365,6 +365,7 @@ struct pci_dev {
 #endif
         phys_addr_t rom; /* Physical address of ROM if it's not from the BAR */
         size_t romlen; /* Length of ROM if it's not from the BAR */
+        char *driver_override; /* Driver name to force a match */
 };
 
 static inline struct pci_dev *pci_physfn(struct pci_dev *dev)
@@ -477,6 +478,19 @@ static inline bool pci_is_root_bus(struct pci_bus *pbus)
         return !(pbus->parent);
 }
 
+/**
+ * pci_is_bridge - check if the PCI device is a bridge
+ * @dev: PCI device
+ *
+ * Return true if the PCI device is bridge whether it has subordinate
+ * or not.
+ */
+static inline bool pci_is_bridge(struct pci_dev *dev)
+{
+        return dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
+                dev->hdr_type == PCI_HEADER_TYPE_CARDBUS;
+}
+
 static inline struct pci_dev *pci_upstream_bridge(struct pci_dev *dev)
 {
         dev = pci_physfn(dev);
@@ -518,7 +532,7 @@ static inline int pcibios_err_to_errno(int err)
         case PCIBIOS_FUNC_NOT_SUPPORTED:
                 return -ENOENT;
         case PCIBIOS_BAD_VENDOR_ID:
-                return -EINVAL;
+                return -ENOTTY;
         case PCIBIOS_DEVICE_NOT_FOUND:
                 return -ENODEV;
         case PCIBIOS_BAD_REGISTER_NUMBER:
@@ -529,7 +543,7 @@ static inline int pcibios_err_to_errno(int err)
                 return -ENOSPC;
         }
 
-        return -ENOTTY;
+        return -ERANGE;
 }
 
 /* Low-level architecture-dependent routines */
@@ -603,6 +617,9 @@ struct pci_error_handlers {
         /* PCI slot has been reset */
         pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
 
+        /* PCI function reset prepare or completed */
+        void (*reset_notify)(struct pci_dev *dev, bool prepare);
+
         /* Device driver may resume normal operations */
         void (*resume)(struct pci_dev *dev);
 };
@@ -680,8 +697,8 @@ struct pci_driver {
 
 /**
  * PCI_VDEVICE - macro used to describe a specific pci device in short form
- * @vendor: the vendor name
- * @device: the 16 bit PCI Device ID
+ * @vend: the vendor name
+ * @dev: the 16 bit PCI Device ID
  *
  * This macro is used to create a struct pci_device_id that matches a
  * specific PCI device.  The subvendor, and subdevice fields will be set
@@ -689,9 +706,9 @@ struct pci_driver {
  * private data.
  */
 
-#define PCI_VDEVICE(vendor, device)             \
-        PCI_VENDOR_ID_##vendor, (device),       \
-        PCI_ANY_ID, PCI_ANY_ID, 0, 0
+#define PCI_VDEVICE(vend, dev) \
+        .vendor = PCI_VENDOR_ID_##vend, .device = (dev), \
+        .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, 0, 0
 
 /* these external functions are only available when PCI support is enabled */
 #ifdef CONFIG_PCI
@@ -764,7 +781,7 @@ int pci_scan_slot(struct pci_bus *bus, int devfn);
 struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn);
 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
 unsigned int pci_scan_child_bus(struct pci_bus *bus);
-int __must_check pci_bus_add_device(struct pci_dev *dev);
+void pci_bus_add_device(struct pci_dev *dev);
 void pci_read_bridge_bases(struct pci_bus *child);
 struct resource *pci_find_parent_resource(const struct pci_dev *dev,
                                           struct resource *res);
@@ -1158,7 +1175,6 @@ struct msix_entry {
 
 #ifdef CONFIG_PCI_MSI
 int pci_msi_vec_count(struct pci_dev *dev);
-int pci_enable_msi_block(struct pci_dev *dev, int nvec);
 void pci_msi_shutdown(struct pci_dev *dev);
 void pci_disable_msi(struct pci_dev *dev);
 int pci_msix_vec_count(struct pci_dev *dev);
@@ -1188,8 +1204,6 @@ static inline int pci_enable_msix_exact(struct pci_dev *dev,
 }
 #else
 static inline int pci_msi_vec_count(struct pci_dev *dev) { return -ENOSYS; }
-static inline int pci_enable_msi_block(struct pci_dev *dev, int nvec)
-{ return -ENOSYS; }
 static inline void pci_msi_shutdown(struct pci_dev *dev) { }
 static inline void pci_disable_msi(struct pci_dev *dev) { }
 static inline int pci_msix_vec_count(struct pci_dev *dev) { return -ENOSYS; }
@@ -1244,7 +1258,7 @@ static inline void pcie_set_ecrc_checking(struct pci_dev *dev) { }
 static inline void pcie_ecrc_get_policy(char *str) { }
 #endif
 
-#define pci_enable_msi(pdev)    pci_enable_msi_block(pdev, 1)
+#define pci_enable_msi(pdev)    pci_enable_msi_exact(pdev, 1)
 
 #ifdef CONFIG_HT_IRQ
 /* The functions a driver should call */
@@ -1572,13 +1586,13 @@ extern unsigned long pci_hotplug_io_size;
 extern unsigned long pci_hotplug_mem_size;
 
 /* Architecture-specific versions may override these (weak) */
-int pcibios_add_platform_entries(struct pci_dev *dev);
 void pcibios_disable_device(struct pci_dev *dev);
 void pcibios_set_master(struct pci_dev *dev);
 int pcibios_set_pcie_reset_state(struct pci_dev *dev,
                                  enum pcie_reset_state state);
 int pcibios_add_device(struct pci_dev *dev);
 void pcibios_release_device(struct pci_dev *dev);
+void pcibios_penalize_isa_irq(int irq, int active);
 
 #ifdef CONFIG_HIBERNATE_CALLBACKS
 extern struct dev_pm_ops pcibios_pm_ops;
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index d4de24b4d4c6..7fa31731c854 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -1631,8 +1631,6 @@
 #define PCI_DEVICE_ID_ATT_VENUS_MODEM   0x480
 
 #define PCI_VENDOR_ID_SPECIALIX         0x11cb
-#define PCI_DEVICE_ID_SPECIALIX_IO8     0x2000
-#define PCI_DEVICE_ID_SPECIALIX_RIO     0x8000
 #define PCI_SUBDEVICE_ID_SPECIALIX_SPEED4 0xa004
 
 #define PCI_VENDOR_ID_ANALOG_DEVICES    0x11d4
@@ -2874,7 +2872,6 @@
 #define PCI_DEVICE_ID_SCALEMP_VSMP_CTL  0x1010
 
 #define PCI_VENDOR_ID_COMPUTONE         0x8e0e
-#define PCI_DEVICE_ID_COMPUTONE_IP2EX   0x0291
 #define PCI_DEVICE_ID_COMPUTONE_PG      0x0302
 #define PCI_SUBVENDOR_ID_COMPUTONE      0x8e0e
 #define PCI_SUBDEVICE_ID_COMPUTONE_PG4  0x0001
diff --git a/include/linux/percpu.h b/include/linux/percpu.h
index e7a0b95ed527..495c6543a8f2 100644
--- a/include/linux/percpu.h
+++ b/include/linux/percpu.h
@@ -639,7 +639,7 @@ do {									\
 #  define raw_cpu_add_return_8(pcp, val)        raw_cpu_generic_add_return(pcp, val)
 # endif
 # define raw_cpu_add_return(pcp, val)   \
-        __pcpu_size_call_return2(raw_add_return_, pcp, val)
+        __pcpu_size_call_return2(raw_cpu_add_return_, pcp, val)
 #endif
 
 #define raw_cpu_sub_return(pcp, val)    raw_cpu_add_return(pcp, -(typeof(pcp))(val))
diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
index 3ef6ea12806a..a9209118d80f 100644
--- a/include/linux/perf_event.h
+++ b/include/linux/perf_event.h
@@ -172,6 +172,7 @@ struct perf_event;
 struct pmu {
         struct list_head                entry;
 
+        struct module                   *module;
         struct device                   *dev;
         const struct attribute_group    **attr_groups;
         const char                      *name;
diff --git a/include/linux/platform_data/adau17x1.h b/include/linux/platform_data/adau17x1.h
new file mode 100644
index 000000000000..a81766cae230
--- /dev/null
+++ b/include/linux/platform_data/adau17x1.h
@@ -0,0 +1,109 @@
+/*
+ * Driver for ADAU1761/ADAU1461/ADAU1761/ADAU1961/ADAU1781/ADAU1781 codecs
+ *
+ * Copyright 2011-2014 Analog Devices Inc.
+ * Author: Lars-Peter Clausen <lars@metafoo.de>
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#ifndef __LINUX_PLATFORM_DATA_ADAU17X1_H__
+#define __LINUX_PLATFORM_DATA_ADAU17X1_H__
+
+/**
+ * enum adau17x1_micbias_voltage - Microphone bias voltage
+ * @ADAU17X1_MICBIAS_0_90_AVDD: 0.9 * AVDD
+ * @ADAU17X1_MICBIAS_0_65_AVDD: 0.65 * AVDD
+ */
+enum adau17x1_micbias_voltage {
+        ADAU17X1_MICBIAS_0_90_AVDD = 0,
+        ADAU17X1_MICBIAS_0_65_AVDD = 1,
+};
+
+/**
+ * enum adau1761_digmic_jackdet_pin_mode - Configuration of the JACKDET/MICIN pin
+ * @ADAU1761_DIGMIC_JACKDET_PIN_MODE_NONE: Disable the pin
+ * @ADAU1761_DIGMIC_JACKDET_PIN_MODE_DIGMIC: Configure the pin for usage as
+ *   digital microphone input.
+ * @ADAU1761_DIGMIC_JACKDET_PIN_MODE_JACKDETECT: Configure the pin for jack
+ *  insertion detection.
+ */
+enum adau1761_digmic_jackdet_pin_mode {
+        ADAU1761_DIGMIC_JACKDET_PIN_MODE_NONE,
+        ADAU1761_DIGMIC_JACKDET_PIN_MODE_DIGMIC,
+        ADAU1761_DIGMIC_JACKDET_PIN_MODE_JACKDETECT,
+};
+
+/**
+ * adau1761_jackdetect_debounce_time - Jack insertion detection debounce time
+ * @ADAU1761_JACKDETECT_DEBOUNCE_5MS: 5 milliseconds
+ * @ADAU1761_JACKDETECT_DEBOUNCE_10MS: 10 milliseconds
+ * @ADAU1761_JACKDETECT_DEBOUNCE_20MS: 20 milliseconds
+ * @ADAU1761_JACKDETECT_DEBOUNCE_40MS: 40 milliseconds
+ */
+enum adau1761_jackdetect_debounce_time {
+        ADAU1761_JACKDETECT_DEBOUNCE_5MS = 0,
+        ADAU1761_JACKDETECT_DEBOUNCE_10MS = 1,
+        ADAU1761_JACKDETECT_DEBOUNCE_20MS = 2,
+        ADAU1761_JACKDETECT_DEBOUNCE_40MS = 3,
+};
+
+/**
+ * enum adau1761_output_mode - Output mode configuration
+ * @ADAU1761_OUTPUT_MODE_HEADPHONE: Headphone output
+ * @ADAU1761_OUTPUT_MODE_HEADPHONE_CAPLESS: Capless headphone output
+ * @ADAU1761_OUTPUT_MODE_LINE: Line output
+ */
+enum adau1761_output_mode {
+        ADAU1761_OUTPUT_MODE_HEADPHONE,
+        ADAU1761_OUTPUT_MODE_HEADPHONE_CAPLESS,
+        ADAU1761_OUTPUT_MODE_LINE,
+};
+
+/**
+ * struct adau1761_platform_data - ADAU1761 Codec driver platform data
+ * @input_differential: If true the input pins will be configured in
+ *  differential mode.
+ * @lineout_mode: Output mode for the LOUT/ROUT pins
+ * @headphone_mode: Output mode for the LHP/RHP pins
+ * @digmic_jackdetect_pin_mode: JACKDET/MICIN pin configuration
+ * @jackdetect_debounce_time: Jack insertion detection debounce time.
+ *  Note: This value will only be used, if the JACKDET/MICIN pin is configured
+ *  for jack insertion detection.
+ * @jackdetect_active_low: If true the jack insertion detection is active low.
+ *  Othwise it will be active high.
+ * @micbias_voltage: Microphone voltage bias
+ */
+struct adau1761_platform_data {
+        bool input_differential;
+        enum adau1761_output_mode lineout_mode;
+        enum adau1761_output_mode headphone_mode;
+
+        enum adau1761_digmic_jackdet_pin_mode digmic_jackdetect_pin_mode;
+
+        enum adau1761_jackdetect_debounce_time jackdetect_debounce_time;
+        bool jackdetect_active_low;
+
+        enum adau17x1_micbias_voltage micbias_voltage;
+};
+
+/**
+ * struct adau1781_platform_data - ADAU1781 Codec driver platform data
+ * @left_input_differential: If true configure the left input as
+ * differential input.
+ * @right_input_differential: If true configure the right input as differntial
+ *  input.
+ * @use_dmic: If true configure the MIC pins as digital microphone pins instead
+ *  of analog microphone pins.
+ * @micbias_voltage: Microphone voltage bias
+ */
+struct adau1781_platform_data {
+        bool left_input_differential;
+        bool right_input_differential;
+
+        bool use_dmic;
+
+        enum adau17x1_micbias_voltage micbias_voltage;
+};
+
+#endif
diff --git a/include/linux/platform_data/at91_adc.h b/include/linux/platform_data/at91_adc.h
index b3ca1e94e0c8..7819fc787731 100644
--- a/include/linux/platform_data/at91_adc.h
+++ b/include/linux/platform_data/at91_adc.h
@@ -7,23 +7,10 @@
 #ifndef _AT91_ADC_H_
 #define _AT91_ADC_H_
 
-/**
- * struct at91_adc_reg_desc - Various informations relative to registers
- * @channel_base:       Base offset for the channel data registers
- * @drdy_mask:          Mask of the DRDY field in the relevant registers
-                        (Interruptions registers mostly)
- * @status_register:    Offset of the Interrupt Status Register
- * @trigger_register:   Offset of the Trigger setup register
- * @mr_prescal_mask:    Mask of the PRESCAL field in the adc MR register
- * @mr_startup_mask:    Mask of the STARTUP field in the adc MR register
- */
-struct at91_adc_reg_desc {
-        u8      channel_base;
-        u32     drdy_mask;
-        u8      status_register;
-        u8      trigger_register;
-        u32     mr_prescal_mask;
-        u32     mr_startup_mask;
+enum atmel_adc_ts_type {
+        ATMEL_ADC_TOUCHSCREEN_NONE = 0,
+        ATMEL_ADC_TOUCHSCREEN_4WIRE = 4,
+        ATMEL_ADC_TOUCHSCREEN_5WIRE = 5,
 };
 
 /**
@@ -42,23 +29,21 @@ struct at91_adc_trigger {
 /**
  * struct at91_adc_data - platform data for ADC driver
  * @channels_used:              channels in use on the board as a bitmask
- * @num_channels:               global number of channels available on the board
- * @registers:                  Registers definition on the board
  * @startup_time:               startup time of the ADC in microseconds
  * @trigger_list:               Triggers available in the ADC
  * @trigger_number:             Number of triggers available in the ADC
  * @use_external_triggers:      does the board has external triggers availables
  * @vref:                       Reference voltage for the ADC in millivolts
+ * @touchscreen_type:           If a touchscreen is connected, its type (4 or 5 wires)
  */
 struct at91_adc_data {
         unsigned long                   channels_used;
-        u8                              num_channels;
-        struct at91_adc_reg_desc        *registers;
         u8                              startup_time;
         struct at91_adc_trigger         *trigger_list;
         u8                              trigger_number;
         bool                            use_external_triggers;
         u16                             vref;
+        enum atmel_adc_ts_type          touchscreen_type;
 };
 
 extern void __init at91_add_device_adc(struct at91_adc_data *data);
diff --git a/include/linux/platform_data/atmel.h b/include/linux/platform_data/atmel.h
index e26b0c14edea..4b452c6a2f7b 100644
--- a/include/linux/platform_data/atmel.h
+++ b/include/linux/platform_data/atmel.h
@@ -84,14 +84,6 @@ struct atmel_uart_data {
         short                   use_dma_rx;     /* use receive DMA? */
         void __iomem            *regs;          /* virt. base address, if any */
         struct serial_rs485     rs485;          /* rs485 settings */
-        int                     rts_gpio;       /* optional RTS GPIO */
-};
-
- /* Touchscreen Controller */
-struct at91_tsadcc_data {
-        unsigned int    adc_clock;
-        u8              pendet_debounce;
-        u8              ts_sample_hold_time;
 };
 
 /* CAN */
diff --git a/include/linux/platform_data/edma.h b/include/linux/platform_data/edma.h
index f50821cb64be..eb8d5627d080 100644
--- a/include/linux/platform_data/edma.h
+++ b/include/linux/platform_data/edma.h
@@ -43,15 +43,15 @@
 
 /* PaRAM slots are laid out like this */
 struct edmacc_param {
-        unsigned int opt;
-        unsigned int src;
-        unsigned int a_b_cnt;
-        unsigned int dst;
-        unsigned int src_dst_bidx;
-        unsigned int link_bcntrld;
-        unsigned int src_dst_cidx;
-        unsigned int ccnt;
-};
+        u32 opt;
+        u32 src;
+        u32 a_b_cnt;
+        u32 dst;
+        u32 src_dst_bidx;
+        u32 link_bcntrld;
+        u32 src_dst_cidx;
+        u32 ccnt;
+} __packed;
 
 /* fields in edmacc_param.opt */
 #define SAM             BIT(0)
@@ -130,7 +130,7 @@ void edma_set_src(unsigned slot, dma_addr_t src_port,
                                 enum address_mode mode, enum fifo_width);
 void edma_set_dest(unsigned slot, dma_addr_t dest_port,
                                  enum address_mode mode, enum fifo_width);
-void edma_get_position(unsigned slot, dma_addr_t *src, dma_addr_t *dst);
+dma_addr_t edma_get_position(unsigned slot, bool dst);
 void edma_set_src_index(unsigned slot, s16 src_bidx, s16 src_cidx);
 void edma_set_dest_index(unsigned slot, s16 dest_bidx, s16 dest_cidx);
 void edma_set_transfer_params(unsigned slot, u16 acnt, u16 bcnt, u16 ccnt,
@@ -158,13 +158,6 @@ struct edma_rsv_info {
 
 /* platform_data for EDMA driver */
 struct edma_soc_info {
-
-        /* how many dma resources of each type */
-        unsigned        n_channel;
-        unsigned        n_region;
-        unsigned        n_slot;
-        unsigned        n_tc;
-        unsigned        n_cc;
         /*
          * Default queue is expected to be a low-priority queue.
          * This way, long transfers on the default queue started
@@ -175,7 +168,6 @@ struct edma_soc_info {
         /* Resource reservation for other cores */
         struct edma_rsv_info    *rsv;
 
-        s8      (*queue_tc_mapping)[2];
         s8      (*queue_priority_mapping)[2];
         const s16       (*xbar_chans)[2];
 };
diff --git a/include/linux/platform_data/ipmmu-vmsa.h b/include/linux/platform_data/ipmmu-vmsa.h
new file mode 100644
index 000000000000..5275b3ac6d37
--- /dev/null
+++ b/include/linux/platform_data/ipmmu-vmsa.h
@@ -0,0 +1,24 @@
+/*
+ * IPMMU VMSA Platform Data
+ *
+ * Copyright (C) 2014 Renesas Electronics Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ */
+
+#ifndef __IPMMU_VMSA_H__
+#define __IPMMU_VMSA_H__
+
+struct ipmmu_vmsa_master {
+        const char *name;
+        unsigned int utlb;
+};
+
+struct ipmmu_vmsa_platform_data {
+        const struct ipmmu_vmsa_master *masters;
+        unsigned int num_masters;
+};
+
+#endif /* __IPMMU_VMSA_H__ */
diff --git a/include/linux/platform_data/max3421-hcd.h b/include/linux/platform_data/max3421-hcd.h
new file mode 100644
index 000000000000..0303d1970084
--- /dev/null
+++ b/include/linux/platform_data/max3421-hcd.h
@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2014 eGauge Systems LLC
+ *      Contributed by David Mosberger-Tang <davidm@egauge.net>
+ *
+ * Platform-data structure for MAX3421 USB HCD driver.
+ *
+ */
+#ifndef MAX3421_HCD_PLAT_H_INCLUDED
+#define MAX3421_HCD_PLAT_H_INCLUDED
+
+/*
+ * This structure defines the mapping of certain auxiliary functions to the
+ * MAX3421E GPIO pins.  The chip has eight GP inputs and eight GP outputs.
+ * A value of 0 indicates that the pin is not used/wired to anything.
+ *
+ * At this point, the only control the max3421-hcd driver cares about is
+ * to control Vbus (5V to the peripheral).
+ */
+struct max3421_hcd_platform_data {
+        u8 vbus_gpout;                  /* pin controlling Vbus */
+        u8 vbus_active_level;           /* level that turns on power */
+};
+
+#endif /* MAX3421_HCD_PLAT_H_INCLUDED */
diff --git a/include/linux/platform_data/mipi-csis.h b/include/linux/platform_data/mipi-csis.h
deleted file mode 100644
index c2fd9024717c..000000000000
--- a/include/linux/platform_data/mipi-csis.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * Copyright (C) 2010 - 2012 Samsung Electronics Co., Ltd.
- *
- * Samsung S5P/Exynos SoC series MIPI CSIS device support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __PLAT_SAMSUNG_MIPI_CSIS_H_
-#define __PLAT_SAMSUNG_MIPI_CSIS_H_ __FILE__
-
-/**
- * struct s5p_platform_mipi_csis - platform data for S5P MIPI-CSIS driver
- * @clk_rate:    bus clock frequency
- * @wclk_source: CSI wrapper clock selection: 0 - bus clock, 1 - ext. SCLK_CAM
- * @lanes:       number of data lanes used
- * @hs_settle:   HS-RX settle time
- */
-struct s5p_platform_mipi_csis {
-        unsigned long clk_rate;
-        u8 wclk_source;
-        u8 lanes;
-        u8 hs_settle;
-};
-
-#endif /* __PLAT_SAMSUNG_MIPI_CSIS_H_ */
diff --git a/include/linux/platform_data/syscon.h b/include/linux/platform_data/syscon.h
new file mode 100644
index 000000000000..2354c6fa3726
--- /dev/null
+++ b/include/linux/platform_data/syscon.h
@@ -0,0 +1,8 @@
+#ifndef PLATFORM_DATA_SYSCON_H
+#define PLATFORM_DATA_SYSCON_H
+
+struct syscon_platform_data {
+        const char *label;
+};
+
+#endif
diff --git a/include/linux/plist.h b/include/linux/plist.h
index aa0fb390bd29..8b6c970cff6c 100644
--- a/include/linux/plist.h
+++ b/include/linux/plist.h
@@ -98,6 +98,13 @@ struct plist_node {
 }
 
 /**
+ * PLIST_HEAD - declare and init plist_head
+ * @head:       name for struct plist_head variable
+ */
+#define PLIST_HEAD(head) \
+        struct plist_head head = PLIST_HEAD_INIT(head)
+
+/**
  * PLIST_NODE_INIT - static struct plist_node initializer
  * @node:       struct plist_node variable name
  * @__prio:     initial node priority
@@ -134,6 +141,8 @@ static inline void plist_node_init(struct plist_node *node, int prio)
 extern void plist_add(struct plist_node *node, struct plist_head *head);
 extern void plist_del(struct plist_node *node, struct plist_head *head);
 
+extern void plist_requeue(struct plist_node *node, struct plist_head *head);
+
 /**
  * plist_for_each - iterate over the plist
  * @pos:        the type * to use as a loop counter
@@ -143,6 +152,16 @@ extern void plist_del(struct plist_node *node, struct plist_head *head);
          list_for_each_entry(pos, &(head)->node_list, node_list)
 
 /**
+ * plist_for_each_continue - continue iteration over the plist
+ * @pos:        the type * to use as a loop cursor
+ * @head:       the head for your list
+ *
+ * Continue to iterate over plist, continuing after the current position.
+ */
+#define plist_for_each_continue(pos, head)      \
+         list_for_each_entry_continue(pos, &(head)->node_list, node_list)
+
+/**
  * plist_for_each_safe - iterate safely over a plist of given type
  * @pos:        the type * to use as a loop counter
  * @n:  another type * to use as temporary storage
@@ -163,6 +182,18 @@ extern void plist_del(struct plist_node *node, struct plist_head *head);
          list_for_each_entry(pos, &(head)->node_list, mem.node_list)
 
 /**
+ * plist_for_each_entry_continue - continue iteration over list of given type
+ * @pos:        the type * to use as a loop cursor
+ * @head:       the head for your list
+ * @m:          the name of the list_struct within the struct
+ *
+ * Continue to iterate over list of given type, continuing after
+ * the current position.
+ */
+#define plist_for_each_entry_continue(pos, head, m)     \
+        list_for_each_entry_continue(pos, &(head)->node_list, m.node_list)
+
+/**
  * plist_for_each_entry_safe - iterate safely over list of given type
  * @pos:        the type * to use as a loop counter
  * @n:          another type * to use as temporary storage
@@ -229,6 +260,20 @@ static inline int plist_node_empty(const struct plist_node *node)
 #endif
 
 /**
+ * plist_next - get the next entry in list
+ * @pos:        the type * to cursor
+ */
+#define plist_next(pos) \
+        list_next_entry(pos, node_list)
+
+/**
+ * plist_prev - get the prev entry in list
+ * @pos:        the type * to cursor
+ */
+#define plist_prev(pos) \
+        list_prev_entry(pos, node_list)
+
+/**
  * plist_first - return the first node (and thus, highest priority)
  * @head:       the &struct plist_head pointer
  *
diff --git a/include/linux/pm.h b/include/linux/pm.h
index d915d0345fa1..72c0fe098a27 100644
--- a/include/linux/pm.h
+++ b/include/linux/pm.h
@@ -93,13 +93,23 @@ typedef struct pm_message {
  *      been registered) to recover from the race condition.
  *      This method is executed for all kinds of suspend transitions and is
  *      followed by one of the suspend callbacks: @suspend(), @freeze(), or
- *      @poweroff().  The PM core executes subsystem-level @prepare() for all
- *      devices before starting to invoke suspend callbacks for any of them, so
- *      generally devices may be assumed to be functional or to respond to
- *      runtime resume requests while @prepare() is being executed.  However,
- *      device drivers may NOT assume anything about the availability of user
- *      space at that time and it is NOT valid to request firmware from within
- *      @prepare() (it's too late to do that).  It also is NOT valid to allocate
+ *      @poweroff().  If the transition is a suspend to memory or standby (that
+ *      is, not related to hibernation), the return value of @prepare() may be
+ *      used to indicate to the PM core to leave the device in runtime suspend
+ *      if applicable.  Namely, if @prepare() returns a positive number, the PM
+ *      core will understand that as a declaration that the device appears to be
+ *      runtime-suspended and it may be left in that state during the entire
+ *      transition and during the subsequent resume if all of its descendants
+ *      are left in runtime suspend too.  If that happens, @complete() will be
+ *      executed directly after @prepare() and it must ensure the proper
+ *      functioning of the device after the system resume.
+ *      The PM core executes subsystem-level @prepare() for all devices before
+ *      starting to invoke suspend callbacks for any of them, so generally
+ *      devices may be assumed to be functional or to respond to runtime resume
+ *      requests while @prepare() is being executed.  However, device drivers
+ *      may NOT assume anything about the availability of user space at that
+ *      time and it is NOT valid to request firmware from within @prepare()
+ *      (it's too late to do that).  It also is NOT valid to allocate
  *      substantial amounts of memory from @prepare() in the GFP_KERNEL mode.
  *      [To work around these limitations, drivers may register suspend and
  *      hibernation notifiers to be executed before the freezing of tasks.]
@@ -112,7 +122,16 @@ typedef struct pm_message {
  *      of the other devices that the PM core has unsuccessfully attempted to
  *      suspend earlier).
  *      The PM core executes subsystem-level @complete() after it has executed
- *      the appropriate resume callbacks for all devices.
+ *      the appropriate resume callbacks for all devices.  If the corresponding
+ *      @prepare() at the beginning of the suspend transition returned a
+ *      positive number and the device was left in runtime suspend (without
+ *      executing any suspend and resume callbacks for it), @complete() will be
+ *      the only callback executed for the device during resume.  In that case,
+ *      @complete() must be prepared to do whatever is necessary to ensure the
+ *      proper functioning of the device after the system resume.  To this end,
+ *      @complete() can check the power.direct_complete flag of the device to
+ *      learn whether (unset) or not (set) the previous suspend and resume
+ *      callbacks have been executed for it.
  *
  * @suspend: Executed before putting the system into a sleep state in which the
  *      contents of main memory are preserved.  The exact action to perform
@@ -546,6 +565,7 @@ struct dev_pm_info {
         bool                    is_late_suspended:1;
         bool                    ignore_children:1;
         bool                    early_init:1;   /* Owned by the PM core */
+        bool                    direct_complete:1;      /* Owned by the PM core */
         spinlock_t              lock;
 #ifdef CONFIG_PM_SLEEP
         struct list_head        entry;
diff --git a/include/linux/pm_opp.h b/include/linux/pm_opp.h
index 5151b0059585..0330217abfad 100644
--- a/include/linux/pm_opp.h
+++ b/include/linux/pm_opp.h
@@ -15,7 +15,6 @@
 #define __LINUX_OPP_H__
 
 #include <linux/err.h>
-#include <linux/cpufreq.h>
 #include <linux/notifier.h>
 
 struct dev_pm_opp;
@@ -117,23 +116,4 @@ static inline int of_init_opp_table(struct device *dev)
 }
 #endif
 
-#if defined(CONFIG_CPU_FREQ) && defined(CONFIG_PM_OPP)
-int dev_pm_opp_init_cpufreq_table(struct device *dev,
-                            struct cpufreq_frequency_table **table);
-void dev_pm_opp_free_cpufreq_table(struct device *dev,
-                                struct cpufreq_frequency_table **table);
-#else
-static inline int dev_pm_opp_init_cpufreq_table(struct device *dev,
-                            struct cpufreq_frequency_table **table)
-{
-        return -EINVAL;
-}
-
-static inline
-void dev_pm_opp_free_cpufreq_table(struct device *dev,
-                                struct cpufreq_frequency_table **table)
-{
-}
-#endif          /* CONFIG_CPU_FREQ */
-
 #endif          /* __LINUX_OPP_H__ */
diff --git a/include/linux/pm_runtime.h b/include/linux/pm_runtime.h
index 2a5897a4afbc..43fd6716f662 100644
--- a/include/linux/pm_runtime.h
+++ b/include/linux/pm_runtime.h
@@ -101,6 +101,11 @@ static inline bool pm_runtime_status_suspended(struct device *dev)
         return dev->power.runtime_status == RPM_SUSPENDED;
 }
 
+static inline bool pm_runtime_suspended_if_enabled(struct device *dev)
+{
+        return pm_runtime_status_suspended(dev) && dev->power.disable_depth == 1;
+}
+
 static inline bool pm_runtime_enabled(struct device *dev)
 {
         return !dev->power.disable_depth;
@@ -150,6 +155,7 @@ static inline void device_set_run_wake(struct device *dev, bool enable) {}
 static inline bool pm_runtime_suspended(struct device *dev) { return false; }
 static inline bool pm_runtime_active(struct device *dev) { return true; }
 static inline bool pm_runtime_status_suspended(struct device *dev) { return false; }
+static inline bool pm_runtime_suspended_if_enabled(struct device *dev) { return false; }
 static inline bool pm_runtime_enabled(struct device *dev) { return false; }
 
 static inline void pm_runtime_no_callbacks(struct device *dev) {}
diff --git a/include/linux/power_supply.h b/include/linux/power_supply.h
index c9dc4e09854c..f2b76aeaf4e4 100644
--- a/include/linux/power_supply.h
+++ b/include/linux/power_supply.h
@@ -264,6 +264,8 @@ static inline int power_supply_is_system_supplied(void) { return -ENOSYS; }
 
 extern int power_supply_register(struct device *parent,
                                  struct power_supply *psy);
+extern int power_supply_register_no_ws(struct device *parent,
+                                 struct power_supply *psy);
 extern void power_supply_unregister(struct power_supply *psy);
 extern int power_supply_powers(struct power_supply *psy, struct device *dev);
 
diff --git a/include/linux/printk.h b/include/linux/printk.h
index 8752f7595b27..319ff7e53efb 100644
--- a/include/linux/printk.h
+++ b/include/linux/printk.h
@@ -30,6 +30,17 @@ static inline const char *printk_skip_level(const char *buffer)
         return buffer;
 }
 
+/* printk's without a loglevel use this.. */
+#define DEFAULT_MESSAGE_LOGLEVEL CONFIG_DEFAULT_MESSAGE_LOGLEVEL
+
+/* We show everything that is MORE important than this.. */
+#define CONSOLE_LOGLEVEL_SILENT  0 /* Mum's the word */
+#define CONSOLE_LOGLEVEL_MIN     1 /* Minimum loglevel we let people use */
+#define CONSOLE_LOGLEVEL_QUIET   4 /* Shhh ..., when booted with "quiet" */
+#define CONSOLE_LOGLEVEL_DEFAULT 7 /* anything MORE serious than KERN_DEBUG */
+#define CONSOLE_LOGLEVEL_DEBUG  10 /* issue debug messages */
+#define CONSOLE_LOGLEVEL_MOTORMOUTH 15  /* You can't shut this one up */
+
 extern int console_printk[];
 
 #define console_loglevel (console_printk[0])
@@ -39,13 +50,13 @@ extern int console_printk[];
 
 static inline void console_silent(void)
 {
-        console_loglevel = 0;
+        console_loglevel = CONSOLE_LOGLEVEL_SILENT;
 }
 
 static inline void console_verbose(void)
 {
         if (console_loglevel)
-                console_loglevel = 15;
+                console_loglevel = CONSOLE_LOGLEVEL_MOTORMOUTH;
 }
 
 struct va_format {
@@ -128,9 +139,9 @@ asmlinkage __printf(1, 2) __cold
 int printk(const char *fmt, ...);
 
 /*
- * Special printk facility for scheduler use only, _DO_NOT_USE_ !
+ * Special printk facility for scheduler/timekeeping use only, _DO_NOT_USE_ !
  */
-__printf(1, 2) __cold int printk_sched(const char *fmt, ...);
+__printf(1, 2) __cold int printk_deferred(const char *fmt, ...);
 
 /*
  * Please don't use printk_ratelimit(), because it shares ratelimiting state
@@ -165,7 +176,7 @@ int printk(const char *s, ...)
         return 0;
 }
 static inline __printf(1, 2) __cold
-int printk_sched(const char *s, ...)
+int printk_deferred(const char *s, ...)
 {
         return 0;
 }
@@ -210,6 +221,12 @@ extern asmlinkage void dump_stack(void) __cold;
 #define pr_fmt(fmt) fmt
 #endif
 
+/*
+ * These can be used to print at the various log levels.
+ * All of these will print unconditionally, although note that pr_debug()
+ * and other debug macros are compiled out unless either DEBUG is defined
+ * or CONFIG_DYNAMIC_DEBUG is set.
+ */
 #define pr_emerg(fmt, ...) \
         printk(KERN_EMERG pr_fmt(fmt), ##__VA_ARGS__)
 #define pr_alert(fmt, ...) \
@@ -266,9 +283,20 @@ extern asmlinkage void dump_stack(void) __cold;
                 printk(fmt, ##__VA_ARGS__);                     \
         }                                                       \
 })
+#define printk_deferred_once(fmt, ...)                          \
+({                                                              \
+        static bool __print_once __read_mostly;                 \
+                                                                \
+        if (!__print_once) {                                    \
+                __print_once = true;                            \
+                printk_deferred(fmt, ##__VA_ARGS__);            \
+        }                                                       \
+})
 #else
 #define printk_once(fmt, ...)                                   \
         no_printk(fmt, ##__VA_ARGS__)
+#define printk_deferred_once(fmt, ...)                          \
+        no_printk(fmt, ##__VA_ARGS__)
 #endif
 
 #define pr_emerg_once(fmt, ...)                                 \
diff --git a/include/linux/proc_fs.h b/include/linux/proc_fs.h
index 608e60a74c3c..9d117f61d976 100644
--- a/include/linux/proc_fs.h
+++ b/include/linux/proc_fs.h
@@ -44,6 +44,10 @@ extern int remove_proc_subtree(const char *, struct proc_dir_entry *);
 
 #else /* CONFIG_PROC_FS */
 
+static inline void proc_root_init(void)
+{
+}
+
 static inline void proc_flush_task(struct task_struct *task)
 {
 }
diff --git a/include/linux/ptrace.h b/include/linux/ptrace.h
index 07d0df6bf768..077904c8b70d 100644
--- a/include/linux/ptrace.h
+++ b/include/linux/ptrace.h
@@ -5,6 +5,7 @@
 #include <linux/sched.h>                /* For struct task_struct.  */
 #include <linux/err.h>                  /* for IS_ERR_VALUE */
 #include <linux/bug.h>                  /* For BUG_ON.  */
+#include <linux/pid_namespace.h>        /* For task_active_pid_ns.  */
 #include <uapi/linux/ptrace.h>
 
 /*
@@ -129,6 +130,37 @@ static inline void ptrace_event(int event, unsigned long message)
 }
 
 /**
+ * ptrace_event_pid - possibly stop for a ptrace event notification
+ * @event:      %PTRACE_EVENT_* value to report
+ * @pid:        process identifier for %PTRACE_GETEVENTMSG to return
+ *
+ * Check whether @event is enabled and, if so, report @event and @pid
+ * to the ptrace parent.  @pid is reported as the pid_t seen from the
+ * the ptrace parent's pid namespace.
+ *
+ * Called without locks.
+ */
+static inline void ptrace_event_pid(int event, struct pid *pid)
+{
+        /*
+         * FIXME: There's a potential race if a ptracer in a different pid
+         * namespace than parent attaches between computing message below and
+         * when we acquire tasklist_lock in ptrace_stop().  If this happens,
+         * the ptracer will get a bogus pid from PTRACE_GETEVENTMSG.
+         */
+        unsigned long message = 0;
+        struct pid_namespace *ns;
+
+        rcu_read_lock();
+        ns = task_active_pid_ns(rcu_dereference(current->parent));
+        if (ns)
+                message = pid_nr_ns(pid, ns);
+        rcu_read_unlock();
+
+        ptrace_event(event, message);
+}
+
+/**
  * ptrace_init_task - initialize ptrace state for a new child
  * @child:              new child task
  * @ptrace:             true if child should be ptrace'd by parent's tracer
diff --git a/include/linux/rcupdate.h b/include/linux/rcupdate.h
index 00a7fd61b3c6..5a75d19aa661 100644
--- a/include/linux/rcupdate.h
+++ b/include/linux/rcupdate.h
@@ -44,6 +44,7 @@
 #include <linux/debugobjects.h>
 #include <linux/bug.h>
 #include <linux/compiler.h>
+#include <linux/percpu.h>
 #include <asm/barrier.h>
 
 extern int rcu_expedited; /* for sysctl */
@@ -51,7 +52,17 @@ extern int rcu_expedited; /* for sysctl */
 extern int rcutorture_runnable; /* for sysctl */
 #endif /* #ifdef CONFIG_RCU_TORTURE_TEST */
 
+enum rcutorture_type {
+        RCU_FLAVOR,
+        RCU_BH_FLAVOR,
+        RCU_SCHED_FLAVOR,
+        SRCU_FLAVOR,
+        INVALID_RCU_FLAVOR
+};
+
 #if defined(CONFIG_TREE_RCU) || defined(CONFIG_TREE_PREEMPT_RCU)
+void rcutorture_get_gp_data(enum rcutorture_type test_type, int *flags,
+                            unsigned long *gpnum, unsigned long *completed);
 void rcutorture_record_test_transition(void);
 void rcutorture_record_progress(unsigned long vernum);
 void do_trace_rcu_torture_read(const char *rcutorturename,
@@ -60,6 +71,15 @@ void do_trace_rcu_torture_read(const char *rcutorturename,
                                unsigned long c_old,
                                unsigned long c);
 #else
+static inline void rcutorture_get_gp_data(enum rcutorture_type test_type,
+                                          int *flags,
+                                          unsigned long *gpnum,
+                                          unsigned long *completed)
+{
+        *flags = 0;
+        *gpnum = 0;
+        *completed = 0;
+}
 static inline void rcutorture_record_test_transition(void)
 {
 }
@@ -228,6 +248,18 @@ void rcu_idle_exit(void);
 void rcu_irq_enter(void);
 void rcu_irq_exit(void);
 
+#ifdef CONFIG_RCU_STALL_COMMON
+void rcu_sysrq_start(void);
+void rcu_sysrq_end(void);
+#else /* #ifdef CONFIG_RCU_STALL_COMMON */
+static inline void rcu_sysrq_start(void)
+{
+}
+static inline void rcu_sysrq_end(void)
+{
+}
+#endif /* #else #ifdef CONFIG_RCU_STALL_COMMON */
+
 #ifdef CONFIG_RCU_USER_QS
 void rcu_user_enter(void);
 void rcu_user_exit(void);
@@ -268,6 +300,41 @@ bool __rcu_is_watching(void);
 #endif /* #if defined(CONFIG_DEBUG_LOCK_ALLOC) || defined(CONFIG_RCU_TRACE) || defined(CONFIG_SMP) */
 
 /*
+ * Hooks for cond_resched() and friends to avoid RCU CPU stall warnings.
+ */
+
+#define RCU_COND_RESCHED_LIM 256        /* ms vs. 100s of ms. */
+DECLARE_PER_CPU(int, rcu_cond_resched_count);
+void rcu_resched(void);
+
+/*
+ * Is it time to report RCU quiescent states?
+ *
+ * Note unsynchronized access to rcu_cond_resched_count.  Yes, we might
+ * increment some random CPU's count, and possibly also load the result from
+ * yet another CPU's count.  We might even clobber some other CPU's attempt
+ * to zero its counter.  This is all OK because the goal is not precision,
+ * but rather reasonable amortization of rcu_note_context_switch() overhead
+ * and extremely high probability of avoiding RCU CPU stall warnings.
+ * Note that this function has to be preempted in just the wrong place,
+ * many thousands of times in a row, for anything bad to happen.
+ */
+static inline bool rcu_should_resched(void)
+{
+        return raw_cpu_inc_return(rcu_cond_resched_count) >=
+               RCU_COND_RESCHED_LIM;
+}
+
+/*
+ * Report quiscent states to RCU if it is time to do so.
+ */
+static inline void rcu_cond_resched(void)
+{
+        if (unlikely(rcu_should_resched()))
+                rcu_resched();
+}
+
+/*
  * Infrastructure to implement the synchronize_() primitives in
  * TREE_RCU and rcu_barrier_() primitives in TINY_RCU.
  */
@@ -328,7 +395,7 @@ extern struct lockdep_map rcu_lock_map;
 extern struct lockdep_map rcu_bh_lock_map;
 extern struct lockdep_map rcu_sched_lock_map;
 extern struct lockdep_map rcu_callback_map;
-extern int debug_lockdep_rcu_enabled(void);
+int debug_lockdep_rcu_enabled(void);
 
 /**
  * rcu_read_lock_held() - might we be in RCU read-side critical section?
@@ -949,6 +1016,9 @@ static inline notrace void rcu_read_unlock_sched_notrace(void)
  * pointers, but you must use rcu_assign_pointer() to initialize the
  * external-to-structure pointer -after- you have completely initialized
  * the reader-accessible portions of the linked structure.
+ *
+ * Note that unlike rcu_assign_pointer(), RCU_INIT_POINTER() provides no
+ * ordering guarantees for either the CPU or the compiler.
  */
 #define RCU_INIT_POINTER(p, v) \
         do { \
diff --git a/include/linux/rcutiny.h b/include/linux/rcutiny.h
index 425c659d54e5..d40a6a451330 100644
--- a/include/linux/rcutiny.h
+++ b/include/linux/rcutiny.h
@@ -119,6 +119,10 @@ static inline void rcu_sched_force_quiescent_state(void)
 {
 }
 
+static inline void show_rcu_gp_kthreads(void)
+{
+}
+
 static inline void rcu_cpu_stall_reset(void)
 {
 }
diff --git a/include/linux/rcutree.h b/include/linux/rcutree.h
index a59ca05fd4e3..3e2f5d432743 100644
--- a/include/linux/rcutree.h
+++ b/include/linux/rcutree.h
@@ -84,6 +84,7 @@ extern unsigned long rcutorture_vernum;
 long rcu_batches_completed(void);
 long rcu_batches_completed_bh(void);
 long rcu_batches_completed_sched(void);
+void show_rcu_gp_kthreads(void);
 
 void rcu_force_quiescent_state(void);
 void rcu_bh_force_quiescent_state(void);
diff --git a/include/linux/regmap.h b/include/linux/regmap.h
index 85691b9b4fa7..7b0e4b425cdf 100644
--- a/include/linux/regmap.h
+++ b/include/linux/regmap.h
@@ -276,6 +276,10 @@ typedef int (*regmap_hw_async_write)(void *context,
 typedef int (*regmap_hw_read)(void *context,
                               const void *reg_buf, size_t reg_size,
                               void *val_buf, size_t val_size);
+typedef int (*regmap_hw_reg_read)(void *context, unsigned int reg,
+                                  unsigned int *val);
+typedef int (*regmap_hw_reg_write)(void *context, unsigned int reg,
+                                   unsigned int val);
 typedef struct regmap_async *(*regmap_hw_async_alloc)(void);
 typedef void (*regmap_hw_free_context)(void *context);
 
@@ -309,7 +313,9 @@ struct regmap_bus {
         regmap_hw_write write;
         regmap_hw_gather_write gather_write;
         regmap_hw_async_write async_write;
+        regmap_hw_reg_write reg_write;
         regmap_hw_read read;
+        regmap_hw_reg_read reg_read;
         regmap_hw_free_context free_context;
         regmap_hw_async_alloc async_alloc;
         u8 read_flag_mask;
diff --git a/include/linux/regulator/consumer.h b/include/linux/regulator/consumer.h
index 1a4a8c157b31..a2d9d81038d1 100644
--- a/include/linux/regulator/consumer.h
+++ b/include/linux/regulator/consumer.h
@@ -151,11 +151,13 @@ int regulator_register_supply_alias(struct device *dev, const char *id,
                                     const char *alias_id);
 void regulator_unregister_supply_alias(struct device *dev, const char *id);
 
-int regulator_bulk_register_supply_alias(struct device *dev, const char **id,
+int regulator_bulk_register_supply_alias(struct device *dev,
+                                         const char *const *id,
                                          struct device *alias_dev,
-                                         const char **alias_id, int num_id);
+                                         const char *const *alias_id,
+                                         int num_id);
 void regulator_bulk_unregister_supply_alias(struct device *dev,
-                                            const char **id, int num_id);
+                                            const char * const *id, int num_id);
 
 int devm_regulator_register_supply_alias(struct device *dev, const char *id,
                                          struct device *alias_dev,
@@ -164,12 +166,12 @@ void devm_regulator_unregister_supply_alias(struct device *dev,
                                             const char *id);
 
 int devm_regulator_bulk_register_supply_alias(struct device *dev,
-                                              const char **id,
+                                              const char *const *id,
                                               struct device *alias_dev,
-                                              const char **alias_id,
+                                              const char *const *alias_id,
                                               int num_id);
 void devm_regulator_bulk_unregister_supply_alias(struct device *dev,
-                                                 const char **id,
+                                                 const char *const *id,
                                                  int num_id);
 
 /* regulator output control and status */
@@ -290,17 +292,17 @@ static inline void regulator_unregister_supply_alias(struct device *dev,
 }
 
 static inline int regulator_bulk_register_supply_alias(struct device *dev,
-                                                       const char **id,
-                                                       struct device *alias_dev,
-                                                       const char **alias_id,
-                                                       int num_id)
+                                                const char *const *id,
+                                                struct device *alias_dev,
+                                                const char * const *alias_id,
+                                                int num_id)
 {
         return 0;
 }
 
 static inline void regulator_bulk_unregister_supply_alias(struct device *dev,
-                                                          const char **id,
-                                                          int num_id)
+                                                const char * const *id,
+                                                int num_id)
 {
 }
 
@@ -317,15 +319,17 @@ static inline void devm_regulator_unregister_supply_alias(struct device *dev,
 {
 }
 
-static inline int devm_regulator_bulk_register_supply_alias(
-                struct device *dev, const char **id, struct device *alias_dev,
-                const char **alias_id, int num_id)
+static inline int devm_regulator_bulk_register_supply_alias(struct device *dev,
+                                                const char *const *id,
+                                                struct device *alias_dev,
+                                                const char *const *alias_id,
+                                                int num_id)
 {
         return 0;
 }
 
 static inline void devm_regulator_bulk_unregister_supply_alias(
-                struct device *dev, const char **id, int num_id)
+        struct device *dev, const char *const *id, int num_id)
 {
 }
 
@@ -397,6 +401,12 @@ static inline int regulator_set_voltage(struct regulator *regulator,
         return 0;
 }
 
+static inline int regulator_set_voltage_time(struct regulator *regulator,
+                                             int old_uV, int new_uV)
+{
+        return 0;
+}
+
 static inline int regulator_get_voltage(struct regulator *regulator)
 {
         return -EINVAL;
diff --git a/include/linux/reset.h b/include/linux/reset.h
index c0eda5023d74..349f150ae12c 100644
--- a/include/linux/reset.h
+++ b/include/linux/reset.h
@@ -2,6 +2,7 @@
 #define _LINUX_RESET_H_
 
 struct device;
+struct device_node;
 struct reset_control;
 
 #ifdef CONFIG_RESET_CONTROLLER
@@ -33,6 +34,9 @@ static inline struct reset_control *devm_reset_control_get_optional(
         return devm_reset_control_get(dev, id);
 }
 
+struct reset_control *of_reset_control_get(struct device_node *node,
+                                           const char *id);
+
 #else
 
 static inline int reset_control_reset(struct reset_control *rstc)
@@ -75,6 +79,12 @@ static inline struct reset_control *devm_reset_control_get_optional(
         return ERR_PTR(-ENOSYS);
 }
 
+static inline struct reset_control *of_reset_control_get(
+                                struct device_node *node, const char *id)
+{
+        return ERR_PTR(-ENOSYS);
+}
+
 #endif /* CONFIG_RESET_CONTROLLER */
 
 #endif
diff --git a/include/linux/rmap.h b/include/linux/rmap.h
index b66c2110cb1f..be574506e6a9 100644
--- a/include/linux/rmap.h
+++ b/include/linux/rmap.h
@@ -72,10 +72,9 @@ struct anon_vma_chain {
 };
 
 enum ttu_flags {
-        TTU_UNMAP = 0,                  /* unmap mode */
-        TTU_MIGRATION = 1,              /* migration mode */
-        TTU_MUNLOCK = 2,                /* munlock mode */
-        TTU_ACTION_MASK = 0xff,
+        TTU_UNMAP = 1,                  /* unmap mode */
+        TTU_MIGRATION = 2,              /* migration mode */
+        TTU_MUNLOCK = 4,                /* munlock mode */
 
         TTU_IGNORE_MLOCK = (1 << 8),    /* ignore mlock */
         TTU_IGNORE_ACCESS = (1 << 9),   /* don't age */
@@ -183,14 +182,10 @@ static inline void page_dup_rmap(struct page *page)
  */
 int page_referenced(struct page *, int is_locked,
                         struct mem_cgroup *memcg, unsigned long *vm_flags);
-int page_referenced_one(struct page *, struct vm_area_struct *,
-        unsigned long address, void *arg);
 
 #define TTU_ACTION(x) ((x) & TTU_ACTION_MASK)
 
 int try_to_unmap(struct page *, enum ttu_flags flags);
-int try_to_unmap_one(struct page *, struct vm_area_struct *,
-                        unsigned long address, void *arg);
 
 /*
  * Called from mm/filemap_xip.c to unmap empty zero page
diff --git a/include/linux/sched.h b/include/linux/sched.h
index 221b2bde3723..ea74596014a2 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -137,12 +137,6 @@ struct filename;
 #define VMACACHE_MASK (VMACACHE_SIZE - 1)
 
 /*
- * List of flags we want to share for kernel threads,
- * if only because they are not used by them anyway.
- */
-#define CLONE_KERNEL    (CLONE_FS | CLONE_FILES | CLONE_SIGHAND)
-
-/*
  * These are the constant used to fake the fixed-point load-average
  * counting. Some notes:
  *  - 11 bit fractions expand to 22 bits by the multiplies: this gives
@@ -745,7 +739,6 @@ static inline int signal_group_exit(const struct signal_struct *sig)
 struct user_struct {
         atomic_t __count;       /* reference count */
         atomic_t processes;     /* How many processes does this user have? */
-        atomic_t files;         /* How many open files does this user have? */
         atomic_t sigpending;    /* How many pending signals does this user have? */
 #ifdef CONFIG_INOTIFY_USER
         atomic_t inotify_watches; /* How many inotify watches does this user have? */
@@ -870,6 +863,7 @@ enum cpu_idle_type {
 #define SD_BALANCE_WAKE         0x0010  /* Balance on wakeup */
 #define SD_WAKE_AFFINE          0x0020  /* Wake task to waking CPU */
 #define SD_SHARE_CPUPOWER       0x0080  /* Domain members share cpu power */
+#define SD_SHARE_POWERDOMAIN    0x0100  /* Domain members share power domain */
 #define SD_SHARE_PKG_RESOURCES  0x0200  /* Domain members share cpu pkg resources */
 #define SD_SERIALIZE            0x0400  /* Only a single load balancing instance */
 #define SD_ASYM_PACKING         0x0800  /* Place busy groups earlier in the domain */
@@ -877,7 +871,26 @@ enum cpu_idle_type {
 #define SD_OVERLAP              0x2000  /* sched_domains of this level overlap */
 #define SD_NUMA                 0x4000  /* cross-node balancing */
 
-extern int __weak arch_sd_sibiling_asym_packing(void);
+#ifdef CONFIG_SCHED_SMT
+static inline const int cpu_smt_flags(void)
+{
+        return SD_SHARE_CPUPOWER | SD_SHARE_PKG_RESOURCES;
+}
+#endif
+
+#ifdef CONFIG_SCHED_MC
+static inline const int cpu_core_flags(void)
+{
+        return SD_SHARE_PKG_RESOURCES;
+}
+#endif
+
+#ifdef CONFIG_NUMA
+static inline const int cpu_numa_flags(void)
+{
+        return SD_NUMA;
+}
+#endif
 
 struct sched_domain_attr {
         int relax_domain_level;
@@ -985,6 +998,38 @@ void free_sched_domains(cpumask_var_t doms[], unsigned int ndoms);
 
 bool cpus_share_cache(int this_cpu, int that_cpu);
 
+typedef const struct cpumask *(*sched_domain_mask_f)(int cpu);
+typedef const int (*sched_domain_flags_f)(void);
+
+#define SDTL_OVERLAP    0x01
+
+struct sd_data {
+        struct sched_domain **__percpu sd;
+        struct sched_group **__percpu sg;
+        struct sched_group_power **__percpu sgp;
+};
+
+struct sched_domain_topology_level {
+        sched_domain_mask_f mask;
+        sched_domain_flags_f sd_flags;
+        int                 flags;
+        int                 numa_level;
+        struct sd_data      data;
+#ifdef CONFIG_SCHED_DEBUG
+        char                *name;
+#endif
+};
+
+extern struct sched_domain_topology_level *sched_domain_topology;
+
+extern void set_sched_topology(struct sched_domain_topology_level *tl);
+
+#ifdef CONFIG_SCHED_DEBUG
+# define SD_INIT_NAME(type)             .name = #type
+#else
+# define SD_INIT_NAME(type)
+#endif
+
 #else /* CONFIG_SMP */
 
 struct sched_domain_attr;
@@ -1123,8 +1168,8 @@ struct sched_dl_entity {
 
         /*
          * Original scheduling parameters. Copied here from sched_attr
-         * during sched_setscheduler2(), they will remain the same until
-         * the next sched_setscheduler2().
+         * during sched_setattr(), they will remain the same until
+         * the next sched_setattr().
          */
         u64 dl_runtime;         /* maximum runtime for each instance    */
         u64 dl_deadline;        /* relative deadline of each instance   */
@@ -2369,9 +2414,6 @@ extern void flush_itimer_signals(void);
 
 extern void do_group_exit(int);
 
-extern int allow_signal(int);
-extern int disallow_signal(int);
-
 extern int do_execve(struct filename *,
                      const char __user * const __user *,
                      const char __user * const __user *);
@@ -2723,51 +2765,9 @@ static inline int spin_needbreak(spinlock_t *lock)
 
 /*
  * Idle thread specific functions to determine the need_resched
- * polling state. We have two versions, one based on TS_POLLING in
- * thread_info.status and one based on TIF_POLLING_NRFLAG in
- * thread_info.flags
+ * polling state.
  */
-#ifdef TS_POLLING
-static inline int tsk_is_polling(struct task_struct *p)
-{
-        return task_thread_info(p)->status & TS_POLLING;
-}
-static inline void __current_set_polling(void)
-{
-        current_thread_info()->status |= TS_POLLING;
-}
-
-static inline bool __must_check current_set_polling_and_test(void)
-{
-        __current_set_polling();
-
-        /*
-         * Polling state must be visible before we test NEED_RESCHED,
-         * paired by resched_task()
-         */
-        smp_mb();
-
-        return unlikely(tif_need_resched());
-}
-
-static inline void __current_clr_polling(void)
-{
-        current_thread_info()->status &= ~TS_POLLING;
-}
-
-static inline bool __must_check current_clr_polling_and_test(void)
-{
-        __current_clr_polling();
-
-        /*
-         * Polling state must be visible before we test NEED_RESCHED,
-         * paired by resched_task()
-         */
-        smp_mb();
-
-        return unlikely(tif_need_resched());
-}
-#elif defined(TIF_POLLING_NRFLAG)
+#ifdef TIF_POLLING_NRFLAG
 static inline int tsk_is_polling(struct task_struct *p)
 {
         return test_tsk_thread_flag(p, TIF_POLLING_NRFLAG);
@@ -2785,10 +2785,8 @@ static inline bool __must_check current_set_polling_and_test(void)
         /*
          * Polling state must be visible before we test NEED_RESCHED,
          * paired by resched_task()
-         *
-         * XXX: assumes set/clear bit are identical barrier wise.
          */
-        smp_mb__after_clear_bit();
+        smp_mb__after_atomic();
 
         return unlikely(tif_need_resched());
 }
@@ -2806,7 +2804,7 @@ static inline bool __must_check current_clr_polling_and_test(void)
          * Polling state must be visible before we test NEED_RESCHED,
          * paired by resched_task()
          */
-        smp_mb__after_clear_bit();
+        smp_mb__after_atomic();
 
         return unlikely(tif_need_resched());
 }
@@ -2959,7 +2957,7 @@ static inline void inc_syscw(struct task_struct *tsk)
 #define TASK_SIZE_OF(tsk)       TASK_SIZE
 #endif
 
-#ifdef CONFIG_MM_OWNER
+#ifdef CONFIG_MEMCG
 extern void mm_update_next_owner(struct mm_struct *mm);
 extern void mm_init_owner(struct mm_struct *mm, struct task_struct *p);
 #else
@@ -2970,7 +2968,7 @@ static inline void mm_update_next_owner(struct mm_struct *mm)
 static inline void mm_init_owner(struct mm_struct *mm, struct task_struct *p)
 {
 }
-#endif /* CONFIG_MM_OWNER */
+#endif /* CONFIG_MEMCG */
 
 static inline unsigned long task_rlimit(const struct task_struct *tsk,
                 unsigned int limit)
diff --git a/include/linux/sched/prio.h b/include/linux/sched/prio.h
index ac322583c820..d9cf5a5762d9 100644
--- a/include/linux/sched/prio.h
+++ b/include/linux/sched/prio.h
@@ -41,4 +41,20 @@
 #define TASK_USER_PRIO(p)       USER_PRIO((p)->static_prio)
 #define MAX_USER_PRIO           (USER_PRIO(MAX_PRIO))
 
+/*
+ * Convert nice value [19,-20] to rlimit style value [1,40].
+ */
+static inline long nice_to_rlimit(long nice)
+{
+        return (MAX_NICE - nice + 1);
+}
+
+/*
+ * Convert rlimit style value [1,40] to nice value [-20, 19].
+ */
+static inline long rlimit_to_nice(long prio)
+{
+        return (MAX_NICE - prio + 1);
+}
+
 #endif /* _SCHED_PRIO_H */
diff --git a/include/linux/sched/sysctl.h b/include/linux/sched/sysctl.h
index 8045a554cafb..596a0e007c62 100644
--- a/include/linux/sched/sysctl.h
+++ b/include/linux/sched/sysctl.h
@@ -25,6 +25,10 @@ enum { sysctl_hung_task_timeout_secs = 0 };
  * Because the kernel adds some informative sections to a image of program at
  * generating coredump, we need some margin. The number of extra sections is
  * 1-3 now and depends on arch. We use "5" as safe margin, here.
+ *
+ * ELF extended numbering allows more than 65535 sections, so 16-bit bound is
+ * not a hard limit any more. Although some userspace tools can be surprised by
+ * that.
  */
 #define MAPCOUNT_ELF_CORE_MARGIN        (5)
 #define DEFAULT_MAX_MAP_COUNT   (USHRT_MAX - MAPCOUNT_ELF_CORE_MARGIN)
diff --git a/include/linux/sched_clock.h b/include/linux/sched_clock.h
index cddf0c2940b6..efa931c5cef1 100644
--- a/include/linux/sched_clock.h
+++ b/include/linux/sched_clock.h
@@ -14,7 +14,6 @@ extern void sched_clock_postinit(void);
 static inline void sched_clock_postinit(void) { }
 #endif
 
-extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate);
 extern void sched_clock_register(u64 (*read)(void), int bits,
                                  unsigned long rate);
 
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index f729be981da0..5bbb809ee197 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -285,6 +285,28 @@ static inline int uart_poll_timeout(struct uart_port *port)
 /*
  * Console helpers.
  */
+struct earlycon_device {
+        struct console *con;
+        struct uart_port port;
+        char options[16];               /* e.g., 115200n8 */
+        unsigned int baud;
+};
+int setup_earlycon(char *buf, const char *match,
+                   int (*setup)(struct earlycon_device *, const char *));
+
+extern int of_setup_earlycon(unsigned long addr,
+                             int (*setup)(struct earlycon_device *, const char *));
+
+#define EARLYCON_DECLARE(name, func) \
+static int __init name ## _setup_earlycon(char *buf) \
+{ \
+        return setup_earlycon(buf, __stringify(name), func); \
+} \
+early_param("earlycon", name ## _setup_earlycon);
+
+#define OF_EARLYCON_DECLARE(name, compat, fn)                           \
+        _OF_DECLARE(earlycon, name, compat, fn, void *)
+
 struct uart_port *uart_get_console(struct uart_port *ports, int nr,
                                    struct console *c);
 void uart_parse_options(char *options, int *baud, int *parity, int *bits,
diff --git a/include/linux/sh_timer.h b/include/linux/sh_timer.h
index 4d9dcd138315..8e1e036d6d45 100644
--- a/include/linux/sh_timer.h
+++ b/include/linux/sh_timer.h
@@ -7,6 +7,7 @@ struct sh_timer_config {
         int timer_bit;
         unsigned long clockevent_rating;
         unsigned long clocksource_rating;
+        unsigned int channels_mask;
 };
 
 #endif /* __SH_TIMER_H__ */
diff --git a/include/linux/shm.h b/include/linux/shm.h
index 1e2cd2e6b540..57d77709fbe2 100644
--- a/include/linux/shm.h
+++ b/include/linux/shm.h
@@ -3,9 +3,8 @@
 
 #include <asm/page.h>
 #include <uapi/linux/shm.h>
-
-#define SHMALL (SHMMAX/PAGE_SIZE*(SHMMNI/16)) /* max shm system wide (pages) */
 #include <asm/shmparam.h>
+
 struct shmid_kernel /* private to the kernel */
 {       
         struct kern_ipc_perm    shm_perm;
diff --git a/include/linux/signal.h b/include/linux/signal.h
index 2ac423bdb676..c9e65360c49a 100644
--- a/include/linux/signal.h
+++ b/include/linux/signal.h
@@ -63,11 +63,6 @@ static inline int sigismember(sigset_t *set, int _sig)
                 return 1 & (set->sig[sig / _NSIG_BPW] >> (sig % _NSIG_BPW));
 }
 
-static inline int sigfindinword(unsigned long word)
-{
-        return ffz(~word);
-}
-
 #endif /* __HAVE_ARCH_SIG_BITOPS */
 
 static inline int sigisemptyset(sigset_t *set)
@@ -289,6 +284,22 @@ extern int get_signal_to_deliver(siginfo_t *info, struct k_sigaction *return_ka,
 extern void signal_setup_done(int failed, struct ksignal *ksig, int stepping);
 extern void signal_delivered(int sig, siginfo_t *info, struct k_sigaction *ka, struct pt_regs *regs, int stepping);
 extern void exit_signals(struct task_struct *tsk);
+extern void kernel_sigaction(int, __sighandler_t);
+
+static inline void allow_signal(int sig)
+{
+        /*
+         * Kernel threads handle their own signals. Let the signal code
+         * know it'll be handled, so that they don't get converted to
+         * SIGKILL or just silently dropped.
+         */
+        kernel_sigaction(sig, (__force __sighandler_t)2);
+}
+
+static inline void disallow_signal(int sig)
+{
+        kernel_sigaction(sig, SIG_IGN);
+}
 
 /*
  * Eventually that'll replace get_signal_to_deliver(); macro for now,
diff --git a/include/linux/slab.h b/include/linux/slab.h
index 307bfbe62387..1d9abb7d22a0 100644
--- a/include/linux/slab.h
+++ b/include/linux/slab.h
@@ -116,7 +116,9 @@ struct kmem_cache *kmem_cache_create(const char *, size_t, size_t,
                         unsigned long,
                         void (*)(void *));
 #ifdef CONFIG_MEMCG_KMEM
-void kmem_cache_create_memcg(struct mem_cgroup *, struct kmem_cache *);
+struct kmem_cache *memcg_create_kmem_cache(struct mem_cgroup *,
+                                           struct kmem_cache *,
+                                           const char *);
 #endif
 void kmem_cache_destroy(struct kmem_cache *);
 int kmem_cache_shrink(struct kmem_cache *);
@@ -369,16 +371,7 @@ kmem_cache_alloc_node_trace(struct kmem_cache *s,
 #include <linux/slub_def.h>
 #endif
 
-static __always_inline void *
-kmalloc_order(size_t size, gfp_t flags, unsigned int order)
-{
-        void *ret;
-
-        flags |= (__GFP_COMP | __GFP_KMEMCG);
-        ret = (void *) __get_free_pages(flags, order);
-        kmemleak_alloc(ret, size, 1, flags);
-        return ret;
-}
+extern void *kmalloc_order(size_t size, gfp_t flags, unsigned int order);
 
 #ifdef CONFIG_TRACING
 extern void *kmalloc_order_trace(size_t size, gfp_t flags, unsigned int order);
@@ -533,10 +526,7 @@ static __always_inline void *kmalloc_node(size_t size, gfp_t flags, int node)
  * @memcg: pointer to the memcg this cache belongs to
  * @list: list_head for the list of all caches in this memcg
  * @root_cache: pointer to the global, root cache, this cache was derived from
- * @dead: set to true after the memcg dies; the cache may still be around.
  * @nr_pages: number of pages that belongs to this cache.
- * @destroy: worker to be called whenever we are ready, or believe we may be
- *           ready, to destroy this cache.
  */
 struct memcg_cache_params {
         bool is_root_cache;
@@ -549,9 +539,7 @@ struct memcg_cache_params {
                         struct mem_cgroup *memcg;
                         struct list_head list;
                         struct kmem_cache *root_cache;
-                        bool dead;
                         atomic_t nr_pages;
-                        struct work_struct destroy;
                 };
         };
 };
diff --git a/include/linux/smp.h b/include/linux/smp.h
index 633f5edd7470..34347f26be9b 100644
--- a/include/linux/smp.h
+++ b/include/linux/smp.h
@@ -13,8 +13,6 @@
 #include <linux/init.h>
 #include <linux/llist.h>
 
-extern void cpu_idle(void);
-
 typedef void (*smp_call_func_t)(void *info);
 struct call_single_data {
         struct llist_node llist;
diff --git a/include/linux/spi/adi_spi3.h b/include/linux/spi/adi_spi3.h
new file mode 100644
index 000000000000..c84123aa1d06
--- /dev/null
+++ b/include/linux/spi/adi_spi3.h
@@ -0,0 +1,254 @@
+/*
+ * Analog Devices SPI3 controller driver
+ *
+ * Copyright (c) 2014 Analog Devices Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _ADI_SPI3_H_
+#define _ADI_SPI3_H_
+
+#include <linux/types.h>
+
+/* SPI_CONTROL */
+#define SPI_CTL_EN                  0x00000001    /* Enable */
+#define SPI_CTL_MSTR                0x00000002    /* Master/Slave */
+#define SPI_CTL_PSSE                0x00000004    /* controls modf error in master mode */
+#define SPI_CTL_ODM                 0x00000008    /* Open Drain Mode */
+#define SPI_CTL_CPHA                0x00000010    /* Clock Phase */
+#define SPI_CTL_CPOL                0x00000020    /* Clock Polarity */
+#define SPI_CTL_ASSEL               0x00000040    /* Slave Select Pin Control */
+#define SPI_CTL_SELST               0x00000080    /* Slave Select Polarity in-between transfers */
+#define SPI_CTL_EMISO               0x00000100    /* Enable MISO */
+#define SPI_CTL_SIZE                0x00000600    /* Word Transfer Size */
+#define SPI_CTL_SIZE08              0x00000000    /* SIZE: 8 bits */
+#define SPI_CTL_SIZE16              0x00000200    /* SIZE: 16 bits */
+#define SPI_CTL_SIZE32              0x00000400    /* SIZE: 32 bits */
+#define SPI_CTL_LSBF                0x00001000    /* LSB First */
+#define SPI_CTL_FCEN                0x00002000    /* Flow-Control Enable */
+#define SPI_CTL_FCCH                0x00004000    /* Flow-Control Channel Selection */
+#define SPI_CTL_FCPL                0x00008000    /* Flow-Control Polarity */
+#define SPI_CTL_FCWM                0x00030000    /* Flow-Control Water-Mark */
+#define SPI_CTL_FIFO0               0x00000000    /* FCWM: TFIFO empty or RFIFO Full */
+#define SPI_CTL_FIFO1               0x00010000    /* FCWM: TFIFO 75% or more empty or RFIFO 75% or more full */
+#define SPI_CTL_FIFO2               0x00020000    /* FCWM: TFIFO 50% or more empty or RFIFO 50% or more full */
+#define SPI_CTL_FMODE               0x00040000    /* Fast-mode Enable */
+#define SPI_CTL_MIOM                0x00300000    /* Multiple I/O Mode */
+#define SPI_CTL_MIO_DIS             0x00000000    /* MIOM: Disable */
+#define SPI_CTL_MIO_DUAL            0x00100000    /* MIOM: Enable DIOM (Dual I/O Mode) */
+#define SPI_CTL_MIO_QUAD            0x00200000    /* MIOM: Enable QUAD (Quad SPI Mode) */
+#define SPI_CTL_SOSI                0x00400000    /* Start on MOSI */
+/* SPI_RX_CONTROL */
+#define SPI_RXCTL_REN               0x00000001    /* Receive Channel Enable */
+#define SPI_RXCTL_RTI               0x00000004    /* Receive Transfer Initiate */
+#define SPI_RXCTL_RWCEN             0x00000008    /* Receive Word Counter Enable */
+#define SPI_RXCTL_RDR               0x00000070    /* Receive Data Request */
+#define SPI_RXCTL_RDR_DIS           0x00000000    /* RDR: Disabled */
+#define SPI_RXCTL_RDR_NE            0x00000010    /* RDR: RFIFO not empty */
+#define SPI_RXCTL_RDR_25            0x00000020    /* RDR: RFIFO 25% full */
+#define SPI_RXCTL_RDR_50            0x00000030    /* RDR: RFIFO 50% full */
+#define SPI_RXCTL_RDR_75            0x00000040    /* RDR: RFIFO 75% full */
+#define SPI_RXCTL_RDR_FULL          0x00000050    /* RDR: RFIFO full */
+#define SPI_RXCTL_RDO               0x00000100    /* Receive Data Over-Run */
+#define SPI_RXCTL_RRWM              0x00003000    /* FIFO Regular Water-Mark */
+#define SPI_RXCTL_RWM_0             0x00000000    /* RRWM: RFIFO Empty */
+#define SPI_RXCTL_RWM_25            0x00001000    /* RRWM: RFIFO 25% full */
+#define SPI_RXCTL_RWM_50            0x00002000    /* RRWM: RFIFO 50% full */
+#define SPI_RXCTL_RWM_75            0x00003000    /* RRWM: RFIFO 75% full */
+#define SPI_RXCTL_RUWM              0x00070000    /* FIFO Urgent Water-Mark */
+#define SPI_RXCTL_UWM_DIS           0x00000000    /* RUWM: Disabled */
+#define SPI_RXCTL_UWM_25            0x00010000    /* RUWM: RFIFO 25% full */
+#define SPI_RXCTL_UWM_50            0x00020000    /* RUWM: RFIFO 50% full */
+#define SPI_RXCTL_UWM_75            0x00030000    /* RUWM: RFIFO 75% full */
+#define SPI_RXCTL_UWM_FULL          0x00040000    /* RUWM: RFIFO full */
+/* SPI_TX_CONTROL */
+#define SPI_TXCTL_TEN               0x00000001    /* Transmit Channel Enable */
+#define SPI_TXCTL_TTI               0x00000004    /* Transmit Transfer Initiate */
+#define SPI_TXCTL_TWCEN             0x00000008    /* Transmit Word Counter Enable */
+#define SPI_TXCTL_TDR               0x00000070    /* Transmit Data Request */
+#define SPI_TXCTL_TDR_DIS           0x00000000    /* TDR: Disabled */
+#define SPI_TXCTL_TDR_NF            0x00000010    /* TDR: TFIFO not full */
+#define SPI_TXCTL_TDR_25            0x00000020    /* TDR: TFIFO 25% empty */
+#define SPI_TXCTL_TDR_50            0x00000030    /* TDR: TFIFO 50% empty */
+#define SPI_TXCTL_TDR_75            0x00000040    /* TDR: TFIFO 75% empty */
+#define SPI_TXCTL_TDR_EMPTY         0x00000050    /* TDR: TFIFO empty */
+#define SPI_TXCTL_TDU               0x00000100    /* Transmit Data Under-Run */
+#define SPI_TXCTL_TRWM              0x00003000    /* FIFO Regular Water-Mark */
+#define SPI_TXCTL_RWM_FULL          0x00000000    /* TRWM: TFIFO full */
+#define SPI_TXCTL_RWM_25            0x00001000    /* TRWM: TFIFO 25% empty */
+#define SPI_TXCTL_RWM_50            0x00002000    /* TRWM: TFIFO 50% empty */
+#define SPI_TXCTL_RWM_75            0x00003000    /* TRWM: TFIFO 75% empty */
+#define SPI_TXCTL_TUWM              0x00070000    /* FIFO Urgent Water-Mark */
+#define SPI_TXCTL_UWM_DIS           0x00000000    /* TUWM: Disabled */
+#define SPI_TXCTL_UWM_25            0x00010000    /* TUWM: TFIFO 25% empty */
+#define SPI_TXCTL_UWM_50            0x00020000    /* TUWM: TFIFO 50% empty */
+#define SPI_TXCTL_UWM_75            0x00030000    /* TUWM: TFIFO 75% empty */
+#define SPI_TXCTL_UWM_EMPTY         0x00040000    /* TUWM: TFIFO empty */
+/* SPI_CLOCK */
+#define SPI_CLK_BAUD                0x0000FFFF    /* Baud Rate */
+/* SPI_DELAY */
+#define SPI_DLY_STOP                0x000000FF    /* Transfer delay time in multiples of SCK period */
+#define SPI_DLY_LEADX               0x00000100    /* Extended (1 SCK) LEAD Control */
+#define SPI_DLY_LAGX                0x00000200    /* Extended (1 SCK) LAG control */
+/* SPI_SSEL */
+#define SPI_SLVSEL_SSE1             0x00000002    /* SPISSEL1 Enable */
+#define SPI_SLVSEL_SSE2             0x00000004    /* SPISSEL2 Enable */
+#define SPI_SLVSEL_SSE3             0x00000008    /* SPISSEL3 Enable */
+#define SPI_SLVSEL_SSE4             0x00000010    /* SPISSEL4 Enable */
+#define SPI_SLVSEL_SSE5             0x00000020    /* SPISSEL5 Enable */
+#define SPI_SLVSEL_SSE6             0x00000040    /* SPISSEL6 Enable */
+#define SPI_SLVSEL_SSE7             0x00000080    /* SPISSEL7 Enable */
+#define SPI_SLVSEL_SSEL1            0x00000200    /* SPISSEL1 Value */
+#define SPI_SLVSEL_SSEL2            0x00000400    /* SPISSEL2 Value */
+#define SPI_SLVSEL_SSEL3            0x00000800    /* SPISSEL3 Value */
+#define SPI_SLVSEL_SSEL4            0x00001000    /* SPISSEL4 Value */
+#define SPI_SLVSEL_SSEL5            0x00002000    /* SPISSEL5 Value */
+#define SPI_SLVSEL_SSEL6            0x00004000    /* SPISSEL6 Value */
+#define SPI_SLVSEL_SSEL7            0x00008000    /* SPISSEL7 Value */
+/* SPI_RWC */
+#define SPI_RWC_VALUE               0x0000FFFF    /* Received Word-Count */
+/* SPI_RWCR */
+#define SPI_RWCR_VALUE              0x0000FFFF    /* Received Word-Count Reload */
+/* SPI_TWC */
+#define SPI_TWC_VALUE               0x0000FFFF    /* Transmitted Word-Count */
+/* SPI_TWCR */
+#define SPI_TWCR_VALUE              0x0000FFFF    /* Transmitted Word-Count Reload */
+/* SPI_IMASK */
+#define SPI_IMSK_RUWM               0x00000002    /* Receive Urgent Water-Mark Interrupt Mask */
+#define SPI_IMSK_TUWM               0x00000004    /* Transmit Urgent Water-Mark Interrupt Mask */
+#define SPI_IMSK_ROM                0x00000010    /* Receive Over-Run Error Interrupt Mask */
+#define SPI_IMSK_TUM                0x00000020    /* Transmit Under-Run Error Interrupt Mask */
+#define SPI_IMSK_TCM                0x00000040    /* Transmit Collision Error Interrupt Mask */
+#define SPI_IMSK_MFM                0x00000080    /* Mode Fault Error Interrupt Mask */
+#define SPI_IMSK_RSM                0x00000100    /* Receive Start Interrupt Mask */
+#define SPI_IMSK_TSM                0x00000200    /* Transmit Start Interrupt Mask */
+#define SPI_IMSK_RFM                0x00000400    /* Receive Finish Interrupt Mask */
+#define SPI_IMSK_TFM                0x00000800    /* Transmit Finish Interrupt Mask */
+/* SPI_IMASKCL */
+#define SPI_IMSK_CLR_RUW            0x00000002    /* Receive Urgent Water-Mark Interrupt Mask */
+#define SPI_IMSK_CLR_TUWM           0x00000004    /* Transmit Urgent Water-Mark Interrupt Mask */
+#define SPI_IMSK_CLR_ROM            0x00000010    /* Receive Over-Run Error Interrupt Mask */
+#define SPI_IMSK_CLR_TUM            0x00000020    /* Transmit Under-Run Error Interrupt Mask */
+#define SPI_IMSK_CLR_TCM            0x00000040    /* Transmit Collision Error Interrupt Mask */
+#define SPI_IMSK_CLR_MFM            0x00000080    /* Mode Fault Error Interrupt Mask */
+#define SPI_IMSK_CLR_RSM            0x00000100    /* Receive Start Interrupt Mask */
+#define SPI_IMSK_CLR_TSM            0x00000200    /* Transmit Start Interrupt Mask */
+#define SPI_IMSK_CLR_RFM            0x00000400    /* Receive Finish Interrupt Mask */
+#define SPI_IMSK_CLR_TFM            0x00000800    /* Transmit Finish Interrupt Mask */
+/* SPI_IMASKST */
+#define SPI_IMSK_SET_RUWM           0x00000002    /* Receive Urgent Water-Mark Interrupt Mask */
+#define SPI_IMSK_SET_TUWM           0x00000004    /* Transmit Urgent Water-Mark Interrupt Mask */
+#define SPI_IMSK_SET_ROM            0x00000010    /* Receive Over-Run Error Interrupt Mask */
+#define SPI_IMSK_SET_TUM            0x00000020    /* Transmit Under-Run Error Interrupt Mask */
+#define SPI_IMSK_SET_TCM            0x00000040    /* Transmit Collision Error Interrupt Mask */
+#define SPI_IMSK_SET_MFM            0x00000080    /* Mode Fault Error Interrupt Mask */
+#define SPI_IMSK_SET_RSM            0x00000100    /* Receive Start Interrupt Mask */
+#define SPI_IMSK_SET_TSM            0x00000200    /* Transmit Start Interrupt Mask */
+#define SPI_IMSK_SET_RFM            0x00000400    /* Receive Finish Interrupt Mask */
+#define SPI_IMSK_SET_TFM            0x00000800    /* Transmit Finish Interrupt Mask */
+/* SPI_STATUS */
+#define SPI_STAT_SPIF               0x00000001    /* SPI Finished */
+#define SPI_STAT_RUWM               0x00000002    /* Receive Urgent Water-Mark Breached */
+#define SPI_STAT_TUWM               0x00000004    /* Transmit Urgent Water-Mark Breached */
+#define SPI_STAT_ROE                0x00000010    /* Receive Over-Run Error Indication */
+#define SPI_STAT_TUE                0x00000020    /* Transmit Under-Run Error Indication */
+#define SPI_STAT_TCE                0x00000040    /* Transmit Collision Error Indication */
+#define SPI_STAT_MODF               0x00000080    /* Mode Fault Error Indication */
+#define SPI_STAT_RS                 0x00000100    /* Receive Start Indication */
+#define SPI_STAT_TS                 0x00000200    /* Transmit Start Indication */
+#define SPI_STAT_RF                 0x00000400    /* Receive Finish Indication */
+#define SPI_STAT_TF                 0x00000800    /* Transmit Finish Indication */
+#define SPI_STAT_RFS                0x00007000    /* SPI_RFIFO status */
+#define SPI_STAT_RFIFO_EMPTY        0x00000000    /* RFS: RFIFO Empty */
+#define SPI_STAT_RFIFO_25           0x00001000    /* RFS: RFIFO 25% Full */
+#define SPI_STAT_RFIFO_50           0x00002000    /* RFS: RFIFO 50% Full */
+#define SPI_STAT_RFIFO_75           0x00003000    /* RFS: RFIFO 75% Full */
+#define SPI_STAT_RFIFO_FULL         0x00004000    /* RFS: RFIFO Full */
+#define SPI_STAT_TFS                0x00070000    /* SPI_TFIFO status */
+#define SPI_STAT_TFIFO_FULL         0x00000000    /* TFS: TFIFO full */
+#define SPI_STAT_TFIFO_25           0x00010000    /* TFS: TFIFO 25% empty */
+#define SPI_STAT_TFIFO_50           0x00020000    /* TFS: TFIFO 50% empty */
+#define SPI_STAT_TFIFO_75           0x00030000    /* TFS: TFIFO 75% empty */
+#define SPI_STAT_TFIFO_EMPTY        0x00040000    /* TFS: TFIFO empty */
+#define SPI_STAT_FCS                0x00100000    /* Flow-Control Stall Indication */
+#define SPI_STAT_RFE                0x00400000    /* SPI_RFIFO Empty */
+#define SPI_STAT_TFF                0x00800000    /* SPI_TFIFO Full */
+/* SPI_ILAT */
+#define SPI_ILAT_RUWMI              0x00000002    /* Receive Urgent Water Mark Interrupt */
+#define SPI_ILAT_TUWMI              0x00000004    /* Transmit Urgent Water Mark Interrupt */
+#define SPI_ILAT_ROI                0x00000010    /* Receive Over-Run Error Indication */
+#define SPI_ILAT_TUI                0x00000020    /* Transmit Under-Run Error Indication */
+#define SPI_ILAT_TCI                0x00000040    /* Transmit Collision Error Indication */
+#define SPI_ILAT_MFI                0x00000080    /* Mode Fault Error Indication */
+#define SPI_ILAT_RSI                0x00000100    /* Receive Start Indication */
+#define SPI_ILAT_TSI                0x00000200    /* Transmit Start Indication */
+#define SPI_ILAT_RFI                0x00000400    /* Receive Finish Indication */
+#define SPI_ILAT_TFI                0x00000800    /* Transmit Finish Indication */
+/* SPI_ILATCL */
+#define SPI_ILAT_CLR_RUWMI          0x00000002    /* Receive Urgent Water Mark Interrupt */
+#define SPI_ILAT_CLR_TUWMI          0x00000004    /* Transmit Urgent Water Mark Interrupt */
+#define SPI_ILAT_CLR_ROI            0x00000010    /* Receive Over-Run Error Indication */
+#define SPI_ILAT_CLR_TUI            0x00000020    /* Transmit Under-Run Error Indication */
+#define SPI_ILAT_CLR_TCI            0x00000040    /* Transmit Collision Error Indication */
+#define SPI_ILAT_CLR_MFI            0x00000080    /* Mode Fault Error Indication */
+#define SPI_ILAT_CLR_RSI            0x00000100    /* Receive Start Indication */
+#define SPI_ILAT_CLR_TSI            0x00000200    /* Transmit Start Indication */
+#define SPI_ILAT_CLR_RFI            0x00000400    /* Receive Finish Indication */
+#define SPI_ILAT_CLR_TFI            0x00000800    /* Transmit Finish Indication */
+
+/*
+ * adi spi3 registers layout
+ */
+struct adi_spi_regs {
+        u32 revid;
+        u32 control;
+        u32 rx_control;
+        u32 tx_control;
+        u32 clock;
+        u32 delay;
+        u32 ssel;
+        u32 rwc;
+        u32 rwcr;
+        u32 twc;
+        u32 twcr;
+        u32 reserved0;
+        u32 emask;
+        u32 emaskcl;
+        u32 emaskst;
+        u32 reserved1;
+        u32 status;
+        u32 elat;
+        u32 elatcl;
+        u32 reserved2;
+        u32 rfifo;
+        u32 reserved3;
+        u32 tfifo;
+};
+
+#define MAX_CTRL_CS          8  /* cs in spi controller */
+
+/* device.platform_data for SSP controller devices */
+struct adi_spi3_master {
+        u16 num_chipselect;
+        u16 pin_req[7];
+};
+
+/* spi_board_info.controller_data for SPI slave devices,
+ * copied to spi_device.platform_data ... mostly for dma tuning
+ */
+struct adi_spi3_chip {
+        u32 control;
+        u16 cs_chg_udelay; /* Some devices require 16-bit delays */
+        u32 tx_dummy_val; /* tx value for rx only transfer */
+        bool enable_dma;
+};
+
+#endif /* _ADI_SPI3_H_ */
diff --git a/include/linux/spi/rspi.h b/include/linux/spi/rspi.h
index a25bd6f65e7f..e546b2ceb623 100644
--- a/include/linux/spi/rspi.h
+++ b/include/linux/spi/rspi.h
@@ -25,8 +25,6 @@ struct rspi_plat_data {
         unsigned int dma_tx_id;
         unsigned int dma_rx_id;
 
-        unsigned dma_width_16bit:1;     /* DMAC read/write width = 16-bit */
-
         u16 num_chipselect;
 };
 
diff --git a/include/linux/string.h b/include/linux/string.h
index ac889c5ea11b..d36977e029af 100644
--- a/include/linux/string.h
+++ b/include/linux/string.h
@@ -52,6 +52,9 @@ extern int strncasecmp(const char *s1, const char *s2, size_t n);
 #ifndef __HAVE_ARCH_STRCHR
 extern char * strchr(const char *,int);
 #endif
+#ifndef __HAVE_ARCH_STRCHRNUL
+extern char * strchrnul(const char *,int);
+#endif
 #ifndef __HAVE_ARCH_STRNCHR
 extern char * strnchr(const char *, size_t, int);
 #endif
diff --git a/include/linux/sunrpc/sched.h b/include/linux/sunrpc/sched.h
index 3a847de83fab..ad7dbe2cfecd 100644
--- a/include/linux/sunrpc/sched.h
+++ b/include/linux/sunrpc/sched.h
@@ -142,18 +142,18 @@ struct rpc_task_setup {
                                 test_and_set_bit(RPC_TASK_RUNNING, &(t)->tk_runstate)
 #define rpc_clear_running(t)    \
         do { \
-                smp_mb__before_clear_bit(); \
+                smp_mb__before_atomic(); \
                 clear_bit(RPC_TASK_RUNNING, &(t)->tk_runstate); \
-                smp_mb__after_clear_bit(); \
+                smp_mb__after_atomic(); \
         } while (0)
 
 #define RPC_IS_QUEUED(t)        test_bit(RPC_TASK_QUEUED, &(t)->tk_runstate)
 #define rpc_set_queued(t)       set_bit(RPC_TASK_QUEUED, &(t)->tk_runstate)
 #define rpc_clear_queued(t)     \
         do { \
-                smp_mb__before_clear_bit(); \
+                smp_mb__before_atomic(); \
                 clear_bit(RPC_TASK_QUEUED, &(t)->tk_runstate); \
-                smp_mb__after_clear_bit(); \
+                smp_mb__after_atomic(); \
         } while (0)
 
 #define RPC_IS_ACTIVATED(t)     test_bit(RPC_TASK_ACTIVE, &(t)->tk_runstate)
diff --git a/include/linux/sunrpc/xprt.h b/include/linux/sunrpc/xprt.h
index 3e5efb2b236e..3876f0f1dfd3 100644
--- a/include/linux/sunrpc/xprt.h
+++ b/include/linux/sunrpc/xprt.h
@@ -379,9 +379,9 @@ static inline int xprt_test_and_clear_connected(struct rpc_xprt *xprt)
 
 static inline void xprt_clear_connecting(struct rpc_xprt *xprt)
 {
-        smp_mb__before_clear_bit();
+        smp_mb__before_atomic();
         clear_bit(XPRT_CONNECTING, &xprt->state);
-        smp_mb__after_clear_bit();
+        smp_mb__after_atomic();
 }
 
 static inline int xprt_connecting(struct rpc_xprt *xprt)
@@ -411,9 +411,9 @@ static inline void xprt_clear_bound(struct rpc_xprt *xprt)
 
 static inline void xprt_clear_binding(struct rpc_xprt *xprt)
 {
-        smp_mb__before_clear_bit();
+        smp_mb__before_atomic();
         clear_bit(XPRT_BINDING, &xprt->state);
-        smp_mb__after_clear_bit();
+        smp_mb__after_atomic();
 }
 
 static inline int xprt_test_and_set_binding(struct rpc_xprt *xprt)
diff --git a/include/linux/suspend.h b/include/linux/suspend.h
index f73cabf59012..f76994b9396c 100644
--- a/include/linux/suspend.h
+++ b/include/linux/suspend.h
@@ -187,6 +187,11 @@ struct platform_suspend_ops {
         void (*recover)(void);
 };
 
+struct platform_freeze_ops {
+        int (*begin)(void);
+        void (*end)(void);
+};
+
 #ifdef CONFIG_SUSPEND
 /**
  * suspend_set_ops - set platform dependent suspend operations
@@ -194,6 +199,7 @@ struct platform_suspend_ops {
  */
 extern void suspend_set_ops(const struct platform_suspend_ops *ops);
 extern int suspend_valid_only_mem(suspend_state_t state);
+extern void freeze_set_ops(const struct platform_freeze_ops *ops);
 extern void freeze_wake(void);
 
 /**
@@ -220,6 +226,7 @@ extern int pm_suspend(suspend_state_t state);
 
 static inline void suspend_set_ops(const struct platform_suspend_ops *ops) {}
 static inline int pm_suspend(suspend_state_t state) { return -ENOSYS; }
+static inline void freeze_set_ops(const struct platform_freeze_ops *ops) {}
 static inline void freeze_wake(void) {}
 #endif /* !CONFIG_SUSPEND */
 
@@ -320,6 +327,8 @@ extern unsigned long get_safe_page(gfp_t gfp_mask);
 extern void hibernation_set_ops(const struct platform_hibernation_ops *ops);
 extern int hibernate(void);
 extern bool system_entering_hibernation(void);
+asmlinkage int swsusp_save(void);
+extern struct pbe *restore_pblist;
 #else /* CONFIG_HIBERNATION */
 static inline void register_nosave_region(unsigned long b, unsigned long e) {}
 static inline void register_nosave_region_late(unsigned long b, unsigned long e) {}
diff --git a/include/linux/swap.h b/include/linux/swap.h
index 350711560753..4bdbee80eede 100644
--- a/include/linux/swap.h
+++ b/include/linux/swap.h
@@ -166,10 +166,10 @@ enum {
 #define COMPACT_CLUSTER_MAX SWAP_CLUSTER_MAX
 
 /*
- * Ratio between the present memory in the zone and the "gap" that
- * we're allowing kswapd to shrink in addition to the per-zone high
- * wmark, even for zones that already have the high wmark satisfied,
- * in order to provide better per-zone lru behavior. We are ok to
+ * Ratio between zone->managed_pages and the "gap" that above the per-zone
+ * "high_wmark". While balancing nodes, We allow kswapd to shrink zones that
+ * do not meet the (high_wmark + gap) watermark, even which already met the
+ * high_wmark, in order to provide better per-zone lru behavior. We are ok to
  * spend not more than 1% of the memory for this zone balancing "gap".
  */
 #define KSWAPD_ZONE_BALANCE_GAP_RATIO 100
@@ -214,8 +214,9 @@ struct percpu_cluster {
 struct swap_info_struct {
         unsigned long   flags;          /* SWP_USED etc: see above */
         signed short    prio;           /* swap priority of this type */
+        struct plist_node list;         /* entry in swap_active_head */
+        struct plist_node avail_list;   /* entry in swap_avail_head */
         signed char     type;           /* strange name for an index */
-        signed char     next;           /* next type on the swap list */
         unsigned int    max;            /* extent of the swap_map */
         unsigned char *swap_map;        /* vmalloc'ed array of usage counts */
         struct swap_cluster_info *cluster_info; /* cluster info. Only for SSD */
@@ -255,11 +256,6 @@ struct swap_info_struct {
         struct swap_cluster_info discard_cluster_tail; /* list tail of discard clusters */
 };
 
-struct swap_list_t {
-        int head;       /* head of priority-ordered swapfile list */
-        int next;       /* swapfile to be used next */
-};
-
 /* linux/mm/workingset.c */
 void *workingset_eviction(struct address_space *mapping, struct page *page);
 bool workingset_refault(void *shadow);
@@ -308,12 +304,14 @@ extern unsigned long nr_free_pagecache_pages(void);
 
 
 /* linux/mm/swap.c */
-extern void __lru_cache_add(struct page *);
 extern void lru_cache_add(struct page *);
+extern void lru_cache_add_anon(struct page *page);
+extern void lru_cache_add_file(struct page *page);
 extern void lru_add_page_tail(struct page *page, struct page *page_tail,
                          struct lruvec *lruvec, struct list_head *head);
 extern void activate_page(struct page *);
 extern void mark_page_accessed(struct page *);
+extern void init_page_accessed(struct page *page);
 extern void lru_add_drain(void);
 extern void lru_add_drain_cpu(int cpu);
 extern void lru_add_drain_all(void);
@@ -323,22 +321,6 @@ extern void swap_setup(void);
 
 extern void add_page_to_unevictable_list(struct page *page);
 
-/**
- * lru_cache_add: add a page to the page lists
- * @page: the page to add
- */
-static inline void lru_cache_add_anon(struct page *page)
-{
-        ClearPageActive(page);
-        __lru_cache_add(page);
-}
-
-static inline void lru_cache_add_file(struct page *page)
-{
-        ClearPageActive(page);
-        __lru_cache_add(page);
-}
-
 /* linux/mm/vmscan.c */
 extern unsigned long try_to_free_pages(struct zonelist *zonelist, int order,
                                         gfp_t gfp_mask, nodemask_t *mask);
@@ -496,7 +478,7 @@ mem_cgroup_uncharge_swapcache(struct page *page, swp_entry_t ent, bool swapout)
 #define free_page_and_swap_cache(page) \
         page_cache_release(page)
 #define free_pages_and_swap_cache(pages, nr) \
-        release_pages((pages), (nr), 0);
+        release_pages((pages), (nr), false);
 
 static inline void show_swap_cache_info(void)
 {
diff --git a/include/linux/swapfile.h b/include/linux/swapfile.h
index e282624e8c10..388293a91e8c 100644
--- a/include/linux/swapfile.h
+++ b/include/linux/swapfile.h
@@ -6,7 +6,7 @@
  * want to expose them to the dozens of source files that include swap.h
  */
 extern spinlock_t swap_lock;
-extern struct swap_list_t swap_list;
+extern struct plist_head swap_active_head;
 extern struct swap_info_struct *swap_info[];
 extern int try_to_unuse(unsigned int, bool, unsigned long);
 
diff --git a/include/linux/swapops.h b/include/linux/swapops.h
index c0f75261a728..6adfb7bfbf44 100644
--- a/include/linux/swapops.h
+++ b/include/linux/swapops.h
@@ -54,7 +54,7 @@ static inline pgoff_t swp_offset(swp_entry_t entry)
 /* check whether a pte points to a swap entry */
 static inline int is_swap_pte(pte_t pte)
 {
-        return !pte_none(pte) && !pte_present(pte) && !pte_file(pte);
+        return !pte_none(pte) && !pte_present_nonuma(pte) && !pte_file(pte);
 }
 #endif
 
diff --git a/include/linux/swiotlb.h b/include/linux/swiotlb.h
index a5ffd32642fd..e7a018eaf3a2 100644
--- a/include/linux/swiotlb.h
+++ b/include/linux/swiotlb.h
@@ -116,4 +116,6 @@ static inline void swiotlb_free(void) { }
 #endif
 
 extern void swiotlb_print_info(void);
+extern int is_swiotlb_buffer(phys_addr_t paddr);
+
 #endif /* __LINUX_SWIOTLB_H */
diff --git a/include/linux/syscalls.h b/include/linux/syscalls.h
index a4a0588c5397..b0881a0ed322 100644
--- a/include/linux/syscalls.h
+++ b/include/linux/syscalls.h
@@ -711,7 +711,7 @@ asmlinkage long sys_keyctl(int cmd, unsigned long arg2, unsigned long arg3,
 
 asmlinkage long sys_ioprio_set(int which, int who, int ioprio);
 asmlinkage long sys_ioprio_get(int which, int who);
-asmlinkage long sys_set_mempolicy(int mode, unsigned long __user *nmask,
+asmlinkage long sys_set_mempolicy(int mode, const unsigned long __user *nmask,
                                 unsigned long maxnode);
 asmlinkage long sys_migrate_pages(pid_t pid, unsigned long maxnode,
                                 const unsigned long __user *from,
@@ -723,7 +723,7 @@ asmlinkage long sys_move_pages(pid_t pid, unsigned long nr_pages,
                                 int flags);
 asmlinkage long sys_mbind(unsigned long start, unsigned long len,
                                 unsigned long mode,
-                                unsigned long __user *nmask,
+                                const unsigned long __user *nmask,
                                 unsigned long maxnode,
                                 unsigned flags);
 asmlinkage long sys_get_mempolicy(int __user *policy,
diff --git a/include/linux/sysfs.h b/include/linux/sysfs.h
index 5ffaa3443712..f97d0dbb59fa 100644
--- a/include/linux/sysfs.h
+++ b/include/linux/sysfs.h
@@ -437,7 +437,7 @@ static inline int __must_check sysfs_create_file(struct kobject *kobj,
 static inline void sysfs_remove_file(struct kobject *kobj,
                                      const struct attribute *attr)
 {
-        return sysfs_remove_file_ns(kobj, attr, NULL);
+        sysfs_remove_file_ns(kobj, attr, NULL);
 }
 
 static inline int sysfs_rename_link(struct kobject *kobj, struct kobject *target,
diff --git a/include/linux/thread_info.h b/include/linux/thread_info.h
index fddbe2023a5d..ff307b548ed3 100644
--- a/include/linux/thread_info.h
+++ b/include/linux/thread_info.h
@@ -61,8 +61,6 @@ extern long do_no_restart_syscall(struct restart_block *parm);
 # define THREADINFO_GFP         (GFP_KERNEL | __GFP_NOTRACK)
 #endif
 
-#define THREADINFO_GFP_ACCOUNTED (THREADINFO_GFP | __GFP_KMEMCG)
-
 /*
  * flag set/clear/test wrappers
  * - pass TIF_xxxx constants to these functions
@@ -104,20 +102,6 @@ static inline int test_ti_thread_flag(struct thread_info *ti, int flag)
 #define test_thread_flag(flag) \
         test_ti_thread_flag(current_thread_info(), flag)
 
-static inline __deprecated void set_need_resched(void)
-{
-        /*
-         * Use of this function in deprecated.
-         *
-         * As of this writing there are only a few users in the DRM tree left
-         * all of which are wrong and can be removed without causing too much
-         * grief.
-         *
-         * The DRM people are aware and are working on removing the last few
-         * instances.
-         */
-}
-
 #define tif_need_resched() test_thread_flag(TIF_NEED_RESCHED)
 
 #if defined TIF_RESTORE_SIGMASK && !defined HAVE_SET_RESTORE_SIGMASK
diff --git a/include/linux/topology.h b/include/linux/topology.h
index 7062330a1329..dda6ee521e74 100644
--- a/include/linux/topology.h
+++ b/include/linux/topology.h
@@ -58,7 +58,8 @@ int arch_update_cpu_topology(void);
 /*
  * If the distance between nodes in a system is larger than RECLAIM_DISTANCE
  * (in whatever arch specific measurement units returned by node_distance())
- * then switch on zone reclaim on boot.
+ * and zone_reclaim_mode is enabled then the VM will only call zone_reclaim()
+ * on nodes within this distance.
  */
 #define RECLAIM_DISTANCE 30
 #endif
@@ -66,121 +67,6 @@ int arch_update_cpu_topology(void);
 #define PENALTY_FOR_NODE_WITH_CPUS      (1)
 #endif
 
-/*
- * Below are the 3 major initializers used in building sched_domains:
- * SD_SIBLING_INIT, for SMT domains
- * SD_CPU_INIT, for SMP domains
- *
- * Any architecture that cares to do any tuning to these values should do so
- * by defining their own arch-specific initializer in include/asm/topology.h.
- * A definition there will automagically override these default initializers
- * and allow arch-specific performance tuning of sched_domains.
- * (Only non-zero and non-null fields need be specified.)
- */
-
-#ifdef CONFIG_SCHED_SMT
-/* MCD - Do we really need this?  It is always on if CONFIG_SCHED_SMT is,
- * so can't we drop this in favor of CONFIG_SCHED_SMT?
- */
-#define ARCH_HAS_SCHED_WAKE_IDLE
-/* Common values for SMT siblings */
-#ifndef SD_SIBLING_INIT
-#define SD_SIBLING_INIT (struct sched_domain) {                         \
-        .min_interval           = 1,                                    \
-        .max_interval           = 2,                                    \
-        .busy_factor            = 64,                                   \
-        .imbalance_pct          = 110,                                  \
-                                                                        \
-        .flags                  = 1*SD_LOAD_BALANCE                     \
-                                | 1*SD_BALANCE_NEWIDLE                  \
-                                | 1*SD_BALANCE_EXEC                     \
-                                | 1*SD_BALANCE_FORK                     \
-                                | 0*SD_BALANCE_WAKE                     \
-                                | 1*SD_WAKE_AFFINE                      \
-                                | 1*SD_SHARE_CPUPOWER                   \
-                                | 1*SD_SHARE_PKG_RESOURCES              \
-                                | 0*SD_SERIALIZE                        \
-                                | 0*SD_PREFER_SIBLING                   \
-                                | arch_sd_sibling_asym_packing()        \
-                                ,                                       \
-        .last_balance           = jiffies,                              \
-        .balance_interval       = 1,                                    \
-        .smt_gain               = 1178, /* 15% */                       \
-        .max_newidle_lb_cost    = 0,                                    \
-        .next_decay_max_lb_cost = jiffies,                              \
-}
-#endif
-#endif /* CONFIG_SCHED_SMT */
-
-#ifdef CONFIG_SCHED_MC
-/* Common values for MC siblings. for now mostly derived from SD_CPU_INIT */
-#ifndef SD_MC_INIT
-#define SD_MC_INIT (struct sched_domain) {                              \
-        .min_interval           = 1,                                    \
-        .max_interval           = 4,                                    \
-        .busy_factor            = 64,                                   \
-        .imbalance_pct          = 125,                                  \
-        .cache_nice_tries       = 1,                                    \
-        .busy_idx               = 2,                                    \
-        .wake_idx               = 0,                                    \
-        .forkexec_idx           = 0,                                    \
-                                                                        \
-        .flags                  = 1*SD_LOAD_BALANCE                     \
-                                | 1*SD_BALANCE_NEWIDLE                  \
-                                | 1*SD_BALANCE_EXEC                     \
-                                | 1*SD_BALANCE_FORK                     \
-                                | 0*SD_BALANCE_WAKE                     \
-                                | 1*SD_WAKE_AFFINE                      \
-                                | 0*SD_SHARE_CPUPOWER                   \
-                                | 1*SD_SHARE_PKG_RESOURCES              \
-                                | 0*SD_SERIALIZE                        \
-                                ,                                       \
-        .last_balance           = jiffies,                              \
-        .balance_interval       = 1,                                    \
-        .max_newidle_lb_cost    = 0,                                    \
-        .next_decay_max_lb_cost = jiffies,                              \
-}
-#endif
-#endif /* CONFIG_SCHED_MC */
-
-/* Common values for CPUs */
-#ifndef SD_CPU_INIT
-#define SD_CPU_INIT (struct sched_domain) {                             \
-        .min_interval           = 1,                                    \
-        .max_interval           = 4,                                    \
-        .busy_factor            = 64,                                   \
-        .imbalance_pct          = 125,                                  \
-        .cache_nice_tries       = 1,                                    \
-        .busy_idx               = 2,                                    \
-        .idle_idx               = 1,                                    \
-        .newidle_idx            = 0,                                    \
-        .wake_idx               = 0,                                    \
-        .forkexec_idx           = 0,                                    \
-                                                                        \
-        .flags                  = 1*SD_LOAD_BALANCE                     \
-                                | 1*SD_BALANCE_NEWIDLE                  \
-                                | 1*SD_BALANCE_EXEC                     \
-                                | 1*SD_BALANCE_FORK                     \
-                                | 0*SD_BALANCE_WAKE                     \
-                                | 1*SD_WAKE_AFFINE                      \
-                                | 0*SD_SHARE_CPUPOWER                   \
-                                | 0*SD_SHARE_PKG_RESOURCES              \
-                                | 0*SD_SERIALIZE                        \
-                                | 1*SD_PREFER_SIBLING                   \
-                                ,                                       \
-        .last_balance           = jiffies,                              \
-        .balance_interval       = 1,                                    \
-        .max_newidle_lb_cost    = 0,                                    \
-        .next_decay_max_lb_cost = jiffies,                              \
-}
-#endif
-
-#ifdef CONFIG_SCHED_BOOK
-#ifndef SD_BOOK_INIT
-#error Please define an appropriate SD_BOOK_INIT in include/asm/topology.h!!!
-#endif
-#endif /* CONFIG_SCHED_BOOK */
-
 #ifdef CONFIG_USE_PERCPU_NUMA_NODE_ID
 DECLARE_PER_CPU(int, numa_node);
 
@@ -295,4 +181,17 @@ static inline int cpu_to_mem(int cpu)
 #define topology_core_cpumask(cpu)              cpumask_of(cpu)
 #endif
 
+#ifdef CONFIG_SCHED_SMT
+static inline const struct cpumask *cpu_smt_mask(int cpu)
+{
+        return topology_thread_cpumask(cpu);
+}
+#endif
+
+static inline const struct cpumask *cpu_cpu_mask(int cpu)
+{
+        return cpumask_of_node(cpu_to_node(cpu));
+}
+
+
 #endif /* _LINUX_TOPOLOGY_H */
diff --git a/include/linux/torture.h b/include/linux/torture.h
index b2e2b468e511..5ca58fcbaf1b 100644
--- a/include/linux/torture.h
+++ b/include/linux/torture.h
@@ -49,12 +49,6 @@
 #define VERBOSE_TOROUT_ERRSTRING(s) \
         do { if (verbose) pr_alert("%s" TORTURE_FLAG "!!! %s\n", torture_type, s); } while (0)
 
-/* Definitions for a non-string torture-test module parameter. */
-#define torture_parm(type, name, init, msg) \
-        static type name = init; \
-        module_param(name, type, 0444); \
-        MODULE_PARM_DESC(name, msg);
-
 /* Definitions for online/offline exerciser. */
 int torture_onoff_init(long ooholdoff, long oointerval);
 char *torture_onoff_stats(char *page);
@@ -81,7 +75,7 @@ void stutter_wait(const char *title);
 int torture_stutter_init(int s);
 
 /* Initialization and cleanup. */
-void torture_init_begin(char *ttype, bool v, int *runnable);
+bool torture_init_begin(char *ttype, bool v, int *runnable);
 void torture_init_end(void);
 bool torture_cleanup(void);
 bool torture_must_stop(void);
diff --git a/include/linux/tracehook.h b/include/linux/tracehook.h
index 1e98b5530425..6f8ab7da27c4 100644
--- a/include/linux/tracehook.h
+++ b/include/linux/tracehook.h
@@ -191,7 +191,7 @@ static inline void tracehook_notify_resume(struct pt_regs *regs)
          * pairs with task_work_add()->set_notify_resume() after
          * hlist_add_head(task->task_works);
          */
-        smp_mb__after_clear_bit();
+        smp_mb__after_atomic();
         if (unlikely(current->task_works))
                 task_work_run();
 }
diff --git a/include/linux/tty_ldisc.h b/include/linux/tty_ldisc.h
index add26da2faeb..00c9d688d7b7 100644
--- a/include/linux/tty_ldisc.h
+++ b/include/linux/tty_ldisc.h
@@ -92,7 +92,10 @@
  *      This function is called by the low-level tty driver to signal
  *      that line discpline should try to send more characters to the
  *      low-level driver for transmission.  If the line discpline does
- *      not have any more data to send, it can just return.
+ *      not have any more data to send, it can just return. If the line
+ *      discipline does have some data to send, please arise a tasklet
+ *      or workqueue to do the real data transfer. Do not send data in
+ *      this hook, it may leads to a deadlock.
  *
  * int (*hangup)(struct tty_struct *)
  *
diff --git a/include/linux/types.h b/include/linux/types.h
index 4d118ba11349..a0bb7048687f 100644
--- a/include/linux/types.h
+++ b/include/linux/types.h
@@ -142,6 +142,7 @@ typedef unsigned long blkcnt_t;
 #define pgoff_t unsigned long
 #endif
 
+/* A dma_addr_t can hold any valid DMA or bus address for the platform */
 #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
 typedef u64 dma_addr_t;
 #else
diff --git a/include/linux/uprobes.h b/include/linux/uprobes.h
index edff2b97b864..c52f827ba6ce 100644
--- a/include/linux/uprobes.h
+++ b/include/linux/uprobes.h
@@ -32,6 +32,7 @@ struct vm_area_struct;
 struct mm_struct;
 struct inode;
 struct notifier_block;
+struct page;
 
 #define UPROBE_HANDLER_REMOVE           1
 #define UPROBE_HANDLER_MASK             1
@@ -127,6 +128,8 @@ extern int  arch_uprobe_exception_notify(struct notifier_block *self, unsigned l
 extern void arch_uprobe_abort_xol(struct arch_uprobe *aup, struct pt_regs *regs);
 extern unsigned long arch_uretprobe_hijack_return_addr(unsigned long trampoline_vaddr, struct pt_regs *regs);
 extern bool __weak arch_uprobe_ignore(struct arch_uprobe *aup, struct pt_regs *regs);
+extern void __weak arch_uprobe_copy_ixol(struct page *page, unsigned long vaddr,
+                                         void *src, unsigned long len);
 #else /* !CONFIG_UPROBES */
 struct uprobes_state {
 };
diff --git a/include/linux/usb.h b/include/linux/usb.h
index 6b7ec376fb4d..d2465bc0e73c 100644
--- a/include/linux/usb.h
+++ b/include/linux/usb.h
@@ -352,6 +352,8 @@ struct usb_bus {
         struct usb_bus *hs_companion;   /* Companion EHCI bus, if any */
         struct list_head bus_list;      /* list of busses */
 
+        struct mutex usb_address0_mutex; /* unaddressed device mutex */
+
         int bandwidth_allocated;        /* on this bus: how much of the time
                                          * reserved for periodic (intr/iso)
                                          * requests is used, on average?
diff --git a/include/linux/usb/composite.h b/include/linux/usb/composite.h
index d3ca3b53837c..7373203140e7 100644
--- a/include/linux/usb/composite.h
+++ b/include/linux/usb/composite.h
@@ -57,6 +57,61 @@
 struct usb_configuration;
 
 /**
+ * struct usb_os_desc_ext_prop - describes one "Extended Property"
+ * @entry: used to keep a list of extended properties
+ * @type: Extended Property type
+ * @name_len: Extended Property unicode name length, including terminating '\0'
+ * @name: Extended Property name
+ * @data_len: Length of Extended Property blob (for unicode store double len)
+ * @data: Extended Property blob
+ * @item: Represents this Extended Property in configfs
+ */
+struct usb_os_desc_ext_prop {
+        struct list_head        entry;
+        u8                      type;
+        int                     name_len;
+        char                    *name;
+        int                     data_len;
+        char                    *data;
+        struct config_item      item;
+};
+
+/**
+ * struct usb_os_desc - describes OS descriptors associated with one interface
+ * @ext_compat_id: 16 bytes of "Compatible ID" and "Subcompatible ID"
+ * @ext_prop: Extended Properties list
+ * @ext_prop_len: Total length of Extended Properties blobs
+ * @ext_prop_count: Number of Extended Properties
+ * @opts_mutex: Optional mutex protecting config data of a usb_function_instance
+ * @group: Represents OS descriptors associated with an interface in configfs
+ * @owner: Module associated with this OS descriptor
+ */
+struct usb_os_desc {
+        char                    *ext_compat_id;
+        struct list_head        ext_prop;
+        int                     ext_prop_len;
+        int                     ext_prop_count;
+        struct mutex            *opts_mutex;
+        struct config_group     group;
+        struct module           *owner;
+};
+
+/**
+ * struct usb_os_desc_table - describes OS descriptors associated with one
+ * interface of a usb_function
+ * @if_id: Interface id
+ * @os_desc: "Extended Compatibility ID" and "Extended Properties" of the
+ *      interface
+ *
+ * Each interface can have at most one "Extended Compatibility ID" and a
+ * number of "Extended Properties".
+ */
+struct usb_os_desc_table {
+        int                     if_id;
+        struct usb_os_desc      *os_desc;
+};
+
+/**
  * struct usb_function - describes one function of a configuration
  * @name: For diagnostics, identifies the function.
  * @strings: tables of strings, keyed by identifiers assigned during bind()
@@ -73,6 +128,10 @@ struct usb_configuration;
  *      be available at super speed.
  * @config: assigned when @usb_add_function() is called; this is the
  *      configuration with which this function is associated.
+ * @os_desc_table: Table of (interface id, os descriptors) pairs. The function
+ *      can expose more than one interface. If an interface is a member of
+ *      an IAD, only the first interface of IAD has its entry in the table.
+ * @os_desc_n: Number of entries in os_desc_table
  * @bind: Before the gadget can register, all of its functions bind() to the
  *      available resources including string and interface identifiers used
  *      in interface or class descriptors; endpoints; I/O buffers; and so on.
@@ -129,6 +188,9 @@ struct usb_function {
 
         struct usb_configuration        *config;
 
+        struct usb_os_desc_table        *os_desc_table;
+        unsigned                        os_desc_n;
+
         /* REVISIT:  bind() functions can be marked __init, which
          * makes trouble for section mismatch analysis.  See if
          * we can't restructure things to avoid mismatching.
@@ -327,6 +389,8 @@ extern void usb_composite_unregister(struct usb_composite_driver *driver);
 extern void usb_composite_setup_continue(struct usb_composite_dev *cdev);
 extern int composite_dev_prepare(struct usb_composite_driver *composite,
                 struct usb_composite_dev *cdev);
+extern int composite_os_desc_req_prepare(struct usb_composite_dev *cdev,
+                                         struct usb_ep *ep0);
 void composite_dev_cleanup(struct usb_composite_dev *cdev);
 
 static inline struct usb_composite_driver *to_cdriver(
@@ -335,11 +399,19 @@ static inline struct usb_composite_driver *to_cdriver(
         return container_of(gdrv, struct usb_composite_driver, gadget_driver);
 }
 
+#define OS_STRING_QW_SIGN_LEN           14
+#define OS_STRING_IDX                   0xEE
+
 /**
  * struct usb_composite_device - represents one composite usb gadget
  * @gadget: read-only, abstracts the gadget's usb peripheral controller
  * @req: used for control responses; buffer is pre-allocated
+ * @os_desc_req: used for OS descriptors responses; buffer is pre-allocated
  * @config: the currently active configuration
+ * @qw_sign: qwSignature part of the OS string
+ * @b_vendor_code: bMS_VendorCode part of the OS string
+ * @use_os_string: false by default, interested gadgets set it
+ * @os_desc_config: the configuration to be used with OS descriptors
  *
  * One of these devices is allocated and initialized before the
  * associated device driver's bind() is called.
@@ -369,9 +441,16 @@ static inline struct usb_composite_driver *to_cdriver(
 struct usb_composite_dev {
         struct usb_gadget               *gadget;
         struct usb_request              *req;
+        struct usb_request              *os_desc_req;
 
         struct usb_configuration        *config;
 
+        /* OS String is a custom (yet popular) extension to the USB standard. */
+        u8                              qw_sign[OS_STRING_QW_SIGN_LEN];
+        u8                              b_vendor_code;
+        struct usb_configuration        *os_desc_config;
+        unsigned int                    use_os_string:1;
+
         /* private: */
         /* internals */
         unsigned int                    suspended:1;
diff --git a/include/linux/usb/msm_hsusb.h b/include/linux/usb/msm_hsusb.h
index 32754835a39b..b0a39243295a 100644
--- a/include/linux/usb/msm_hsusb.h
+++ b/include/linux/usb/msm_hsusb.h
@@ -23,21 +23,6 @@
 #include <linux/clk.h>
 
 /**
- * Supported USB modes
- *
- * USB_PERIPHERAL       Only peripheral mode is supported.
- * USB_HOST             Only host mode is supported.
- * USB_OTG              OTG mode is supported.
- *
- */
-enum usb_mode_type {
-        USB_NONE = 0,
-        USB_PERIPHERAL,
-        USB_HOST,
-        USB_OTG,
-};
-
-/**
  * OTG control
  *
  * OTG_NO_CONTROL       Id/VBUS notifications not required. Useful in host
@@ -115,27 +100,23 @@ enum usb_chg_type {
 /**
  * struct msm_otg_platform_data - platform device data
  *              for msm_otg driver.
- * @phy_init_seq: PHY configuration sequence. val, reg pairs
- *              terminated by -1.
+ * @phy_init_seq: PHY configuration sequence values. Value of -1 is reserved as
+ *              "do not overwrite default vaule at this address".
+ * @phy_init_sz: PHY configuration sequence size.
  * @vbus_power: VBUS power on/off routine.
  * @power_budget: VBUS power budget in mA (0 will be treated as 500mA).
  * @mode: Supported mode (OTG/peripheral/host).
  * @otg_control: OTG switch controlled by user/Id pin
- * @default_mode: Default operational mode. Applicable only if
- *              OTG switch is controller by user.
- * @pclk_src_name: pclk is derived from ebi1_usb_clk in case of 7x27 and 8k
- *              dfab_usb_hs_clk in case of 8660 and 8960.
  */
 struct msm_otg_platform_data {
         int *phy_init_seq;
+        int phy_init_sz;
         void (*vbus_power)(bool on);
         unsigned power_budget;
-        enum usb_mode_type mode;
+        enum usb_dr_mode mode;
         enum otg_control_type otg_control;
-        enum usb_mode_type default_mode;
         enum msm_usb_phy_type phy_type;
         void (*setup_gpio)(enum usb_otg_state state);
-        char *pclk_src_name;
         int (*link_clk_reset)(struct clk *link_clk, bool assert);
         int (*phy_clk_reset)(struct clk *phy_clk);
 };
@@ -147,7 +128,6 @@ struct msm_otg_platform_data {
  * @irq: IRQ number assigned for HSUSB controller.
  * @clk: clock struct of usb_hs_clk.
  * @pclk: clock struct of usb_hs_pclk.
- * @pclk_src: pclk source for voting.
  * @phy_reset_clk: clock struct of usb_phy_clk.
  * @core_clk: clock struct of usb_hs_core_clk.
  * @regs: ioremapped register base address.
@@ -168,7 +148,6 @@ struct msm_otg {
         int irq;
         struct clk *clk;
         struct clk *pclk;
-        struct clk *pclk_src;
         struct clk *phy_reset_clk;
         struct clk *core_clk;
         void __iomem *regs;
@@ -179,10 +158,18 @@ struct msm_otg {
         atomic_t in_lpm;
         int async_int;
         unsigned cur_power;
+        int phy_number;
         struct delayed_work chg_work;
         enum usb_chg_state chg_state;
         enum usb_chg_type chg_type;
         u8 dcd_retries;
+        struct regulator *v3p3;
+        struct regulator *v1p8;
+        struct regulator *vddcx;
+
+        struct reset_control *phy_rst;
+        struct reset_control *link_rst;
+        int vdd_levels[3];
 };
 
 #endif
diff --git a/include/linux/usb/msm_hsusb_hw.h b/include/linux/usb/msm_hsusb_hw.h
index 6e97a2d3d39f..a29f6030afb1 100644
--- a/include/linux/usb/msm_hsusb_hw.h
+++ b/include/linux/usb/msm_hsusb_hw.h
@@ -16,6 +16,9 @@
 #ifndef __LINUX_USB_GADGET_MSM72K_UDC_H__
 #define __LINUX_USB_GADGET_MSM72K_UDC_H__
 
+/* USB phy selector - in TCSR address range */
+#define USB2_PHY_SEL         0xfd4ab000
+
 #define USB_AHBBURST         (MSM_USB_BASE + 0x0090)
 #define USB_AHBMODE          (MSM_USB_BASE + 0x0098)
 #define USB_CAPLENGTH        (MSM_USB_BASE + 0x0100) /* 8 bit */
@@ -25,13 +28,15 @@
 #define USB_OTGSC            (MSM_USB_BASE + 0x01A4)
 #define USB_USBMODE          (MSM_USB_BASE + 0x01A8)
 #define USB_PHY_CTRL         (MSM_USB_BASE + 0x0240)
+#define USB_PHY_CTRL2        (MSM_USB_BASE + 0x0278)
 
 #define USBCMD_RESET   2
 #define USB_USBINTR          (MSM_USB_BASE + 0x0148)
 
 #define PORTSC_PHCD            (1 << 23) /* phy suspend mode */
-#define PORTSC_PTS_MASK         (3 << 30)
-#define PORTSC_PTS_ULPI         (3 << 30)
+#define PORTSC_PTS_MASK        (3 << 30)
+#define PORTSC_PTS_ULPI        (2 << 30)
+#define PORTSC_PTS_SERIAL      (3 << 30)
 
 #define USB_ULPI_VIEWPORT    (MSM_USB_BASE + 0x0170)
 #define ULPI_RUN              (1 << 30)
@@ -41,9 +46,14 @@
 #define ULPI_DATA(n)          ((n) & 255)
 #define ULPI_DATA_READ(n)     (((n) >> 8) & 255)
 
+/* synopsys 28nm phy registers */
+#define ULPI_PWR_CLK_MNG_REG    0x88
+#define OTG_COMP_DISABLE        BIT(0)
+
 #define ASYNC_INTR_CTRL         (1 << 29) /* Enable async interrupt */
 #define ULPI_STP_CTRL           (1 << 30) /* Block communication with PHY */
 #define PHY_RETEN               (1 << 1) /* PHY retention enable/disable */
+#define PHY_POR_ASSERT          (1 << 0) /* USB2 28nm PHY POR ASSERT */
 
 /* OTG definitions */
 #define OTGSC_INTSTS_MASK       (0x7f << 16)
diff --git a/include/linux/usb/usb_phy_gen_xceiv.h b/include/linux/usb/usb_phy_generic.h
index cc8d818a83be..68adae83affc 100644
--- a/include/linux/usb/usb_phy_gen_xceiv.h
+++ b/include/linux/usb/usb_phy_generic.h
@@ -3,7 +3,7 @@
 
 #include <linux/usb/otg.h>
 
-struct usb_phy_gen_xceiv_platform_data {
+struct usb_phy_generic_platform_data {
         enum usb_phy_type type;
         unsigned long clk_rate;
 
@@ -13,16 +13,17 @@ struct usb_phy_gen_xceiv_platform_data {
         int gpio_reset;
 };
 
-#if defined(CONFIG_NOP_USB_XCEIV) || (defined(CONFIG_NOP_USB_XCEIV_MODULE) && defined(MODULE))
+#if IS_ENABLED(CONFIG_NOP_USB_XCEIV)
 /* sometimes transceivers are accessed only through e.g. ULPI */
-extern void usb_nop_xceiv_register(void);
-extern void usb_nop_xceiv_unregister(void);
+extern struct platform_device *usb_phy_generic_register(void);
+extern void usb_phy_generic_unregister(struct platform_device *);
 #else
-static inline void usb_nop_xceiv_register(void)
+static inline struct platform_device *usb_phy_generic_register(void)
 {
+        return NULL;
 }
 
-static inline void usb_nop_xceiv_unregister(void)
+static inline void usb_phy_generic_unregister(struct platform_device *pdev)
 {
 }
 #endif
diff --git a/include/linux/vexpress.h b/include/linux/vexpress.h
index 617c01b8f74a..a4c9547aae64 100644
--- a/include/linux/vexpress.h
+++ b/include/linux/vexpress.h
@@ -15,28 +15,15 @@
 #define _LINUX_VEXPRESS_H
 
 #include <linux/device.h>
+#include <linux/platform_device.h>
 #include <linux/reboot.h>
+#include <linux/regmap.h>
 
 #define VEXPRESS_SITE_MB                0
 #define VEXPRESS_SITE_DB1               1
 #define VEXPRESS_SITE_DB2               2
 #define VEXPRESS_SITE_MASTER            0xf
 
-#define VEXPRESS_CONFIG_STATUS_DONE     0
-#define VEXPRESS_CONFIG_STATUS_WAIT     1
-
-#define VEXPRESS_GPIO_MMC_CARDIN        0
-#define VEXPRESS_GPIO_MMC_WPROT         1
-#define VEXPRESS_GPIO_FLASH_WPn         2
-#define VEXPRESS_GPIO_LED0              3
-#define VEXPRESS_GPIO_LED1              4
-#define VEXPRESS_GPIO_LED2              5
-#define VEXPRESS_GPIO_LED3              6
-#define VEXPRESS_GPIO_LED4              7
-#define VEXPRESS_GPIO_LED5              8
-#define VEXPRESS_GPIO_LED6              9
-#define VEXPRESS_GPIO_LED7              10
-
 #define VEXPRESS_RES_FUNC(_site, _func) \
 {                                       \
         .start = (_site),               \
@@ -44,84 +31,43 @@
         .flags = IORESOURCE_BUS,        \
 }
 
-/* Config bridge API */
+/* Config infrastructure */
 
-/**
- * struct vexpress_config_bridge_info - description of the platform
- * configuration infrastructure bridge.
- *
- * @name:       Bridge name
- *
- * @func_get:   Obtains pointer to a configuration function for a given
- *              device or a Device Tree node, to be used with @func_put
- *              and @func_exec. The node pointer should take precedence
- *              over device pointer when both are passed.
- *
- * @func_put:   Tells the bridge that the function will not be used any
- *              more, so all allocated resources can be released.
- *
- * @func_exec:  Executes a configuration function read or write operation.
- *              The offset selects a 32 bit word of the value accessed.
- *              Must return VEXPRESS_CONFIG_STATUS_DONE when operation
- *              is finished immediately, VEXPRESS_CONFIG_STATUS_WAIT when
- *              will be completed in some time or negative value in case
- *              of error.
- */
-struct vexpress_config_bridge_info {
-        const char *name;
-        void *(*func_get)(struct device *dev, struct device_node *node);
-        void (*func_put)(void *func);
-        int (*func_exec)(void *func, int offset, bool write, u32 *data);
-};
+void vexpress_config_set_master(u32 site);
+u32 vexpress_config_get_master(void);
 
-struct vexpress_config_bridge;
+void vexpress_config_lock(void *arg);
+void vexpress_config_unlock(void *arg);
 
-struct vexpress_config_bridge *vexpress_config_bridge_register(
-                struct device_node *node,
-                struct vexpress_config_bridge_info *info);
-void vexpress_config_bridge_unregister(struct vexpress_config_bridge *bridge);
+int vexpress_config_get_topo(struct device_node *node, u32 *site,
+                u32 *position, u32 *dcc);
 
-void vexpress_config_complete(struct vexpress_config_bridge *bridge,
-                int status);
+/* Config bridge API */
 
-/* Config function API */
+struct vexpress_config_bridge_ops {
+        struct regmap * (*regmap_init)(struct device *dev, void *context);
+        void (*regmap_exit)(struct regmap *regmap, void *context);
+};
 
-struct vexpress_config_func;
+struct device *vexpress_config_bridge_register(struct device *parent,
+                struct vexpress_config_bridge_ops *ops, void *context);
 
-struct vexpress_config_func *__vexpress_config_func_get(struct device *dev,
-                struct device_node *node);
-#define vexpress_config_func_get_by_dev(dev) \
-                __vexpress_config_func_get(dev, NULL)
-#define vexpress_config_func_get_by_node(node) \
-                __vexpress_config_func_get(NULL, node)
-void vexpress_config_func_put(struct vexpress_config_func *func);
+/* Config regmap API */
 
-/* Both may sleep! */
-int vexpress_config_read(struct vexpress_config_func *func, int offset,
-                u32 *data);
-int vexpress_config_write(struct vexpress_config_func *func, int offset,
-                u32 data);
+struct regmap *devm_regmap_init_vexpress_config(struct device *dev);
 
 /* Platform control */
 
+unsigned int vexpress_get_mci_cardin(struct device *dev);
 u32 vexpress_get_procid(int site);
-u32 vexpress_get_hbi(int site);
 void *vexpress_get_24mhz_clock_base(void);
 void vexpress_flags_set(u32 data);
 
-#define vexpress_get_site_by_node(node) __vexpress_get_site(NULL, node)
-#define vexpress_get_site_by_dev(dev) __vexpress_get_site(dev, NULL)
-unsigned __vexpress_get_site(struct device *dev, struct device_node *node);
-
 void vexpress_sysreg_early_init(void __iomem *base);
-void vexpress_sysreg_of_early_init(void);
+int vexpress_syscfg_device_register(struct platform_device *pdev);
 
 /* Clocks */
 
-struct clk *vexpress_osc_setup(struct device *dev);
-void vexpress_osc_of_setup(struct device_node *node);
-
 void vexpress_clk_init(void __iomem *sp810_base);
-void vexpress_clk_of_init(void);
 
 #endif
diff --git a/include/linux/vfio.h b/include/linux/vfio.h
index 81022a52bc34..8ec980b5e3af 100644
--- a/include/linux/vfio.h
+++ b/include/linux/vfio.h
@@ -86,9 +86,8 @@ extern void vfio_unregister_iommu_driver(
  * from user space.  This allows us to easily determine if the provided
  * structure is sized to include various fields.
  */
-#define offsetofend(TYPE, MEMBER) ({                            \
-        TYPE tmp;                                               \
-        offsetof(TYPE, MEMBER) + sizeof(tmp.MEMBER); })         \
+#define offsetofend(TYPE, MEMBER) \
+        (offsetof(TYPE, MEMBER) + sizeof(((TYPE *)0)->MEMBER))
 
 /*
  * External user API
diff --git a/include/linux/vm_event_item.h b/include/linux/vm_event_item.h
index 486c3972c0be..ced92345c963 100644
--- a/include/linux/vm_event_item.h
+++ b/include/linux/vm_event_item.h
@@ -80,6 +80,10 @@ enum vm_event_item { PGPGIN, PGPGOUT, PSWPIN, PSWPOUT,
                 NR_TLB_LOCAL_FLUSH_ALL,
                 NR_TLB_LOCAL_FLUSH_ONE,
 #endif /* CONFIG_DEBUG_TLBFLUSH */
+#ifdef CONFIG_DEBUG_VM_VMACACHE
+                VMACACHE_FIND_CALLS,
+                VMACACHE_FIND_HITS,
+#endif
                 NR_VM_EVENT_ITEMS
 };
 
diff --git a/include/linux/vmstat.h b/include/linux/vmstat.h
index 45c9cd1daf7a..82e7db7f7100 100644
--- a/include/linux/vmstat.h
+++ b/include/linux/vmstat.h
@@ -95,6 +95,12 @@ static inline void vm_events_fold_cpu(int cpu)
 #define count_vm_tlb_events(x, y) do { (void)(y); } while (0)
 #endif
 
+#ifdef CONFIG_DEBUG_VM_VMACACHE
+#define count_vm_vmacache_event(x) count_vm_event(x)
+#else
+#define count_vm_vmacache_event(x) do {} while (0)
+#endif
+
 #define __count_zone_vm_events(item, zone, delta) \
                 __count_vm_events(item##_NORMAL - ZONE_NORMAL + \
                 zone_idx(zone), delta)
diff --git a/include/linux/zbud.h b/include/linux/zbud.h
index 2571a5cfa5fc..13af0d450bf6 100644
--- a/include/linux/zbud.h
+++ b/include/linux/zbud.h
@@ -11,7 +11,7 @@ struct zbud_ops {
 
 struct zbud_pool *zbud_create_pool(gfp_t gfp, struct zbud_ops *ops);
 void zbud_destroy_pool(struct zbud_pool *pool);
-int zbud_alloc(struct zbud_pool *pool, int size, gfp_t gfp,
+int zbud_alloc(struct zbud_pool *pool, unsigned int size, gfp_t gfp,
         unsigned long *handle);
 void zbud_free(struct zbud_pool *pool, unsigned long handle);
 int zbud_reclaim_page(struct zbud_pool *pool, unsigned int retries);
diff --git a/include/media/adv7604.h b/include/media/adv7604.h
index d262a3a922bd..aa1c4477722d 100644
--- a/include/media/adv7604.h
+++ b/include/media/adv7604.h
@@ -21,6 +21,8 @@
 #ifndef _ADV7604_
 #define _ADV7604_
 
+#include <linux/types.h>
+
 /* Analog input muxing modes (AFE register 0x02, [2:0]) */
 enum adv7604_ain_sel {
         ADV7604_AIN1_2_3_NC_SYNC_1_2 = 0,
@@ -30,14 +32,18 @@ enum adv7604_ain_sel {
         ADV7604_AIN9_4_5_6_SYNC_2_1 = 4,
 };
 
-/* Bus rotation and reordering (IO register 0x04, [7:5]) */
-enum adv7604_op_ch_sel {
-        ADV7604_OP_CH_SEL_GBR = 0,
-        ADV7604_OP_CH_SEL_GRB = 1,
-        ADV7604_OP_CH_SEL_BGR = 2,
-        ADV7604_OP_CH_SEL_RGB = 3,
-        ADV7604_OP_CH_SEL_BRG = 4,
-        ADV7604_OP_CH_SEL_RBG = 5,
+/*
+ * Bus rotation and reordering. This is used to specify component reordering on
+ * the board and describes the components order on the bus when the ADV7604
+ * outputs RGB.
+ */
+enum adv7604_bus_order {
+        ADV7604_BUS_ORDER_RGB,          /* No operation */
+        ADV7604_BUS_ORDER_GRB,          /* Swap 1-2     */
+        ADV7604_BUS_ORDER_RBG,          /* Swap 2-3     */
+        ADV7604_BUS_ORDER_BGR,          /* Swap 1-3     */
+        ADV7604_BUS_ORDER_BRG,          /* Rotate right */
+        ADV7604_BUS_ORDER_GBR,          /* Rotate left  */
 };
 
 /* Input Color Space (IO register 0x02, [7:4]) */
@@ -53,29 +59,11 @@ enum adv7604_inp_color_space {
         ADV7604_INP_COLOR_SPACE_AUTO = 0xf,
 };
 
-/* Select output format (IO register 0x03, [7:0]) */
-enum adv7604_op_format_sel {
-        ADV7604_OP_FORMAT_SEL_SDR_ITU656_8 = 0x00,
-        ADV7604_OP_FORMAT_SEL_SDR_ITU656_10 = 0x01,
-        ADV7604_OP_FORMAT_SEL_SDR_ITU656_12_MODE0 = 0x02,
-        ADV7604_OP_FORMAT_SEL_SDR_ITU656_12_MODE1 = 0x06,
-        ADV7604_OP_FORMAT_SEL_SDR_ITU656_12_MODE2 = 0x0a,
-        ADV7604_OP_FORMAT_SEL_DDR_422_8 = 0x20,
-        ADV7604_OP_FORMAT_SEL_DDR_422_10 = 0x21,
-        ADV7604_OP_FORMAT_SEL_DDR_422_12_MODE0 = 0x22,
-        ADV7604_OP_FORMAT_SEL_DDR_422_12_MODE1 = 0x23,
-        ADV7604_OP_FORMAT_SEL_DDR_422_12_MODE2 = 0x24,
-        ADV7604_OP_FORMAT_SEL_SDR_444_24 = 0x40,
-        ADV7604_OP_FORMAT_SEL_SDR_444_30 = 0x41,
-        ADV7604_OP_FORMAT_SEL_SDR_444_36_MODE0 = 0x42,
-        ADV7604_OP_FORMAT_SEL_DDR_444_24 = 0x60,
-        ADV7604_OP_FORMAT_SEL_DDR_444_30 = 0x61,
-        ADV7604_OP_FORMAT_SEL_DDR_444_36 = 0x62,
-        ADV7604_OP_FORMAT_SEL_SDR_ITU656_16 = 0x80,
-        ADV7604_OP_FORMAT_SEL_SDR_ITU656_20 = 0x81,
-        ADV7604_OP_FORMAT_SEL_SDR_ITU656_24_MODE0 = 0x82,
-        ADV7604_OP_FORMAT_SEL_SDR_ITU656_24_MODE1 = 0x86,
-        ADV7604_OP_FORMAT_SEL_SDR_ITU656_24_MODE2 = 0x8a,
+/* Select output format (IO register 0x03, [4:2]) */
+enum adv7604_op_format_mode_sel {
+        ADV7604_OP_FORMAT_MODE0 = 0x00,
+        ADV7604_OP_FORMAT_MODE1 = 0x04,
+        ADV7604_OP_FORMAT_MODE2 = 0x08,
 };
 
 enum adv7604_drive_strength {
@@ -84,6 +72,30 @@ enum adv7604_drive_strength {
         ADV7604_DR_STR_HIGH = 3,
 };
 
+enum adv7604_int1_config {
+        ADV7604_INT1_CONFIG_OPEN_DRAIN,
+        ADV7604_INT1_CONFIG_ACTIVE_LOW,
+        ADV7604_INT1_CONFIG_ACTIVE_HIGH,
+        ADV7604_INT1_CONFIG_DISABLED,
+};
+
+enum adv7604_page {
+        ADV7604_PAGE_IO,
+        ADV7604_PAGE_AVLINK,
+        ADV7604_PAGE_CEC,
+        ADV7604_PAGE_INFOFRAME,
+        ADV7604_PAGE_ESDP,
+        ADV7604_PAGE_DPP,
+        ADV7604_PAGE_AFE,
+        ADV7604_PAGE_REP,
+        ADV7604_PAGE_EDID,
+        ADV7604_PAGE_HDMI,
+        ADV7604_PAGE_TEST,
+        ADV7604_PAGE_CP,
+        ADV7604_PAGE_VDP,
+        ADV7604_PAGE_MAX,
+};
+
 /* Platform dependent definition */
 struct adv7604_platform_data {
         /* DIS_PWRDNB: 1 if the PWRDNB pin is unused and unconnected */
@@ -92,30 +104,34 @@ struct adv7604_platform_data {
         /* DIS_CABLE_DET_RST: 1 if the 5V pins are unused and unconnected */
         unsigned disable_cable_det_rst:1;
 
+        int default_input;
+
         /* Analog input muxing mode */
         enum adv7604_ain_sel ain_sel;
 
         /* Bus rotation and reordering */
-        enum adv7604_op_ch_sel op_ch_sel;
+        enum adv7604_bus_order bus_order;
 
-        /* Select output format */
-        enum adv7604_op_format_sel op_format_sel;
+        /* Select output format mode */
+        enum adv7604_op_format_mode_sel op_format_mode_sel;
+
+        /* Configuration of the INT1 pin */
+        enum adv7604_int1_config int1_config;
 
         /* IO register 0x02 */
         unsigned alt_gamma:1;
         unsigned op_656_range:1;
-        unsigned rgb_out:1;
         unsigned alt_data_sat:1;
 
         /* IO register 0x05 */
         unsigned blank_data:1;
         unsigned insert_av_codes:1;
         unsigned replicate_av_codes:1;
-        unsigned invert_cbcr:1;
 
         /* IO register 0x06 */
         unsigned inv_vs_pol:1;
         unsigned inv_hs_pol:1;
+        unsigned inv_llc_pol:1;
 
         /* IO register 0x14 */
         enum adv7604_drive_strength dr_str_data;
@@ -129,34 +145,22 @@ struct adv7604_platform_data {
         unsigned hdmi_free_run_mode;
 
         /* i2c addresses: 0 == use default */
-        u8 i2c_avlink;
-        u8 i2c_cec;
-        u8 i2c_infoframe;
-        u8 i2c_esdp;
-        u8 i2c_dpp;
-        u8 i2c_afe;
-        u8 i2c_repeater;
-        u8 i2c_edid;
-        u8 i2c_hdmi;
-        u8 i2c_test;
-        u8 i2c_cp;
-        u8 i2c_vdp;
+        u8 i2c_addresses[ADV7604_PAGE_MAX];
 };
 
-enum adv7604_input_port {
-        ADV7604_INPUT_HDMI_PORT_A,
-        ADV7604_INPUT_HDMI_PORT_B,
-        ADV7604_INPUT_HDMI_PORT_C,
-        ADV7604_INPUT_HDMI_PORT_D,
-        ADV7604_INPUT_VGA_RGB,
-        ADV7604_INPUT_VGA_COMP,
+enum adv7604_pad {
+        ADV7604_PAD_HDMI_PORT_A = 0,
+        ADV7604_PAD_HDMI_PORT_B = 1,
+        ADV7604_PAD_HDMI_PORT_C = 2,
+        ADV7604_PAD_HDMI_PORT_D = 3,
+        ADV7604_PAD_VGA_RGB = 4,
+        ADV7604_PAD_VGA_COMP = 5,
+        /* The source pad is either 1 (ADV7611) or 6 (ADV7604) */
+        ADV7604_PAD_SOURCE = 6,
+        ADV7611_PAD_SOURCE = 1,
+        ADV7604_PAD_MAX = 7,
 };
 
-#define ADV7604_EDID_PORT_A 0
-#define ADV7604_EDID_PORT_B 1
-#define ADV7604_EDID_PORT_C 2
-#define ADV7604_EDID_PORT_D 3
-
 #define V4L2_CID_ADV_RX_ANALOG_SAMPLING_PHASE   (V4L2_CID_DV_CLASS_BASE + 0x1000)
 #define V4L2_CID_ADV_RX_FREE_RUN_COLOR_MANUAL   (V4L2_CID_DV_CLASS_BASE + 0x1001)
 #define V4L2_CID_ADV_RX_FREE_RUN_COLOR          (V4L2_CID_DV_CLASS_BASE + 0x1002)
diff --git a/include/media/davinci/vpbe_display.h b/include/media/davinci/vpbe_display.h
index 8dffffedbb59..637749a91432 100644
--- a/include/media/davinci/vpbe_display.h
+++ b/include/media/davinci/vpbe_display.h
@@ -16,6 +16,7 @@
 /* Header files */
 #include <linux/videodev2.h>
 #include <media/v4l2-common.h>
+#include <media/v4l2-fh.h>
 #include <media/videobuf2-dma-contig.h>
 #include <media/davinci/vpbe_types.h>
 #include <media/davinci/vpbe_osd.h>
@@ -94,8 +95,6 @@ struct vpbe_layer {
          * has selected
          */
         enum v4l2_memory memory;
-        /* Used to keep track of state of the priority */
-        struct v4l2_prio_state prio;
         /* Used to store pixel format */
         struct v4l2_pix_format pix_fmt;
         enum v4l2_field buf_field;
@@ -134,14 +133,13 @@ struct vpbe_display {
 
 /* File handle structure */
 struct vpbe_fh {
+        struct v4l2_fh fh;
         /* vpbe device structure */
         struct vpbe_display *disp_dev;
         /* pointer to layer object for opened device */
         struct vpbe_layer *layer;
         /* Indicates whether this file handle is doing IO */
         unsigned char io_allowed;
-        /* Used to keep track priority of this instance */
-        enum v4l2_priority prio;
 };
 
 struct buf_config_params {
diff --git a/include/media/davinci/vpfe_capture.h b/include/media/davinci/vpfe_capture.h
index cc973ed845a7..288772e6900a 100644
--- a/include/media/davinci/vpfe_capture.h
+++ b/include/media/davinci/vpfe_capture.h
@@ -26,6 +26,7 @@
 #include <linux/videodev2.h>
 #include <linux/clk.h>
 #include <linux/i2c.h>
+#include <media/v4l2-fh.h>
 #include <media/v4l2-ioctl.h>
 #include <media/v4l2-device.h>
 #include <media/videobuf-dma-contig.h>
@@ -110,8 +111,6 @@ struct vpfe_device {
         struct v4l2_device v4l2_dev;
         /* parent device */
         struct device *pdev;
-        /* Used to keep track of state of the priority */
-        struct v4l2_prio_state prio;
         /* number of open instances of the channel */
         u32 usrs;
         /* Indicates id of the field which is being displayed */
@@ -174,11 +173,10 @@ struct vpfe_device {
 
 /* File handle structure */
 struct vpfe_fh {
+        struct v4l2_fh fh;
         struct vpfe_device *vpfe_dev;
         /* Indicates whether this file handle is doing IO */
         u8 io_allowed;
-        /* Used to keep track priority of this instance */
-        enum v4l2_priority prio;
 };
 
 struct vpfe_config_params {
diff --git a/include/media/s5p_fimc.h b/include/media/exynos-fimc.h
index b975c285c8a9..aa44660e2041 100644
--- a/include/media/s5p_fimc.h
+++ b/include/media/exynos-fimc.h
@@ -61,41 +61,20 @@ enum fimc_bus_type {
 #define GRP_ID_FLITE            (1 << 13)
 #define GRP_ID_FIMC_IS          (1 << 14)
 
-struct i2c_board_info;
-
 /**
  * struct fimc_source_info - video source description required for the host
  *                           interface configuration
  *
- * @board_info: pointer to I2C subdevice's board info
- * @clk_frequency: frequency of the clock the host interface provides to sensor
  * @fimc_bus_type: FIMC camera input type
  * @sensor_bus_type: image sensor bus type, MIPI, ITU-R BT.601 etc.
  * @flags: the parallel sensor bus flags defining signals polarity (V4L2_MBUS_*)
- * @i2c_bus_num: i2c control bus id the sensor is attached to
  * @mux_id: FIMC camera interface multiplexer index (separate for MIPI and ITU)
- * @clk_id: index of the SoC peripheral clock for sensors
  */
 struct fimc_source_info {
-        struct i2c_board_info *board_info;
-        unsigned long clk_frequency;
         enum fimc_bus_type fimc_bus_type;
         enum fimc_bus_type sensor_bus_type;
         u16 flags;
-        u16 i2c_bus_num;
         u16 mux_id;
-        u8 clk_id;
-};
-
-/**
- * struct s5p_platform_fimc - camera host interface platform data
- *
- * @source_info: properties of an image source for the host interface setup
- * @num_clients: the number of attached image sources
- */
-struct s5p_platform_fimc {
-        struct fimc_source_info *source_info;
-        int num_clients;
 };
 
 /*
diff --git a/include/media/media-device.h b/include/media/media-device.h
index 12155a9596c4..6e6db78f1ee2 100644
--- a/include/media/media-device.h
+++ b/include/media/media-device.h
@@ -87,7 +87,9 @@ struct media_device {
 /* media_devnode to media_device */
 #define to_media_device(node) container_of(node, struct media_device, devnode)
 
-int __must_check media_device_register(struct media_device *mdev);
+int __must_check __media_device_register(struct media_device *mdev,
+                                         struct module *owner);
+#define media_device_register(mdev) __media_device_register(mdev, THIS_MODULE)
 void media_device_unregister(struct media_device *mdev);
 
 int __must_check media_device_register_entity(struct media_device *mdev,
diff --git a/include/media/media-devnode.h b/include/media/media-devnode.h
index 3446af279fca..0dc7060f9625 100644
--- a/include/media/media-devnode.h
+++ b/include/media/media-devnode.h
@@ -82,7 +82,8 @@ struct media_devnode {
 /* dev to media_devnode */
 #define to_media_devnode(cd) container_of(cd, struct media_devnode, dev)
 
-int __must_check media_devnode_register(struct media_devnode *mdev);
+int __must_check media_devnode_register(struct media_devnode *mdev,
+                                        struct module *owner);
 void media_devnode_unregister(struct media_devnode *mdev);
 
 static inline struct media_devnode *media_devnode_data(struct file *filp)
diff --git a/include/media/v4l2-device.h b/include/media/v4l2-device.h
index c9b1593923f6..ffb69da3ce9e 100644
--- a/include/media/v4l2-device.h
+++ b/include/media/v4l2-device.h
@@ -120,6 +120,14 @@ void v4l2_device_unregister_subdev(struct v4l2_subdev *sd);
 int __must_check
 v4l2_device_register_subdev_nodes(struct v4l2_device *v4l2_dev);
 
+/* Send a notification to v4l2_device. */
+static inline void v4l2_subdev_notify(struct v4l2_subdev *sd,
+                                      unsigned int notification, void *arg)
+{
+        if (sd && sd->v4l2_dev && sd->v4l2_dev->notify)
+                sd->v4l2_dev->notify(sd, notification, arg);
+}
+
 /* Iterate over all subdevs. */
 #define v4l2_device_for_each_subdev(sd, v4l2_dev)                       \
         list_for_each_entry(sd, &(v4l2_dev)->subdevs, list)
diff --git a/include/media/v4l2-event.h b/include/media/v4l2-event.h
index be05d019de25..1ab9045e52e3 100644
--- a/include/media/v4l2-event.h
+++ b/include/media/v4l2-event.h
@@ -132,4 +132,8 @@ int v4l2_event_unsubscribe(struct v4l2_fh *fh,
 void v4l2_event_unsubscribe_all(struct v4l2_fh *fh);
 int v4l2_event_subdev_unsubscribe(struct v4l2_subdev *sd, struct v4l2_fh *fh,
                                   struct v4l2_event_subscription *sub);
+int v4l2_src_change_event_subscribe(struct v4l2_fh *fh,
+                                const struct v4l2_event_subscription *sub);
+int v4l2_src_change_event_subdev_subscribe(struct v4l2_subdev *sd,
+                struct v4l2_fh *fh, struct v4l2_event_subscription *sub);
 #endif /* V4L2_EVENT_H */
diff --git a/include/media/v4l2-subdev.h b/include/media/v4l2-subdev.h
index 28f4d8c3cf7d..d7465725773d 100644
--- a/include/media/v4l2-subdev.h
+++ b/include/media/v4l2-subdev.h
@@ -159,8 +159,6 @@ struct v4l2_subdev_core_ops {
         int (*s_ext_ctrls)(struct v4l2_subdev *sd, struct v4l2_ext_controls *ctrls);
         int (*try_ext_ctrls)(struct v4l2_subdev *sd, struct v4l2_ext_controls *ctrls);
         int (*querymenu)(struct v4l2_subdev *sd, struct v4l2_querymenu *qm);
-        int (*g_std)(struct v4l2_subdev *sd, v4l2_std_id *norm);
-        int (*s_std)(struct v4l2_subdev *sd, v4l2_std_id norm);
         long (*ioctl)(struct v4l2_subdev *sd, unsigned int cmd, void *arg);
 #ifdef CONFIG_COMPAT
         long (*compat_ioctl32)(struct v4l2_subdev *sd, unsigned int cmd,
@@ -234,15 +232,18 @@ struct v4l2_subdev_audio_ops {
 
 /* Indicates the @length field specifies maximum data length. */
 #define V4L2_MBUS_FRAME_DESC_FL_LEN_MAX         (1U << 0)
-/* Indicates user defined data format, i.e. non standard frame format. */
+/*
+ * Indicates that the format does not have line offsets, i.e. the
+ * receiver should use 1D DMA.
+ */
 #define V4L2_MBUS_FRAME_DESC_FL_BLOB            (1U << 1)
 
 /**
  * struct v4l2_mbus_frame_desc_entry - media bus frame description structure
  * @flags: V4L2_MBUS_FRAME_DESC_FL_* flags
  * @pixelcode: media bus pixel code, valid if FRAME_DESC_FL_BLOB is not set
- * @length: number of octets per frame, valid for compressed or unspecified
- *          formats
+ * @length: number of octets per frame, valid if V4L2_MBUS_FRAME_DESC_FL_BLOB
+ *          is set
  */
 struct v4l2_mbus_frame_desc_entry {
         u16 flags;
@@ -269,8 +270,11 @@ struct v4l2_mbus_frame_desc {
    g_std_output: get current standard for video OUTPUT devices. This is ignored
         by video input devices.
 
-   g_tvnorms_output: get v4l2_std_id with all standards supported by video
-        OUTPUT device. This is ignored by video input devices.
+   g_tvnorms: get v4l2_std_id with all standards supported by the video
+        CAPTURE device. This is ignored by video output devices.
+
+   g_tvnorms_output: get v4l2_std_id with all standards supported by the video
+        OUTPUT device. This is ignored by video capture devices.
 
    s_crystal_freq: sets the frequency of the crystal used to generate the
         clocks in Hz. An extra flags field allows device specific configuration
@@ -310,9 +314,12 @@ struct v4l2_mbus_frame_desc {
 struct v4l2_subdev_video_ops {
         int (*s_routing)(struct v4l2_subdev *sd, u32 input, u32 output, u32 config);
         int (*s_crystal_freq)(struct v4l2_subdev *sd, u32 freq, u32 flags);
+        int (*g_std)(struct v4l2_subdev *sd, v4l2_std_id *norm);
+        int (*s_std)(struct v4l2_subdev *sd, v4l2_std_id norm);
         int (*s_std_output)(struct v4l2_subdev *sd, v4l2_std_id std);
         int (*g_std_output)(struct v4l2_subdev *sd, v4l2_std_id *std);
         int (*querystd)(struct v4l2_subdev *sd, v4l2_std_id *std);
+        int (*g_tvnorms)(struct v4l2_subdev *sd, v4l2_std_id *std);
         int (*g_tvnorms_output)(struct v4l2_subdev *sd, v4l2_std_id *std);
         int (*g_input_status)(struct v4l2_subdev *sd, u32 *status);
         int (*s_stream)(struct v4l2_subdev *sd, int enable);
@@ -331,12 +338,8 @@ struct v4l2_subdev_video_ops {
                         struct v4l2_dv_timings *timings);
         int (*g_dv_timings)(struct v4l2_subdev *sd,
                         struct v4l2_dv_timings *timings);
-        int (*enum_dv_timings)(struct v4l2_subdev *sd,
-                        struct v4l2_enum_dv_timings *timings);
         int (*query_dv_timings)(struct v4l2_subdev *sd,
                         struct v4l2_dv_timings *timings);
-        int (*dv_timings_cap)(struct v4l2_subdev *sd,
-                        struct v4l2_dv_timings_cap *cap);
         int (*enum_mbus_fmt)(struct v4l2_subdev *sd, unsigned int index,
                              enum v4l2_mbus_pixelcode *code);
         int (*enum_mbus_fsizes)(struct v4l2_subdev *sd,
@@ -510,6 +513,10 @@ struct v4l2_subdev_pad_ops {
                              struct v4l2_subdev_selection *sel);
         int (*get_edid)(struct v4l2_subdev *sd, struct v4l2_edid *edid);
         int (*set_edid)(struct v4l2_subdev *sd, struct v4l2_edid *edid);
+        int (*dv_timings_cap)(struct v4l2_subdev *sd,
+                              struct v4l2_dv_timings_cap *cap);
+        int (*enum_dv_timings)(struct v4l2_subdev *sd,
+                               struct v4l2_enum_dv_timings *timings);
 #ifdef CONFIG_MEDIA_CONTROLLER
         int (*link_validate)(struct v4l2_subdev *sd, struct media_link *link,
                              struct v4l2_subdev_format *source_fmt,
@@ -584,6 +591,7 @@ struct v4l2_subdev {
 #endif
         struct list_head list;
         struct module *owner;
+        bool owner_v4l2_dev;
         u32 flags;
         struct v4l2_device *v4l2_dev;
         const struct v4l2_subdev_ops *ops;
@@ -685,17 +693,12 @@ void v4l2_subdev_init(struct v4l2_subdev *sd,
 /* Call an ops of a v4l2_subdev, doing the right checks against
    NULL pointers.
 
-   Example: err = v4l2_subdev_call(sd, core, s_std, norm);
+   Example: err = v4l2_subdev_call(sd, video, s_std, norm);
  */
 #define v4l2_subdev_call(sd, o, f, args...)                             \
         (!(sd) ? -ENODEV : (((sd)->ops->o && (sd)->ops->o->f) ? \
                 (sd)->ops->o->f((sd) , ##args) : -ENOIOCTLCMD))
 
-/* Send a notification to v4l2_device. */
-#define v4l2_subdev_notify(sd, notification, arg)                          \
-        ((!(sd) || !(sd)->v4l2_dev || !(sd)->v4l2_dev->notify) ? -ENODEV : \
-         (sd)->v4l2_dev->notify((sd), (notification), (arg)))
-
 #define v4l2_subdev_has_op(sd, o, f) \
         ((sd)->ops->o && (sd)->ops->o->f)
 
diff --git a/include/media/videobuf2-core.h b/include/media/videobuf2-core.h
index af4621109726..bca25dc53f9d 100644
--- a/include/media/videobuf2-core.h
+++ b/include/media/videobuf2-core.h
@@ -20,6 +20,7 @@
 
 struct vb2_alloc_ctx;
 struct vb2_fileio_data;
+struct vb2_threadio_data;
 
 /**
  * struct vb2_mem_ops - memory handling/memory allocator operations
@@ -323,7 +324,7 @@ struct vb2_ops {
         void (*buf_cleanup)(struct vb2_buffer *vb);
 
         int (*start_streaming)(struct vb2_queue *q, unsigned int count);
-        int (*stop_streaming)(struct vb2_queue *q);
+        void (*stop_streaming)(struct vb2_queue *q);
 
         void (*buf_queue)(struct vb2_buffer *vb);
 };
@@ -375,6 +376,7 @@ struct v4l2_fh;
  * @start_streaming_called: start_streaming() was called successfully and we
  *              started streaming.
  * @fileio:     file io emulator internal data, used only if emulator is active
+ * @threadio:   thread io internal data, used only if thread is active
  */
 struct vb2_queue {
         enum v4l2_buf_type              type;
@@ -411,6 +413,7 @@ struct vb2_queue {
         unsigned int                    start_streaming_called:1;
 
         struct vb2_fileio_data          *fileio;
+        struct vb2_threadio_data        *threadio;
 
 #ifdef CONFIG_VIDEO_ADV_DEBUG
         /*
@@ -461,6 +464,35 @@ size_t vb2_read(struct vb2_queue *q, char __user *data, size_t count,
                 loff_t *ppos, int nonblock);
 size_t vb2_write(struct vb2_queue *q, const char __user *data, size_t count,
                 loff_t *ppos, int nonblock);
+/**
+ * vb2_thread_fnc - callback function for use with vb2_thread
+ *
+ * This is called whenever a buffer is dequeued in the thread.
+ */
+typedef int (*vb2_thread_fnc)(struct vb2_buffer *vb, void *priv);
+
+/**
+ * vb2_thread_start() - start a thread for the given queue.
+ * @q:          videobuf queue
+ * @fnc:        callback function
+ * @priv:       priv pointer passed to the callback function
+ * @thread_name:the name of the thread. This will be prefixed with "vb2-".
+ *
+ * This starts a thread that will queue and dequeue until an error occurs
+ * or @vb2_thread_stop is called.
+ *
+ * This function should not be used for anything else but the videobuf2-dvb
+ * support. If you think you have another good use-case for this, then please
+ * contact the linux-media mailinglist first.
+ */
+int vb2_thread_start(struct vb2_queue *q, vb2_thread_fnc fnc, void *priv,
+                     const char *thread_name);
+
+/**
+ * vb2_thread_stop() - stop the thread for the given queue.
+ * @q:          videobuf queue
+ */
+int vb2_thread_stop(struct vb2_queue *q);
 
 /**
  * vb2_is_streaming() - return streaming status of the queue
@@ -472,6 +504,23 @@ static inline bool vb2_is_streaming(struct vb2_queue *q)
 }
 
 /**
+ * vb2_fileio_is_active() - return true if fileio is active.
+ * @q:          videobuf queue
+ *
+ * This returns true if read() or write() is used to stream the data
+ * as opposed to stream I/O. This is almost never an important distinction,
+ * except in rare cases. One such case is that using read() or write() to
+ * stream a format using V4L2_FIELD_ALTERNATE is not allowed since there
+ * is no way you can pass the field information of each buffer to/from
+ * userspace. A driver that supports this field format should check for
+ * this in the queue_setup op and reject it if this function returns true.
+ */
+static inline bool vb2_fileio_is_active(struct vb2_queue *q)
+{
+        return q->fileio;
+}
+
+/**
  * vb2_is_busy() - return busy status of the queue
  * @q:          videobuf queue
  *
diff --git a/include/media/videobuf2-dvb.h b/include/media/videobuf2-dvb.h
new file mode 100644
index 000000000000..8f61456f1394
--- /dev/null
+++ b/include/media/videobuf2-dvb.h
@@ -0,0 +1,58 @@
+#ifndef _VIDEOBUF2_DVB_H_
+#define _VIDEOBUF2_DVB_H_
+
+#include <dvbdev.h>
+#include <dmxdev.h>
+#include <dvb_demux.h>
+#include <dvb_net.h>
+#include <dvb_frontend.h>
+#include <media/videobuf2-core.h>
+
+struct vb2_dvb {
+        /* filling that the job of the driver */
+        char                    *name;
+        struct dvb_frontend     *frontend;
+        struct vb2_queue        dvbq;
+
+        /* video-buf-dvb state info */
+        struct mutex            lock;
+        int                     nfeeds;
+
+        /* vb2_dvb_(un)register manages this */
+        struct dvb_demux        demux;
+        struct dmxdev           dmxdev;
+        struct dmx_frontend     fe_hw;
+        struct dmx_frontend     fe_mem;
+        struct dvb_net          net;
+};
+
+struct vb2_dvb_frontend {
+        struct list_head felist;
+        int id;
+        struct vb2_dvb dvb;
+};
+
+struct vb2_dvb_frontends {
+        struct list_head felist;
+        struct mutex lock;
+        struct dvb_adapter adapter;
+        int active_fe_id; /* Indicates which frontend in the felist is in use */
+        int gate; /* Frontend with gate control 0=!MFE,1=fe0,2=fe1 etc */
+};
+
+int vb2_dvb_register_bus(struct vb2_dvb_frontends *f,
+                         struct module *module,
+                         void *adapter_priv,
+                         struct device *device,
+                         short *adapter_nr,
+                         int mfe_shared);
+
+void vb2_dvb_unregister_bus(struct vb2_dvb_frontends *f);
+
+struct vb2_dvb_frontend *vb2_dvb_alloc_frontend(struct vb2_dvb_frontends *f, int id);
+void vb2_dvb_dealloc_frontends(struct vb2_dvb_frontends *f);
+
+struct vb2_dvb_frontend *vb2_dvb_get_frontend(struct vb2_dvb_frontends *f, int id);
+int vb2_dvb_find_frontend(struct vb2_dvb_frontends *f, struct dvb_frontend *p);
+
+#endif                  /* _VIDEOBUF2_DVB_H_ */
diff --git a/include/net/ip_vs.h b/include/net/ip_vs.h
index 5679d927562b..624a8a54806d 100644
--- a/include/net/ip_vs.h
+++ b/include/net/ip_vs.h
@@ -1204,7 +1204,7 @@ static inline bool __ip_vs_conn_get(struct ip_vs_conn *cp)
 /* put back the conn without restarting its timer */
 static inline void __ip_vs_conn_put(struct ip_vs_conn *cp)
 {
-        smp_mb__before_atomic_dec();
+        smp_mb__before_atomic();
         atomic_dec(&cp->refcnt);
 }
 void ip_vs_conn_put(struct ip_vs_conn *cp);
@@ -1408,7 +1408,7 @@ static inline void ip_vs_dest_hold(struct ip_vs_dest *dest)
 
 static inline void ip_vs_dest_put(struct ip_vs_dest *dest)
 {
-        smp_mb__before_atomic_dec();
+        smp_mb__before_atomic();
         atomic_dec(&dest->refcnt);
 }
 
diff --git a/include/net/wimax.h b/include/net/wimax.h
index 98498e1daa06..e52ef5357e08 100644
--- a/include/net/wimax.h
+++ b/include/net/wimax.h
@@ -483,8 +483,8 @@ void wimax_report_rfkill_sw(struct wimax_dev *, enum wimax_rf_state);
  * Be sure not to modify skb->data in the middle (ie: don't use
  * skb_push()/skb_pull()/skb_reserve() on the skb).
  *
- * "pipe_name" is any string, than can be interpreted as the name of
- * the pipe or destinatary; the interpretation of it is driver
+ * "pipe_name" is any string, that can be interpreted as the name of
+ * the pipe or recipient; the interpretation of it is driver
  * specific, so the recipient can multiplex it as wished. It can be
  * NULL, it won't be used - an example is using a "diagnostics" tag to
  * send diagnostics information that a device-specific diagnostics
diff --git a/include/sound/atmel-ac97c.h b/include/sound/atmel-ac97c.h
index e6aabdb45865..00e6c289a936 100644
--- a/include/sound/atmel-ac97c.h
+++ b/include/sound/atmel-ac97c.h
@@ -23,7 +23,6 @@
  * @reset_pin: GPIO pin wired to the reset input on the external AC97 codec,
  *             optional to use, set to -ENODEV if not in use. AC97 layer will
  *             try to do a software reset of the external codec anyway.
- * @flags: Flags for which directions should be enabled.
  *
  * If the user do not want to use a DMA channel for playback or capture, i.e.
  * only one feature is required on the board. The slave for playback or capture
@@ -33,7 +32,6 @@
 struct ac97c_platform_data {
         struct dw_dma_slave     rx_dws;
         struct dw_dma_slave     tx_dws;
-        unsigned int            flags;
         int                     reset_pin;
 };
 
diff --git a/include/sound/core.h b/include/sound/core.h
index d3f5f818e0b9..eedda2cdfe57 100644
--- a/include/sound/core.h
+++ b/include/sound/core.h
@@ -282,13 +282,6 @@ int snd_card_new(struct device *parent, int idx, const char *xid,
                  struct module *module, int extra_size,
                  struct snd_card **card_ret);
 
-static inline int __deprecated
-snd_card_create(int idx, const char *id, struct module *module, int extra_size,
-                struct snd_card **ret)
-{
-        return snd_card_new(NULL, idx, id, module, extra_size, ret);
-}
-
 int snd_card_disconnect(struct snd_card *card);
 int snd_card_free(struct snd_card *card);
 int snd_card_free_when_closed(struct snd_card *card);
diff --git a/include/sound/cs42l56.h b/include/sound/cs42l56.h
new file mode 100644
index 000000000000..2467c8ff132c
--- /dev/null
+++ b/include/sound/cs42l56.h
@@ -0,0 +1,48 @@
+/*
+ * linux/sound/cs42l56.h -- Platform data for CS42L56
+ *
+ * Copyright (c) 2014 Cirrus Logic Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __CS42L56_H
+#define __CS42L56_H
+
+struct cs42l56_platform_data {
+
+        /* GPIO for Reset */
+        unsigned int gpio_nreset;
+
+        /* MICBIAS Level. Check datasheet Pg48 */
+        unsigned int micbias_lvl;
+
+        /* Analog Input 1A Reference 0=Single 1=Pseudo-Differential */
+        unsigned int ain1a_ref_cfg;
+
+        /* Analog Input 2A Reference 0=Single 1=Pseudo-Differential */
+        unsigned int ain2a_ref_cfg;
+
+        /* Analog Input 1B Reference 0=Single 1=Pseudo-Differential */
+        unsigned int ain1b_ref_cfg;
+
+        /* Analog Input 2B Reference 0=Single 1=Pseudo-Differential */
+        unsigned int ain2b_ref_cfg;
+
+        /* Charge Pump Freq. Check datasheet Pg62 */
+        unsigned int chgfreq;
+
+        /* HighPass Filter Right Channel Corner Frequency */
+        unsigned int hpfb_freq;
+
+        /* HighPass Filter Left Channel Corner Frequency */
+        unsigned int hpfa_freq;
+
+        /* Adaptive Power Control for LO/HP */
+        unsigned int adaptive_pwr;
+
+};
+
+#endif /* __CS42L56_H */
diff --git a/include/sound/omap-pcm.h b/include/sound/omap-pcm.h
new file mode 100644
index 000000000000..c1d2f31d71e9
--- /dev/null
+++ b/include/sound/omap-pcm.h
@@ -0,0 +1,30 @@
+/*
+ * omap-pcm.h - OMAP PCM driver
+ *
+ * Copyright (C) 2014 Texas Instruments, Inc.
+ *
+ * Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ */
+
+#ifndef __OMAP_PCM_H__
+#define __OMAP_PCM_H__
+
+#if IS_ENABLED(CONFIG_SND_OMAP_SOC)
+int omap_pcm_platform_register(struct device *dev);
+#else
+static inline int omap_pcm_platform_register(struct device *dev)
+{
+        return 0;
+}
+#endif /* CONFIG_SND_OMAP_SOC */
+
+#endif /* __OMAP_PCM_H__ */
diff --git a/include/sound/rcar_snd.h b/include/sound/rcar_snd.h
index 34a3c02a4576..f4a706f82cb7 100644
--- a/include/sound/rcar_snd.h
+++ b/include/sound/rcar_snd.h
@@ -34,47 +34,39 @@
  * B : SSI direction
  */
 #define RSND_SSI_CLK_PIN_SHARE          (1 << 31)
-#define RSND_SSI_PLAY                   (1 << 24)
 
 #define RSND_SSI(_dma_id, _pio_irq, _flags)             \
 { .dma_id = _dma_id, .pio_irq = _pio_irq, .flags = _flags }
-#define RSND_SSI_SET(_dai_id, _dma_id, _pio_irq, _flags)        \
-{ .dai_id = _dai_id, .dma_id = _dma_id, .pio_irq = _pio_irq, .flags = _flags }
 #define RSND_SSI_UNUSED \
-{ .dai_id = -1, .dma_id = -1, .pio_irq = -1, .flags = 0 }
+{ .dma_id = -1, .pio_irq = -1, .flags = 0 }
 
 struct rsnd_ssi_platform_info {
-        int dai_id;     /* will be removed */
         int dma_id;
         int pio_irq;
         u32 flags;
 };
 
-/*
- * flags
- */
-#define RSND_SCU_USE_HPBIF              (1 << 31) /* it needs RSND_SSI_DEPENDENT */
-
 #define RSND_SRC(rate, _dma_id)                                         \
-{ .flags = RSND_SCU_USE_HPBIF, .convert_rate = rate, .dma_id = _dma_id, }
-#define RSND_SRC_SET(rate, _dma_id)             \
-        { .flags = RSND_SCU_USE_HPBIF, .convert_rate = rate, .dma_id = _dma_id, }
+{ .convert_rate = rate, .dma_id = _dma_id, }
 #define RSND_SRC_UNUSED                         \
-        { .flags = 0, .convert_rate = 0, .dma_id = 0, }
-
-#define rsnd_scu_platform_info  rsnd_src_platform_info
-#define src_info                scu_info
-#define src_info_nr             scu_info_nr
+{ .convert_rate = 0, .dma_id = -1, }
 
 struct rsnd_src_platform_info {
-        u32 flags;
         u32 convert_rate; /* sampling rate convert */
         int dma_id; /* for Gen2 SCU */
 };
 
+/*
+ * flags
+ */
+struct rsnd_dvc_platform_info {
+        u32 flags;
+};
+
 struct rsnd_dai_path_info {
         struct rsnd_ssi_platform_info *ssi;
         struct rsnd_src_platform_info *src;
+        struct rsnd_dvc_platform_info *dvc;
 };
 
 struct rsnd_dai_platform_info {
@@ -99,6 +91,8 @@ struct rcar_snd_info {
         int ssi_info_nr;
         struct rsnd_src_platform_info *src_info;
         int src_info_nr;
+        struct rsnd_dvc_platform_info *dvc_info;
+        int dvc_info_nr;
         struct rsnd_dai_platform_info *dai_info;
         int dai_info_nr;
         int (*start)(int id);
diff --git a/include/sound/rt5640.h b/include/sound/rt5640.h
index 27cc75ed67f8..59d26dd81e45 100644
--- a/include/sound/rt5640.h
+++ b/include/sound/rt5640.h
@@ -16,6 +16,10 @@ struct rt5640_platform_data {
         bool in1_diff;
         bool in2_diff;
 
+        bool dmic_en;
+        bool dmic1_data_pin; /* 0 = IN1P; 1 = GPIO3 */
+        bool dmic2_data_pin; /* 0 = IN1N; 1 = GPIO4 */
+
         int ldo1_en; /* GPIO for LDO1_EN */
 };
 
diff --git a/include/sound/rt5645.h b/include/sound/rt5645.h
new file mode 100644
index 000000000000..1de744c242f6
--- /dev/null
+++ b/include/sound/rt5645.h
@@ -0,0 +1,25 @@
+/*
+ * linux/sound/rt5645.h -- Platform data for RT5645
+ *
+ * Copyright 2013 Realtek Microelectronics
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __LINUX_SND_RT5645_H
+#define __LINUX_SND_RT5645_H
+
+struct rt5645_platform_data {
+        /* IN2 can optionally be differential */
+        bool in2_diff;
+
+        bool dmic_en;
+        unsigned int dmic1_data_pin;
+        /* 0 = IN2N; 1 = GPIO5; 2 = GPIO11 */
+        unsigned int dmic2_data_pin;
+        /* 0 = IN2P; 1 = GPIO6; 2 = GPIO10; 3 = GPIO12 */
+};
+
+#endif
diff --git a/include/sound/rt5651.h b/include/sound/rt5651.h
new file mode 100644
index 000000000000..d35de758dfb5
--- /dev/null
+++ b/include/sound/rt5651.h
@@ -0,0 +1,21 @@
+/*
+ * linux/sound/rt286.h -- Platform data for RT286
+ *
+ * Copyright 2013 Realtek Microelectronics
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __LINUX_SND_RT5651_H
+#define __LINUX_SND_RT5651_H
+
+struct rt5651_platform_data {
+        /* IN2 can optionally be differential */
+        bool in2_diff;
+
+        bool dmic_en;
+};
+
+#endif
diff --git a/include/sound/rt5677.h b/include/sound/rt5677.h
new file mode 100644
index 000000000000..3da14313bcfc
--- /dev/null
+++ b/include/sound/rt5677.h
@@ -0,0 +1,21 @@
+/*
+ * linux/sound/rt5677.h -- Platform data for RT5677
+ *
+ * Copyright 2013 Realtek Semiconductor Corp.
+ * Author: Oder Chiou <oder_chiou@realtek.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __LINUX_SND_RT5677_H
+#define __LINUX_SND_RT5677_H
+
+struct rt5677_platform_data {
+        /* IN1 IN2 can optionally be differential */
+        bool in1_diff;
+        bool in2_diff;
+};
+
+#endif
diff --git a/include/sound/soc-dai.h b/include/sound/soc-dai.h
index fad76769f153..688f2ba8009f 100644
--- a/include/sound/soc-dai.h
+++ b/include/sound/soc-dai.h
@@ -252,7 +252,6 @@ struct snd_soc_dai {
         unsigned int symmetric_rates:1;
         unsigned int symmetric_channels:1;
         unsigned int symmetric_samplebits:1;
-        struct snd_pcm_runtime *runtime;
         unsigned int active;
         unsigned char probed:1;
 
@@ -277,7 +276,6 @@ struct snd_soc_dai {
         struct snd_soc_card *card;
 
         struct list_head list;
-        struct list_head card_list;
 };
 
 static inline void *snd_soc_dai_get_dma_data(const struct snd_soc_dai *dai,
diff --git a/include/sound/soc-dapm.h b/include/sound/soc-dapm.h
index ef78f562f4a8..6b59471cdf44 100644
--- a/include/sound/soc-dapm.h
+++ b/include/sound/soc-dapm.h
@@ -107,10 +107,6 @@ struct device;
 {       .id = snd_soc_dapm_mux, .name = wname, \
         SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
         .kcontrol_news = wcontrols, .num_kcontrols = 1}
-#define SND_SOC_DAPM_VIRT_MUX(wname, wreg, wshift, winvert, wcontrols) \
-        SND_SOC_DAPM_MUX(wname, wreg, wshift, winvert, wcontrols)
-#define SND_SOC_DAPM_VALUE_MUX(wname, wreg, wshift, winvert, wcontrols) \
-        SND_SOC_DAPM_MUX(wname, wreg, wshift, winvert, wcontrols)
 
 /* Simplified versions of above macros, assuming wncontrols = ARRAY_SIZE(wcontrols) */
 #define SOC_PGA_ARRAY(wname, wreg, wshift, winvert,\
@@ -166,10 +162,6 @@ struct device;
         SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
         .kcontrol_news = wcontrols, .num_kcontrols = 1, \
         .event = wevent, .event_flags = wflags}
-#define SND_SOC_DAPM_VIRT_MUX_E(wname, wreg, wshift, winvert, wcontrols, \
-        wevent, wflags) \
-        SND_SOC_DAPM_MUX_E(wname, wreg, wshift, winvert, wcontrols, wevent, \
-                wflags)
 
 /* additional sequencing control within an event type */
 #define SND_SOC_DAPM_PGA_S(wname, wsubseq, wreg, wshift, winvert, \
@@ -256,9 +248,8 @@ struct device;
 /* generic widgets */
 #define SND_SOC_DAPM_REG(wid, wname, wreg, wshift, wmask, won_val, woff_val) \
 {       .id = wid, .name = wname, .kcontrol_news = NULL, .num_kcontrols = 0, \
-        .reg = -((wreg) + 1), .shift = wshift, .mask = wmask, \
-        .on_val = won_val, .off_val = woff_val, .event = dapm_reg_event, \
-        .event_flags = SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD}
+        .reg = wreg, .shift = wshift, .mask = wmask, \
+        .on_val = won_val, .off_val = woff_val, }
 #define SND_SOC_DAPM_SUPPLY(wname, wreg, wshift, winvert, wevent, wflags) \
 {       .id = snd_soc_dapm_supply, .name = wname, \
         SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
@@ -305,16 +296,12 @@ struct device;
         .get = snd_soc_dapm_get_enum_double, \
         .put = snd_soc_dapm_put_enum_double, \
         .private_value = (unsigned long)&xenum }
-#define SOC_DAPM_ENUM_VIRT(xname, xenum) \
-        SOC_DAPM_ENUM(xname, xenum)
 #define SOC_DAPM_ENUM_EXT(xname, xenum, xget, xput) \
 {       .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
         .info = snd_soc_info_enum_double, \
         .get = xget, \
         .put = xput, \
         .private_value = (unsigned long)&xenum }
-#define SOC_DAPM_VALUE_ENUM(xname, xenum) \
-        SOC_DAPM_ENUM(xname, xenum)
 #define SOC_DAPM_PIN_SWITCH(xname) \
 {       .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname " Switch", \
         .info = snd_soc_dapm_info_pin_switch, \
@@ -362,8 +349,6 @@ struct regulator;
 struct snd_soc_dapm_widget_list;
 struct snd_soc_dapm_update;
 
-int dapm_reg_event(struct snd_soc_dapm_widget *w,
-                   struct snd_kcontrol *kcontrol, int event);
 int dapm_regulator_event(struct snd_soc_dapm_widget *w,
                          struct snd_kcontrol *kcontrol, int event);
 int dapm_clock_event(struct snd_soc_dapm_widget *w,
@@ -606,6 +591,7 @@ struct snd_soc_dapm_context {
                              enum snd_soc_dapm_type, int);
 
         struct device *dev; /* from parent - for debug */
+        struct snd_soc_component *component; /* parent component */
         struct snd_soc_codec *codec; /* parent codec */
         struct snd_soc_platform *platform; /* parent platform */
         struct snd_soc_card *card; /* parent card */
diff --git a/include/sound/soc.h b/include/sound/soc.h
index 0b83168d8ff4..ed9e2d7e5fdc 100644
--- a/include/sound/soc.h
+++ b/include/sound/soc.h
@@ -196,8 +196,6 @@
         .info = snd_soc_info_enum_double, \
         .get = snd_soc_get_enum_double, .put = snd_soc_put_enum_double, \
         .private_value = (unsigned long)&xenum }
-#define SOC_VALUE_ENUM(xname, xenum) \
-        SOC_ENUM(xname, xenum)
 #define SOC_SINGLE_EXT(xname, xreg, xshift, xmax, xinvert,\
          xhandler_get, xhandler_put) \
 {       .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
@@ -266,6 +264,13 @@
                 {.base = xbase, .num_regs = xregs,            \
                  .mask = xmask }) }
 
+#define SND_SOC_BYTES_EXT(xname, xcount, xhandler_get, xhandler_put) \
+{       .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
+        .info = snd_soc_bytes_info_ext, \
+        .get = xhandler_get, .put = xhandler_put, \
+        .private_value = (unsigned long)&(struct soc_bytes_ext) \
+                {.max = xcount} }
+
 #define SOC_SINGLE_XR_SX(xname, xregbase, xregcount, xnbits, \
                 xmin, xmax, xinvert) \
 {       .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
@@ -377,6 +382,8 @@ int snd_soc_resume(struct device *dev);
 int snd_soc_poweroff(struct device *dev);
 int snd_soc_register_platform(struct device *dev,
                 const struct snd_soc_platform_driver *platform_drv);
+int devm_snd_soc_register_platform(struct device *dev,
+                const struct snd_soc_platform_driver *platform_drv);
 void snd_soc_unregister_platform(struct device *dev);
 int snd_soc_add_platform(struct device *dev, struct snd_soc_platform *platform,
                 const struct snd_soc_platform_driver *platform_drv);
@@ -393,14 +400,6 @@ int devm_snd_soc_register_component(struct device *dev,
                          const struct snd_soc_component_driver *cmpnt_drv,
                          struct snd_soc_dai_driver *dai_drv, int num_dai);
 void snd_soc_unregister_component(struct device *dev);
-int snd_soc_codec_volatile_register(struct snd_soc_codec *codec,
-                                    unsigned int reg);
-int snd_soc_codec_readable_register(struct snd_soc_codec *codec,
-                                    unsigned int reg);
-int snd_soc_codec_writable_register(struct snd_soc_codec *codec,
-                                    unsigned int reg);
-int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
-                               struct regmap *regmap);
 int snd_soc_cache_sync(struct snd_soc_codec *codec);
 int snd_soc_cache_init(struct snd_soc_codec *codec);
 int snd_soc_cache_exit(struct snd_soc_codec *codec);
@@ -453,6 +452,9 @@ int snd_soc_jack_get_type(struct snd_soc_jack *jack, int micbias_voltage);
 #ifdef CONFIG_GPIOLIB
 int snd_soc_jack_add_gpios(struct snd_soc_jack *jack, int count,
                         struct snd_soc_jack_gpio *gpios);
+int snd_soc_jack_add_gpiods(struct device *gpiod_dev,
+                            struct snd_soc_jack *jack,
+                            int count, struct snd_soc_jack_gpio *gpios);
 void snd_soc_jack_free_gpios(struct snd_soc_jack *jack, int count,
                         struct snd_soc_jack_gpio *gpios);
 #else
@@ -462,6 +464,14 @@ static inline int snd_soc_jack_add_gpios(struct snd_soc_jack *jack, int count,
         return 0;
 }
 
+static inline int snd_soc_jack_add_gpiods(struct device *gpiod_dev,
+                                          struct snd_soc_jack *jack,
+                                          int count,
+                                          struct snd_soc_jack_gpio *gpios)
+{
+        return 0;
+}
+
 static inline void snd_soc_jack_free_gpios(struct snd_soc_jack *jack, int count,
                                            struct snd_soc_jack_gpio *gpios)
 {
@@ -469,12 +479,12 @@ static inline void snd_soc_jack_free_gpios(struct snd_soc_jack *jack, int count,
 #endif
 
 /* codec register bit access */
-int snd_soc_update_bits(struct snd_soc_codec *codec, unsigned short reg,
+int snd_soc_update_bits(struct snd_soc_codec *codec, unsigned int reg,
                                 unsigned int mask, unsigned int value);
 int snd_soc_update_bits_locked(struct snd_soc_codec *codec,
-                               unsigned short reg, unsigned int mask,
+                               unsigned int reg, unsigned int mask,
                                unsigned int value);
-int snd_soc_test_bits(struct snd_soc_codec *codec, unsigned short reg,
+int snd_soc_test_bits(struct snd_soc_codec *codec, unsigned int reg,
                                 unsigned int mask, unsigned int value);
 
 int snd_soc_new_ac97_codec(struct snd_soc_codec *codec,
@@ -540,6 +550,8 @@ int snd_soc_bytes_get(struct snd_kcontrol *kcontrol,
                       struct snd_ctl_elem_value *ucontrol);
 int snd_soc_bytes_put(struct snd_kcontrol *kcontrol,
                       struct snd_ctl_elem_value *ucontrol);
+int snd_soc_bytes_info_ext(struct snd_kcontrol *kcontrol,
+        struct snd_ctl_elem_info *ucontrol);
 int snd_soc_info_xr_sx(struct snd_kcontrol *kcontrol,
         struct snd_ctl_elem_info *uinfo);
 int snd_soc_get_xr_sx(struct snd_kcontrol *kcontrol,
@@ -586,8 +598,12 @@ struct snd_soc_jack_zone {
 /**
  * struct snd_soc_jack_gpio - Describes a gpio pin for jack detection
  *
- * @gpio:         gpio number
- * @name:         gpio name
+ * @gpio:         legacy gpio number
+ * @idx:          gpio descriptor index within the function of the GPIO
+ *                consumer device
+ * @gpiod_dev     GPIO consumer device
+ * @name:         gpio name. Also as connection ID for the GPIO consumer
+ *                device function name lookup
  * @report:       value to report when jack detected
  * @invert:       report presence in low state
  * @debouce_time: debouce time in ms
@@ -598,6 +614,8 @@ struct snd_soc_jack_zone {
  */
 struct snd_soc_jack_gpio {
         unsigned int gpio;
+        unsigned int idx;
+        struct device *gpiod_dev;
         const char *name;
         int report;
         int invert;
@@ -606,6 +624,7 @@ struct snd_soc_jack_gpio {
 
         struct snd_soc_jack *jack;
         struct delayed_work work;
+        struct gpio_desc *desc;
 
         void *data;
         int (*jack_status_check)(void *data);
@@ -668,6 +687,7 @@ struct snd_soc_component {
         unsigned int active;
 
         unsigned int ignore_pmdown_time:1; /* pmdown_time is ignored at stop */
+        unsigned int registered_as_component:1;
 
         struct list_head list;
 
@@ -677,6 +697,14 @@ struct snd_soc_component {
         const struct snd_soc_component_driver *driver;
 
         struct list_head dai_list;
+
+        int (*read)(struct snd_soc_component *, unsigned int, unsigned int *);
+        int (*write)(struct snd_soc_component *, unsigned int, unsigned int);
+
+        struct regmap *regmap;
+        int val_bytes;
+
+        struct mutex io_mutex;
 };
 
 /* SoC Audio Codec device */
@@ -691,10 +719,6 @@ struct snd_soc_codec {
         struct snd_soc_card *card;
         struct list_head list;
         struct list_head card_list;
-        int num_dai;
-        int (*volatile_register)(struct snd_soc_codec *, unsigned int);
-        int (*readable_register)(struct snd_soc_codec *, unsigned int);
-        int (*writable_register)(struct snd_soc_codec *, unsigned int);
 
         /* runtime */
         struct snd_ac97 *ac97;  /* for ad-hoc ac97 devices */
@@ -704,18 +728,14 @@ struct snd_soc_codec {
         unsigned int ac97_registered:1; /* Codec has been AC97 registered */
         unsigned int ac97_created:1; /* Codec has been created by SoC */
         unsigned int cache_init:1; /* codec cache has been initialized */
-        unsigned int using_regmap:1; /* using regmap access */
         u32 cache_only;  /* Suppress writes to hardware */
         u32 cache_sync; /* Cache needs to be synced to hardware */
 
         /* codec IO */
         void *control_data; /* codec control (i2c/3wire) data */
         hw_write_t hw_write;
-        unsigned int (*read)(struct snd_soc_codec *, unsigned int);
-        int (*write)(struct snd_soc_codec *, unsigned int, unsigned int);
         void *reg_cache;
         struct mutex cache_rw_mutex;
-        int val_bytes;
 
         /* component */
         struct snd_soc_component component;
@@ -754,13 +774,9 @@ struct snd_soc_codec_driver {
                 unsigned int freq_in, unsigned int freq_out);
 
         /* codec IO */
+        struct regmap *(*get_regmap)(struct device *);
         unsigned int (*read)(struct snd_soc_codec *, unsigned int);
         int (*write)(struct snd_soc_codec *, unsigned int, unsigned int);
-        int (*display_register)(struct snd_soc_codec *, char *,
-                                size_t, unsigned int);
-        int (*volatile_register)(struct snd_soc_codec *, unsigned int);
-        int (*readable_register)(struct snd_soc_codec *, unsigned int);
-        int (*writable_register)(struct snd_soc_codec *, unsigned int);
         unsigned int reg_cache_size;
         short reg_cache_step;
         short reg_word_size;
@@ -791,6 +807,7 @@ struct snd_soc_platform_driver {
         int (*remove)(struct snd_soc_platform *);
         int (*suspend)(struct snd_soc_dai *dai);
         int (*resume)(struct snd_soc_dai *dai);
+        struct snd_soc_component_driver component_driver;
 
         /* pcm creation and destruction */
         int (*pcm_new)(struct snd_soc_pcm_runtime *);
@@ -835,7 +852,6 @@ struct snd_soc_platform {
         int id;
         struct device *dev;
         const struct snd_soc_platform_driver *driver;
-        struct mutex mutex;
 
         unsigned int suspended:1; /* platform is suspended */
         unsigned int probed:1;
@@ -844,6 +860,8 @@ struct snd_soc_platform {
         struct list_head list;
         struct list_head card_list;
 
+        struct snd_soc_component component;
+
         struct snd_soc_dapm_context dapm;
 
 #ifdef CONFIG_DEBUG_FS
@@ -931,7 +949,12 @@ struct snd_soc_dai_link {
 };
 
 struct snd_soc_codec_conf {
+        /*
+         * specify device either by device name, or by
+         * DT/OF node, but not both.
+         */
         const char *dev_name;
+        const struct device_node *of_node;
 
         /*
          * optional map of kcontrol, widget and path name prefixes that are
@@ -942,7 +965,13 @@ struct snd_soc_codec_conf {
 
 struct snd_soc_aux_dev {
         const char *name;               /* Codec name */
-        const char *codec_name;         /* for multi-codec */
+
+        /*
+         * specify multi-codec either by device name, or by
+         * DT/OF node, but not both.
+         */
+        const char *codec_name;
+        const struct device_node *codec_of_node;
 
         /* codec/machine specific init - e.g. add machine controls */
         int (*init)(struct snd_soc_dapm_context *dapm);
@@ -957,7 +986,6 @@ struct snd_soc_card {
         struct snd_card *snd_card;
         struct module *owner;
 
-        struct list_head list;
         struct mutex mutex;
         struct mutex dapm_mutex;
 
@@ -1020,7 +1048,6 @@ struct snd_soc_card {
         /* lists of probed devices belonging to this card */
         struct list_head codec_dev_list;
         struct list_head platform_dev_list;
-        struct list_head dai_dev_list;
 
         struct list_head widgets;
         struct list_head paths;
@@ -1090,6 +1117,10 @@ struct soc_bytes {
         u32 mask;
 };
 
+struct soc_bytes_ext {
+        int max;
+};
+
 /* multi register control */
 struct soc_mreg_control {
         long min, max;
@@ -1120,10 +1151,66 @@ static inline struct snd_soc_codec *snd_soc_component_to_codec(
         return container_of(component, struct snd_soc_codec, component);
 }
 
+/**
+ * snd_soc_component_to_platform() - Casts a component to the platform it is embedded in
+ * @component: The component to cast to a platform
+ *
+ * This function must only be used on components that are known to be platforms.
+ * Otherwise the behavior is undefined.
+ */
+static inline struct snd_soc_platform *snd_soc_component_to_platform(
+        struct snd_soc_component *component)
+{
+        return container_of(component, struct snd_soc_platform, component);
+}
+
+/**
+ * snd_soc_dapm_to_codec() - Casts a DAPM context to the CODEC it is embedded in
+ * @dapm: The DAPM context to cast to the CODEC
+ *
+ * This function must only be used on DAPM contexts that are known to be part of
+ * a CODEC (e.g. in a CODEC driver). Otherwise the behavior is undefined.
+ */
+static inline struct snd_soc_codec *snd_soc_dapm_to_codec(
+        struct snd_soc_dapm_context *dapm)
+{
+        return container_of(dapm, struct snd_soc_codec, dapm);
+}
+
+/**
+ * snd_soc_dapm_to_platform() - Casts a DAPM context to the platform it is
+ *  embedded in
+ * @dapm: The DAPM context to cast to the platform.
+ *
+ * This function must only be used on DAPM contexts that are known to be part of
+ * a platform (e.g. in a platform driver). Otherwise the behavior is undefined.
+ */
+static inline struct snd_soc_platform *snd_soc_dapm_to_platform(
+        struct snd_soc_dapm_context *dapm)
+{
+        return container_of(dapm, struct snd_soc_platform, dapm);
+}
+
 /* codec IO */
 unsigned int snd_soc_read(struct snd_soc_codec *codec, unsigned int reg);
-unsigned int snd_soc_write(struct snd_soc_codec *codec,
-                           unsigned int reg, unsigned int val);
+int snd_soc_write(struct snd_soc_codec *codec, unsigned int reg,
+        unsigned int val);
+
+/* component IO */
+int snd_soc_component_read(struct snd_soc_component *component,
+        unsigned int reg, unsigned int *val);
+int snd_soc_component_write(struct snd_soc_component *component,
+        unsigned int reg, unsigned int val);
+int snd_soc_component_update_bits(struct snd_soc_component *component,
+        unsigned int reg, unsigned int mask, unsigned int val);
+int snd_soc_component_update_bits_async(struct snd_soc_component *component,
+        unsigned int reg, unsigned int mask, unsigned int val);
+void snd_soc_component_async_complete(struct snd_soc_component *component);
+int snd_soc_component_test_bits(struct snd_soc_component *component,
+        unsigned int reg, unsigned int mask, unsigned int value);
+
+int snd_soc_component_init_io(struct snd_soc_component *component,
+        struct regmap *regmap);
 
 /* device driver data */
 
@@ -1173,7 +1260,6 @@ static inline void *snd_soc_pcm_get_drvdata(struct snd_soc_pcm_runtime *rtd)
 
 static inline void snd_soc_initialize_card_lists(struct snd_soc_card *card)
 {
-        INIT_LIST_HEAD(&card->dai_dev_list);
         INIT_LIST_HEAD(&card->codec_dev_list);
         INIT_LIST_HEAD(&card->platform_dev_list);
         INIT_LIST_HEAD(&card->widgets);
@@ -1228,6 +1314,50 @@ static inline bool snd_soc_codec_is_active(struct snd_soc_codec *codec)
         return snd_soc_component_is_active(&codec->component);
 }
 
+/**
+ * snd_soc_kcontrol_component() - Returns the component that registered the
+ *  control
+ * @kcontrol: The control for which to get the component
+ *
+ * Note: This function will work correctly if the control has been registered
+ * for a component. Either with snd_soc_add_codec_controls() or
+ * snd_soc_add_platform_controls() or via  table based setup for either a
+ * CODEC, a platform or component driver. Otherwise the behavior is undefined.
+ */
+static inline struct snd_soc_component *snd_soc_kcontrol_component(
+        struct snd_kcontrol *kcontrol)
+{
+        return snd_kcontrol_chip(kcontrol);
+}
+
+/**
+ * snd_soc_kcontrol_codec() - Returns the CODEC that registered the control
+ * @kcontrol: The control for which to get the CODEC
+ *
+ * Note: This function will only work correctly if the control has been
+ * registered with snd_soc_add_codec_controls() or via table based setup of
+ * snd_soc_codec_driver. Otherwise the behavior is undefined.
+ */
+static inline struct snd_soc_codec *snd_soc_kcontrol_codec(
+        struct snd_kcontrol *kcontrol)
+{
+        return snd_soc_component_to_codec(snd_soc_kcontrol_component(kcontrol));
+}
+
+/**
+ * snd_soc_kcontrol_platform() - Returns the platform that registerd the control
+ * @kcontrol: The control for which to get the platform
+ *
+ * Note: This function will only work correctly if the control has been
+ * registered with snd_soc_add_platform_controls() or via table based setup of
+ * a snd_soc_platform_driver. Otherwise the behavior is undefined.
+ */
+static inline struct snd_soc_platform *snd_soc_kcontrol_platform(
+        struct snd_kcontrol *kcontrol)
+{
+        return snd_soc_component_to_platform(snd_soc_kcontrol_component(kcontrol));
+}
+
 int snd_soc_util_init(void);
 void snd_soc_util_exit(void);
 
@@ -1241,7 +1371,9 @@ int snd_soc_of_parse_tdm_slot(struct device_node *np,
 int snd_soc_of_parse_audio_routing(struct snd_soc_card *card,
                                    const char *propname);
 unsigned int snd_soc_of_parse_daifmt(struct device_node *np,
-                                     const char *prefix);
+                                     const char *prefix,
+                                     struct device_node **bitclkmaster,
+                                     struct device_node **framemaster);
 int snd_soc_of_get_dai_name(struct device_node *of_node,
                             const char **dai_name);
 
diff --git a/include/sound/sta350.h b/include/sound/sta350.h
new file mode 100644
index 000000000000..42edceb096a0
--- /dev/null
+++ b/include/sound/sta350.h
@@ -0,0 +1,57 @@
+/*
+ * Platform data for ST STA350 ASoC codec driver.
+ *
+ * Copyright: 2014 Raumfeld GmbH
+ * Author: Sven Brandau <info@brandau.biz>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+#ifndef __LINUX_SND__STA350_H
+#define __LINUX_SND__STA350_H
+
+#define STA350_OCFG_2CH         0
+#define STA350_OCFG_2_1CH       1
+#define STA350_OCFG_1CH         3
+
+#define STA350_OM_CH1           0
+#define STA350_OM_CH2           1
+#define STA350_OM_CH3           2
+
+#define STA350_THERMAL_ADJUSTMENT_ENABLE        1
+#define STA350_THERMAL_RECOVERY_ENABLE          2
+#define STA350_FAULT_DETECT_RECOVERY_BYPASS     1
+
+#define STA350_FFX_PM_DROP_COMP                 0
+#define STA350_FFX_PM_TAPERED_COMP              1
+#define STA350_FFX_PM_FULL_POWER                2
+#define STA350_FFX_PM_VARIABLE_DROP_COMP        3
+
+
+struct sta350_platform_data {
+        u8 output_conf;
+        u8 ch1_output_mapping;
+        u8 ch2_output_mapping;
+        u8 ch3_output_mapping;
+        u8 ffx_power_output_mode;
+        u8 drop_compensation_ns;
+        u8 powerdown_delay_divider;
+        unsigned int thermal_warning_recovery:1;
+        unsigned int thermal_warning_adjustment:1;
+        unsigned int fault_detect_recovery:1;
+        unsigned int oc_warning_adjustment:1;
+        unsigned int max_power_use_mpcc:1;
+        unsigned int max_power_correction:1;
+        unsigned int am_reduction_mode:1;
+        unsigned int odd_pwm_speed_mode:1;
+        unsigned int distortion_compensation:1;
+        unsigned int invalid_input_detect_mute:1;
+        unsigned int activate_mute_output:1;
+        unsigned int bridge_immediate_off:1;
+        unsigned int noise_shape_dc_cut:1;
+        unsigned int powerdown_master_vol:1;
+};
+
+#endif /* __LINUX_SND__STA350_H */
diff --git a/include/trace/events/asoc.h b/include/trace/events/asoc.h
index 03996b2bb04f..c75c795a377b 100644
--- a/include/trace/events/asoc.h
+++ b/include/trace/events/asoc.h
@@ -11,102 +11,10 @@
 
 struct snd_soc_jack;
 struct snd_soc_codec;
-struct snd_soc_platform;
 struct snd_soc_card;
 struct snd_soc_dapm_widget;
 struct snd_soc_dapm_path;
 
-/*
- * Log register events
- */
-DECLARE_EVENT_CLASS(snd_soc_reg,
-
-        TP_PROTO(struct snd_soc_codec *codec, unsigned int reg,
-                 unsigned int val),
-
-        TP_ARGS(codec, reg, val),
-
-        TP_STRUCT__entry(
-                __string(       name,           codec->name     )
-                __field(        int,            id              )
-                __field(        unsigned int,   reg             )
-                __field(        unsigned int,   val             )
-        ),
-
-        TP_fast_assign(
-                __assign_str(name, codec->name);
-                __entry->id = codec->id;
-                __entry->reg = reg;
-                __entry->val = val;
-        ),
-
-        TP_printk("codec=%s.%d reg=%x val=%x", __get_str(name),
-                  (int)__entry->id, (unsigned int)__entry->reg,
-                  (unsigned int)__entry->val)
-);
-
-DEFINE_EVENT(snd_soc_reg, snd_soc_reg_write,
-
-        TP_PROTO(struct snd_soc_codec *codec, unsigned int reg,
-                 unsigned int val),
-
-        TP_ARGS(codec, reg, val)
-
-);
-
-DEFINE_EVENT(snd_soc_reg, snd_soc_reg_read,
-
-        TP_PROTO(struct snd_soc_codec *codec, unsigned int reg,
-                 unsigned int val),
-
-        TP_ARGS(codec, reg, val)
-
-);
-
-DECLARE_EVENT_CLASS(snd_soc_preg,
-
-        TP_PROTO(struct snd_soc_platform *platform, unsigned int reg,
-                 unsigned int val),
-
-        TP_ARGS(platform, reg, val),
-
-        TP_STRUCT__entry(
-                __string(       name,           platform->name  )
-                __field(        int,            id              )
-                __field(        unsigned int,   reg             )
-                __field(        unsigned int,   val             )
-        ),
-
-        TP_fast_assign(
-                __assign_str(name, platform->name);
-                __entry->id = platform->id;
-                __entry->reg = reg;
-                __entry->val = val;
-        ),
-
-        TP_printk("platform=%s.%d reg=%x val=%x", __get_str(name),
-                  (int)__entry->id, (unsigned int)__entry->reg,
-                  (unsigned int)__entry->val)
-);
-
-DEFINE_EVENT(snd_soc_preg, snd_soc_preg_write,
-
-        TP_PROTO(struct snd_soc_platform *platform, unsigned int reg,
-                 unsigned int val),
-
-        TP_ARGS(platform, reg, val)
-
-);
-
-DEFINE_EVENT(snd_soc_preg, snd_soc_preg_read,
-
-        TP_PROTO(struct snd_soc_platform *platform, unsigned int reg,
-                 unsigned int val),
-
-        TP_ARGS(platform, reg, val)
-
-);
-
 DECLARE_EVENT_CLASS(snd_soc_card,
 
         TP_PROTO(struct snd_soc_card *card, int val),
diff --git a/include/trace/events/compaction.h b/include/trace/events/compaction.h
index 06f544ef2f6f..c6814b917bdf 100644
--- a/include/trace/events/compaction.h
+++ b/include/trace/events/compaction.h
@@ -5,6 +5,7 @@
 #define _TRACE_COMPACTION_H
 
 #include <linux/types.h>
+#include <linux/list.h>
 #include <linux/tracepoint.h>
 #include <trace/events/gfpflags.h>
 
@@ -47,10 +48,11 @@ DEFINE_EVENT(mm_compaction_isolate_template, mm_compaction_isolate_freepages,
 
 TRACE_EVENT(mm_compaction_migratepages,
 
-        TP_PROTO(unsigned long nr_migrated,
-                unsigned long nr_failed),
+        TP_PROTO(unsigned long nr_all,
+                int migrate_rc,
+                struct list_head *migratepages),
 
-        TP_ARGS(nr_migrated, nr_failed),
+        TP_ARGS(nr_all, migrate_rc, migratepages),
 
         TP_STRUCT__entry(
                 __field(unsigned long, nr_migrated)
@@ -58,7 +60,22 @@ TRACE_EVENT(mm_compaction_migratepages,
         ),
 
         TP_fast_assign(
-                __entry->nr_migrated = nr_migrated;
+                unsigned long nr_failed = 0;
+                struct list_head *page_lru;
+
+                /*
+                 * migrate_pages() returns either a non-negative number
+                 * with the number of pages that failed migration, or an
+                 * error code, in which case we need to count the remaining
+                 * pages manually
+                 */
+                if (migrate_rc >= 0)
+                        nr_failed = migrate_rc;
+                else
+                        list_for_each(page_lru, migratepages)
+                                nr_failed++;
+
+                __entry->nr_migrated = nr_all - nr_failed;
                 __entry->nr_failed = nr_failed;
         ),
 
diff --git a/include/trace/events/filelock.h b/include/trace/events/filelock.h
new file mode 100644
index 000000000000..59d11c22f076
--- /dev/null
+++ b/include/trace/events/filelock.h
@@ -0,0 +1,96 @@
+/*
+ * Events for filesystem locks
+ *
+ * Copyright 2013 Jeff Layton <jlayton@poochiereds.net>
+ */
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM filelock
+
+#if !defined(_TRACE_FILELOCK_H) || defined(TRACE_HEADER_MULTI_READ)
+#define _TRACE_FILELOCK_H
+
+#include <linux/tracepoint.h>
+#include <linux/fs.h>
+#include <linux/device.h>
+#include <linux/kdev_t.h>
+
+#define show_fl_flags(val)                                              \
+        __print_flags(val, "|",                                         \
+                { FL_POSIX,             "FL_POSIX" },                   \
+                { FL_FLOCK,             "FL_FLOCK" },                   \
+                { FL_DELEG,             "FL_DELEG" },                   \
+                { FL_ACCESS,            "FL_ACCESS" },                  \
+                { FL_EXISTS,            "FL_EXISTS" },                  \
+                { FL_LEASE,             "FL_LEASE" },                   \
+                { FL_CLOSE,             "FL_CLOSE" },                   \
+                { FL_SLEEP,             "FL_SLEEP" },                   \
+                { FL_DOWNGRADE_PENDING, "FL_DOWNGRADE_PENDING" },       \
+                { FL_UNLOCK_PENDING,    "FL_UNLOCK_PENDING" },          \
+                { FL_OFDLCK,            "FL_OFDLCK" })
+
+#define show_fl_type(val)                               \
+        __print_symbolic(val,                           \
+                        { F_RDLCK, "F_RDLCK" },         \
+                        { F_WRLCK, "F_WRLCK" },         \
+                        { F_UNLCK, "F_UNLCK" })
+
+DECLARE_EVENT_CLASS(filelock_lease,
+
+        TP_PROTO(struct inode *inode, struct file_lock *fl),
+
+        TP_ARGS(inode, fl),
+
+        TP_STRUCT__entry(
+                __field(struct file_lock *, fl)
+                __field(unsigned long, i_ino)
+                __field(dev_t, s_dev)
+                __field(struct file_lock *, fl_next)
+                __field(fl_owner_t, fl_owner)
+                __field(unsigned int, fl_flags)
+                __field(unsigned char, fl_type)
+                __field(unsigned long, fl_break_time)
+                __field(unsigned long, fl_downgrade_time)
+        ),
+
+        TP_fast_assign(
+                __entry->fl = fl;
+                __entry->s_dev = inode->i_sb->s_dev;
+                __entry->i_ino = inode->i_ino;
+                __entry->fl_next = fl->fl_next;
+                __entry->fl_owner = fl->fl_owner;
+                __entry->fl_flags = fl->fl_flags;
+                __entry->fl_type = fl->fl_type;
+                __entry->fl_break_time = fl->fl_break_time;
+                __entry->fl_downgrade_time = fl->fl_downgrade_time;
+        ),
+
+        TP_printk("fl=0x%p dev=0x%x:0x%x ino=0x%lx fl_next=0x%p fl_owner=0x%p fl_flags=%s fl_type=%s fl_break_time=%lu fl_downgrade_time=%lu",
+                __entry->fl, MAJOR(__entry->s_dev), MINOR(__entry->s_dev),
+                __entry->i_ino, __entry->fl_next, __entry->fl_owner,
+                show_fl_flags(__entry->fl_flags),
+                show_fl_type(__entry->fl_type),
+                __entry->fl_break_time, __entry->fl_downgrade_time)
+);
+
+DEFINE_EVENT(filelock_lease, break_lease_noblock, TP_PROTO(struct inode *inode, struct file_lock *fl),
+                TP_ARGS(inode, fl));
+
+DEFINE_EVENT(filelock_lease, break_lease_block, TP_PROTO(struct inode *inode, struct file_lock *fl),
+                TP_ARGS(inode, fl));
+
+DEFINE_EVENT(filelock_lease, break_lease_unblock, TP_PROTO(struct inode *inode, struct file_lock *fl),
+                TP_ARGS(inode, fl));
+
+DEFINE_EVENT(filelock_lease, generic_add_lease, TP_PROTO(struct inode *inode, struct file_lock *fl),
+                TP_ARGS(inode, fl));
+
+DEFINE_EVENT(filelock_lease, generic_delete_lease, TP_PROTO(struct inode *inode, struct file_lock *fl),
+                TP_ARGS(inode, fl));
+
+DEFINE_EVENT(filelock_lease, time_out_leases, TP_PROTO(struct inode *inode, struct file_lock *fl),
+                TP_ARGS(inode, fl));
+
+#endif /* _TRACE_FILELOCK_H */
+
+/* This part must be outside protection */
+#include <trace/define_trace.h>
diff --git a/include/trace/events/gfpflags.h b/include/trace/events/gfpflags.h
index 1eddbf1557f2..d6fd8e5b14b7 100644
--- a/include/trace/events/gfpflags.h
+++ b/include/trace/events/gfpflags.h
@@ -34,7 +34,6 @@
         {(unsigned long)__GFP_HARDWALL,         "GFP_HARDWALL"},        \
         {(unsigned long)__GFP_THISNODE,         "GFP_THISNODE"},        \
         {(unsigned long)__GFP_RECLAIMABLE,      "GFP_RECLAIMABLE"},     \
-        {(unsigned long)__GFP_KMEMCG,           "GFP_KMEMCG"},          \
         {(unsigned long)__GFP_MOVABLE,          "GFP_MOVABLE"},         \
         {(unsigned long)__GFP_NOTRACK,          "GFP_NOTRACK"},         \
         {(unsigned long)__GFP_NO_KSWAPD,        "GFP_NO_KSWAPD"},       \
diff --git a/include/trace/events/vmscan.h b/include/trace/events/vmscan.h
index 132a985aba8b..69590b6ffc09 100644
--- a/include/trace/events/vmscan.h
+++ b/include/trace/events/vmscan.h
@@ -191,6 +191,7 @@ TRACE_EVENT(mm_shrink_slab_start,
         TP_STRUCT__entry(
                 __field(struct shrinker *, shr)
                 __field(void *, shrink)
+                __field(int, nid)
                 __field(long, nr_objects_to_shrink)
                 __field(gfp_t, gfp_flags)
                 __field(unsigned long, pgs_scanned)
@@ -203,6 +204,7 @@ TRACE_EVENT(mm_shrink_slab_start,
         TP_fast_assign(
                 __entry->shr = shr;
                 __entry->shrink = shr->scan_objects;
+                __entry->nid = sc->nid;
                 __entry->nr_objects_to_shrink = nr_objects_to_shrink;
                 __entry->gfp_flags = sc->gfp_mask;
                 __entry->pgs_scanned = pgs_scanned;
@@ -212,9 +214,10 @@ TRACE_EVENT(mm_shrink_slab_start,
                 __entry->total_scan = total_scan;
         ),
 
-        TP_printk("%pF %p: objects to shrink %ld gfp_flags %s pgs_scanned %ld lru_pgs %ld cache items %ld delta %lld total_scan %ld",
+        TP_printk("%pF %p: nid: %d objects to shrink %ld gfp_flags %s pgs_scanned %ld lru_pgs %ld cache items %ld delta %lld total_scan %ld",
                 __entry->shrink,
                 __entry->shr,
+                __entry->nid,
                 __entry->nr_objects_to_shrink,
                 show_gfp_flags(__entry->gfp_flags),
                 __entry->pgs_scanned,
@@ -225,13 +228,15 @@ TRACE_EVENT(mm_shrink_slab_start,
 );
 
 TRACE_EVENT(mm_shrink_slab_end,
-        TP_PROTO(struct shrinker *shr, int shrinker_retval,
-                long unused_scan_cnt, long new_scan_cnt),
+        TP_PROTO(struct shrinker *shr, int nid, int shrinker_retval,
+                long unused_scan_cnt, long new_scan_cnt, long total_scan),
 
-        TP_ARGS(shr, shrinker_retval, unused_scan_cnt, new_scan_cnt),
+        TP_ARGS(shr, nid, shrinker_retval, unused_scan_cnt, new_scan_cnt,
+                total_scan),
 
         TP_STRUCT__entry(
                 __field(struct shrinker *, shr)
+                __field(int, nid)
                 __field(void *, shrink)
                 __field(long, unused_scan)
                 __field(long, new_scan)
@@ -241,16 +246,18 @@ TRACE_EVENT(mm_shrink_slab_end,
 
         TP_fast_assign(
                 __entry->shr = shr;
+                __entry->nid = nid;
                 __entry->shrink = shr->scan_objects;
                 __entry->unused_scan = unused_scan_cnt;
                 __entry->new_scan = new_scan_cnt;
                 __entry->retval = shrinker_retval;
-                __entry->total_scan = new_scan_cnt - unused_scan_cnt;
+                __entry->total_scan = total_scan;
         ),
 
-        TP_printk("%pF %p: unused scan count %ld new scan count %ld total_scan %ld last shrinker return val %d",
+        TP_printk("%pF %p: nid: %d unused scan count %ld new scan count %ld total_scan %ld last shrinker return val %d",
                 __entry->shrink,
                 __entry->shr,
+                __entry->nid,
                 __entry->unused_scan,
                 __entry->new_scan,
                 __entry->total_scan,
diff --git a/include/uapi/linux/Kbuild b/include/uapi/linux/Kbuild
index 6929571b79b0..24e9033f8b3f 100644
--- a/include/uapi/linux/Kbuild
+++ b/include/uapi/linux/Kbuild
@@ -317,6 +317,7 @@ header-y += ppp-ioctl.h
 header-y += ppp_defs.h
 header-y += pps.h
 header-y += prctl.h
+header-y += psci.h
 header-y += ptp_clock.h
 header-y += ptrace.h
 header-y += qnx4_fs.h
diff --git a/include/uapi/linux/gfs2_ondisk.h b/include/uapi/linux/gfs2_ondisk.h
index db3fdd083882..1a763eaae0bb 100644
--- a/include/uapi/linux/gfs2_ondisk.h
+++ b/include/uapi/linux/gfs2_ondisk.h
@@ -20,7 +20,7 @@
 
 #define GFS2_MOUNT_LOCK         0
 #define GFS2_LIVE_LOCK          1
-#define GFS2_TRANS_LOCK         2
+#define GFS2_FREEZE_LOCK        2
 #define GFS2_RENAME_LOCK        3
 #define GFS2_CONTROL_LOCK       4
 #define GFS2_MOUNTED_LOCK       5
diff --git a/include/uapi/linux/input.h b/include/uapi/linux/input.h
index f4849525519c..19df18c9b8be 100644
--- a/include/uapi/linux/input.h
+++ b/include/uapi/linux/input.h
@@ -462,7 +462,10 @@ struct input_keymap_entry {
 #define KEY_VIDEO_NEXT          241     /* drive next video source */
 #define KEY_VIDEO_PREV          242     /* drive previous video source */
 #define KEY_BRIGHTNESS_CYCLE    243     /* brightness up, after max is min */
-#define KEY_BRIGHTNESS_ZERO     244     /* brightness off, use ambient */
+#define KEY_BRIGHTNESS_AUTO     244     /* Set Auto Brightness: manual
+                                          brightness control is off,
+                                          rely on ambient */
+#define KEY_BRIGHTNESS_ZERO     KEY_BRIGHTNESS_AUTO
 #define KEY_DISPLAY_OFF         245     /* display device to off state */
 
 #define KEY_WWAN                246     /* Wireless WAN (LTE, UMTS, GSM, etc.) */
@@ -632,6 +635,7 @@ struct input_keymap_entry {
 #define KEY_ADDRESSBOOK         0x1ad   /* AL Contacts/Address Book */
 #define KEY_MESSENGER           0x1ae   /* AL Instant Messaging */
 #define KEY_DISPLAYTOGGLE       0x1af   /* Turn display (LCD) on and off */
+#define KEY_BRIGHTNESS_TOGGLE   KEY_DISPLAYTOGGLE
 #define KEY_SPELLCHECK          0x1b0   /* AL Spell Check */
 #define KEY_LOGOFF              0x1b1   /* AL Logoff */
 
@@ -723,6 +727,17 @@ struct input_keymap_entry {
 
 #define KEY_ALS_TOGGLE          0x230   /* Ambient light sensor */
 
+#define KEY_BUTTONCONFIG                0x240   /* AL Button Configuration */
+#define KEY_TASKMANAGER         0x241   /* AL Task/Project Manager */
+#define KEY_JOURNAL             0x242   /* AL Log/Journal/Timecard */
+#define KEY_CONTROLPANEL                0x243   /* AL Control Panel */
+#define KEY_APPSELECT           0x244   /* AL Select Task/Application */
+#define KEY_SCREENSAVER         0x245   /* AL Screen Saver */
+#define KEY_VOICECOMMAND                0x246   /* Listening Voice Command */
+
+#define KEY_BRIGHTNESS_MIN              0x250   /* Set Brightness to Minimum */
+#define KEY_BRIGHTNESS_MAX              0x251   /* Set Brightness to Maximum */
+
 #define BTN_TRIGGER_HAPPY               0x2c0
 #define BTN_TRIGGER_HAPPY1              0x2c0
 #define BTN_TRIGGER_HAPPY2              0x2c1
diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h
index a8f4ee5d2e82..e11d8f170a62 100644
--- a/include/uapi/linux/kvm.h
+++ b/include/uapi/linux/kvm.h
@@ -171,6 +171,7 @@ struct kvm_pit_config {
 #define KVM_EXIT_WATCHDOG         21
 #define KVM_EXIT_S390_TSCH        22
 #define KVM_EXIT_EPR              23
+#define KVM_EXIT_SYSTEM_EVENT     24
 
 /* For KVM_EXIT_INTERNAL_ERROR */
 /* Emulate instruction failed. */
@@ -301,6 +302,13 @@ struct kvm_run {
                 struct {
                         __u32 epr;
                 } epr;
+                /* KVM_EXIT_SYSTEM_EVENT */
+                struct {
+#define KVM_SYSTEM_EVENT_SHUTDOWN       1
+#define KVM_SYSTEM_EVENT_RESET          2
+                        __u32 type;
+                        __u64 flags;
+                } system_event;
                 /* Fix the size of the union. */
                 char padding[256];
         };
@@ -416,6 +424,8 @@ struct kvm_s390_psw {
 #define KVM_S390_INT_PFAULT_INIT        0xfffe0004u
 #define KVM_S390_INT_PFAULT_DONE        0xfffe0005u
 #define KVM_S390_MCHK                   0xfffe1000u
+#define KVM_S390_INT_CLOCK_COMP         0xffff1004u
+#define KVM_S390_INT_CPU_TIMER          0xffff1005u
 #define KVM_S390_INT_VIRTIO             0xffff2603u
 #define KVM_S390_INT_SERVICE            0xffff2401u
 #define KVM_S390_INT_EMERGENCY          0xffff1201u
@@ -515,6 +525,7 @@ enum {
         kvm_ioeventfd_flag_nr_pio,
         kvm_ioeventfd_flag_nr_deassign,
         kvm_ioeventfd_flag_nr_virtio_ccw_notify,
+        kvm_ioeventfd_flag_nr_fast_mmio,
         kvm_ioeventfd_flag_nr_max,
 };
 
@@ -529,7 +540,7 @@ enum {
 struct kvm_ioeventfd {
         __u64 datamatch;
         __u64 addr;        /* legal pio/mmio address */
-        __u32 len;         /* 1, 2, 4, or 8 bytes    */
+        __u32 len;         /* 1, 2, 4, or 8 bytes; or 0 to ignore length */
         __s32 fd;
         __u32 flags;
         __u8  pad[36];
@@ -743,6 +754,10 @@ struct kvm_ppc_smmu_info {
 #define KVM_CAP_IOAPIC_POLARITY_IGNORED 97
 #define KVM_CAP_ENABLE_CAP_VM 98
 #define KVM_CAP_S390_IRQCHIP 99
+#define KVM_CAP_IOEVENTFD_NO_LENGTH 100
+#define KVM_CAP_VM_ATTRIBUTES 101
+#define KVM_CAP_ARM_PSCI_0_2 102
+#define KVM_CAP_PPC_FIXUP_HCALL 103
 
 #ifdef KVM_CAP_IRQ_ROUTING
 
diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h
index 853bc1ccb395..e3fc8f09d110 100644
--- a/include/uapi/linux/perf_event.h
+++ b/include/uapi/linux/perf_event.h
@@ -722,10 +722,10 @@ enum perf_callchain_context {
         PERF_CONTEXT_MAX                = (__u64)-4095,
 };
 
-#define PERF_FLAG_FD_NO_GROUP           (1U << 0)
-#define PERF_FLAG_FD_OUTPUT             (1U << 1)
-#define PERF_FLAG_PID_CGROUP            (1U << 2) /* pid=cgroup id, per-cpu mode only */
-#define PERF_FLAG_FD_CLOEXEC            (1U << 3) /* O_CLOEXEC */
+#define PERF_FLAG_FD_NO_GROUP           (1UL << 0)
+#define PERF_FLAG_FD_OUTPUT             (1UL << 1)
+#define PERF_FLAG_PID_CGROUP            (1UL << 2) /* pid=cgroup id, per-cpu mode only */
+#define PERF_FLAG_FD_CLOEXEC            (1UL << 3) /* O_CLOEXEC */
 
 union perf_mem_data_src {
         __u64 val;
diff --git a/include/uapi/linux/psci.h b/include/uapi/linux/psci.h
new file mode 100644
index 000000000000..310d83e0a91b
--- /dev/null
+++ b/include/uapi/linux/psci.h
@@ -0,0 +1,90 @@
+/*
+ * ARM Power State and Coordination Interface (PSCI) header
+ *
+ * This header holds common PSCI defines and macros shared
+ * by: ARM kernel, ARM64 kernel, KVM ARM/ARM64 and user space.
+ *
+ * Copyright (C) 2014 Linaro Ltd.
+ * Author: Anup Patel <anup.patel@linaro.org>
+ */
+
+#ifndef _UAPI_LINUX_PSCI_H
+#define _UAPI_LINUX_PSCI_H
+
+/*
+ * PSCI v0.1 interface
+ *
+ * The PSCI v0.1 function numbers are implementation defined.
+ *
+ * Only PSCI return values such as: SUCCESS, NOT_SUPPORTED,
+ * INVALID_PARAMS, and DENIED defined below are applicable
+ * to PSCI v0.1.
+ */
+
+/* PSCI v0.2 interface */
+#define PSCI_0_2_FN_BASE                        0x84000000
+#define PSCI_0_2_FN(n)                          (PSCI_0_2_FN_BASE + (n))
+#define PSCI_0_2_64BIT                          0x40000000
+#define PSCI_0_2_FN64_BASE                      \
+                                        (PSCI_0_2_FN_BASE + PSCI_0_2_64BIT)
+#define PSCI_0_2_FN64(n)                        (PSCI_0_2_FN64_BASE + (n))
+
+#define PSCI_0_2_FN_PSCI_VERSION                PSCI_0_2_FN(0)
+#define PSCI_0_2_FN_CPU_SUSPEND                 PSCI_0_2_FN(1)
+#define PSCI_0_2_FN_CPU_OFF                     PSCI_0_2_FN(2)
+#define PSCI_0_2_FN_CPU_ON                      PSCI_0_2_FN(3)
+#define PSCI_0_2_FN_AFFINITY_INFO               PSCI_0_2_FN(4)
+#define PSCI_0_2_FN_MIGRATE                     PSCI_0_2_FN(5)
+#define PSCI_0_2_FN_MIGRATE_INFO_TYPE           PSCI_0_2_FN(6)
+#define PSCI_0_2_FN_MIGRATE_INFO_UP_CPU         PSCI_0_2_FN(7)
+#define PSCI_0_2_FN_SYSTEM_OFF                  PSCI_0_2_FN(8)
+#define PSCI_0_2_FN_SYSTEM_RESET                PSCI_0_2_FN(9)
+
+#define PSCI_0_2_FN64_CPU_SUSPEND               PSCI_0_2_FN64(1)
+#define PSCI_0_2_FN64_CPU_ON                    PSCI_0_2_FN64(3)
+#define PSCI_0_2_FN64_AFFINITY_INFO             PSCI_0_2_FN64(4)
+#define PSCI_0_2_FN64_MIGRATE                   PSCI_0_2_FN64(5)
+#define PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU       PSCI_0_2_FN64(7)
+
+/* PSCI v0.2 power state encoding for CPU_SUSPEND function */
+#define PSCI_0_2_POWER_STATE_ID_MASK            0xffff
+#define PSCI_0_2_POWER_STATE_ID_SHIFT           0
+#define PSCI_0_2_POWER_STATE_TYPE_SHIFT         16
+#define PSCI_0_2_POWER_STATE_TYPE_MASK          \
+                                (0x1 << PSCI_0_2_POWER_STATE_TYPE_SHIFT)
+#define PSCI_0_2_POWER_STATE_AFFL_SHIFT         24
+#define PSCI_0_2_POWER_STATE_AFFL_MASK          \
+                                (0x3 << PSCI_0_2_POWER_STATE_AFFL_SHIFT)
+
+/* PSCI v0.2 affinity level state returned by AFFINITY_INFO */
+#define PSCI_0_2_AFFINITY_LEVEL_ON              0
+#define PSCI_0_2_AFFINITY_LEVEL_OFF             1
+#define PSCI_0_2_AFFINITY_LEVEL_ON_PENDING      2
+
+/* PSCI v0.2 multicore support in Trusted OS returned by MIGRATE_INFO_TYPE */
+#define PSCI_0_2_TOS_UP_MIGRATE                 0
+#define PSCI_0_2_TOS_UP_NO_MIGRATE              1
+#define PSCI_0_2_TOS_MP                         2
+
+/* PSCI version decoding (independent of PSCI version) */
+#define PSCI_VERSION_MAJOR_SHIFT                16
+#define PSCI_VERSION_MINOR_MASK                 \
+                ((1U << PSCI_VERSION_MAJOR_SHIFT) - 1)
+#define PSCI_VERSION_MAJOR_MASK                 ~PSCI_VERSION_MINOR_MASK
+#define PSCI_VERSION_MAJOR(ver)                 \
+                (((ver) & PSCI_VERSION_MAJOR_MASK) >> PSCI_VERSION_MAJOR_SHIFT)
+#define PSCI_VERSION_MINOR(ver)                 \
+                ((ver) & PSCI_VERSION_MINOR_MASK)
+
+/* PSCI return values (inclusive of all PSCI versions) */
+#define PSCI_RET_SUCCESS                        0
+#define PSCI_RET_NOT_SUPPORTED                  -1
+#define PSCI_RET_INVALID_PARAMS                 -2
+#define PSCI_RET_DENIED                         -3
+#define PSCI_RET_ALREADY_ON                     -4
+#define PSCI_RET_ON_PENDING                     -5
+#define PSCI_RET_INTERNAL_FAILURE               -6
+#define PSCI_RET_NOT_PRESENT                    -7
+#define PSCI_RET_DISABLED                       -8
+
+#endif /* _UAPI_LINUX_PSCI_H */
diff --git a/include/uapi/linux/serial_core.h b/include/uapi/linux/serial_core.h
index b47dba2c1e6f..5820269aa132 100644
--- a/include/uapi/linux/serial_core.h
+++ b/include/uapi/linux/serial_core.h
@@ -211,7 +211,7 @@
 /* VIA VT8500 SoC */
 #define PORT_VT8500     97
 
-/* Xilinx PSS UART */
+/* Cadence (Xilinx Zynq) UART */
 #define PORT_XUARTPS    98
 
 /* Atheros AR933X SoC */
@@ -238,4 +238,10 @@
 /* Tilera TILE-Gx UART */
 #define PORT_TILEGX     106
 
+/* MEN 16z135 UART */
+#define PORT_MEN_Z135   107
+
+/* SC16IS74xx */
+#define PORT_SC16IS7XX   108
+
 #endif /* _UAPILINUX_SERIAL_CORE_H */
diff --git a/include/uapi/linux/serial_reg.h b/include/uapi/linux/serial_reg.h
index e6322605b138..99b47058816a 100644
--- a/include/uapi/linux/serial_reg.h
+++ b/include/uapi/linux/serial_reg.h
@@ -32,7 +32,7 @@
 
 #define UART_IIR        2       /* In:  Interrupt ID Register */
 #define UART_IIR_NO_INT         0x01 /* No interrupts pending */
-#define UART_IIR_ID             0x06 /* Mask for the interrupt ID */
+#define UART_IIR_ID             0x0e /* Mask for the interrupt ID */
 #define UART_IIR_MSI            0x00 /* Modem status interrupt */
 #define UART_IIR_THRI           0x02 /* Transmitter holding register empty */
 #define UART_IIR_RDI            0x04 /* Receiver data interrupt */
diff --git a/include/uapi/linux/shm.h b/include/uapi/linux/shm.h
index 78b69413f582..1fbf24ea37fd 100644
--- a/include/uapi/linux/shm.h
+++ b/include/uapi/linux/shm.h
@@ -8,19 +8,20 @@
 #endif
 
 /*
- * SHMMAX, SHMMNI and SHMALL are upper limits are defaults which can
- * be increased by sysctl
+ * SHMMNI, SHMMAX and SHMALL are default upper limits which can be
+ * modified by sysctl. The SHMMAX and SHMALL values have been chosen to
+ * be as large possible without facilitating scenarios where userspace
+ * causes overflows when adjusting the limits via operations of the form
+ * "retrieve current limit; add X; update limit". It is therefore not
+ * advised to make SHMMAX and SHMALL any larger. These limits are
+ * suitable for both 32 and 64-bit systems.
  */
-
-#define SHMMAX 0x2000000                 /* max shared seg size (bytes) */
 #define SHMMIN 1                         /* min shared seg size (bytes) */
 #define SHMMNI 4096                      /* max num of segs system wide */
-#ifndef __KERNEL__
-#define SHMALL (SHMMAX/getpagesize()*(SHMMNI/16))
-#endif
+#define SHMMAX (ULONG_MAX - (1UL << 24)) /* max shared seg size (bytes) */
+#define SHMALL (ULONG_MAX - (1UL << 24)) /* max shm system wide (pages) */
 #define SHMSEG SHMMNI                    /* max shared segs per process */
 
-
 /* Obsolete, used only for backwards compatibility and libc5 compiles */
 struct shmid_ds {
         struct ipc_perm         shm_perm;       /* operation perms */
diff --git a/include/uapi/linux/v4l2-common.h b/include/uapi/linux/v4l2-common.h
index 9bf508ad0957..2f6f8cafe773 100644
--- a/include/uapi/linux/v4l2-common.h
+++ b/include/uapi/linux/v4l2-common.h
@@ -75,7 +75,7 @@ struct v4l2_edid {
         __u32 start_block;
         __u32 blocks;
         __u32 reserved[5];
-        __u8 __user *edid;
+        __u8  *edid;
 };
 
 #endif /* __V4L2_COMMON__ */
diff --git a/include/uapi/linux/v4l2-dv-timings.h b/include/uapi/linux/v4l2-dv-timings.h
index b6a5fe00a470..6c8f159e416e 100644
--- a/include/uapi/linux/v4l2-dv-timings.h
+++ b/include/uapi/linux/v4l2-dv-timings.h
@@ -173,6 +173,76 @@
                 V4L2_DV_FL_CAN_REDUCE_FPS) \
 }
 
+#define V4L2_DV_BT_CEA_3840X2160P24 { \
+        .type = V4L2_DV_BT_656_1120, \
+        V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+                297000000, 1276, 88, 296, 8, 10, 72, 0, 0, 0, \
+                V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_CAN_REDUCE_FPS) \
+}
+
+#define V4L2_DV_BT_CEA_3840X2160P25 { \
+        .type = V4L2_DV_BT_656_1120, \
+        V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+                297000000, 1056, 88, 296, 8, 10, 72, 0, 0, 0, \
+                V4L2_DV_BT_STD_CEA861, 0) \
+}
+
+#define V4L2_DV_BT_CEA_3840X2160P30 { \
+        .type = V4L2_DV_BT_656_1120, \
+        V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+                297000000, 176, 88, 296, 8, 10, 72, 0, 0, 0, \
+                V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_CAN_REDUCE_FPS) \
+}
+
+#define V4L2_DV_BT_CEA_3840X2160P50 { \
+        .type = V4L2_DV_BT_656_1120, \
+        V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+                594000000, 1056, 88, 296, 8, 10, 72, 0, 0, 0, \
+                V4L2_DV_BT_STD_CEA861, 0) \
+}
+
+#define V4L2_DV_BT_CEA_3840X2160P60 { \
+        .type = V4L2_DV_BT_656_1120, \
+        V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+                594000000, 176, 88, 296, 8, 10, 72, 0, 0, 0, \
+                V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_CAN_REDUCE_FPS) \
+}
+
+#define V4L2_DV_BT_CEA_4096X2160P24 { \
+        .type = V4L2_DV_BT_656_1120, \
+        V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+                297000000, 1020, 88, 296, 8, 10, 72, 0, 0, 0, \
+                V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_CAN_REDUCE_FPS) \
+}
+
+#define V4L2_DV_BT_CEA_4096X2160P25 { \
+        .type = V4L2_DV_BT_656_1120, \
+        V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+                297000000, 968, 88, 128, 8, 10, 72, 0, 0, 0, \
+                V4L2_DV_BT_STD_CEA861, 0) \
+}
+
+#define V4L2_DV_BT_CEA_4096X2160P30 { \
+        .type = V4L2_DV_BT_656_1120, \
+        V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+                297000000, 88, 88, 128, 8, 10, 72, 0, 0, 0, \
+                V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_CAN_REDUCE_FPS) \
+}
+
+#define V4L2_DV_BT_CEA_4096X2160P50 { \
+        .type = V4L2_DV_BT_656_1120, \
+        V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+                594000000, 968, 88, 128, 8, 10, 72, 0, 0, 0, \
+                V4L2_DV_BT_STD_CEA861, 0) \
+}
+
+#define V4L2_DV_BT_CEA_4096X2160P60 { \
+        .type = V4L2_DV_BT_656_1120, \
+        V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+                594000000, 88, 88, 128, 8, 10, 72, 0, 0, 0, \
+                V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_CAN_REDUCE_FPS) \
+}
+
 
 /* VESA Discrete Monitor Timings as per version 1.0, revision 12 */
 
diff --git a/include/uapi/linux/v4l2-mediabus.h b/include/uapi/linux/v4l2-mediabus.h
index b5c3aab6e82c..1445e858854f 100644
--- a/include/uapi/linux/v4l2-mediabus.h
+++ b/include/uapi/linux/v4l2-mediabus.h
@@ -52,7 +52,7 @@ enum v4l2_mbus_pixelcode {
         V4L2_MBUS_FMT_RGB888_2X12_LE = 0x100c,
         V4L2_MBUS_FMT_ARGB8888_1X32 = 0x100d,
 
-        /* YUV (including grey) - next is 0x2018 */
+        /* YUV (including grey) - next is 0x2024 */
         V4L2_MBUS_FMT_Y8_1X8 = 0x2001,
         V4L2_MBUS_FMT_UV8_1X8 = 0x2015,
         V4L2_MBUS_FMT_UYVY8_1_5X8 = 0x2002,
@@ -64,6 +64,8 @@ enum v4l2_mbus_pixelcode {
         V4L2_MBUS_FMT_YUYV8_2X8 = 0x2008,
         V4L2_MBUS_FMT_YVYU8_2X8 = 0x2009,
         V4L2_MBUS_FMT_Y10_1X10 = 0x200a,
+        V4L2_MBUS_FMT_UYVY10_2X10 = 0x2018,
+        V4L2_MBUS_FMT_VYUY10_2X10 = 0x2019,
         V4L2_MBUS_FMT_YUYV10_2X10 = 0x200b,
         V4L2_MBUS_FMT_YVYU10_2X10 = 0x200c,
         V4L2_MBUS_FMT_Y12_1X12 = 0x2013,
@@ -72,10 +74,20 @@ enum v4l2_mbus_pixelcode {
         V4L2_MBUS_FMT_YUYV8_1X16 = 0x2011,
         V4L2_MBUS_FMT_YVYU8_1X16 = 0x2012,
         V4L2_MBUS_FMT_YDYUYDYV8_1X16 = 0x2014,
+        V4L2_MBUS_FMT_UYVY10_1X20 = 0x201a,
+        V4L2_MBUS_FMT_VYUY10_1X20 = 0x201b,
         V4L2_MBUS_FMT_YUYV10_1X20 = 0x200d,
         V4L2_MBUS_FMT_YVYU10_1X20 = 0x200e,
         V4L2_MBUS_FMT_YUV10_1X30 = 0x2016,
         V4L2_MBUS_FMT_AYUV8_1X32 = 0x2017,
+        V4L2_MBUS_FMT_UYVY12_2X12 = 0x201c,
+        V4L2_MBUS_FMT_VYUY12_2X12 = 0x201d,
+        V4L2_MBUS_FMT_YUYV12_2X12 = 0x201e,
+        V4L2_MBUS_FMT_YVYU12_2X12 = 0x201f,
+        V4L2_MBUS_FMT_UYVY12_1X24 = 0x2020,
+        V4L2_MBUS_FMT_VYUY12_1X24 = 0x2021,
+        V4L2_MBUS_FMT_YUYV12_1X24 = 0x2022,
+        V4L2_MBUS_FMT_YVYU12_1X24 = 0x2023,
 
         /* Bayer - next is 0x3019 */
         V4L2_MBUS_FMT_SBGGR8_1X8 = 0x3001,
diff --git a/include/uapi/linux/v4l2-subdev.h b/include/uapi/linux/v4l2-subdev.h
index 87e05159f637..a619cdd300ac 100644
--- a/include/uapi/linux/v4l2-subdev.h
+++ b/include/uapi/linux/v4l2-subdev.h
@@ -151,26 +151,24 @@ struct v4l2_subdev_selection {
 /* Backwards compatibility define --- to be removed */
 #define v4l2_subdev_edid v4l2_edid
 
-#define VIDIOC_SUBDEV_G_FMT     _IOWR('V',  4, struct v4l2_subdev_format)
-#define VIDIOC_SUBDEV_S_FMT     _IOWR('V',  5, struct v4l2_subdev_format)
-#define VIDIOC_SUBDEV_G_FRAME_INTERVAL \
-                        _IOWR('V', 21, struct v4l2_subdev_frame_interval)
-#define VIDIOC_SUBDEV_S_FRAME_INTERVAL \
-                        _IOWR('V', 22, struct v4l2_subdev_frame_interval)
-#define VIDIOC_SUBDEV_ENUM_MBUS_CODE \
-                        _IOWR('V',  2, struct v4l2_subdev_mbus_code_enum)
-#define VIDIOC_SUBDEV_ENUM_FRAME_SIZE \
-                        _IOWR('V', 74, struct v4l2_subdev_frame_size_enum)
-#define VIDIOC_SUBDEV_ENUM_FRAME_INTERVAL \
-                        _IOWR('V', 75, struct v4l2_subdev_frame_interval_enum)
-#define VIDIOC_SUBDEV_G_CROP    _IOWR('V', 59, struct v4l2_subdev_crop)
-#define VIDIOC_SUBDEV_S_CROP    _IOWR('V', 60, struct v4l2_subdev_crop)
-#define VIDIOC_SUBDEV_G_SELECTION \
-        _IOWR('V', 61, struct v4l2_subdev_selection)
-#define VIDIOC_SUBDEV_S_SELECTION \
-        _IOWR('V', 62, struct v4l2_subdev_selection)
-/* These two G/S_EDID ioctls are identical to the ioctls in videodev2.h */
-#define VIDIOC_SUBDEV_G_EDID    _IOWR('V', 40, struct v4l2_edid)
-#define VIDIOC_SUBDEV_S_EDID    _IOWR('V', 41, struct v4l2_edid)
+#define VIDIOC_SUBDEV_G_FMT                     _IOWR('V',  4, struct v4l2_subdev_format)
+#define VIDIOC_SUBDEV_S_FMT                     _IOWR('V',  5, struct v4l2_subdev_format)
+#define VIDIOC_SUBDEV_G_FRAME_INTERVAL          _IOWR('V', 21, struct v4l2_subdev_frame_interval)
+#define VIDIOC_SUBDEV_S_FRAME_INTERVAL          _IOWR('V', 22, struct v4l2_subdev_frame_interval)
+#define VIDIOC_SUBDEV_ENUM_MBUS_CODE            _IOWR('V',  2, struct v4l2_subdev_mbus_code_enum)
+#define VIDIOC_SUBDEV_ENUM_FRAME_SIZE           _IOWR('V', 74, struct v4l2_subdev_frame_size_enum)
+#define VIDIOC_SUBDEV_ENUM_FRAME_INTERVAL       _IOWR('V', 75, struct v4l2_subdev_frame_interval_enum)
+#define VIDIOC_SUBDEV_G_CROP                    _IOWR('V', 59, struct v4l2_subdev_crop)
+#define VIDIOC_SUBDEV_S_CROP                    _IOWR('V', 60, struct v4l2_subdev_crop)
+#define VIDIOC_SUBDEV_G_SELECTION               _IOWR('V', 61, struct v4l2_subdev_selection)
+#define VIDIOC_SUBDEV_S_SELECTION               _IOWR('V', 62, struct v4l2_subdev_selection)
+/* The following ioctls are identical to the ioctls in videodev2.h */
+#define VIDIOC_SUBDEV_G_EDID                    _IOWR('V', 40, struct v4l2_edid)
+#define VIDIOC_SUBDEV_S_EDID                    _IOWR('V', 41, struct v4l2_edid)
+#define VIDIOC_SUBDEV_S_DV_TIMINGS              _IOWR('V', 87, struct v4l2_dv_timings)
+#define VIDIOC_SUBDEV_G_DV_TIMINGS              _IOWR('V', 88, struct v4l2_dv_timings)
+#define VIDIOC_SUBDEV_ENUM_DV_TIMINGS           _IOWR('V', 98, struct v4l2_enum_dv_timings)
+#define VIDIOC_SUBDEV_QUERY_DV_TIMINGS          _IOR('V', 99, struct v4l2_dv_timings)
+#define VIDIOC_SUBDEV_DV_TIMINGS_CAP            _IOWR('V', 100, struct v4l2_dv_timings_cap)
 
 #endif
diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
index ea468ee8fe21..168ff507bf75 100644
--- a/include/uapi/linux/videodev2.h
+++ b/include/uapi/linux/videodev2.h
@@ -649,7 +649,6 @@ struct v4l2_plane {
  * @length:     size in bytes of the buffer (NOT its payload) for single-plane
  *              buffers (when type != *_MPLANE); number of elements in the
  *              planes array for multi-plane buffers
- * @input:      input number from which the video data has has been captured
  *
  * Contains data exchanged by application and driver using one of the Streaming
  * I/O methods.
@@ -1107,12 +1106,15 @@ struct v4l2_dv_timings {
 
 /** struct v4l2_enum_dv_timings - DV timings enumeration
  * @index:      enumeration index
+ * @pad:        the pad number for which to enumerate timings (used with
+ *              v4l-subdev nodes only)
  * @reserved:   must be zeroed
  * @timings:    the timings for the given index
  */
 struct v4l2_enum_dv_timings {
         __u32 index;
-        __u32 reserved[3];
+        __u32 pad;
+        __u32 reserved[2];
         struct v4l2_dv_timings timings;
 };
 
@@ -1150,11 +1152,14 @@ struct v4l2_bt_timings_cap {
 
 /** struct v4l2_dv_timings_cap - DV timings capabilities
  * @type:       the type of the timings (same as in struct v4l2_dv_timings)
+ * @pad:        the pad number for which to query capabilities (used with
+ *              v4l-subdev nodes only)
  * @bt:         the BT656/1120 timings capabilities
  */
 struct v4l2_dv_timings_cap {
         __u32 type;
-        __u32 reserved[3];
+        __u32 pad;
+        __u32 reserved[2];
         union {
                 struct v4l2_bt_timings_cap bt;
                 __u32 raw_data[32];
@@ -1765,6 +1770,7 @@ struct v4l2_streamparm {
 #define V4L2_EVENT_EOS                          2
 #define V4L2_EVENT_CTRL                         3
 #define V4L2_EVENT_FRAME_SYNC                   4
+#define V4L2_EVENT_SOURCE_CHANGE                5
 #define V4L2_EVENT_PRIVATE_START                0x08000000
 
 /* Payload for V4L2_EVENT_VSYNC */
@@ -1796,12 +1802,19 @@ struct v4l2_event_frame_sync {
         __u32 frame_sequence;
 };
 
+#define V4L2_EVENT_SRC_CH_RESOLUTION            (1 << 0)
+
+struct v4l2_event_src_change {
+        __u32 changes;
+};
+
 struct v4l2_event {
         __u32                           type;
         union {
                 struct v4l2_event_vsync         vsync;
                 struct v4l2_event_ctrl          ctrl;
                 struct v4l2_event_frame_sync    frame_sync;
+                struct v4l2_event_src_change    src_change;
                 __u8                            data[64];
         } u;
         __u32                           pending;
diff --git a/include/uapi/sound/asound.h b/include/uapi/sound/asound.h
index 9fc6219d3848..224948342f14 100644
--- a/include/uapi/sound/asound.h
+++ b/include/uapi/sound/asound.h
@@ -94,9 +94,11 @@ enum {
         SNDRV_HWDEP_IFACE_HDA,          /* HD-audio */
         SNDRV_HWDEP_IFACE_USB_STREAM,   /* direct access to usb stream */
         SNDRV_HWDEP_IFACE_FW_DICE,      /* TC DICE FireWire device */
+        SNDRV_HWDEP_IFACE_FW_FIREWORKS, /* Echo Audio Fireworks based device */
+        SNDRV_HWDEP_IFACE_FW_BEBOB,     /* BridgeCo BeBoB based device */
 
         /* Don't forget to change the following: */
-        SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_FW_DICE
+        SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_FW_BEBOB
 };
 
 struct snd_hwdep_info {
diff --git a/include/uapi/sound/firewire.h b/include/uapi/sound/firewire.h
index 59f5961302bf..af4bd136c75d 100644
--- a/include/uapi/sound/firewire.h
+++ b/include/uapi/sound/firewire.h
@@ -2,11 +2,13 @@
 #define _UAPI_SOUND_FIREWIRE_H_INCLUDED
 
 #include <linux/ioctl.h>
+#include <linux/types.h>
 
 /* events can be read() from the hwdep device */
 
 #define SNDRV_FIREWIRE_EVENT_LOCK_STATUS        0x000010cc
 #define SNDRV_FIREWIRE_EVENT_DICE_NOTIFICATION  0xd1ce004e
+#define SNDRV_FIREWIRE_EVENT_EFW_RESPONSE       0x4e617475
 
 struct snd_firewire_event_common {
         unsigned int type; /* SNDRV_FIREWIRE_EVENT_xxx */
@@ -22,10 +24,27 @@ struct snd_firewire_event_dice_notification {
         unsigned int notification; /* DICE-specific bits */
 };
 
+#define SND_EFW_TRANSACTION_USER_SEQNUM_MAX     ((__u32)((__u16)~0) - 1)
+/* each field should be in big endian */
+struct snd_efw_transaction {
+        __be32 length;
+        __be32 version;
+        __be32 seqnum;
+        __be32 category;
+        __be32 command;
+        __be32 status;
+        __be32 params[0];
+};
+struct snd_firewire_event_efw_response {
+        unsigned int type;
+        __be32 response[0];     /* some responses */
+};
+
 union snd_firewire_event {
         struct snd_firewire_event_common            common;
         struct snd_firewire_event_lock_status       lock_status;
         struct snd_firewire_event_dice_notification dice_notification;
+        struct snd_firewire_event_efw_response      efw_response;
 };
 
 
@@ -34,7 +53,9 @@ union snd_firewire_event {
 #define SNDRV_FIREWIRE_IOCTL_UNLOCK    _IO('H', 0xfa)
 
 #define SNDRV_FIREWIRE_TYPE_DICE        1
-/* Fireworks, AV/C, RME, MOTU, ... */
+#define SNDRV_FIREWIRE_TYPE_FIREWORKS   2
+#define SNDRV_FIREWIRE_TYPE_BEBOB       3
+/* AV/C, RME, MOTU, ... */
 
 struct snd_firewire_get_info {
         unsigned int type; /* SNDRV_FIREWIRE_TYPE_xxx */
diff --git a/include/video/omapdss.h b/include/video/omapdss.h
index 6adb44534606..fc06c5b5f12a 100644
--- a/include/video/omapdss.h
+++ b/include/video/omapdss.h
@@ -319,6 +319,7 @@ enum omapdss_version {
         OMAPDSS_VER_OMAP4430_ES2,       /* OMAP4430 ES2.0, 2.1, 2.2 */
         OMAPDSS_VER_OMAP4,              /* All other OMAP4s */
         OMAPDSS_VER_OMAP5,
+        OMAPDSS_VER_AM43xx,
 };
 
 /* Board specific data */
@@ -388,8 +389,8 @@ struct omap_dss_cpr_coefs {
 };
 
 struct omap_overlay_info {
-        u32 paddr;
-        u32 p_uv_addr;  /* for NV12 format */
+        dma_addr_t paddr;
+        dma_addr_t p_uv_addr;  /* for NV12 format */
         u16 screen_width;
         u16 width;
         u16 height;
@@ -964,9 +965,6 @@ int dispc_ovl_setup(enum omap_plane plane, const struct omap_overlay_info *oi,
                 bool replication, const struct omap_video_timings *mgr_timings,
                 bool mem_to_mem);
 
-#define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver)
-#define to_dss_device(x) container_of((x), struct omap_dss_device, old_dev)
-
 int omapdss_compat_init(void);
 void omapdss_compat_uninit(void);
 
diff --git a/include/xen/interface/io/blkif.h b/include/xen/interface/io/blkif.h
index 32ec05a6572f..c33e1c489eb2 100644
--- a/include/xen/interface/io/blkif.h
+++ b/include/xen/interface/io/blkif.h
@@ -86,7 +86,7 @@ typedef uint64_t blkif_sector_t;
  *     Interface%20manuals/100293068c.pdf
  * The backend can optionally provide three extra XenBus attributes to
  * further optimize the discard functionality:
- * 'discard-aligment' - Devices that support discard functionality may
+ * 'discard-alignment' - Devices that support discard functionality may
  * internally allocate space in units that are bigger than the exported
  * logical block size. The discard-alignment parameter indicates how many bytes
  * the beginning of the partition is offset from the internal allocation unit's
diff --git a/include/xen/interface/xen.h b/include/xen/interface/xen.h
index 0cd5ca333fac..de082130ba4b 100644
--- a/include/xen/interface/xen.h
+++ b/include/xen/interface/xen.h
@@ -275,9 +275,9 @@ DEFINE_GUEST_HANDLE_STRUCT(mmu_update);
  * NB. The fields are natural register size for this architecture.
  */
 struct multicall_entry {
-    unsigned long op;
-    long result;
-    unsigned long args[6];
+    xen_ulong_t op;
+    xen_long_t result;
+    xen_ulong_t args[6];
 };
 DEFINE_GUEST_HANDLE_STRUCT(multicall_entry);
 
diff --git a/include/xen/xen-ops.h b/include/xen/xen-ops.h
index 2cf47175b12b..0b3149ed7eaa 100644
--- a/include/xen/xen-ops.h
+++ b/include/xen/xen-ops.h
@@ -9,10 +9,6 @@ DECLARE_PER_CPU(struct vcpu_info *, xen_vcpu);
 
 void xen_arch_pre_suspend(void);
 void xen_arch_post_suspend(int suspend_cancelled);
-void xen_arch_hvm_post_suspend(int suspend_cancelled);
-
-void xen_mm_pin_all(void);
-void xen_mm_unpin_all(void);
 
 void xen_timer_resume(void);
 void xen_arch_resume(void);