2 files changed, 4 insertions, 2 deletions

diff --git a/include/uapi/linux/serial_core.h b/include/uapi/linux/serial_core.h
index 9124e837c181..ee628c489e47 100644
--- a/include/uapi/linux/serial_core.h
+++ b/include/uapi/linux/serial_core.h
@@ -55,7 +55,8 @@
 #define PORT_ALTR_16550_F64 27  /* Altera 16550 UART with 64 FIFOs */
 #define PORT_ALTR_16550_F128 28 /* Altera 16550 UART with 128 FIFOs */
 #define PORT_RT2880     29      /* Ralink RT2880 internal UART */
-#define PORT_MAX_8250   29      /* max port ID */
+#define PORT_16550A_FSL64 30    /* Freescale 16550 UART with 64 FIFOs */
+#define PORT_MAX_8250   30      /* max port ID */
 
 /*
  * ARM specific type numbers.  These are not currently guaranteed
diff --git a/include/uapi/linux/serial_reg.h b/include/uapi/linux/serial_reg.h
index 53af3b790129..00adb01fa5f3 100644
--- a/include/uapi/linux/serial_reg.h
+++ b/include/uapi/linux/serial_reg.h
@@ -86,7 +86,8 @@
 #define UART_FCR6_T_TRIGGER_8   0x10 /* Mask for transmit trigger set at 8 */
 #define UART_FCR6_T_TRIGGER_24  0x20 /* Mask for transmit trigger set at 24 */
 #define UART_FCR6_T_TRIGGER_30  0x30 /* Mask for transmit trigger set at 30 */
-#define UART_FCR7_64BYTE        0x20 /* Go into 64 byte mode (TI16C750) */
+#define UART_FCR7_64BYTE        0x20 /* Go into 64 byte mode (TI16C750 and
+                                        some Freescale UARTs) */
 
 #define UART_FCR_R_TRIG_SHIFT           6
 #define UART_FCR_R_TRIG_BITS(x)         \