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-rw-r--r--include/uapi/linux/serial_reg.h19
1 files changed, 0 insertions, 19 deletions
diff --git a/include/uapi/linux/serial_reg.h b/include/uapi/linux/serial_reg.h
index 00adb01fa5f3..e9b4cb0cd7ed 100644
--- a/include/uapi/linux/serial_reg.h
+++ b/include/uapi/linux/serial_reg.h
@@ -242,25 +242,6 @@
242#define UART_FCR_PXAR32 0xc0 /* receive FIFO threshold = 32 */ 242#define UART_FCR_PXAR32 0xc0 /* receive FIFO threshold = 32 */
243 243
244/* 244/*
245 * Intel MID on-chip HSU (High Speed UART) defined bits
246 */
247#define UART_FCR_HSU_64_1B 0x00 /* receive FIFO treshold = 1 */
248#define UART_FCR_HSU_64_16B 0x40 /* receive FIFO treshold = 16 */
249#define UART_FCR_HSU_64_32B 0x80 /* receive FIFO treshold = 32 */
250#define UART_FCR_HSU_64_56B 0xc0 /* receive FIFO treshold = 56 */
251
252#define UART_FCR_HSU_16_1B 0x00 /* receive FIFO treshold = 1 */
253#define UART_FCR_HSU_16_4B 0x40 /* receive FIFO treshold = 4 */
254#define UART_FCR_HSU_16_8B 0x80 /* receive FIFO treshold = 8 */
255#define UART_FCR_HSU_16_14B 0xc0 /* receive FIFO treshold = 14 */
256
257#define UART_FCR_HSU_64B_FIFO 0x20 /* chose 64 bytes FIFO */
258#define UART_FCR_HSU_16B_FIFO 0x00 /* chose 16 bytes FIFO */
259
260#define UART_FCR_HALF_EMPT_TXI 0x00 /* trigger TX_EMPT IRQ for half empty */
261#define UART_FCR_FULL_EMPT_TXI 0x08 /* trigger TX_EMPT IRQ for full empty */
262
263/*
264 * These register definitions are for the 16C950 245 * These register definitions are for the 16C950
265 */ 246 */
266#define UART_ASR 0x01 /* Additional Status Register */ 247#define UART_ASR 0x01 /* Additional Status Register */