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-rw-r--r--include/sound/cs4271.h1
-rw-r--r--include/sound/sh_fsi.h6
-rw-r--r--include/sound/tlv320aic32x4.h1
3 files changed, 8 insertions, 0 deletions
diff --git a/include/sound/cs4271.h b/include/sound/cs4271.h
index 50a059e7d116..6d9e15ed1dcf 100644
--- a/include/sound/cs4271.h
+++ b/include/sound/cs4271.h
@@ -19,6 +19,7 @@
19 19
20struct cs4271_platform_data { 20struct cs4271_platform_data {
21 int gpio_nreset; /* GPIO driving Reset pin, if any */ 21 int gpio_nreset; /* GPIO driving Reset pin, if any */
22 int amutec_eq_bmutec:1; /* flag to enable AMUTEC=BMUTEC */
22}; 23};
23 24
24#endif /* __CS4271_H */ 25#endif /* __CS4271_H */
diff --git a/include/sound/sh_fsi.h b/include/sound/sh_fsi.h
index 906010344dd7..cc1c919c6436 100644
--- a/include/sound/sh_fsi.h
+++ b/include/sound/sh_fsi.h
@@ -26,6 +26,7 @@
26 * A: inversion 26 * A: inversion
27 * B: format mode 27 * B: format mode
28 * C: chip specific 28 * C: chip specific
29 * D: clock selecter if master mode
29 */ 30 */
30 31
31/* A: clock inversion */ 32/* A: clock inversion */
@@ -44,6 +45,11 @@
44#define SH_FSI_OPTION_MASK 0x00000F00 45#define SH_FSI_OPTION_MASK 0x00000F00
45#define SH_FSI_ENABLE_STREAM_MODE (1 << 8) /* for 16bit data */ 46#define SH_FSI_ENABLE_STREAM_MODE (1 << 8) /* for 16bit data */
46 47
48/* D: clock selecter if master mode */
49#define SH_FSI_CLK_MASK 0x0000F000
50#define SH_FSI_CLK_EXTERNAL (0 << 12)
51#define SH_FSI_CLK_CPG (1 << 12) /* FSIxCK + FSI-DIV */
52
47/* 53/*
48 * set_rate return value 54 * set_rate return value
49 * 55 *
diff --git a/include/sound/tlv320aic32x4.h b/include/sound/tlv320aic32x4.h
index c009f70b4029..24e5d991f148 100644
--- a/include/sound/tlv320aic32x4.h
+++ b/include/sound/tlv320aic32x4.h
@@ -26,6 +26,7 @@ struct aic32x4_pdata {
26 u32 power_cfg; 26 u32 power_cfg;
27 u32 micpga_routing; 27 u32 micpga_routing;
28 bool swapdacs; 28 bool swapdacs;
29 int rstn_gpio;
29}; 30};
30 31
31#endif 32#endif