aboutsummaryrefslogtreecommitdiffstats
path: root/include/linux
diff options
context:
space:
mode:
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/tegra-powergate.h50
1 files changed, 49 insertions, 1 deletions
diff --git a/include/linux/tegra-powergate.h b/include/linux/tegra-powergate.h
index afe442d2629a..46f0a07812b4 100644
--- a/include/linux/tegra-powergate.h
+++ b/include/linux/tegra-powergate.h
@@ -38,14 +38,49 @@ struct reset_control;
38#define TEGRA_POWERGATE_CPU0 14 38#define TEGRA_POWERGATE_CPU0 14
39#define TEGRA_POWERGATE_C0NC 15 39#define TEGRA_POWERGATE_C0NC 15
40#define TEGRA_POWERGATE_C1NC 16 40#define TEGRA_POWERGATE_C1NC 16
41#define TEGRA_POWERGATE_SOR 17
41#define TEGRA_POWERGATE_DIS 18 42#define TEGRA_POWERGATE_DIS 18
42#define TEGRA_POWERGATE_DISB 19 43#define TEGRA_POWERGATE_DISB 19
43#define TEGRA_POWERGATE_XUSBA 20 44#define TEGRA_POWERGATE_XUSBA 20
44#define TEGRA_POWERGATE_XUSBB 21 45#define TEGRA_POWERGATE_XUSBB 21
45#define TEGRA_POWERGATE_XUSBC 22 46#define TEGRA_POWERGATE_XUSBC 22
47#define TEGRA_POWERGATE_VIC 23
48#define TEGRA_POWERGATE_IRAM 24
46 49
47#define TEGRA_POWERGATE_3D0 TEGRA_POWERGATE_3D 50#define TEGRA_POWERGATE_3D0 TEGRA_POWERGATE_3D
48 51
52#define TEGRA_IO_RAIL_CSIA 0
53#define TEGRA_IO_RAIL_CSIB 1
54#define TEGRA_IO_RAIL_DSI 2
55#define TEGRA_IO_RAIL_MIPI_BIAS 3
56#define TEGRA_IO_RAIL_PEX_BIAS 4
57#define TEGRA_IO_RAIL_PEX_CLK1 5
58#define TEGRA_IO_RAIL_PEX_CLK2 6
59#define TEGRA_IO_RAIL_USB0 9
60#define TEGRA_IO_RAIL_USB1 10
61#define TEGRA_IO_RAIL_USB2 11
62#define TEGRA_IO_RAIL_USB_BIAS 12
63#define TEGRA_IO_RAIL_NAND 13
64#define TEGRA_IO_RAIL_UART 14
65#define TEGRA_IO_RAIL_BB 15
66#define TEGRA_IO_RAIL_AUDIO 17
67#define TEGRA_IO_RAIL_HSIC 19
68#define TEGRA_IO_RAIL_COMP 22
69#define TEGRA_IO_RAIL_HDMI 28
70#define TEGRA_IO_RAIL_PEX_CNTRL 32
71#define TEGRA_IO_RAIL_SDMMC1 33
72#define TEGRA_IO_RAIL_SDMMC3 34
73#define TEGRA_IO_RAIL_SDMMC4 35
74#define TEGRA_IO_RAIL_CAM 36
75#define TEGRA_IO_RAIL_RES 37
76#define TEGRA_IO_RAIL_HV 38
77#define TEGRA_IO_RAIL_DSIB 39
78#define TEGRA_IO_RAIL_DSIC 40
79#define TEGRA_IO_RAIL_DSID 41
80#define TEGRA_IO_RAIL_CSIE 44
81#define TEGRA_IO_RAIL_LVDS 57
82#define TEGRA_IO_RAIL_SYS_DDC 58
83
49#ifdef CONFIG_ARCH_TEGRA 84#ifdef CONFIG_ARCH_TEGRA
50int tegra_powergate_is_powered(int id); 85int tegra_powergate_is_powered(int id);
51int tegra_powergate_power_on(int id); 86int tegra_powergate_power_on(int id);
@@ -55,6 +90,9 @@ int tegra_powergate_remove_clamping(int id);
55/* Must be called with clk disabled, and returns with clk enabled */ 90/* Must be called with clk disabled, and returns with clk enabled */
56int tegra_powergate_sequence_power_up(int id, struct clk *clk, 91int tegra_powergate_sequence_power_up(int id, struct clk *clk,
57 struct reset_control *rst); 92 struct reset_control *rst);
93
94int tegra_io_rail_power_on(int id);
95int tegra_io_rail_power_off(int id);
58#else 96#else
59static inline int tegra_powergate_is_powered(int id) 97static inline int tegra_powergate_is_powered(int id)
60{ 98{
@@ -77,7 +115,17 @@ static inline int tegra_powergate_remove_clamping(int id)
77} 115}
78 116
79static inline int tegra_powergate_sequence_power_up(int id, struct clk *clk, 117static inline int tegra_powergate_sequence_power_up(int id, struct clk *clk,
80 struct reset_control *rst); 118 struct reset_control *rst)
119{
120 return -ENOSYS;
121}
122
123static inline int tegra_io_rail_power_on(int id)
124{
125 return -ENOSYS;
126}
127
128static inline int tegra_io_rail_power_off(int id)
81{ 129{
82 return -ENOSYS; 130 return -ENOSYS;
83} 131}