5 files changed, 75 insertions, 52 deletions

diff --git a/include/linux/dma/hsu.h b/include/linux/dma/hsu.h
new file mode 100644
index 000000000000..234393a6997b
--- /dev/null
+++ b/include/linux/dma/hsu.h
@@ -0,0 +1,48 @@
+/*
+ * Driver for the High Speed UART DMA
+ *
+ * Copyright (C) 2015 Intel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _DMA_HSU_H
+#define _DMA_HSU_H
+
+#include <linux/device.h>
+#include <linux/interrupt.h>
+
+#include <linux/platform_data/dma-hsu.h>
+
+struct hsu_dma;
+
+/**
+ * struct hsu_dma_chip - representation of HSU DMA hardware
+ * @dev:                 struct device of the DMA controller
+ * @irq:                 irq line
+ * @regs:                memory mapped I/O space
+ * @length:              I/O space length
+ * @offset:              offset of the I/O space where registers are located
+ * @hsu:                 struct hsu_dma that is filed by ->probe()
+ * @pdata:               platform data for the DMA controller if provided
+ */
+struct hsu_dma_chip {
+        struct device                   *dev;
+        int                             irq;
+        void __iomem                    *regs;
+        unsigned int                    length;
+        unsigned int                    offset;
+        struct hsu_dma                  *hsu;
+        struct hsu_dma_platform_data    *pdata;
+};
+
+/* Export to the internal users */
+irqreturn_t hsu_dma_irq(struct hsu_dma_chip *chip, unsigned short nr);
+
+/* Export to the platform drivers */
+int hsu_dma_probe(struct hsu_dma_chip *chip);
+int hsu_dma_remove(struct hsu_dma_chip *chip);
+
+#endif /* _DMA_HSU_H */
diff --git a/include/linux/platform_data/dma-hsu.h b/include/linux/platform_data/dma-hsu.h
new file mode 100644
index 000000000000..8a1f6a4920b2
--- /dev/null
+++ b/include/linux/platform_data/dma-hsu.h
@@ -0,0 +1,25 @@
+/*
+ * Driver for the High Speed UART DMA
+ *
+ * Copyright (C) 2015 Intel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _PLATFORM_DATA_DMA_HSU_H
+#define _PLATFORM_DATA_DMA_HSU_H
+
+#include <linux/device.h>
+
+struct hsu_dma_slave {
+        struct device   *dma_dev;
+        int             chan_id;
+};
+
+struct hsu_dma_platform_data {
+        unsigned short  nr_channels;
+};
+
+#endif /* _PLATFORM_DATA_DMA_HSU_H */
diff --git a/include/linux/platform_data/serial-imx.h b/include/linux/platform_data/serial-imx.h
index 3cc2e3c40914..a938eba2f18e 100644
--- a/include/linux/platform_data/serial-imx.h
+++ b/include/linux/platform_data/serial-imx.h
@@ -20,14 +20,9 @@
 #define ASMARM_ARCH_UART_H
 
 #define IMXUART_HAVE_RTSCTS (1<<0)
-#define IMXUART_IRDA        (1<<1)
 
 struct imxuart_platform_data {
         unsigned int flags;
-        void (*irda_enable)(int enable);
-        unsigned int irda_inv_rx:1;
-        unsigned int irda_inv_tx:1;
-        unsigned short transceiver_delay;
 };
 
 #endif
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index d10965f0d8a4..b0148e7bcbfa 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -354,6 +354,8 @@ early_param("earlycon", name ## _setup_earlycon);
 
 struct uart_port *uart_get_console(struct uart_port *ports, int nr,
                                    struct console *c);
+int uart_parse_earlycon(char *p, unsigned char *iotype, unsigned long *addr,
+                        char **options);
 void uart_parse_options(char *options, int *baud, int *parity, int *bits,
                         int *flow);
 int uart_set_options(struct uart_port *port, struct console *co, int baud,
diff --git a/include/linux/serial_mfd.h b/include/linux/serial_mfd.h
deleted file mode 100644
index 2b071e0b034d..000000000000
--- a/include/linux/serial_mfd.h
+++ /dev/null
@@ -1,47 +0,0 @@
-#ifndef _SERIAL_MFD_H_
-#define _SERIAL_MFD_H_
-
-/* HW register offset definition */
-#define UART_FOR        0x08
-#define UART_PS         0x0C
-#define UART_MUL        0x0D
-#define UART_DIV        0x0E
-
-#define HSU_GBL_IEN     0x0
-#define HSU_GBL_IST     0x4
-
-#define HSU_GBL_INT_BIT_PORT0   0x0
-#define HSU_GBL_INT_BIT_PORT1   0x1
-#define HSU_GBL_INT_BIT_PORT2   0x2
-#define HSU_GBL_INT_BIT_IRI     0x3
-#define HSU_GBL_INT_BIT_HDLC    0x4
-#define HSU_GBL_INT_BIT_DMA     0x5
-
-#define HSU_GBL_ISR     0x8
-#define HSU_GBL_DMASR   0x400
-#define HSU_GBL_DMAISR  0x404
-
-#define HSU_PORT_REG_OFFSET     0x80
-#define HSU_PORT0_REG_OFFSET    0x80
-#define HSU_PORT1_REG_OFFSET    0x100
-#define HSU_PORT2_REG_OFFSET    0x180
-#define HSU_PORT_REG_LENGTH     0x80
-
-#define HSU_DMA_CHANS_REG_OFFSET        0x500
-#define HSU_DMA_CHANS_REG_LENGTH        0x40
-
-#define HSU_CH_SR               0x0     /* channel status reg */
-#define HSU_CH_CR               0x4     /* control reg */
-#define HSU_CH_DCR              0x8     /* descriptor control reg */
-#define HSU_CH_BSR              0x10    /* max fifo buffer size reg */
-#define HSU_CH_MOTSR            0x14    /* minimum ocp transfer size */
-#define HSU_CH_D0SAR            0x20    /* desc 0 start addr */
-#define HSU_CH_D0TSR            0x24    /* desc 0 transfer size */
-#define HSU_CH_D1SAR            0x28
-#define HSU_CH_D1TSR            0x2C
-#define HSU_CH_D2SAR            0x30
-#define HSU_CH_D2TSR            0x34
-#define HSU_CH_D3SAR            0x38
-#define HSU_CH_D3TSR            0x3C
-
-#endif