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-rw-r--r--include/linux/edac.h28
1 files changed, 23 insertions, 5 deletions
diff --git a/include/linux/edac.h b/include/linux/edac.h
index c621d762bb2c..52bceca85e63 100644
--- a/include/linux/edac.h
+++ b/include/linux/edac.h
@@ -312,23 +312,34 @@ enum scrub_type {
312 * PS - I enjoyed writing all that about as much as you enjoyed reading it. 312 * PS - I enjoyed writing all that about as much as you enjoyed reading it.
313 */ 313 */
314 314
315/* FIXME: add a per-dimm ce error count */
316struct dimm_info {
317 char label[EDAC_MC_LABEL_LEN + 1]; /* DIMM label on motherboard */
318 unsigned memory_controller;
319 unsigned csrow;
320 unsigned csrow_channel;
321};
322
315/** 323/**
316 * struct rank_info - contains the information for one DIMM rank 324 * struct rank_info - contains the information for one DIMM rank
317 * 325 *
318 * @chan_idx: channel number where the rank is (typically, 0 or 1) 326 * @chan_idx: channel number where the rank is (typically, 0 or 1)
319 * @ce_count: number of correctable errors for this rank 327 * @ce_count: number of correctable errors for this rank
320 * @label: DIMM label. Different ranks for the same DIMM should be
321 * filled, on userspace, with the same label.
322 * FIXME: The core currently won't enforce it.
323 * @csrow: A pointer to the chip select row structure (the parent 328 * @csrow: A pointer to the chip select row structure (the parent
324 * structure). The location of the rank is given by 329 * structure). The location of the rank is given by
325 * the (csrow->csrow_idx, chan_idx) vector. 330 * the (csrow->csrow_idx, chan_idx) vector.
331 * @dimm: A pointer to the DIMM structure, where the DIMM label
332 * information is stored.
333 *
334 * FIXME: Currently, the EDAC core model will assume one DIMM per rank.
335 * This is a bad assumption, but it makes this patch easier. Later
336 * patches in this series will fix this issue.
326 */ 337 */
327struct rank_info { 338struct rank_info {
328 int chan_idx; 339 int chan_idx;
329 u32 ce_count; 340 u32 ce_count;
330 char label[EDAC_MC_LABEL_LEN + 1]; 341 struct csrow_info *csrow;
331 struct csrow_info *csrow; /* the parent */ 342 struct dimm_info *dimm;
332}; 343};
333 344
334struct csrow_info { 345struct csrow_info {
@@ -428,6 +439,13 @@ struct mem_ctl_info {
428 int mc_idx; 439 int mc_idx;
429 int nr_csrows; 440 int nr_csrows;
430 struct csrow_info *csrows; 441 struct csrow_info *csrows;
442
443 /*
444 * DIMM info. Will eventually remove the entire csrows_info some day
445 */
446 unsigned nr_dimms;
447 struct dimm_info *dimms;
448
431 /* 449 /*
432 * FIXME - what about controllers on other busses? - IDs must be 450 * FIXME - what about controllers on other busses? - IDs must be
433 * unique. dev pointer should be sufficiently unique, but 451 * unique. dev pointer should be sufficiently unique, but