6 files changed, 8 insertions, 266 deletions

diff --git a/include/linux/mmc/core.h b/include/linux/mmc/core.h
index 160448f920ac..de722d4e9d61 100644
--- a/include/linux/mmc/core.h
+++ b/include/linux/mmc/core.h
@@ -79,7 +79,7 @@ struct mmc_command {
 #define mmc_cmd_type(cmd)       ((cmd)->flags & MMC_CMD_MASK)
 
         unsigned int            retries;        /* max number of retries */
-        unsigned int            error;          /* command error */
+        int                     error;          /* command error */
 
 /*
  * Standard errno values are used for errors, but some have specific
@@ -108,7 +108,7 @@ struct mmc_data {
         unsigned int            timeout_clks;   /* data timeout (in clocks) */
         unsigned int            blksz;          /* data block size */
         unsigned int            blocks;         /* number of blocks */
-        unsigned int            error;          /* data error */
+        int                     error;          /* data error */
         unsigned int            flags;
 
 #define MMC_DATA_WRITE  (1 << 8)
diff --git a/include/linux/mmc/dw_mmc.h b/include/linux/mmc/dw_mmc.h
index 471fb3116dbe..12111993a317 100644
--- a/include/linux/mmc/dw_mmc.h
+++ b/include/linux/mmc/dw_mmc.h
@@ -44,6 +44,7 @@ struct mmc_data;
  * struct dw_mci - MMC controller state shared between all slots
  * @lock: Spinlock protecting the queue and associated data.
  * @regs: Pointer to MMIO registers.
+ * @fifo_reg: Pointer to MMIO registers for data FIFO
  * @sg: Scatterlist entry currently being processed by PIO code, if any.
  * @sg_miter: PIO mapping scatterlist iterator.
  * @cur_slot: The slot which is currently using the controller.
@@ -79,7 +80,6 @@ struct mmc_data;
  * @current_speed: Configured rate of the controller.
  * @num_slots: Number of slots available.
  * @verid: Denote Version ID.
- * @data_offset: Set the offset of DATA register according to VERID.
  * @dev: Device associated with the MMC controller.
  * @pdata: Platform data associated with the MMC controller.
  * @drv_data: Driver specific data for identified variant of the controller
@@ -132,6 +132,7 @@ struct dw_mci {
         spinlock_t              lock;
         spinlock_t              irq_lock;
         void __iomem            *regs;
+        void __iomem            *fifo_reg;
 
         struct scatterlist      *sg;
         struct sg_mapping_iter  sg_miter;
@@ -172,7 +173,6 @@ struct dw_mci {
         u32                     num_slots;
         u32                     fifoth_val;
         u16                     verid;
-        u16                     data_offset;
         struct device           *dev;
         struct dw_mci_board     *pdata;
         const struct dw_mci_drv_data    *drv_data;
@@ -202,6 +202,8 @@ struct dw_mci {
         int                     irq;
 
         int                     sdio_id0;
+
+        struct timer_list       cmd11_timer;
 };
 
 /* DMA ops for Internal/External DMAC interface */
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index 0c8cbe5d1550..b5bedaec6223 100644
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -80,12 +80,6 @@ struct mmc_ios {
 
 struct mmc_host_ops {
         /*
-         * 'enable' is called when the host is claimed and 'disable' is called
-         * when the host is released. 'enable' and 'disable' are deprecated.
-         */
-        int (*enable)(struct mmc_host *host);
-        int (*disable)(struct mmc_host *host);
-        /*
          * It is optional for the host to implement pre_req and post_req in
          * order to support double buffering of requests (prepare one
          * request while another request is active).
diff --git a/include/linux/mmc/sdhci-spear.h b/include/linux/mmc/sdhci-spear.h
deleted file mode 100644
index 8cc095a76cf8..000000000000
--- a/include/linux/mmc/sdhci-spear.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * include/linux/mmc/sdhci-spear.h
- *
- * SDHCI declarations specific to ST SPEAr platform
- *
- * Copyright (C) 2010 ST Microelectronics
- * Viresh Kumar <viresh.linux@gmail.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef LINUX_MMC_SDHCI_SPEAR_H
-#define LINUX_MMC_SDHCI_SPEAR_H
-
-#include <linux/platform_device.h>
-/*
- * struct sdhci_plat_data: spear sdhci platform data structure
- *
- * card_int_gpio: gpio pin used for card detection
- */
-struct sdhci_plat_data {
-        int card_int_gpio;
-};
-
-/* This function is used to set platform_data field of pdev->dev */
-static inline void
-sdhci_set_plat_data(struct platform_device *pdev, struct sdhci_plat_data *data)
-{
-        pdev->dev.platform_data = data;
-}
-
-#endif /* LINUX_MMC_SDHCI_SPEAR_H */
diff --git a/include/linux/mmc/sdhci.h b/include/linux/mmc/sdhci.h
deleted file mode 100644
index c3e3db196738..000000000000
--- a/include/linux/mmc/sdhci.h
+++ /dev/null
@@ -1,218 +0,0 @@
-/*
- *  linux/include/linux/mmc/sdhci.h - Secure Digital Host Controller Interface
- *
- *  Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or (at
- * your option) any later version.
- */
-#ifndef LINUX_MMC_SDHCI_H
-#define LINUX_MMC_SDHCI_H
-
-#include <linux/scatterlist.h>
-#include <linux/compiler.h>
-#include <linux/types.h>
-#include <linux/io.h>
-#include <linux/mmc/host.h>
-
-struct sdhci_host_next {
-        unsigned int    sg_count;
-        s32             cookie;
-};
-
-struct sdhci_host {
-        /* Data set by hardware interface driver */
-        const char *hw_name;    /* Hardware bus name */
-
-        unsigned int quirks;    /* Deviations from spec. */
-
-/* Controller doesn't honor resets unless we touch the clock register */
-#define SDHCI_QUIRK_CLOCK_BEFORE_RESET                  (1<<0)
-/* Controller has bad caps bits, but really supports DMA */
-#define SDHCI_QUIRK_FORCE_DMA                           (1<<1)
-/* Controller doesn't like to be reset when there is no card inserted. */
-#define SDHCI_QUIRK_NO_CARD_NO_RESET                    (1<<2)
-/* Controller doesn't like clearing the power reg before a change */
-#define SDHCI_QUIRK_SINGLE_POWER_WRITE                  (1<<3)
-/* Controller has flaky internal state so reset it on each ios change */
-#define SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS               (1<<4)
-/* Controller has an unusable DMA engine */
-#define SDHCI_QUIRK_BROKEN_DMA                          (1<<5)
-/* Controller has an unusable ADMA engine */
-#define SDHCI_QUIRK_BROKEN_ADMA                         (1<<6)
-/* Controller can only DMA from 32-bit aligned addresses */
-#define SDHCI_QUIRK_32BIT_DMA_ADDR                      (1<<7)
-/* Controller can only DMA chunk sizes that are a multiple of 32 bits */
-#define SDHCI_QUIRK_32BIT_DMA_SIZE                      (1<<8)
-/* Controller can only ADMA chunks that are a multiple of 32 bits */
-#define SDHCI_QUIRK_32BIT_ADMA_SIZE                     (1<<9)
-/* Controller needs to be reset after each request to stay stable */
-#define SDHCI_QUIRK_RESET_AFTER_REQUEST                 (1<<10)
-/* Controller needs voltage and power writes to happen separately */
-#define SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER             (1<<11)
-/* Controller provides an incorrect timeout value for transfers */
-#define SDHCI_QUIRK_BROKEN_TIMEOUT_VAL                  (1<<12)
-/* Controller has an issue with buffer bits for small transfers */
-#define SDHCI_QUIRK_BROKEN_SMALL_PIO                    (1<<13)
-/* Controller does not provide transfer-complete interrupt when not busy */
-#define SDHCI_QUIRK_NO_BUSY_IRQ                         (1<<14)
-/* Controller has unreliable card detection */
-#define SDHCI_QUIRK_BROKEN_CARD_DETECTION               (1<<15)
-/* Controller reports inverted write-protect state */
-#define SDHCI_QUIRK_INVERTED_WRITE_PROTECT              (1<<16)
-/* Controller does not like fast PIO transfers */
-#define SDHCI_QUIRK_PIO_NEEDS_DELAY                     (1<<18)
-/* Controller has to be forced to use block size of 2048 bytes */
-#define SDHCI_QUIRK_FORCE_BLK_SZ_2048                   (1<<20)
-/* Controller cannot do multi-block transfers */
-#define SDHCI_QUIRK_NO_MULTIBLOCK                       (1<<21)
-/* Controller can only handle 1-bit data transfers */
-#define SDHCI_QUIRK_FORCE_1_BIT_DATA                    (1<<22)
-/* Controller needs 10ms delay between applying power and clock */
-#define SDHCI_QUIRK_DELAY_AFTER_POWER                   (1<<23)
-/* Controller uses SDCLK instead of TMCLK for data timeouts */
-#define SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK             (1<<24)
-/* Controller reports wrong base clock capability */
-#define SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN               (1<<25)
-/* Controller cannot support End Attribute in NOP ADMA descriptor */
-#define SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC               (1<<26)
-/* Controller is missing device caps. Use caps provided by host */
-#define SDHCI_QUIRK_MISSING_CAPS                        (1<<27)
-/* Controller uses Auto CMD12 command to stop the transfer */
-#define SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12              (1<<28)
-/* Controller doesn't have HISPD bit field in HI-SPEED SD card */
-#define SDHCI_QUIRK_NO_HISPD_BIT                        (1<<29)
-/* Controller treats ADMA descriptors with length 0000h incorrectly */
-#define SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC            (1<<30)
-/* The read-only detection via SDHCI_PRESENT_STATE register is unstable */
-#define SDHCI_QUIRK_UNSTABLE_RO_DETECT                  (1<<31)
-
-        unsigned int quirks2;   /* More deviations from spec. */
-
-#define SDHCI_QUIRK2_HOST_OFF_CARD_ON                   (1<<0)
-#define SDHCI_QUIRK2_HOST_NO_CMD23                      (1<<1)
-/* The system physically doesn't support 1.8v, even if the host does */
-#define SDHCI_QUIRK2_NO_1_8_V                           (1<<2)
-#define SDHCI_QUIRK2_PRESET_VALUE_BROKEN                (1<<3)
-#define SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON               (1<<4)
-/* Controller has a non-standard host control register */
-#define SDHCI_QUIRK2_BROKEN_HOST_CONTROL                (1<<5)
-/* Controller does not support HS200 */
-#define SDHCI_QUIRK2_BROKEN_HS200                       (1<<6)
-/* Controller does not support DDR50 */
-#define SDHCI_QUIRK2_BROKEN_DDR50                       (1<<7)
-/* Stop command (CMD12) can set Transfer Complete when not using MMC_RSP_BUSY */
-#define SDHCI_QUIRK2_STOP_WITH_TC                       (1<<8)
-/* Controller does not support 64-bit DMA */
-#define SDHCI_QUIRK2_BROKEN_64_BIT_DMA                  (1<<9)
-/* need clear transfer mode register before send cmd */
-#define SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD  (1<<10)
-/* Capability register bit-63 indicates HS400 support */
-#define SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400               (1<<11)
-/* forced tuned clock */
-#define SDHCI_QUIRK2_TUNING_WORK_AROUND                 (1<<12)
-/* disable the block count for single block transactions */
-#define SDHCI_QUIRK2_SUPPORT_SINGLE                     (1<<13)
-
-        int irq;                /* Device IRQ */
-        void __iomem *ioaddr;   /* Mapped address */
-
-        const struct sdhci_ops *ops;    /* Low level hw interface */
-
-        /* Internal data */
-        struct mmc_host *mmc;   /* MMC structure */
-        u64 dma_mask;           /* custom DMA mask */
-
-#if defined(CONFIG_LEDS_CLASS) || defined(CONFIG_LEDS_CLASS_MODULE)
-        struct led_classdev led;        /* LED control */
-        char led_name[32];
-#endif
-
-        spinlock_t lock;        /* Mutex */
-
-        int flags;              /* Host attributes */
-#define SDHCI_USE_SDMA          (1<<0)  /* Host is SDMA capable */
-#define SDHCI_USE_ADMA          (1<<1)  /* Host is ADMA capable */
-#define SDHCI_REQ_USE_DMA       (1<<2)  /* Use DMA for this req. */
-#define SDHCI_DEVICE_DEAD       (1<<3)  /* Device unresponsive */
-#define SDHCI_SDR50_NEEDS_TUNING (1<<4) /* SDR50 needs tuning */
-#define SDHCI_NEEDS_RETUNING    (1<<5)  /* Host needs retuning */
-#define SDHCI_AUTO_CMD12        (1<<6)  /* Auto CMD12 support */
-#define SDHCI_AUTO_CMD23        (1<<7)  /* Auto CMD23 support */
-#define SDHCI_PV_ENABLED        (1<<8)  /* Preset value enabled */
-#define SDHCI_SDIO_IRQ_ENABLED  (1<<9)  /* SDIO irq enabled */
-#define SDHCI_SDR104_NEEDS_TUNING (1<<10)       /* SDR104/HS200 needs tuning */
-#define SDHCI_USING_RETUNING_TIMER (1<<11)      /* Host is using a retuning timer for the card */
-#define SDHCI_USE_64_BIT_DMA    (1<<12) /* Use 64-bit DMA */
-#define SDHCI_HS400_TUNING      (1<<13) /* Tuning for HS400 */
-
-        unsigned int version;   /* SDHCI spec. version */
-
-        unsigned int max_clk;   /* Max possible freq (MHz) */
-        unsigned int timeout_clk;       /* Timeout freq (KHz) */
-        unsigned int clk_mul;   /* Clock Muliplier value */
-
-        unsigned int clock;     /* Current clock (MHz) */
-        u8 pwr;                 /* Current voltage */
-
-        bool runtime_suspended; /* Host is runtime suspended */
-        bool bus_on;            /* Bus power prevents runtime suspend */
-        bool preset_enabled;    /* Preset is enabled */
-
-        struct mmc_request *mrq;        /* Current request */
-        struct mmc_command *cmd;        /* Current command */
-        struct mmc_data *data;  /* Current data request */
-        unsigned int data_early:1;      /* Data finished before cmd */
-        unsigned int busy_handle:1;     /* Handling the order of Busy-end */
-
-        struct sg_mapping_iter sg_miter;        /* SG state for PIO */
-        unsigned int blocks;    /* remaining PIO blocks */
-
-        int sg_count;           /* Mapped sg entries */
-
-        void *adma_table;       /* ADMA descriptor table */
-        void *align_buffer;     /* Bounce buffer */
-
-        size_t adma_table_sz;   /* ADMA descriptor table size */
-        size_t align_buffer_sz; /* Bounce buffer size */
-
-        dma_addr_t adma_addr;   /* Mapped ADMA descr. table */
-        dma_addr_t align_addr;  /* Mapped bounce buffer */
-
-        unsigned int desc_sz;   /* ADMA descriptor size */
-        unsigned int align_sz;  /* ADMA alignment */
-        unsigned int align_mask;        /* ADMA alignment mask */
-
-        struct tasklet_struct finish_tasklet;   /* Tasklet structures */
-
-        struct timer_list timer;        /* Timer for timeouts */
-
-        u32 caps;               /* Alternative CAPABILITY_0 */
-        u32 caps1;              /* Alternative CAPABILITY_1 */
-
-        unsigned int            ocr_avail_sdio; /* OCR bit masks */
-        unsigned int            ocr_avail_sd;
-        unsigned int            ocr_avail_mmc;
-        u32 ocr_mask;           /* available voltages */
-
-        unsigned                timing;         /* Current timing */
-
-        u32                     thread_isr;
-
-        /* cached registers */
-        u32                     ier;
-
-        wait_queue_head_t       buf_ready_int;  /* Waitqueue for Buffer Read Ready interrupt */
-        unsigned int            tuning_done;    /* Condition flag set when CMD19 succeeds */
-
-        unsigned int            tuning_count;   /* Timer count for re-tuning */
-        unsigned int            tuning_mode;    /* Re-tuning mode supported by host */
-#define SDHCI_TUNING_MODE_1     0
-        struct timer_list       tuning_timer;   /* Timer for tuning */
-
-        struct sdhci_host_next  next_data;
-        unsigned long private[0] ____cacheline_aligned;
-};
-#endif /* LINUX_MMC_SDHCI_H */
diff --git a/include/linux/platform_data/hsmmc-omap.h b/include/linux/platform_data/hsmmc-omap.h
index 67bbcf0785f6..8e981be2e2c2 100644
--- a/include/linux/platform_data/hsmmc-omap.h
+++ b/include/linux/platform_data/hsmmc-omap.h
@@ -55,9 +55,6 @@ struct omap_hsmmc_platform_data {
         u32 caps;       /* Used for the MMC driver on 2430 and later */
         u32 pm_caps;    /* PM capabilities of the mmc */
 
-        /* switch pin can be for card detect (default) or card cover */
-        unsigned cover:1;
-
         /* use the internal clock */
         unsigned internal_clock:1;
 
@@ -73,7 +70,8 @@ struct omap_hsmmc_platform_data {
 #define HSMMC_HAS_HSPE_SUPPORT  (1 << 2)
         unsigned features;
 
-        int switch_pin;                 /* gpio (card detect) */
+        int gpio_cd;                    /* gpio (card detect) */
+        int gpio_cod;                   /* gpio (cover detect) */
         int gpio_wp;                    /* gpio (write protect) */
 
         int (*set_power)(struct device *dev, int power_on, int vdd);