diff options
Diffstat (limited to 'include/linux')
| -rw-r--r-- | include/linux/hil.h | 483 | ||||
| -rw-r--r-- | include/linux/hil_mlc.h | 168 | ||||
| -rw-r--r-- | include/linux/hp_sdc.h | 300 | ||||
| -rw-r--r-- | include/linux/input.h | 1 |
4 files changed, 952 insertions, 0 deletions
diff --git a/include/linux/hil.h b/include/linux/hil.h new file mode 100644 index 000000000000..13352d7d0caf --- /dev/null +++ b/include/linux/hil.h | |||
| @@ -0,0 +1,483 @@ | |||
| 1 | #ifndef _HIL_H_ | ||
| 2 | #define _HIL_H_ | ||
| 3 | |||
| 4 | /* | ||
| 5 | * Hewlett Packard Human Interface Loop (HP-HIL) Protocol -- header. | ||
| 6 | * | ||
| 7 | * Copyright (c) 2001 Brian S. Julin | ||
| 8 | * All rights reserved. | ||
| 9 | * | ||
| 10 | * Redistribution and use in source and binary forms, with or without | ||
| 11 | * modification, are permitted provided that the following conditions | ||
| 12 | * are met: | ||
| 13 | * 1. Redistributions of source code must retain the above copyright | ||
| 14 | * notice, this list of conditions, and the following disclaimer, | ||
| 15 | * without modification. | ||
| 16 | * 2. The name of the author may not be used to endorse or promote products | ||
| 17 | * derived from this software without specific prior written permission. | ||
| 18 | * | ||
| 19 | * Alternatively, this software may be distributed under the terms of the | ||
| 20 | * GNU General Public License ("GPL"). | ||
| 21 | * | ||
| 22 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND | ||
| 23 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | ||
| 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | ||
| 25 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR | ||
| 26 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | ||
| 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | ||
| 28 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | ||
| 29 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | ||
| 30 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | ||
| 31 | * | ||
| 32 | * References: | ||
| 33 | * HP-HIL Technical Reference Manual. Hewlett Packard Product No. 45918A | ||
| 34 | * | ||
| 35 | * A note of thanks to HP for providing and shipping reference materials | ||
| 36 | * free of charge to help in the development of HIL support for Linux. | ||
| 37 | * | ||
| 38 | */ | ||
| 39 | |||
| 40 | #include <asm/types.h> | ||
| 41 | |||
| 42 | /* Physical constants relevant to raw loop/device timing. | ||
| 43 | */ | ||
| 44 | |||
| 45 | #define HIL_CLOCK 8MHZ | ||
| 46 | #define HIL_EK1_CLOCK 30HZ | ||
| 47 | #define HIL_EK2_CLOCK 60HZ | ||
| 48 | |||
| 49 | #define HIL_TIMEOUT_DEV 5 /* ms */ | ||
| 50 | #define HIL_TIMEOUT_DEVS 10 /* ms */ | ||
| 51 | #define HIL_TIMEOUT_NORESP 10 /* ms */ | ||
| 52 | #define HIL_TIMEOUT_DEVS_DATA 16 /* ms */ | ||
| 53 | #define HIL_TIMEOUT_SELFTEST 200 /* ms */ | ||
| 54 | |||
| 55 | |||
| 56 | /* Actual wire line coding. These will only be useful if someone is | ||
| 57 | * implementing a software MLC to run HIL devices on a non-parisc machine. | ||
| 58 | */ | ||
| 59 | |||
| 60 | #define HIL_WIRE_PACKET_LEN 15 | ||
| 61 | enum hil_wire_bitpos { | ||
| 62 | HIL_WIRE_START = 0, | ||
| 63 | HIL_WIRE_ADDR2, | ||
| 64 | HIL_WIRE_ADDR1, | ||
| 65 | HIL_WIRE_ADDR0, | ||
| 66 | HIL_WIRE_COMMAND, | ||
| 67 | HIL_WIRE_DATA7, | ||
| 68 | HIL_WIRE_DATA6, | ||
| 69 | HIL_WIRE_DATA5, | ||
| 70 | HIL_WIRE_DATA4, | ||
| 71 | HIL_WIRE_DATA3, | ||
| 72 | HIL_WIRE_DATA2, | ||
| 73 | HIL_WIRE_DATA1, | ||
| 74 | HIL_WIRE_DATA0, | ||
| 75 | HIL_WIRE_PARITY, | ||
| 76 | HIL_WIRE_STOP | ||
| 77 | }; | ||
| 78 | |||
| 79 | /* HP documentation uses these bit positions to refer to commands; | ||
| 80 | * we will call these "packets". | ||
| 81 | */ | ||
| 82 | enum hil_pkt_bitpos { | ||
| 83 | HIL_PKT_CMD = 0x00000800, | ||
| 84 | HIL_PKT_ADDR2 = 0x00000400, | ||
| 85 | HIL_PKT_ADDR1 = 0x00000200, | ||
| 86 | HIL_PKT_ADDR0 = 0x00000100, | ||
| 87 | HIL_PKT_ADDR_MASK = 0x00000700, | ||
| 88 | HIL_PKT_ADDR_SHIFT = 8, | ||
| 89 | HIL_PKT_DATA7 = 0x00000080, | ||
| 90 | HIL_PKT_DATA6 = 0x00000040, | ||
| 91 | HIL_PKT_DATA5 = 0x00000020, | ||
| 92 | HIL_PKT_DATA4 = 0x00000010, | ||
| 93 | HIL_PKT_DATA3 = 0x00000008, | ||
| 94 | HIL_PKT_DATA2 = 0x00000004, | ||
| 95 | HIL_PKT_DATA1 = 0x00000002, | ||
| 96 | HIL_PKT_DATA0 = 0x00000001, | ||
| 97 | HIL_PKT_DATA_MASK = 0x000000FF, | ||
| 98 | HIL_PKT_DATA_SHIFT = 0 | ||
| 99 | }; | ||
| 100 | |||
| 101 | /* The HIL MLC also has several error/status/control bits. We extend the | ||
| 102 | * "packet" to include these when direct access to the MLC is available, | ||
| 103 | * or emulate them in cases where they are not available. | ||
| 104 | * | ||
| 105 | * This way the device driver knows that the underlying MLC driver | ||
| 106 | * has had to deal with loop errors. | ||
| 107 | */ | ||
| 108 | enum hil_error_bitpos { | ||
| 109 | HIL_ERR_OB = 0x00000800, /* MLC is busy sending an auto-poll, | ||
| 110 | or we have filled up the output | ||
| 111 | buffer and must wait. */ | ||
| 112 | HIL_ERR_INT = 0x00010000, /* A normal interrupt has occurred. */ | ||
| 113 | HIL_ERR_NMI = 0x00020000, /* An NMI has occurred. */ | ||
| 114 | HIL_ERR_LERR = 0x00040000, /* A poll didn't come back. */ | ||
| 115 | HIL_ERR_PERR = 0x01000000, /* There was a Parity Error. */ | ||
| 116 | HIL_ERR_FERR = 0x02000000, /* There was a Framing Error. */ | ||
| 117 | HIL_ERR_FOF = 0x04000000 /* Input FIFO Overflowed. */ | ||
| 118 | }; | ||
| 119 | |||
| 120 | enum hil_control_bitpos { | ||
| 121 | HIL_CTRL_TEST = 0x00010000, | ||
| 122 | HIL_CTRL_IPF = 0x00040000, | ||
| 123 | HIL_CTRL_APE = 0x02000000 | ||
| 124 | }; | ||
| 125 | |||
| 126 | /* Bits 30,31 are unused, we use them to control write behavior. */ | ||
| 127 | #define HIL_DO_ALTER_CTRL 0x40000000 /* Write MSW of packet to control | ||
| 128 | before writing LSW to loop */ | ||
| 129 | #define HIL_CTRL_ONLY 0xc0000000 /* *Only* alter the control registers */ | ||
| 130 | |||
| 131 | /* This gives us a 32-bit "packet" | ||
| 132 | */ | ||
| 133 | typedef u32 hil_packet; | ||
| 134 | |||
| 135 | |||
| 136 | /* HIL Loop commands | ||
| 137 | */ | ||
| 138 | enum hil_command { | ||
| 139 | HIL_CMD_IFC = 0x00, /* Interface Clear */ | ||
| 140 | HIL_CMD_EPT = 0x01, /* Enter Pass-Thru Mode */ | ||
| 141 | HIL_CMD_ELB = 0x02, /* Enter Loop-Back Mode */ | ||
| 142 | HIL_CMD_IDD = 0x03, /* Identify and Describe */ | ||
| 143 | HIL_CMD_DSR = 0x04, /* Device Soft Reset */ | ||
| 144 | HIL_CMD_PST = 0x05, /* Perform Self Test */ | ||
| 145 | HIL_CMD_RRG = 0x06, /* Read Register */ | ||
| 146 | HIL_CMD_WRG = 0x07, /* Write Register */ | ||
| 147 | HIL_CMD_ACF = 0x08, /* Auto Configure */ | ||
| 148 | HIL_CMDID_ACF = 0x07, /* Auto Configure bits with incremented ID */ | ||
| 149 | HIL_CMD_POL = 0x10, /* Poll */ | ||
| 150 | HIL_CMDCT_POL = 0x0f, /* Poll command bits with item count */ | ||
| 151 | HIL_CMD_RPL = 0x20, /* RePoll */ | ||
| 152 | HIL_CMDCT_RPL = 0x0f, /* RePoll command bits with item count */ | ||
| 153 | HIL_CMD_RNM = 0x30, /* Report Name */ | ||
| 154 | HIL_CMD_RST = 0x31, /* Report Status */ | ||
| 155 | HIL_CMD_EXD = 0x32, /* Extended Describe */ | ||
| 156 | HIL_CMD_RSC = 0x33, /* Report Security Code */ | ||
| 157 | |||
| 158 | /* 0x34 to 0x3c reserved for future use */ | ||
| 159 | |||
| 160 | HIL_CMD_DKA = 0x3d, /* Disable Keyswitch Autorepeat */ | ||
| 161 | HIL_CMD_EK1 = 0x3e, /* Enable Keyswitch Autorepeat 1 */ | ||
| 162 | HIL_CMD_EK2 = 0x3f, /* Enable Keyswitch Autorepeat 2 */ | ||
| 163 | HIL_CMD_PR1 = 0x40, /* Prompt1 */ | ||
| 164 | HIL_CMD_PR2 = 0x41, /* Prompt2 */ | ||
| 165 | HIL_CMD_PR3 = 0x42, /* Prompt3 */ | ||
| 166 | HIL_CMD_PR4 = 0x43, /* Prompt4 */ | ||
| 167 | HIL_CMD_PR5 = 0x44, /* Prompt5 */ | ||
| 168 | HIL_CMD_PR6 = 0x45, /* Prompt6 */ | ||
| 169 | HIL_CMD_PR7 = 0x46, /* Prompt7 */ | ||
| 170 | HIL_CMD_PRM = 0x47, /* Prompt (General Purpose) */ | ||
| 171 | HIL_CMD_AK1 = 0x48, /* Acknowlege1 */ | ||
| 172 | HIL_CMD_AK2 = 0x49, /* Acknowlege2 */ | ||
| 173 | HIL_CMD_AK3 = 0x4a, /* Acknowlege3 */ | ||
| 174 | HIL_CMD_AK4 = 0x4b, /* Acknowlege4 */ | ||
| 175 | HIL_CMD_AK5 = 0x4c, /* Acknowlege5 */ | ||
| 176 | HIL_CMD_AK6 = 0x4d, /* Acknowlege6 */ | ||
| 177 | HIL_CMD_AK7 = 0x4e, /* Acknowlege7 */ | ||
| 178 | HIL_CMD_ACK = 0x4f, /* Acknowlege (General Purpose) */ | ||
| 179 | |||
| 180 | /* 0x50 to 0x78 reserved for future use */ | ||
| 181 | /* 0x80 to 0xEF device-specific commands */ | ||
| 182 | /* 0xf0 to 0xf9 reserved for future use */ | ||
| 183 | |||
| 184 | HIL_CMD_RIO = 0xfa, /* Register I/O Error */ | ||
| 185 | HIL_CMD_SHR = 0xfb, /* System Hard Reset */ | ||
| 186 | HIL_CMD_TER = 0xfc, /* Transmission Error */ | ||
| 187 | HIL_CMD_CAE = 0xfd, /* Configuration Address Error */ | ||
| 188 | HIL_CMD_DHR = 0xfe, /* Device Hard Reset */ | ||
| 189 | |||
| 190 | /* 0xff is prohibited from use. */ | ||
| 191 | }; | ||
| 192 | |||
| 193 | |||
| 194 | /* | ||
| 195 | * Response "records" to HIL commands | ||
| 196 | */ | ||
| 197 | |||
| 198 | /* Device ID byte | ||
| 199 | */ | ||
| < | |||
