diff options
Diffstat (limited to 'include/linux')
| -rw-r--r-- | include/linux/mlx4/device.h | 108 |
1 files changed, 103 insertions, 5 deletions
diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h index 7f5c9ee42f96..e45fc20bd01f 100644 --- a/include/linux/mlx4/device.h +++ b/include/linux/mlx4/device.h | |||
| @@ -70,14 +70,17 @@ enum { | |||
| 70 | MLX4_MFUNC_EQE_MASK = (MLX4_MFUNC_MAX_EQES - 1) | 70 | MLX4_MFUNC_EQE_MASK = (MLX4_MFUNC_MAX_EQES - 1) |
| 71 | }; | 71 | }; |
| 72 | 72 | ||
| 73 | /* Driver supports 2 diffrent device methods to manage traffic steering: | 73 | /* Driver supports 3 diffrent device methods to manage traffic steering: |
| 74 | * -device managed - High level API for ib and eth flow steering. FW is | ||
| 75 | * managing flow steering tables. | ||
| 74 | * - B0 steering mode - Common low level API for ib and (if supported) eth. | 76 | * - B0 steering mode - Common low level API for ib and (if supported) eth. |
| 75 | * - A0 steering mode - Limited low level API for eth. In case of IB, | 77 | * - A0 steering mode - Limited low level API for eth. In case of IB, |
| 76 | * B0 mode is in use. | 78 | * B0 mode is in use. |
| 77 | */ | 79 | */ |
| 78 | enum { | 80 | enum { |
| 79 | MLX4_STEERING_MODE_A0, | 81 | MLX4_STEERING_MODE_A0, |
| 80 | MLX4_STEERING_MODE_B0 | 82 | MLX4_STEERING_MODE_B0, |
| 83 | MLX4_STEERING_MODE_DEVICE_MANAGED | ||
| 81 | }; | 84 | }; |
| 82 | 85 | ||
| 83 | static inline const char *mlx4_steering_mode_str(int steering_mode) | 86 | static inline const char *mlx4_steering_mode_str(int steering_mode) |
| @@ -88,6 +91,10 @@ static inline const char *mlx4_steering_mode_str(int steering_mode) | |||
| 88 | 91 | ||
| 89 | case MLX4_STEERING_MODE_B0: | 92 | case MLX4_STEERING_MODE_B0: |
| 90 | return "B0 steering"; | 93 | return "B0 steering"; |
| 94 | |||
| 95 | case MLX4_STEERING_MODE_DEVICE_MANAGED: | ||
| 96 | return "Device managed flow steering"; | ||
| 97 | |||
| 91 | default: | 98 | default: |
| 92 | return "Unrecognize steering mode"; | 99 | return "Unrecognize steering mode"; |
| 93 | } | 100 | } |
| @@ -125,7 +132,8 @@ enum { | |||
| 125 | enum { | 132 | enum { |
| 126 | MLX4_DEV_CAP_FLAG2_RSS = 1LL << 0, | 133 | MLX4_DEV_CAP_FLAG2_RSS = 1LL << 0, |
| 127 | MLX4_DEV_CAP_FLAG2_RSS_TOP = 1LL << 1, | 134 | MLX4_DEV_CAP_FLAG2_RSS_TOP = 1LL << 1, |
| 128 | MLX4_DEV_CAP_FLAG2_RSS_XOR = 1LL << 2 | 135 | MLX4_DEV_CAP_FLAG2_RSS_XOR = 1LL << 2, |
| 136 | MLX4_DEV_CAP_FLAG2_FS_EN = 1LL << 3 | ||
| 129 | }; | 137 | }; |
| 130 | 138 | ||
| 131 | #define MLX4_ATTR_EXTENDED_PORT_INFO cpu_to_be16(0xff90) | 139 | #define MLX4_ATTR_EXTENDED_PORT_INFO cpu_to_be16(0xff90) |
| @@ -319,6 +327,7 @@ struct mlx4_caps { | |||
| 319 | int reserved_mcgs; | 327 | int reserved_mcgs; |
| 320 | int num_qp_per_mgm; | 328 | int num_qp_per_mgm; |
| 321 | int steering_mode; | 329 | int steering_mode; |
| 330 | int fs_log_max_ucast_qp_range_size; | ||
| 322 | int num_pds; | 331 | int num_pds; |
| 323 | int reserved_pds; | 332 | int reserved_pds; |
| 324 | int max_xrcds; | 333 | int max_xrcds; |
| @@ -647,9 +656,94 @@ int mlx4_unicast_attach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], | |||
| 647 | int mlx4_unicast_detach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], | 656 | int mlx4_unicast_detach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], |
| 648 | enum mlx4_protocol prot); | 657 | enum mlx4_protocol prot); |
| 649 | int mlx4_multicast_attach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], | 658 | int mlx4_multicast_attach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], |
| 650 | int block_mcast_loopback, enum mlx4_protocol protocol); | 659 | u8 port, int block_mcast_loopback, |
| 660 | enum mlx4_protocol protocol, u64 *reg_id); | ||
| 651 | int mlx4_multicast_detach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], | 661 | int mlx4_multicast_detach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], |
| 652 | enum mlx4_protocol protocol); | 662 | enum mlx4_protocol protocol, u64 reg_id); |
| 663 | |||
| 664 | enum { | ||
| 665 | MLX4_DOMAIN_UVERBS = 0x1000, | ||
| 666 | MLX4_DOMAIN_ETHTOOL = 0x2000, | ||
| 667 | MLX4_DOMAIN_RFS = 0x3000, | ||
| 668 | MLX4_DOMAIN_NIC = 0x5000, | ||
| 669 | }; | ||
| 670 | |||
| 671 | enum mlx4_net_trans_rule_id { | ||
| 672 | MLX4_NET_TRANS_RULE_ID_ETH = 0, | ||
| 673 | MLX4_NET_TRANS_RULE_ID_IB, | ||
| 674 | MLX4_NET_TRANS_RULE_ID_IPV6, | ||
| 675 | MLX4_NET_TRANS_RULE_ID_IPV4, | ||
| 676 | MLX4_NET_TRANS_RULE_ID_TCP, | ||
| 677 | MLX4_NET_TRANS_RULE_ID_UDP, | ||
| 678 | MLX4_NET_TRANS_RULE_NUM, /* should be last */ | ||
| 679 | }; | ||
| 680 | |||
| 681 | enum mlx4_net_trans_promisc_mode { | ||
| 682 | MLX4_FS_PROMISC_NONE = 0, | ||
| 683 | MLX4_FS_PROMISC_UPLINK, | ||
| 684 | MLX4_FS_PROMISC_FUNCTION_PORT, | ||
| 685 | MLX4_FS_PROMISC_ALL_MULTI, | ||
| 686 | }; | ||
| 687 | |||
| 688 | struct mlx4_spec_eth { | ||
| 689 | u8 dst_mac[6]; | ||
| 690 | u8 dst_mac_msk[6]; | ||
| 691 | u8 src_mac[6]; | ||
| 692 | u8 src_mac_msk[6]; | ||
| 693 | u8 ether_type_enable; | ||
| 694 | __be16 ether_type; | ||
| 695 | __be16 vlan_id_msk; | ||
| 696 | __be16 vlan_id; | ||
| 697 | }; | ||
| 698 | |||
| 699 | struct mlx4_spec_tcp_udp { | ||
| 700 | __be16 dst_port; | ||
| 701 | __be16 dst_port_msk; | ||
| 702 | __be16 src_port; | ||
| 703 | __be16 src_port_msk; | ||
| 704 | }; | ||
| 705 | |||
| 706 | struct mlx4_spec_ipv4 { | ||
| 707 | __be32 dst_ip; | ||
| 708 | __be32 dst_ip_msk; | ||
| 709 | __be32 src_ip; | ||
| 710 | __be32 src_ip_msk; | ||
| 711 | }; | ||
| 712 | |||
| 713 | struct mlx4_spec_ib { | ||
| 714 | __be32 r_qpn; | ||
| 715 | __be32 qpn_msk; | ||
| 716 | u8 dst_gid[16]; | ||
| 717 | u8 dst_gid_msk[16]; | ||
| 718 | }; | ||
| 719 | |||
| 720 | struct mlx4_spec_list { | ||
| 721 | struct list_head list; | ||
| 722 | enum mlx4_net_trans_rule_id id; | ||
| 723 | union { | ||
| 724 | struct mlx4_spec_eth eth; | ||
| 725 | struct mlx4_spec_ib ib; | ||
| 726 | struct mlx4_spec_ipv4 ipv4; | ||
| 727 | struct mlx4_spec_tcp_udp tcp_udp; | ||
| 728 | }; | ||
| 729 | }; | ||
| 730 | |||
| 731 | enum mlx4_net_trans_hw_rule_queue { | ||
| 732 | MLX4_NET_TRANS_Q_FIFO, | ||
| 733 | MLX4_NET_TRANS_Q_LIFO, | ||
| 734 | }; | ||
| 735 | |||
| 736 | struct mlx4_net_trans_rule { | ||
| 737 | struct list_head list; | ||
| 738 | enum mlx4_net_trans_hw_rule_queue queue_mode; | ||
| 739 | bool exclusive; | ||
| 740 | bool allow_loopback; | ||
| 741 | enum mlx4_net_trans_promisc_mode promisc_mode; | ||
| 742 | u8 port; | ||
| 743 | u16 priority; | ||
| 744 | u32 qpn; | ||
| 745 | }; | ||
| 746 | |||
| 653 | int mlx4_multicast_promisc_add(struct mlx4_dev *dev, u32 qpn, u8 port); | 747 | int mlx4_multicast_promisc_add(struct mlx4_dev *dev, u32 qpn, u8 port); |
| 654 | int mlx4_multicast_promisc_remove(struct mlx4_dev *dev, u32 qpn, u8 port); | 748 | int mlx4_multicast_promisc_remove(struct mlx4_dev *dev, u32 qpn, u8 port); |
| 655 | int mlx4_unicast_promisc_add(struct mlx4_dev *dev, u32 qpn, u8 port); | 749 | int mlx4_unicast_promisc_add(struct mlx4_dev *dev, u32 qpn, u8 port); |
| @@ -692,4 +786,8 @@ int mlx4_wol_write(struct mlx4_dev *dev, u64 config, int port); | |||
| 692 | int mlx4_counter_alloc(struct mlx4_dev *dev, u32 *idx); | 786 | int mlx4_counter_alloc(struct mlx4_dev *dev, u32 *idx); |
| 693 | void mlx4_counter_free(struct mlx4_dev *dev, u32 idx); | 787 | void mlx4_counter_free(struct mlx4_dev *dev, u32 idx); |
| 694 | 788 | ||
| 789 | int mlx4_flow_attach(struct mlx4_dev *dev, | ||
| 790 | struct mlx4_net_trans_rule *rule, u64 *reg_id); | ||
| 791 | int mlx4_flow_detach(struct mlx4_dev *dev, u64 reg_id); | ||
| 792 | |||
| 695 | #endif /* MLX4_DEVICE_H */ | 793 | #endif /* MLX4_DEVICE_H */ |
