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-rw-r--r--include/linux/usb/ch9.h58
1 files changed, 58 insertions, 0 deletions
diff --git a/include/linux/usb/ch9.h b/include/linux/usb/ch9.h
index af21f3115919..d1d732c2838d 100644
--- a/include/linux/usb/ch9.h
+++ b/include/linux/usb/ch9.h
@@ -88,6 +88,8 @@
88#define USB_REQ_GET_INTERFACE 0x0A 88#define USB_REQ_GET_INTERFACE 0x0A
89#define USB_REQ_SET_INTERFACE 0x0B 89#define USB_REQ_SET_INTERFACE 0x0B
90#define USB_REQ_SYNCH_FRAME 0x0C 90#define USB_REQ_SYNCH_FRAME 0x0C
91#define USB_REQ_SET_SEL 0x30
92#define USB_REQ_SET_ISOCH_DELAY 0x31
91 93
92#define USB_REQ_SET_ENCRYPTION 0x0D /* Wireless USB */ 94#define USB_REQ_SET_ENCRYPTION 0x0D /* Wireless USB */
93#define USB_REQ_GET_ENCRYPTION 0x0E 95#define USB_REQ_GET_ENCRYPTION 0x0E
@@ -390,6 +392,11 @@ struct usb_endpoint_descriptor {
390#define USB_ENDPOINT_XFER_INT 3 392#define USB_ENDPOINT_XFER_INT 3
391#define USB_ENDPOINT_MAX_ADJUSTABLE 0x80 393#define USB_ENDPOINT_MAX_ADJUSTABLE 0x80
392 394
395/* The USB 3.0 spec redefines bits 5:4 of bmAttributes as interrupt ep type. */
396#define USB_ENDPOINT_INTRTYPE 0x30
397#define USB_ENDPOINT_INTR_PERIODIC (0 << 4)
398#define USB_ENDPOINT_INTR_NOTIFICATION (1 << 4)
399
393#define USB_ENDPOINT_SYNCTYPE 0x0c 400#define USB_ENDPOINT_SYNCTYPE 0x0c
394#define USB_ENDPOINT_SYNC_NONE (0 << 2) 401#define USB_ENDPOINT_SYNC_NONE (0 << 2)
395#define USB_ENDPOINT_SYNC_ASYNC (1 << 2) 402#define USB_ENDPOINT_SYNC_ASYNC (1 << 2)
@@ -592,6 +599,12 @@ static inline int usb_endpoint_maxp(const struct usb_endpoint_descriptor *epd)
592 return __le16_to_cpu(epd->wMaxPacketSize); 599 return __le16_to_cpu(epd->wMaxPacketSize);
593} 600}
594 601
602static inline int usb_endpoint_interrupt_type(
603 const struct usb_endpoint_descriptor *epd)
604{
605 return epd->bmAttributes & USB_ENDPOINT_INTRTYPE;
606}
607
595/*-------------------------------------------------------------------------*/ 608/*-------------------------------------------------------------------------*/
596 609
597/* USB_DT_SS_ENDPOINT_COMP: SuperSpeed Endpoint Companion descriptor */ 610/* USB_DT_SS_ENDPOINT_COMP: SuperSpeed Endpoint Companion descriptor */
@@ -933,6 +946,51 @@ enum usb_device_state {
933 */ 946 */
934}; 947};
935 948
949enum usb3_link_state {
950 USB3_LPM_U0 = 0,
951 USB3_LPM_U1,
952 USB3_LPM_U2,
953 USB3_LPM_U3
954};
955
956/*
957 * A U1 timeout of 0x0 means the parent hub will reject any transitions to U1.
958 * 0xff means the parent hub will accept transitions to U1, but will not
959 * initiate a transition.
960 *
961 * A U1 timeout of 0x1 to 0x7F also causes the hub to initiate a transition to
962 * U1 after that many microseconds. Timeouts of 0x80 to 0xFE are reserved
963 * values.
964 *
965 * A U2 timeout of 0x0 means the parent hub will reject any transitions to U2.
966 * 0xff means the parent hub will accept transitions to U2, but will not
967 * initiate a transition.
968 *
969 * A U2 timeout of 0x1 to 0xFE also causes the hub to initiate a transition to
970 * U2 after N*256 microseconds. Therefore a U2 timeout value of 0x1 means a U2
971 * idle timer of 256 microseconds, 0x2 means 512 microseconds, 0xFE means
972 * 65.024ms.
973 */
974#define USB3_LPM_DISABLED 0x0
975#define USB3_LPM_U1_MAX_TIMEOUT 0x7F
976#define USB3_LPM_U2_MAX_TIMEOUT 0xFE
977#define USB3_LPM_DEVICE_INITIATED 0xFF
978
979struct usb_set_sel_req {
980 __u8 u1_sel;
981 __u8 u1_pel;
982 __le16 u2_sel;
983 __le16 u2_pel;
984} __attribute__ ((packed));
985
986/*
987 * The Set System Exit Latency control transfer provides one byte each for
988 * U1 SEL and U1 PEL, so the max exit latency is 0xFF. U2 SEL and U2 PEL each
989 * are two bytes long.
990 */
991#define USB3_LPM_MAX_U1_SEL_PEL 0xFF
992#define USB3_LPM_MAX_U2_SEL_PEL 0xFFFF
993
936/*-------------------------------------------------------------------------*/ 994/*-------------------------------------------------------------------------*/
937 995
938/* 996/*