diff options
Diffstat (limited to 'include/linux/ssb')
| -rw-r--r-- | include/linux/ssb/ssb.h | 8 | ||||
| -rw-r--r-- | include/linux/ssb/ssb_regs.h | 34 |
2 files changed, 42 insertions, 0 deletions
diff --git a/include/linux/ssb/ssb.h b/include/linux/ssb/ssb.h index dcf35b0f303a..bbc2612cb64a 100644 --- a/include/linux/ssb/ssb.h +++ b/include/linux/ssb/ssb.h | |||
| @@ -16,6 +16,12 @@ struct pcmcia_device; | |||
| 16 | struct ssb_bus; | 16 | struct ssb_bus; |
| 17 | struct ssb_driver; | 17 | struct ssb_driver; |
| 18 | 18 | ||
| 19 | struct ssb_sprom_core_pwr_info { | ||
| 20 | u8 itssi_2g, itssi_5g; | ||
| 21 | u8 maxpwr_2g, maxpwr_5gl, maxpwr_5g, maxpwr_5gh; | ||
| 22 | u16 pa_2g[3], pa_5gl[3], pa_5g[3], pa_5gh[3]; | ||
| 23 | }; | ||
| 24 | |||
| 19 | struct ssb_sprom { | 25 | struct ssb_sprom { |
| 20 | u8 revision; | 26 | u8 revision; |
| 21 | u8 il0mac[6]; /* MAC address for 802.11b/g */ | 27 | u8 il0mac[6]; /* MAC address for 802.11b/g */ |
| @@ -82,6 +88,8 @@ struct ssb_sprom { | |||
| 82 | u16 boardflags2_hi; /* Board flags (bits 48-63) */ | 88 | u16 boardflags2_hi; /* Board flags (bits 48-63) */ |
| 83 | /* TODO store board flags in a single u64 */ | 89 | /* TODO store board flags in a single u64 */ |
| 84 | 90 | ||
| 91 | struct ssb_sprom_core_pwr_info core_pwr_info[4]; | ||
| 92 | |||
| 85 | /* Antenna gain values for up to 4 antennas | 93 | /* Antenna gain values for up to 4 antennas |
| 86 | * on each band. Values in dBm/4 (Q5.2). Negative gain means the | 94 | * on each band. Values in dBm/4 (Q5.2). Negative gain means the |
| 87 | * loss in the connectors is bigger than the gain. */ | 95 | * loss in the connectors is bigger than the gain. */ |
diff --git a/include/linux/ssb/ssb_regs.h b/include/linux/ssb/ssb_regs.h index c814ae6eeb22..40b1ef8595ee 100644 --- a/include/linux/ssb/ssb_regs.h +++ b/include/linux/ssb/ssb_regs.h | |||
| @@ -449,6 +449,39 @@ | |||
| 449 | #define SSB_SPROM8_TS_SLP_OPT_CORRX 0x00B6 | 449 | #define SSB_SPROM8_TS_SLP_OPT_CORRX 0x00B6 |
| 450 | #define SSB_SPROM8_FOC_HWIQ_IQSWP 0x00B8 | 450 | #define SSB_SPROM8_FOC_HWIQ_IQSWP 0x00B8 |
| 451 | #define SSB_SPROM8_PHYCAL_TEMPDELTA 0x00BA | 451 | #define SSB_SPROM8_PHYCAL_TEMPDELTA 0x00BA |
| 452 | |||
| 453 | /* There are 4 blocks with power info sharing the same layout */ | ||
| 454 | #define SSB_SROM8_PWR_INFO_CORE0 0x00C0 | ||
| 455 | #define SSB_SROM8_PWR_INFO_CORE1 0x00E0 | ||
| 456 | #define SSB_SROM8_PWR_INFO_CORE2 0x0100 | ||
| 457 | #define SSB_SROM8_PWR_INFO_CORE3 0x0120 | ||
| 458 | |||
| 459 | #define SSB_SROM8_2G_MAXP_ITSSI 0x00 | ||
| 460 | #define SSB_SPROM8_2G_MAXP 0x00FF | ||
| 461 | #define SSB_SPROM8_2G_ITSSI 0xFF00 | ||
| 462 | #define SSB_SPROM8_2G_ITSSI_SHIFT 8 | ||
| 463 | #define SSB_SROM8_2G_PA_0 0x02 /* 2GHz power amp settings */ | ||
| 464 | #define SSB_SROM8_2G_PA_1 0x04 | ||
| 465 | #define SSB_SROM8_2G_PA_2 0x06 | ||
| 466 | #define SSB_SROM8_5G_MAXP_ITSSI 0x08 /* 5GHz ITSSI and 5.3GHz Max Power */ | ||
| 467 | #define SSB_SPROM8_5G_MAXP 0x00FF | ||
| 468 | #define SSB_SPROM8_5G_ITSSI 0xFF00 | ||
| 469 | #define SSB_SPROM8_5G_ITSSI_SHIFT 8 | ||
| 470 | #define SSB_SPROM8_5GHL_MAXP 0x0A /* 5.2GHz and 5.8GHz Max Power */ | ||
| 471 | #define SSB_SPROM8_5GH_MAXP 0x00FF | ||
| 472 | #define SSB_SPROM8_5GL_MAXP 0xFF00 | ||
| 473 | #define SSB_SPROM8_5GL_MAXP_SHIFT 8 | ||
| 474 | #define SSB_SROM8_5G_PA_0 0x0C /* 5.3GHz power amp settings */ | ||
| 475 | #define SSB_SROM8_5G_PA_1 0x0E | ||
| 476 | #define SSB_SROM8_5G_PA_2 0x10 | ||
| 477 | #define SSB_SROM8_5GL_PA_0 0x12 /* 5.2GHz power amp settings */ | ||
| 478 | #define SSB_SROM8_5GL_PA_1 0x14 | ||
| 479 | #define SSB_SROM8_5GL_PA_2 0x16 | ||
| 480 | #define SSB_SROM8_5GH_PA_0 0x18 /* 5.8GHz power amp settings */ | ||
| 481 | #define SSB_SROM8_5GH_PA_1 0x1A | ||
| 482 | #define SSB_SROM8_5GH_PA_2 0x1C | ||
| 483 | |||
| 484 | /* TODO: Make it deprecated */ | ||
| 452 | #define SSB_SPROM8_MAXP_BG 0x00C0 /* Max Power 2GHz in path 1 */ | 485 | #define SSB_SPROM8_MAXP_BG 0x00C0 /* Max Power 2GHz in path 1 */ |
| 453 | #define SSB_SPROM8_MAXP_BG_MASK 0x00FF /* Mask for Max Power 2GHz */ | 486 | #define SSB_SPROM8_MAXP_BG_MASK 0x00FF /* Mask for Max Power 2GHz */ |
| 454 | #define SSB_SPROM8_ITSSI_BG 0xFF00 /* Mask for path 1 itssi_bg */ | 487 | #define SSB_SPROM8_ITSSI_BG 0xFF00 /* Mask for path 1 itssi_bg */ |
| @@ -473,6 +506,7 @@ | |||
| 473 | #define SSB_SPROM8_PA1HIB0 0x00D8 /* 5.8GHz power amp settings */ | 506 | #define SSB_SPROM8_PA1HIB0 0x00D8 /* 5.8GHz power amp settings */ |
| 474 | #define SSB_SPROM8_PA1HIB1 0x00DA | 507 | #define SSB_SPROM8_PA1HIB1 0x00DA |
| 475 | #define SSB_SPROM8_PA1HIB2 0x00DC | 508 | #define SSB_SPROM8_PA1HIB2 0x00DC |
| 509 | |||
| 476 | #define SSB_SPROM8_CCK2GPO 0x0140 /* CCK power offset */ | 510 | #define SSB_SPROM8_CCK2GPO 0x0140 /* CCK power offset */ |
| 477 | #define SSB_SPROM8_OFDM2GPO 0x0142 /* 2.4GHz OFDM power offset */ | 511 | #define SSB_SPROM8_OFDM2GPO 0x0142 /* 2.4GHz OFDM power offset */ |
| 478 | #define SSB_SPROM8_OFDM5GPO 0x0146 /* 5.3GHz OFDM power offset */ | 512 | #define SSB_SPROM8_OFDM5GPO 0x0146 /* 5.3GHz OFDM power offset */ |
