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Diffstat (limited to 'include/linux/ssb/ssb_regs.h')
-rw-r--r--include/linux/ssb/ssb_regs.h19
1 files changed, 15 insertions, 4 deletions
diff --git a/include/linux/ssb/ssb_regs.h b/include/linux/ssb/ssb_regs.h
index ebad0bac9801..99a0f991e850 100644
--- a/include/linux/ssb/ssb_regs.h
+++ b/include/linux/ssb/ssb_regs.h
@@ -245,8 +245,6 @@
245 245
246/* SPROM Revision 3 (inherits most data from rev 2) */ 246/* SPROM Revision 3 (inherits most data from rev 2) */
247#define SSB_SPROM3_IL0MAC 0x104A /* 6 bytes MAC address for 802.11b/g */ 247#define SSB_SPROM3_IL0MAC 0x104A /* 6 bytes MAC address for 802.11b/g */
248#define SSB_SPROM3_ET0MAC 0x1050 /* 6 bytes MAC address for Ethernet ?? */
249#define SSB_SPROM3_ET1MAC 0x1050 /* 6 bytes MAC address for 802.11a ?? */
250#define SSB_SPROM3_OFDMAPO 0x102C /* A-PHY OFDM Mid Power Offset (4 bytes, BigEndian) */ 248#define SSB_SPROM3_OFDMAPO 0x102C /* A-PHY OFDM Mid Power Offset (4 bytes, BigEndian) */
251#define SSB_SPROM3_OFDMALPO 0x1030 /* A-PHY OFDM Low Power Offset (4 bytes, BigEndian) */ 249#define SSB_SPROM3_OFDMALPO 0x1030 /* A-PHY OFDM Low Power Offset (4 bytes, BigEndian) */
252#define SSB_SPROM3_OFDMAHPO 0x1034 /* A-PHY OFDM High Power Offset (4 bytes, BigEndian) */ 250#define SSB_SPROM3_OFDMAHPO 0x1034 /* A-PHY OFDM High Power Offset (4 bytes, BigEndian) */
@@ -267,8 +265,6 @@
267 265
268/* SPROM Revision 4 */ 266/* SPROM Revision 4 */
269#define SSB_SPROM4_IL0MAC 0x104C /* 6 byte MAC address for a/b/g/n */ 267#define SSB_SPROM4_IL0MAC 0x104C /* 6 byte MAC address for a/b/g/n */
270#define SSB_SPROM4_ET0MAC 0x1018 /* 6 bytes MAC address for Ethernet ?? */
271#define SSB_SPROM4_ET1MAC 0x1018 /* 6 bytes MAC address for 802.11a ?? */
272#define SSB_SPROM4_ETHPHY 0x105A /* Ethernet PHY settings ?? */ 268#define SSB_SPROM4_ETHPHY 0x105A /* Ethernet PHY settings ?? */
273#define SSB_SPROM4_ETHPHY_ET0A 0x001F /* MII Address for enet0 */ 269#define SSB_SPROM4_ETHPHY_ET0A 0x001F /* MII Address for enet0 */
274#define SSB_SPROM4_ETHPHY_ET1A 0x03E0 /* MII Address for enet1 */ 270#define SSB_SPROM4_ETHPHY_ET1A 0x03E0 /* MII Address for enet1 */
@@ -316,6 +312,21 @@
316#define SSB_SPROM4_PA1B1 0x1090 312#define SSB_SPROM4_PA1B1 0x1090
317#define SSB_SPROM4_PA1B2 0x1092 313#define SSB_SPROM4_PA1B2 0x1092
318 314
315/* SPROM Revision 5 (inherits most data from rev 4) */
316#define SSB_SPROM5_BFLLO 0x104A /* Boardflags (low 16 bits) */
317#define SSB_SPROM5_BFLHI 0x104C /* Board Flags Hi */
318#define SSB_SPROM5_IL0MAC 0x1052 /* 6 byte MAC address for a/b/g/n */
319#define SSB_SPROM5_CCODE 0x1044 /* Country Code (2 bytes) */
320#define SSB_SPROM5_GPIOA 0x1076 /* Gen. Purpose IO # 0 and 1 */
321#define SSB_SPROM5_GPIOA_P0 0x00FF /* Pin 0 */
322#define SSB_SPROM5_GPIOA_P1 0xFF00 /* Pin 1 */
323#define SSB_SPROM5_GPIOA_P1_SHIFT 8
324#define SSB_SPROM5_GPIOB 0x1078 /* Gen. Purpose IO # 2 and 3 */
325#define SSB_SPROM5_GPIOB_P2 0x00FF /* Pin 2 */
326#define SSB_SPROM5_GPIOB_P3 0xFF00 /* Pin 3 */
327#define SSB_SPROM5_GPIOB_P3_SHIFT 8
328
329
319/* Values for SSB_SPROM1_BINF_CCODE */ 330/* Values for SSB_SPROM1_BINF_CCODE */
320enum { 331enum {
321 SSB_SPROM1CCODE_WORLD = 0, 332 SSB_SPROM1CCODE_WORLD = 0,