diff options
Diffstat (limited to 'include/linux/ssb/ssb_driver_chipcommon.h')
| -rw-r--r-- | include/linux/ssb/ssb_driver_chipcommon.h | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/include/linux/ssb/ssb_driver_chipcommon.h b/include/linux/ssb/ssb_driver_chipcommon.h index 2cdf249b4e5f..a08d693d8324 100644 --- a/include/linux/ssb/ssb_driver_chipcommon.h +++ b/include/linux/ssb/ssb_driver_chipcommon.h | |||
| @@ -123,6 +123,8 @@ | |||
| 123 | #define SSB_CHIPCO_FLASHDATA 0x0048 | 123 | #define SSB_CHIPCO_FLASHDATA 0x0048 |
| 124 | #define SSB_CHIPCO_BCAST_ADDR 0x0050 | 124 | #define SSB_CHIPCO_BCAST_ADDR 0x0050 |
| 125 | #define SSB_CHIPCO_BCAST_DATA 0x0054 | 125 | #define SSB_CHIPCO_BCAST_DATA 0x0054 |
| 126 | #define SSB_CHIPCO_GPIOPULLUP 0x0058 /* Rev >= 20 only */ | ||
| 127 | #define SSB_CHIPCO_GPIOPULLDOWN 0x005C /* Rev >= 20 only */ | ||
| 126 | #define SSB_CHIPCO_GPIOIN 0x0060 | 128 | #define SSB_CHIPCO_GPIOIN 0x0060 |
| 127 | #define SSB_CHIPCO_GPIOOUT 0x0064 | 129 | #define SSB_CHIPCO_GPIOOUT 0x0064 |
| 128 | #define SSB_CHIPCO_GPIOOUTEN 0x0068 | 130 | #define SSB_CHIPCO_GPIOOUTEN 0x0068 |
| @@ -131,6 +133,9 @@ | |||
| 131 | #define SSB_CHIPCO_GPIOIRQ 0x0074 | 133 | #define SSB_CHIPCO_GPIOIRQ 0x0074 |
| 132 | #define SSB_CHIPCO_WATCHDOG 0x0080 | 134 | #define SSB_CHIPCO_WATCHDOG 0x0080 |
| 133 | #define SSB_CHIPCO_GPIOTIMER 0x0088 /* LED powersave (corerev >= 16) */ | 135 | #define SSB_CHIPCO_GPIOTIMER 0x0088 /* LED powersave (corerev >= 16) */ |
| 136 | #define SSB_CHIPCO_GPIOTIMER_OFFTIME 0x0000FFFF | ||
| 137 | #define SSB_CHIPCO_GPIOTIMER_OFFTIME_SHIFT 0 | ||
| 138 | #define SSB_CHIPCO_GPIOTIMER_ONTIME 0xFFFF0000 | ||
| 134 | #define SSB_CHIPCO_GPIOTIMER_ONTIME_SHIFT 16 | 139 | #define SSB_CHIPCO_GPIOTIMER_ONTIME_SHIFT 16 |
| 135 | #define SSB_CHIPCO_GPIOTOUTM 0x008C /* LED powersave (corerev >= 16) */ | 140 | #define SSB_CHIPCO_GPIOTOUTM 0x008C /* LED powersave (corerev >= 16) */ |
| 136 | #define SSB_CHIPCO_CLOCK_N 0x0090 | 141 | #define SSB_CHIPCO_CLOCK_N 0x0090 |
| @@ -189,8 +194,10 @@ | |||
| 189 | #define SSB_CHIPCO_CLKCTLST_HAVEALPREQ 0x00000008 /* ALP available request */ | 194 | #define SSB_CHIPCO_CLKCTLST_HAVEALPREQ 0x00000008 /* ALP available request */ |
| 190 | #define SSB_CHIPCO_CLKCTLST_HAVEHTREQ 0x00000010 /* HT available request */ | 195 | #define SSB_CHIPCO_CLKCTLST_HAVEHTREQ 0x00000010 /* HT available request */ |
| 191 | #define SSB_CHIPCO_CLKCTLST_HWCROFF 0x00000020 /* Force HW clock request off */ | 196 | #define SSB_CHIPCO_CLKCTLST_HWCROFF 0x00000020 /* Force HW clock request off */ |
| 192 | #define SSB_CHIPCO_CLKCTLST_HAVEHT 0x00010000 /* HT available */ | 197 | #define SSB_CHIPCO_CLKCTLST_HAVEALP 0x00010000 /* ALP available */ |
| 193 | #define SSB_CHIPCO_CLKCTLST_HAVEALP 0x00020000 /* APL available */ | 198 | #define SSB_CHIPCO_CLKCTLST_HAVEHT 0x00020000 /* HT available */ |
| 199 | #define SSB_CHIPCO_CLKCTLST_4328A0_HAVEHT 0x00010000 /* 4328a0 has reversed bits */ | ||
| 200 | #define SSB_CHIPCO_CLKCTLST_4328A0_HAVEALP 0x00020000 /* 4328a0 has reversed bits */ | ||
| 194 | #define SSB_CHIPCO_HW_WORKAROUND 0x01E4 /* Hardware workaround (rev >= 20) */ | 201 | #define SSB_CHIPCO_HW_WORKAROUND 0x01E4 /* Hardware workaround (rev >= 20) */ |
| 195 | #define SSB_CHIPCO_UART0_DATA 0x0300 | 202 | #define SSB_CHIPCO_UART0_DATA 0x0300 |
| 196 | #define SSB_CHIPCO_UART0_IMR 0x0304 | 203 | #define SSB_CHIPCO_UART0_IMR 0x0304 |