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Diffstat (limited to 'include/linux/sh_clk.h')
-rw-r--r--include/linux/sh_clk.h38
1 files changed, 7 insertions, 31 deletions
diff --git a/include/linux/sh_clk.h b/include/linux/sh_clk.h
index 4dca992f3093..9a52f72527dc 100644
--- a/include/linux/sh_clk.h
+++ b/include/linux/sh_clk.h
@@ -19,11 +19,13 @@ struct clk_mapping {
19}; 19};
20 20
21struct clk_ops { 21struct clk_ops {
22#ifdef CONFIG_SH_CLK_CPG_LEGACY
22 void (*init)(struct clk *clk); 23 void (*init)(struct clk *clk);
24#endif
23 int (*enable)(struct clk *clk); 25 int (*enable)(struct clk *clk);
24 void (*disable)(struct clk *clk); 26 void (*disable)(struct clk *clk);
25 unsigned long (*recalc)(struct clk *clk); 27 unsigned long (*recalc)(struct clk *clk);
26 int (*set_rate)(struct clk *clk, unsigned long rate, int algo_id); 28 int (*set_rate)(struct clk *clk, unsigned long rate);
27 int (*set_parent)(struct clk *clk, struct clk *parent); 29 int (*set_parent)(struct clk *clk, struct clk *parent);
28 long (*round_rate)(struct clk *clk, unsigned long rate); 30 long (*round_rate)(struct clk *clk, unsigned long rate);
29}; 31};
@@ -67,36 +69,6 @@ int clk_register(struct clk *);
67void clk_unregister(struct clk *); 69void clk_unregister(struct clk *);
68void clk_enable_init_clocks(void); 70void clk_enable_init_clocks(void);
69 71
70/**
71 * clk_set_rate_ex - set the clock rate for a clock source, with additional parameter
72 * @clk: clock source
73 * @rate: desired clock rate in Hz
74 * @algo_id: algorithm id to be passed down to ops->set_rate
75 *
76 * Returns success (0) or negative errno.
77 */
78int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id);
79
80enum clk_sh_algo_id {
81 NO_CHANGE = 0,
82
83 IUS_N1_N1,
84 IUS_322,
85 IUS_522,
86 IUS_N11,
87
88 SB_N1,
89
90 SB3_N1,
91 SB3_32,
92 SB3_43,
93 SB3_54,
94
95 BP_N1,
96
97 IP_N1,
98};
99
100struct clk_div_mult_table { 72struct clk_div_mult_table {
101 unsigned int *divisors; 73 unsigned int *divisors;
102 unsigned int nr_divisors; 74 unsigned int nr_divisors;
@@ -122,6 +94,10 @@ int clk_rate_table_find(struct clk *clk,
122long clk_rate_div_range_round(struct clk *clk, unsigned int div_min, 94long clk_rate_div_range_round(struct clk *clk, unsigned int div_min,
123 unsigned int div_max, unsigned long rate); 95 unsigned int div_max, unsigned long rate);
124 96
97long clk_round_parent(struct clk *clk, unsigned long target,
98 unsigned long *best_freq, unsigned long *parent_freq,
99 unsigned int div_min, unsigned int div_max);
100
125#define SH_CLK_MSTP32(_parent, _enable_reg, _enable_bit, _flags) \ 101#define SH_CLK_MSTP32(_parent, _enable_reg, _enable_bit, _flags) \
126{ \ 102{ \
127 .parent = _parent, \ 103 .parent = _parent, \