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-rw-r--r--include/linux/serial_reg.h16
1 files changed, 16 insertions, 0 deletions
diff --git a/include/linux/serial_reg.h b/include/linux/serial_reg.h
index cf9327c051ad..c7a0ce11cd47 100644
--- a/include/linux/serial_reg.h
+++ b/include/linux/serial_reg.h
@@ -221,8 +221,24 @@
221#define UART_FCR_PXAR16 0x80 /* receive FIFO threshold = 16 */ 221#define UART_FCR_PXAR16 0x80 /* receive FIFO threshold = 16 */
222#define UART_FCR_PXAR32 0xc0 /* receive FIFO threshold = 32 */ 222#define UART_FCR_PXAR32 0xc0 /* receive FIFO threshold = 32 */
223 223
224/*
225 * Intel MID on-chip HSU (High Speed UART) defined bits
226 */
227#define UART_FCR_HSU_64_1B 0x00 /* receive FIFO treshold = 1 */
228#define UART_FCR_HSU_64_16B 0x40 /* receive FIFO treshold = 16 */
229#define UART_FCR_HSU_64_32B 0x80 /* receive FIFO treshold = 32 */
230#define UART_FCR_HSU_64_56B 0xc0 /* receive FIFO treshold = 56 */
231
232#define UART_FCR_HSU_16_1B 0x00 /* receive FIFO treshold = 1 */
233#define UART_FCR_HSU_16_4B 0x40 /* receive FIFO treshold = 4 */
234#define UART_FCR_HSU_16_8B 0x80 /* receive FIFO treshold = 8 */
235#define UART_FCR_HSU_16_14B 0xc0 /* receive FIFO treshold = 14 */
224 236
237#define UART_FCR_HSU_64B_FIFO 0x20 /* chose 64 bytes FIFO */
238#define UART_FCR_HSU_16B_FIFO 0x00 /* chose 16 bytes FIFO */
225 239
240#define UART_FCR_HALF_EMPT_TXI 0x00 /* trigger TX_EMPT IRQ for half empty */
241#define UART_FCR_FULL_EMPT_TXI 0x08 /* trigger TX_EMPT IRQ for full empty */
226 242
227/* 243/*
228 * These register definitions are for the 16C950 244 * These register definitions are for the 16C950