diff options
Diffstat (limited to 'include/linux/rio_regs.h')
| -rw-r--r-- | include/linux/rio_regs.h | 22 |
1 files changed, 16 insertions, 6 deletions
diff --git a/include/linux/rio_regs.h b/include/linux/rio_regs.h index aedee0489fb4..9026b30238f3 100644 --- a/include/linux/rio_regs.h +++ b/include/linux/rio_regs.h | |||
| @@ -14,10 +14,12 @@ | |||
| 14 | #define LINUX_RIO_REGS_H | 14 | #define LINUX_RIO_REGS_H |
| 15 | 15 | ||
| 16 | /* | 16 | /* |
| 17 | * In RapidIO, each device has a 2MB configuration space that is | 17 | * In RapidIO, each device has a 16MB configuration space that is |
| 18 | * accessed via maintenance transactions. Portions of configuration | 18 | * accessed via maintenance transactions. Portions of configuration |
| 19 | * space are standardized and/or reserved. | 19 | * space are standardized and/or reserved. |
| 20 | */ | 20 | */ |
| 21 | #define RIO_MAINT_SPACE_SZ 0x1000000 /* 16MB of RapidIO mainenance space */ | ||
| 22 | |||
| 21 | #define RIO_DEV_ID_CAR 0x00 /* [I] Device Identity CAR */ | 23 | #define RIO_DEV_ID_CAR 0x00 /* [I] Device Identity CAR */ |
| 22 | #define RIO_DEV_INFO_CAR 0x04 /* [I] Device Information CAR */ | 24 | #define RIO_DEV_INFO_CAR 0x04 /* [I] Device Information CAR */ |
| 23 | #define RIO_ASM_ID_CAR 0x08 /* [I] Assembly Identity CAR */ | 25 | #define RIO_ASM_ID_CAR 0x08 /* [I] Assembly Identity CAR */ |
| @@ -33,6 +35,7 @@ | |||
| 33 | #define RIO_PEF_MEMORY 0x40000000 /* [I] MMIO */ | 35 | #define RIO_PEF_MEMORY 0x40000000 /* [I] MMIO */ |
| 34 | #define RIO_PEF_PROCESSOR 0x20000000 /* [I] Processor */ | 36 | #define RIO_PEF_PROCESSOR 0x20000000 /* [I] Processor */ |
| 35 | #define RIO_PEF_SWITCH 0x10000000 /* [I] Switch */ | 37 | #define RIO_PEF_SWITCH 0x10000000 /* [I] Switch */ |
| 38 | #define RIO_PEF_MULTIPORT 0x08000000 /* [VI, 2.1] Multiport */ | ||
| 36 | #define RIO_PEF_INB_MBOX 0x00f00000 /* [II] Mailboxes */ | 39 | #define RIO_PEF_INB_MBOX 0x00f00000 /* [II] Mailboxes */ |
| 37 | #define RIO_PEF_INB_MBOX0 0x00800000 /* [II] Mailbox 0 */ | 40 | #define RIO_PEF_INB_MBOX0 0x00800000 /* [II] Mailbox 0 */ |
| 38 | #define RIO_PEF_INB_MBOX1 0x00400000 /* [II] Mailbox 1 */ | 41 | #define RIO_PEF_INB_MBOX1 0x00400000 /* [II] Mailbox 1 */ |
| @@ -51,6 +54,7 @@ | |||
| 51 | #define RIO_SWP_INFO_PORT_TOTAL_MASK 0x0000ff00 /* [I] Total number of ports */ | 54 | #define RIO_SWP_INFO_PORT_TOTAL_MASK 0x0000ff00 /* [I] Total number of ports */ |
| 52 | #define RIO_SWP_INFO_PORT_NUM_MASK 0x000000ff /* [I] Maintenance transaction port number */ | 55 | #define RIO_SWP_INFO_PORT_NUM_MASK 0x000000ff /* [I] Maintenance transaction port number */ |
| 53 | #define RIO_GET_TOTAL_PORTS(x) ((x & RIO_SWP_INFO_PORT_TOTAL_MASK) >> 8) | 56 | #define RIO_GET_TOTAL_PORTS(x) ((x & RIO_SWP_INFO_PORT_TOTAL_MASK) >> 8) |
| 57 | #define RIO_GET_PORT_NUM(x) (x & RIO_SWP_INFO_PORT_NUM_MASK) | ||
| 54 | 58 | ||
| 55 | #define RIO_SRC_OPS_CAR 0x18 /* [I] Source Operations CAR */ | 59 | #define RIO_SRC_OPS_CAR 0x18 /* [I] Source Operations CAR */ |
| 56 | #define RIO_SRC_OPS_READ 0x00008000 /* [I] Read op */ | 60 | #define RIO_SRC_OPS_READ 0x00008000 /* [I] Read op */ |
| @@ -159,6 +163,7 @@ | |||
| 159 | #define RIO_COMPONENT_TAG_CSR 0x6c /* [III] Component Tag CSR */ | 163 | #define RIO_COMPONENT_TAG_CSR 0x6c /* [III] Component Tag CSR */ |
| 160 | 164 | ||
| 161 | #define RIO_STD_RTE_CONF_DESTID_SEL_CSR 0x70 | 165 | #define RIO_STD_RTE_CONF_DESTID_SEL_CSR 0x70 |
| 166 | #define RIO_STD_RTE_CONF_EXTCFGEN 0x80000000 | ||
| 162 | #define RIO_STD_RTE_CONF_PORT_SEL_CSR 0x74 | 167 | #define RIO_STD_RTE_CONF_PORT_SEL_CSR 0x74 |
| 163 | #define RIO_STD_RTE_DEFAULT_PORT 0x78 | 168 | #define RIO_STD_RTE_DEFAULT_PORT 0x78 |
| 164 | 169 | ||
| @@ -222,15 +227,17 @@ | |||
| 222 | #define RIO_PORT_GEN_MASTER 0x40000000 | 227 | #define RIO_PORT_GEN_MASTER 0x40000000 |
| 223 | #define RIO_PORT_GEN_DISCOVERED 0x20000000 | 228 | #define RIO_PORT_GEN_DISCOVERED 0x20000000 |
| 224 | #define RIO_PORT_N_MNT_REQ_CSR(x) (0x0040 + x*0x20) /* 0x0002 */ | 229 | #define RIO_PORT_N_MNT_REQ_CSR(x) (0x0040 + x*0x20) /* 0x0002 */ |
| 230 | #define RIO_MNT_REQ_CMD_RD 0x03 /* Reset-device command */ | ||
| 231 | #define RIO_MNT_REQ_CMD_IS 0x04 /* Input-status command */ | ||
| 225 | #define RIO_PORT_N_MNT_RSP_CSR(x) (0x0044 + x*0x20) /* 0x0002 */ | 232 | #define RIO_PORT_N_MNT_RSP_CSR(x) (0x0044 + x*0x20) /* 0x0002 */ |
| 226 | #define RIO_PORT_N_MNT_RSP_RVAL 0x80000000 /* Response Valid */ | 233 | #define RIO_PORT_N_MNT_RSP_RVAL 0x80000000 /* Response Valid */ |
| 227 | #define RIO_PORT_N_MNT_RSP_ASTAT 0x000003e0 /* ackID Status */ | 234 | #define RIO_PORT_N_MNT_RSP_ASTAT 0x000007e0 /* ackID Status */ |
| 228 | #define RIO_PORT_N_MNT_RSP_LSTAT 0x0000001f /* Link Status */ | 235 | #define RIO_PORT_N_MNT_RSP_LSTAT 0x0000001f /* Link Status */ |
| 229 | #define RIO_PORT_N_ACK_STS_CSR(x) (0x0048 + x*0x20) /* 0x0002 */ | 236 | #define RIO_PORT_N_ACK_STS_CSR(x) (0x0048 + x*0x20) /* 0x0002 */ |
| 230 | #define RIO_PORT_N_ACK_CLEAR 0x80000000 | 237 | #define RIO_PORT_N_ACK_CLEAR 0x80000000 |
| 231 | #define RIO_PORT_N_ACK_INBOUND 0x1f000000 | 238 | #define RIO_PORT_N_ACK_INBOUND 0x3f000000 |
| 232 | #define RIO_PORT_N_ACK_OUTSTAND 0x00001f00 | 239 | #define RIO_PORT_N_ACK_OUTSTAND 0x00003f00 |
| 233 | #define RIO_PORT_N_ACK_OUTBOUND 0x0000001f | 240 | #define RIO_PORT_N_ACK_OUTBOUND 0x0000003f |
| 234 | #define RIO_PORT_N_ERR_STS_CSR(x) (0x0058 + x*0x20) | 241 | #define RIO_PORT_N_ERR_STS_CSR(x) (0x0058 + x*0x20) |
| 235 | #define RIO_PORT_N_ERR_STS_PW_OUT_ES 0x00010000 /* Output Error-stopped */ | 242 | #define RIO_PORT_N_ERR_STS_PW_OUT_ES 0x00010000 /* Output Error-stopped */ |
| 236 | #define RIO_PORT_N_ERR_STS_PW_INP_ES 0x00000100 /* Input Error-stopped */ | 243 | #define RIO_PORT_N_ERR_STS_PW_INP_ES 0x00000100 /* Input Error-stopped */ |
| @@ -238,7 +245,6 @@ | |||
| 238 | #define RIO_PORT_N_ERR_STS_PORT_ERR 0x00000004 | 245 | #define RIO_PORT_N_ERR_STS_PORT_ERR 0x00000004 |
| 239 | #define RIO_PORT_N_ERR_STS_PORT_OK 0x00000002 | 246 | #define RIO_PORT_N_ERR_STS_PORT_OK 0x00000002 |
| 240 | #define RIO_PORT_N_ERR_STS_PORT_UNINIT 0x00000001 | 247 | #define RIO_PORT_N_ERR_STS_PORT_UNINIT 0x00000001 |
| 241 | #define RIO_PORT_N_ERR_STS_CLR_MASK 0x07120204 | ||
| 242 | #define RIO_PORT_N_CTL_CSR(x) (0x005c + x*0x20) | 248 | #define RIO_PORT_N_CTL_CSR(x) (0x005c + x*0x20) |
| 243 | #define RIO_PORT_N_CTL_PWIDTH 0xc0000000 | 249 | #define RIO_PORT_N_CTL_PWIDTH 0xc0000000 |
| 244 | #define RIO_PORT_N_CTL_PWIDTH_1 0x00000000 | 250 | #define RIO_PORT_N_CTL_PWIDTH_1 0x00000000 |
| @@ -261,6 +267,10 @@ | |||
| 261 | #define RIO_EM_EFB_HEADER 0x000 /* Error Management Extensions Block Header */ | 267 | #define RIO_EM_EFB_HEADER 0x000 /* Error Management Extensions Block Header */ |
| 262 | #define RIO_EM_LTL_ERR_DETECT 0x008 /* Logical/Transport Layer Error Detect CSR */ | 268 | #define RIO_EM_LTL_ERR_DETECT 0x008 /* Logical/Transport Layer Error Detect CSR */ |
| 263 | #define RIO_EM_LTL_ERR_EN 0x00c /* Logical/Transport Layer Error Enable CSR */ | 269 | #define RIO_EM_LTL_ERR_EN 0x00c /* Logical/Transport Layer Error Enable CSR */ |
| 270 | #define REM_LTL_ERR_ILLTRAN 0x08000000 /* Illegal Transaction decode */ | ||
| 271 | #define REM_LTL_ERR_UNSOLR 0x00800000 /* Unsolicited Response */ | ||
| 272 | #define REM_LTL_ERR_UNSUPTR 0x00400000 /* Unsupported Transaction */ | ||
| 273 | #define REM_LTL_ERR_IMPSPEC 0x000000ff /* Implementation Specific */ | ||
| 264 | #define RIO_EM_LTL_HIADDR_CAP 0x010 /* Logical/Transport Layer High Address Capture CSR */ | 274 | #define RIO_EM_LTL_HIADDR_CAP 0x010 /* Logical/Transport Layer High Address Capture CSR */ |
| 265 | #define RIO_EM_LTL_ADDR_CAP 0x014 /* Logical/Transport Layer Address Capture CSR */ | 275 | #define RIO_EM_LTL_ADDR_CAP 0x014 /* Logical/Transport Layer Address Capture CSR */ |
| 266 | #define RIO_EM_LTL_DEVID_CAP 0x018 /* Logical/Transport Layer Device ID Capture CSR */ | 276 | #define RIO_EM_LTL_DEVID_CAP 0x018 /* Logical/Transport Layer Device ID Capture CSR */ |