diff options
Diffstat (limited to 'include/linux/preempt_mask.h')
| -rw-r--r-- | include/linux/preempt_mask.h | 41 |
1 files changed, 11 insertions, 30 deletions
diff --git a/include/linux/preempt_mask.h b/include/linux/preempt_mask.h index 931bc616219f..d169820203dd 100644 --- a/include/linux/preempt_mask.h +++ b/include/linux/preempt_mask.h | |||
| @@ -11,36 +11,23 @@ | |||
| 11 | * - bits 0-7 are the preemption count (max preemption depth: 256) | 11 | * - bits 0-7 are the preemption count (max preemption depth: 256) |
| 12 | * - bits 8-15 are the softirq count (max # of softirqs: 256) | 12 | * - bits 8-15 are the softirq count (max # of softirqs: 256) |
| 13 | * | 13 | * |
| 14 | * The hardirq count can in theory reach the same as NR_IRQS. | 14 | * The hardirq count could in theory be the same as the number of |
| 15 | * In reality, the number of nested IRQS is limited to the stack | 15 | * interrupts in the system, but we run all interrupt handlers with |
| 16 | * size as well. For archs with over 1000 IRQS it is not practical | 16 | * interrupts disabled, so we cannot have nesting interrupts. Though |
| 17 | * to expect that they will all nest. We give a max of 10 bits for | 17 | * there are a few palaeontologic drivers which reenable interrupts in |
| 18 | * hardirq nesting. An arch may choose to give less than 10 bits. | 18 | * the handler, so we need more than one bit here. |
| 19 | * m68k expects it to be 8. | ||
| 20 | * | 19 | * |
| 21 | * - bits 16-25 are the hardirq count (max # of nested hardirqs: 1024) | 20 | * PREEMPT_MASK: 0x000000ff |
| 22 | * - bit 26 is the NMI_MASK | 21 | * SOFTIRQ_MASK: 0x0000ff00 |
| 23 | * - bit 27 is the PREEMPT_ACTIVE flag | 22 | * HARDIRQ_MASK: 0x000f0000 |
| 24 | * | 23 | * NMI_MASK: 0x00100000 |
| 25 | * PREEMPT_MASK: 0x000000ff | 24 | * PREEMPT_ACTIVE: 0x00200000 |
| 26 | * SOFTIRQ_MASK: 0x0000ff00 | ||
| 27 | * HARDIRQ_MASK: 0x03ff0000 | ||
| 28 | * NMI_MASK: 0x04000000 | ||
| 29 | */ | 25 | */ |
| 30 | #define PREEMPT_BITS 8 | 26 | #define PREEMPT_BITS 8 |
| 31 | #define SOFTIRQ_BITS 8 | 27 | #define SOFTIRQ_BITS 8 |
| 28 | #define HARDIRQ_BITS 4 | ||
| 32 | #define NMI_BITS 1 | 29 | #define NMI_BITS 1 |
| 33 | 30 | ||
| 34 | #define MAX_HARDIRQ_BITS 10 | ||
| 35 | |||
| 36 | #ifndef HARDIRQ_BITS | ||
| 37 | # define HARDIRQ_BITS MAX_HARDIRQ_BITS | ||
| 38 | #endif | ||
| 39 | |||
| 40 | #if HARDIRQ_BITS > MAX_HARDIRQ_BITS | ||
| 41 | #error HARDIRQ_BITS too high! | ||
| 42 | #endif | ||
| 43 | |||
| 44 | #define PREEMPT_SHIFT 0 | 31 | #define PREEMPT_SHIFT 0 |
| 45 | #define SOFTIRQ_SHIFT (PREEMPT_SHIFT + PREEMPT_BITS) | 32 | #define SOFTIRQ_SHIFT (PREEMPT_SHIFT + PREEMPT_BITS) |
| 46 | #define HARDIRQ_SHIFT (SOFTIRQ_SHIFT + SOFTIRQ_BITS) | 33 | #define HARDIRQ_SHIFT (SOFTIRQ_SHIFT + SOFTIRQ_BITS) |
| @@ -60,15 +47,9 @@ | |||
| 60 | 47 | ||
| 61 | #define SOFTIRQ_DISABLE_OFFSET (2 * SOFTIRQ_OFFSET) | 48 | #define SOFTIRQ_DISABLE_OFFSET (2 * SOFTIRQ_OFFSET) |
| 62 | 49 | ||
| 63 | #ifndef PREEMPT_ACTIVE | ||
| 64 | #define PREEMPT_ACTIVE_BITS 1 | 50 | #define PREEMPT_ACTIVE_BITS 1 |
| 65 | #define PREEMPT_ACTIVE_SHIFT (NMI_SHIFT + NMI_BITS) | 51 | #define PREEMPT_ACTIVE_SHIFT (NMI_SHIFT + NMI_BITS) |
| 66 | #define PREEMPT_ACTIVE (__IRQ_MASK(PREEMPT_ACTIVE_BITS) << PREEMPT_ACTIVE_SHIFT) | 52 | #define PREEMPT_ACTIVE (__IRQ_MASK(PREEMPT_ACTIVE_BITS) << PREEMPT_ACTIVE_SHIFT) |
| 67 | #endif | ||
| 68 | |||
| 69 | #if PREEMPT_ACTIVE < (1 << (NMI_SHIFT + NMI_BITS)) | ||
| 70 | #error PREEMPT_ACTIVE is too low! | ||
| 71 | #endif | ||
| 72 | 53 | ||
| 73 | #define hardirq_count() (preempt_count() & HARDIRQ_MASK) | 54 | #define hardirq_count() (preempt_count() & HARDIRQ_MASK) |
| 74 | #define softirq_count() (preempt_count() & SOFTIRQ_MASK) | 55 | #define softirq_count() (preempt_count() & SOFTIRQ_MASK) |
