diff options
Diffstat (limited to 'include/linux/mlx4')
-rw-r--r-- | include/linux/mlx4/cmd.h | 3 | ||||
-rw-r--r-- | include/linux/mlx4/device.h | 103 | ||||
-rw-r--r-- | include/linux/mlx4/driver.h | 5 | ||||
-rw-r--r-- | include/linux/mlx4/qp.h | 10 |
4 files changed, 110 insertions, 11 deletions
diff --git a/include/linux/mlx4/cmd.h b/include/linux/mlx4/cmd.h index 0f82293a82ed..9a18667c13cc 100644 --- a/include/linux/mlx4/cmd.h +++ b/include/linux/mlx4/cmd.h | |||
@@ -56,7 +56,9 @@ enum { | |||
56 | MLX4_CMD_QUERY_HCA = 0xb, | 56 | MLX4_CMD_QUERY_HCA = 0xb, |
57 | MLX4_CMD_QUERY_PORT = 0x43, | 57 | MLX4_CMD_QUERY_PORT = 0x43, |
58 | MLX4_CMD_SENSE_PORT = 0x4d, | 58 | MLX4_CMD_SENSE_PORT = 0x4d, |
59 | MLX4_CMD_HW_HEALTH_CHECK = 0x50, | ||
59 | MLX4_CMD_SET_PORT = 0xc, | 60 | MLX4_CMD_SET_PORT = 0xc, |
61 | MLX4_CMD_SET_NODE = 0x5a, | ||
60 | MLX4_CMD_ACCESS_DDR = 0x2e, | 62 | MLX4_CMD_ACCESS_DDR = 0x2e, |
61 | MLX4_CMD_MAP_ICM = 0xffa, | 63 | MLX4_CMD_MAP_ICM = 0xffa, |
62 | MLX4_CMD_UNMAP_ICM = 0xff9, | 64 | MLX4_CMD_UNMAP_ICM = 0xff9, |
@@ -140,6 +142,7 @@ enum { | |||
140 | MLX4_SET_PORT_MAC_TABLE = 0x2, | 142 | MLX4_SET_PORT_MAC_TABLE = 0x2, |
141 | MLX4_SET_PORT_VLAN_TABLE = 0x3, | 143 | MLX4_SET_PORT_VLAN_TABLE = 0x3, |
142 | MLX4_SET_PORT_PRIO_MAP = 0x4, | 144 | MLX4_SET_PORT_PRIO_MAP = 0x4, |
145 | MLX4_SET_PORT_GID_TABLE = 0x5, | ||
143 | }; | 146 | }; |
144 | 147 | ||
145 | struct mlx4_dev; | 148 | struct mlx4_dev; |
diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h index 7a7f9c1e679a..8985768e2c0d 100644 --- a/include/linux/mlx4/device.h +++ b/include/linux/mlx4/device.h | |||
@@ -39,6 +39,11 @@ | |||
39 | 39 | ||
40 | #include <asm/atomic.h> | 40 | #include <asm/atomic.h> |
41 | 41 | ||
42 | #define MAX_MSIX_P_PORT 17 | ||
43 | #define MAX_MSIX 64 | ||
44 | #define MSIX_LEGACY_SZ 4 | ||
45 | #define MIN_MSIX_P_PORT 5 | ||
46 | |||
42 | enum { | 47 | enum { |
43 | MLX4_FLAG_MSI_X = 1 << 0, | 48 | MLX4_FLAG_MSI_X = 1 << 0, |
44 | MLX4_FLAG_OLD_PORT_CMDS = 1 << 1, | 49 | MLX4_FLAG_OLD_PORT_CMDS = 1 << 1, |
@@ -67,7 +72,8 @@ enum { | |||
67 | MLX4_DEV_CAP_FLAG_ATOMIC = 1 << 18, | 72 | MLX4_DEV_CAP_FLAG_ATOMIC = 1 << 18, |
68 | MLX4_DEV_CAP_FLAG_RAW_MCAST = 1 << 19, | 73 | MLX4_DEV_CAP_FLAG_RAW_MCAST = 1 << 19, |
69 | MLX4_DEV_CAP_FLAG_UD_AV_PORT = 1 << 20, | 74 | MLX4_DEV_CAP_FLAG_UD_AV_PORT = 1 << 20, |
70 | MLX4_DEV_CAP_FLAG_UD_MCAST = 1 << 21 | 75 | MLX4_DEV_CAP_FLAG_UD_MCAST = 1 << 21, |
76 | MLX4_DEV_CAP_FLAG_IBOE = 1 << 30 | ||
71 | }; | 77 | }; |
72 | 78 | ||
73 | enum { | 79 | enum { |
@@ -143,6 +149,13 @@ enum { | |||
143 | MLX4_STAT_RATE_OFFSET = 5 | 149 | MLX4_STAT_RATE_OFFSET = 5 |
144 | }; | 150 | }; |
145 | 151 | ||
152 | enum mlx4_protocol { | ||
153 | MLX4_PROT_IB_IPV6 = 0, | ||
154 | MLX4_PROT_ETH, | ||
155 | MLX4_PROT_IB_IPV4, | ||
156 | MLX4_PROT_FCOE | ||
157 | }; | ||
158 | |||
146 | enum { | 159 | enum { |
147 | MLX4_MTT_FLAG_PRESENT = 1 | 160 | MLX4_MTT_FLAG_PRESENT = 1 |
148 | }; | 161 | }; |
@@ -167,10 +180,20 @@ enum mlx4_special_vlan_idx { | |||
167 | MLX4_VLAN_REGULAR | 180 | MLX4_VLAN_REGULAR |
168 | }; | 181 | }; |
169 | 182 | ||
183 | enum mlx4_steer_type { | ||
184 | MLX4_MC_STEER = 0, | ||
185 | MLX4_UC_STEER, | ||
186 | MLX4_NUM_STEERS | ||
187 | }; | ||
188 | |||
170 | enum { | 189 | enum { |
171 | MLX4_NUM_FEXCH = 64 * 1024, | 190 | MLX4_NUM_FEXCH = 64 * 1024, |
172 | }; | 191 | }; |
173 | 192 | ||
193 | enum { | ||
194 | MLX4_MAX_FAST_REG_PAGES = 511, | ||
195 | }; | ||
196 | |||
174 | static inline u64 mlx4_fw_ver(u64 major, u64 minor, u64 subminor) | 197 | static inline u64 mlx4_fw_ver(u64 major, u64 minor, u64 subminor) |
175 | { | 198 | { |
176 | return (major << 32) | (minor << 16) | subminor; | 199 | return (major << 32) | (minor << 16) | subminor; |
@@ -186,6 +209,10 @@ struct mlx4_caps { | |||
186 | int eth_mtu_cap[MLX4_MAX_PORTS + 1]; | 209 | int eth_mtu_cap[MLX4_MAX_PORTS + 1]; |
187 | int gid_table_len[MLX4_MAX_PORTS + 1]; | 210 | int gid_table_len[MLX4_MAX_PORTS + 1]; |
188 | int pkey_table_len[MLX4_MAX_PORTS + 1]; | 211 | int pkey_table_len[MLX4_MAX_PORTS + 1]; |
212 | int trans_type[MLX4_MAX_PORTS + 1]; | ||
213 | int vendor_oui[MLX4_MAX_PORTS + 1]; | ||
214 | int wavelength[MLX4_MAX_PORTS + 1]; | ||
215 | u64 trans_code[MLX4_MAX_PORTS + 1]; | ||
189 | int local_ca_ack_delay; | 216 | int local_ca_ack_delay; |
190 | int num_uars; | 217 | int num_uars; |
191 | int bf_reg_size; | 218 | int bf_reg_size; |
@@ -209,6 +236,7 @@ struct mlx4_caps { | |||
209 | int num_eqs; | 236 | int num_eqs; |
210 | int reserved_eqs; | 237 | int reserved_eqs; |
211 | int num_comp_vectors; | 238 | int num_comp_vectors; |
239 | int comp_pool; | ||
212 | int num_mpts; | 240 | int num_mpts; |
213 | int num_mtt_segs; | 241 | int num_mtt_segs; |
214 | int mtts_per_seg; | 242 | int mtts_per_seg; |
@@ -229,6 +257,11 @@ struct mlx4_caps { | |||
229 | u32 bmme_flags; | 257 | u32 bmme_flags; |
230 | u32 reserved_lkey; | 258 | u32 reserved_lkey; |
231 | u16 stat_rate_support; | 259 | u16 stat_rate_support; |
260 | int udp_rss; | ||
261 | int loopback_support; | ||
262 | int vep_uc_steering; | ||
263 | int vep_mc_steering; | ||
264 | int wol; | ||
232 | u8 port_width_cap[MLX4_MAX_PORTS + 1]; | 265 | u8 port_width_cap[MLX4_MAX_PORTS + 1]; |
233 | int max_gso_sz; | 266 | int max_gso_sz; |
234 | int reserved_qps_cnt[MLX4_NUM_QP_REGION]; | 267 | int reserved_qps_cnt[MLX4_NUM_QP_REGION]; |
@@ -318,6 +351,17 @@ struct mlx4_fmr { | |||
318 | struct mlx4_uar { | 351 | struct mlx4_uar { |
319 | unsigned long pfn; | 352 | unsigned long pfn; |
320 | int index; | 353 | int index; |
354 | struct list_head bf_list; | ||
355 | unsigned free_bf_bmap; | ||
356 | void __iomem *map; | ||
357 | void __iomem *bf_map; | ||
358 | }; | ||
359 | |||
360 | struct mlx4_bf { | ||
361 | unsigned long offset; | ||
362 | int buf_size; | ||
363 | struct mlx4_uar *uar; | ||
364 | void __iomem *reg; | ||
321 | }; | 365 | }; |
322 | 366 | ||
323 | struct mlx4_cq { | 367 | struct mlx4_cq { |
@@ -373,12 +417,33 @@ struct mlx4_av { | |||
373 | u8 dgid[16]; | 417 | u8 dgid[16]; |
374 | }; | 418 | }; |
375 | 419 | ||
420 | struct mlx4_eth_av { | ||
421 | __be32 port_pd; | ||
422 | u8 reserved1; | ||
423 | u8 smac_idx; | ||
424 | u16 reserved2; | ||
425 | u8 reserved3; | ||
426 | u8 gid_index; | ||
427 | u8 stat_rate; | ||
428 | u8 hop_limit; | ||
429 | __be32 sl_tclass_flowlabel; | ||
430 | u8 dgid[16]; | ||
431 | u32 reserved4[2]; | ||
432 | __be16 vlan; | ||
433 | u8 mac[6]; | ||
434 | }; | ||
435 | |||
436 | union mlx4_ext_av { | ||
437 | struct mlx4_av ib; | ||
438 | struct mlx4_eth_av eth; | ||
439 | }; | ||
440 | |||
376 | struct mlx4_dev { | 441 | struct mlx4_dev { |
377 | struct pci_dev *pdev; | 442 | struct pci_dev *pdev; |
378 | unsigned long flags; | 443 | unsigned long flags; |
379 | struct mlx4_caps caps; | 444 | struct mlx4_caps caps; |
380 | struct radix_tree_root qp_table_tree; | 445 | struct radix_tree_root qp_table_tree; |
381 | u32 rev_id; | 446 | u8 rev_id; |
382 | char board_id[MLX4_BOARD_ID_LEN]; | 447 | char board_id[MLX4_BOARD_ID_LEN]; |
383 | }; | 448 | }; |
384 | 449 | ||
@@ -401,6 +466,12 @@ struct mlx4_init_port_param { | |||
401 | if (((type) == MLX4_PORT_TYPE_IB ? (dev)->caps.port_mask : \ | 466 | if (((type) == MLX4_PORT_TYPE_IB ? (dev)->caps.port_mask : \ |
402 | ~(dev)->caps.port_mask) & 1 << ((port) - 1)) | 467 | ~(dev)->caps.port_mask) & 1 << ((port) - 1)) |
403 | 468 | ||
469 | #define mlx4_foreach_ib_transport_port(port, dev) \ | ||
470 | for ((port) = 1; (port) <= (dev)->caps.num_ports; (port)++) \ | ||
471 | if (((dev)->caps.port_mask & 1 << ((port) - 1)) || \ | ||
472 | ((dev)->caps.flags & MLX4_DEV_CAP_FLAG_IBOE)) | ||
473 | |||
474 | |||
404 | int mlx4_buf_alloc(struct mlx4_dev *dev, int size, int max_direct, | 475 | int mlx4_buf_alloc(struct mlx4_dev *dev, int size, int max_direct, |
405 | struct mlx4_buf *buf); | 476 | struct mlx4_buf *buf); |
406 | void mlx4_buf_free(struct mlx4_dev *dev, int size, struct mlx4_buf *buf); | 477 | void mlx4_buf_free(struct mlx4_dev *dev, int size, struct mlx4_buf *buf); |
@@ -418,6 +489,8 @@ void mlx4_pd_free(struct mlx4_dev *dev, u32 pdn); | |||
418 | 489 | ||
419 | int mlx4_uar_alloc(struct mlx4_dev *dev, struct mlx4_uar *uar); | 490 | int mlx4_uar_alloc(struct mlx4_dev *dev, struct mlx4_uar *uar); |
420 | void mlx4_uar_free(struct mlx4_dev *dev, struct mlx4_uar *uar); | 491 | void mlx4_uar_free(struct mlx4_dev *dev, struct mlx4_uar *uar); |
492 | int mlx4_bf_alloc(struct mlx4_dev *dev, struct mlx4_bf *bf); | ||
493 | void mlx4_bf_free(struct mlx4_dev *dev, struct mlx4_bf *bf); | ||
421 | 494 | ||
422 | int mlx4_mtt_init(struct mlx4_dev *dev, int npages, int page_shift, | 495 | int mlx4_mtt_init(struct mlx4_dev *dev, int npages, int page_shift, |
423 | struct mlx4_mtt *mtt); | 496 | struct mlx4_mtt *mtt); |
@@ -462,12 +535,20 @@ int mlx4_INIT_PORT(struct mlx4_dev *dev, int port); | |||
462 | int mlx4_CLOSE_PORT(struct mlx4_dev *dev, int port); | 535 | int mlx4_CLOSE_PORT(struct mlx4_dev *dev, int port); |
463 | 536 | ||
464 | int mlx4_multicast_attach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], | 537 | int mlx4_multicast_attach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], |
465 | int block_mcast_loopback); | 538 | int block_mcast_loopback, enum mlx4_protocol protocol); |
466 | int mlx4_multicast_detach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16]); | 539 | int mlx4_multicast_detach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], |
467 | 540 | enum mlx4_protocol protocol); | |
468 | int mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac, int *index); | 541 | int mlx4_multicast_promisc_add(struct mlx4_dev *dev, u32 qpn, u8 port); |
469 | void mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, int index); | 542 | int mlx4_multicast_promisc_remove(struct mlx4_dev *dev, u32 qpn, u8 port); |
470 | 543 | int mlx4_unicast_promisc_add(struct mlx4_dev *dev, u32 qpn, u8 port); | |
544 | int mlx4_unicast_promisc_remove(struct mlx4_dev *dev, u32 qpn, u8 port); | ||
545 | int mlx4_SET_MCAST_FLTR(struct mlx4_dev *dev, u8 port, u64 mac, u64 clear, u8 mode); | ||
546 | |||
547 | int mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac, int *qpn, u8 wrap); | ||
548 | void mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, int qpn); | ||
549 | int mlx4_replace_mac(struct mlx4_dev *dev, u8 port, int qpn, u64 new_mac, u8 wrap); | ||
550 | |||
551 | int mlx4_find_cached_vlan(struct mlx4_dev *dev, u8 port, u16 vid, int *idx); | ||
471 | int mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan, int *index); | 552 | int mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan, int *index); |
472 | void mlx4_unregister_vlan(struct mlx4_dev *dev, u8 port, int index); | 553 | void mlx4_unregister_vlan(struct mlx4_dev *dev, u8 port, int index); |
473 | 554 | ||
@@ -480,5 +561,11 @@ void mlx4_fmr_unmap(struct mlx4_dev *dev, struct mlx4_fmr *fmr, | |||
480 | u32 *lkey, u32 *rkey); | 561 | u32 *lkey, u32 *rkey); |
481 | int mlx4_fmr_free(struct mlx4_dev *dev, struct mlx4_fmr *fmr); | 562 | int mlx4_fmr_free(struct mlx4_dev *dev, struct mlx4_fmr *fmr); |
482 | int mlx4_SYNC_TPT(struct mlx4_dev *dev); | 563 | int mlx4_SYNC_TPT(struct mlx4_dev *dev); |
564 | int mlx4_test_interrupts(struct mlx4_dev *dev); | ||
565 | int mlx4_assign_eq(struct mlx4_dev *dev, char* name , int* vector); | ||
566 | void mlx4_release_eq(struct mlx4_dev *dev, int vec); | ||
567 | |||
568 | int mlx4_wol_read(struct mlx4_dev *dev, u64 *config, int port); | ||
569 | int mlx4_wol_write(struct mlx4_dev *dev, u64 config, int port); | ||
483 | 570 | ||
484 | #endif /* MLX4_DEVICE_H */ | 571 | #endif /* MLX4_DEVICE_H */ |
diff --git a/include/linux/mlx4/driver.h b/include/linux/mlx4/driver.h index 53c5fdb6eac4..e1eebf78caba 100644 --- a/include/linux/mlx4/driver.h +++ b/include/linux/mlx4/driver.h | |||
@@ -34,6 +34,7 @@ | |||
34 | #define MLX4_DRIVER_H | 34 | #define MLX4_DRIVER_H |
35 | 35 | ||
36 | #include <linux/device.h> | 36 | #include <linux/device.h> |
37 | #include <linux/mlx4/device.h> | ||
37 | 38 | ||
38 | struct mlx4_dev; | 39 | struct mlx4_dev; |
39 | 40 | ||
@@ -49,10 +50,14 @@ struct mlx4_interface { | |||
49 | void (*remove)(struct mlx4_dev *dev, void *context); | 50 | void (*remove)(struct mlx4_dev *dev, void *context); |
50 | void (*event) (struct mlx4_dev *dev, void *context, | 51 | void (*event) (struct mlx4_dev *dev, void *context, |
51 | enum mlx4_dev_event event, int port); | 52 | enum mlx4_dev_event event, int port); |
53 | void * (*get_dev)(struct mlx4_dev *dev, void *context, u8 port); | ||
52 | struct list_head list; | 54 | struct list_head list; |
55 | enum mlx4_protocol protocol; | ||
53 | }; | 56 | }; |
54 | 57 | ||
55 | int mlx4_register_interface(struct mlx4_interface *intf); | 58 | int mlx4_register_interface(struct mlx4_interface *intf); |
56 | void mlx4_unregister_interface(struct mlx4_interface *intf); | 59 | void mlx4_unregister_interface(struct mlx4_interface *intf); |
57 | 60 | ||
61 | void *mlx4_get_protocol_dev(struct mlx4_dev *dev, enum mlx4_protocol proto, int port); | ||
62 | |||
58 | #endif /* MLX4_DRIVER_H */ | 63 | #endif /* MLX4_DRIVER_H */ |
diff --git a/include/linux/mlx4/qp.h b/include/linux/mlx4/qp.h index 7abe64326f72..9e9eb21056ca 100644 --- a/include/linux/mlx4/qp.h +++ b/include/linux/mlx4/qp.h | |||
@@ -109,10 +109,11 @@ struct mlx4_qp_path { | |||
109 | __be32 tclass_flowlabel; | 109 | __be32 tclass_flowlabel; |
110 | u8 rgid[16]; | 110 | u8 rgid[16]; |
111 | u8 sched_queue; | 111 | u8 sched_queue; |
112 | u8 snooper_flags; | 112 | u8 vlan_index; |
113 | u8 reserved3[2]; | 113 | u8 reserved3[2]; |
114 | u8 counter_index; | 114 | u8 counter_index; |
115 | u8 reserved4[7]; | 115 | u8 reserved4; |
116 | u8 dmac[6]; | ||
116 | }; | 117 | }; |
117 | 118 | ||
118 | struct mlx4_qp_context { | 119 | struct mlx4_qp_context { |
@@ -166,6 +167,7 @@ enum { | |||
166 | MLX4_WQE_CTRL_TCP_UDP_CSUM = 1 << 5, | 167 | MLX4_WQE_CTRL_TCP_UDP_CSUM = 1 << 5, |
167 | MLX4_WQE_CTRL_INS_VLAN = 1 << 6, | 168 | MLX4_WQE_CTRL_INS_VLAN = 1 << 6, |
168 | MLX4_WQE_CTRL_STRONG_ORDER = 1 << 7, | 169 | MLX4_WQE_CTRL_STRONG_ORDER = 1 << 7, |
170 | MLX4_WQE_CTRL_FORCE_LOOPBACK = 1 << 0, | ||
169 | }; | 171 | }; |
170 | 172 | ||
171 | struct mlx4_wqe_ctrl_seg { | 173 | struct mlx4_wqe_ctrl_seg { |
@@ -219,7 +221,8 @@ struct mlx4_wqe_datagram_seg { | |||
219 | __be32 av[8]; | 221 | __be32 av[8]; |
220 | __be32 dqpn; | 222 | __be32 dqpn; |
221 | __be32 qkey; | 223 | __be32 qkey; |
222 | __be32 reservd[2]; | 224 | __be16 vlan; |
225 | u8 mac[6]; | ||
223 | }; | 226 | }; |
224 | 227 | ||
225 | struct mlx4_wqe_lso_seg { | 228 | struct mlx4_wqe_lso_seg { |
@@ -300,6 +303,7 @@ struct mlx4_wqe_data_seg { | |||
300 | 303 | ||
301 | enum { | 304 | enum { |
302 | MLX4_INLINE_ALIGN = 64, | 305 | MLX4_INLINE_ALIGN = 64, |
306 | MLX4_INLINE_SEG = 1 << 31, | ||
303 | }; | 307 | }; |
304 | 308 | ||
305 | struct mlx4_wqe_inline_seg { | 309 | struct mlx4_wqe_inline_seg { |