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-rw-r--r--include/linux/mfd/db8500-prcmu.h20
-rw-r--r--include/linux/mfd/dbx500-prcmu.h127
2 files changed, 46 insertions, 101 deletions
diff --git a/include/linux/mfd/db8500-prcmu.h b/include/linux/mfd/db8500-prcmu.h
index 6ee4247df11e..77a46ae2fc17 100644
--- a/include/linux/mfd/db8500-prcmu.h
+++ b/include/linux/mfd/db8500-prcmu.h
@@ -16,12 +16,6 @@
16/* 16/*
17 * Registers 17 * Registers
18 */ 18 */
19#define DB8500_PRCM_GPIOCR 0x138
20#define DB8500_PRCM_GPIOCR_DBG_UARTMOD_CMD0 BIT(0)
21#define DB8500_PRCM_GPIOCR_DBG_STM_APE_CMD BIT(9)
22#define DB8500_PRCM_GPIOCR_DBG_STM_MOD_CMD1 BIT(11)
23#define DB8500_PRCM_GPIOCR_SPI2_SELECT BIT(23)
24
25#define DB8500_PRCM_LINE_VALUE 0x170 19#define DB8500_PRCM_LINE_VALUE 0x170
26#define DB8500_PRCM_LINE_VALUE_HSI_CAWAKE0 BIT(3) 20#define DB8500_PRCM_LINE_VALUE_HSI_CAWAKE0 BIT(3)
27 21
@@ -493,20 +487,6 @@ struct prcmu_auto_pm_config {
493 u8 sva_policy; 487 u8 sva_policy;
494}; 488};
495 489
496#define PRCMU_FW_PROJECT_U8500 2
497#define PRCMU_FW_PROJECT_U9500 4
498#define PRCMU_FW_PROJECT_U8500_C2 7
499#define PRCMU_FW_PROJECT_U9500_C2 11
500#define PRCMU_FW_PROJECT_U8520 13
501#define PRCMU_FW_PROJECT_U8420 14
502
503struct prcmu_fw_version {
504 u8 project;
505 u8 api_version;
506 u8 func_version;
507 u8 errata;
508};
509
510#ifdef CONFIG_MFD_DB8500_PRCMU 490#ifdef CONFIG_MFD_DB8500_PRCMU
511 491
512void db8500_prcmu_early_init(void); 492void db8500_prcmu_early_init(void);
diff --git a/include/linux/mfd/dbx500-prcmu.h b/include/linux/mfd/dbx500-prcmu.h
index c202d6c4d879..f8bac7cfc25f 100644
--- a/include/linux/mfd/dbx500-prcmu.h
+++ b/include/linux/mfd/dbx500-prcmu.h
@@ -12,6 +12,10 @@
12#include <linux/notifier.h> 12#include <linux/notifier.h>
13#include <linux/err.h> 13#include <linux/err.h>
14 14
15/* Offset for the firmware version within the TCPM */
16#define DB8500_PRCMU_FW_VERSION_OFFSET 0xA4
17#define DBX540_PRCMU_FW_VERSION_OFFSET 0xA8
18
15/* PRCMU Wakeup defines */ 19/* PRCMU Wakeup defines */
16enum prcmu_wakeup_index { 20enum prcmu_wakeup_index {
17 PRCMU_WAKEUP_INDEX_RTC, 21 PRCMU_WAKEUP_INDEX_RTC,
@@ -214,12 +218,52 @@ enum ddr_pwrst {
214 DDR_PWR_STATE_OFFHIGHLAT = 0x03 218 DDR_PWR_STATE_OFFHIGHLAT = 0x03
215}; 219};
216 220
221#define DB8500_PRCMU_LEGACY_OFFSET 0xDD4
222
223struct prcmu_pdata
224{
225 bool enable_set_ddr_opp;
226 bool enable_ape_opp_100_voltage;
227 struct ab8500_platform_data *ab_platdata;
228 u32 version_offset;
229 u32 legacy_offset;
230 u32 adt_offset;
231};
232
233#define PRCMU_FW_PROJECT_U8500 2
234#define PRCMU_FW_PROJECT_U8400 3
235#define PRCMU_FW_PROJECT_U9500 4 /* Customer specific */
236#define PRCMU_FW_PROJECT_U8500_MBB 5
237#define PRCMU_FW_PROJECT_U8500_C1 6
238#define PRCMU_FW_PROJECT_U8500_C2 7
239#define PRCMU_FW_PROJECT_U8500_C3 8
240#define PRCMU_FW_PROJECT_U8500_C4 9
241#define PRCMU_FW_PROJECT_U9500_MBL 10
242#define PRCMU_FW_PROJECT_U8500_MBL 11 /* Customer specific */
243#define PRCMU_FW_PROJECT_U8500_MBL2 12 /* Customer specific */
244#define PRCMU_FW_PROJECT_U8520 13
245#define PRCMU_FW_PROJECT_U8420 14
246#define PRCMU_FW_PROJECT_A9420 20
247/* [32..63] 9540 and derivatives */
248#define PRCMU_FW_PROJECT_U9540 32
249/* [64..95] 8540 and derivatives */
250#define PRCMU_FW_PROJECT_L8540 64
251/* [96..126] 8580 and derivatives */
252#define PRCMU_FW_PROJECT_L8580 96
253
254#define PRCMU_FW_PROJECT_NAME_LEN 20
255struct prcmu_fw_version {
256 u32 project; /* Notice, project shifted with 8 on ux540 */
257 u8 api_version;
258 u8 func_version;
259 u8 errata;
260 char project_name[PRCMU_FW_PROJECT_NAME_LEN];
261};
262
217#include <linux/mfd/db8500-prcmu.h> 263#include <linux/mfd/db8500-prcmu.h>
218 264
219#if defined(CONFIG_UX500_SOC_DB8500) 265#if defined(CONFIG_UX500_SOC_DB8500)
220 266
221#include <mach/id.h>
222
223static inline void __init prcmu_early_init(void) 267static inline void __init prcmu_early_init(void)
224{ 268{
225 return db8500_prcmu_early_init(); 269 return db8500_prcmu_early_init();
@@ -626,85 +670,6 @@ static inline void prcmu_clear(unsigned int reg, u32 bits)
626 prcmu_write_masked(reg, bits, 0); 670 prcmu_write_masked(reg, bits, 0);
627} 671}
628 672
629#if defined(CONFIG_UX500_SOC_DB8500)
630
631/**
632 * prcmu_enable_spi2 - Enables pin muxing for SPI2 on OtherAlternateC1.
633 */
634static inline void prcmu_enable_spi2(void)
635{
636 if (cpu_is_u8500())
637 prcmu_set(DB8500_PRCM_GPIOCR, DB8500_PRCM_GPIOCR_SPI2_SELECT);
638}
639
640/**
641 * prcmu_disable_spi2 - Disables pin muxing for SPI2 on OtherAlternateC1.
642 */
643static inline void prcmu_disable_spi2(void)
644{
645 if (cpu_is_u8500())
646 prcmu_clear(DB8500_PRCM_GPIOCR, DB8500_PRCM_GPIOCR_SPI2_SELECT);
647}
648
649/**
650 * prcmu_enable_stm_mod_uart - Enables pin muxing for STMMOD
651 * and UARTMOD on OtherAlternateC3.
652 */
653static inline void prcmu_enable_stm_mod_uart(void)
654{
655 if (cpu_is_u8500()) {
656 prcmu_set(DB8500_PRCM_GPIOCR,
657 (DB8500_PRCM_GPIOCR_DBG_STM_MOD_CMD1 |
658 DB8500_PRCM_GPIOCR_DBG_UARTMOD_CMD0));
659 }
660}
661
662/**
663 * prcmu_disable_stm_mod_uart - Disables pin muxing for STMMOD
664 * and UARTMOD on OtherAlternateC3.
665 */
666static inline void prcmu_disable_stm_mod_uart(void)
667{
668 if (cpu_is_u8500()) {
669 prcmu_clear(DB8500_PRCM_GPIOCR,
670 (DB8500_PRCM_GPIOCR_DBG_STM_MOD_CMD1 |
671 DB8500_PRCM_GPIOCR_DBG_UARTMOD_CMD0));
672 }
673}
674
675/**
676 * prcmu_enable_stm_ape - Enables pin muxing for STM APE on OtherAlternateC1.
677 */
678static inline void prcmu_enable_stm_ape(void)
679{
680 if (cpu_is_u8500()) {
681 prcmu_set(DB8500_PRCM_GPIOCR,
682 DB8500_PRCM_GPIOCR_DBG_STM_APE_CMD);
683 }
684}
685
686/**
687 * prcmu_disable_stm_ape - Disables pin muxing for STM APE on OtherAlternateC1.
688 */
689static inline void prcmu_disable_stm_ape(void)
690{
691 if (cpu_is_u8500()) {
692 prcmu_clear(DB8500_PRCM_GPIOCR,
693 DB8500_PRCM_GPIOCR_DBG_STM_APE_CMD);
694 }
695}
696
697#else
698
699static inline void prcmu_enable_spi2(void) {}
700static inline void prcmu_disable_spi2(void) {}
701static inline void prcmu_enable_stm_mod_uart(void) {}
702static inline void prcmu_disable_stm_mod_uart(void) {}
703static inline void prcmu_enable_stm_ape(void) {}
704static inline void prcmu_disable_stm_ape(void) {}
705
706#endif
707
708/* PRCMU QoS APE OPP class */ 673/* PRCMU QoS APE OPP class */
709#define PRCMU_QOS_APE_OPP 1 674#define PRCMU_QOS_APE_OPP 1
710#define PRCMU_QOS_DDR_OPP 2 675#define PRCMU_QOS_DDR_OPP 2