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-rw-r--r--include/linux/mfd/abx500/ab8500-sysctrl.h1
-rw-r--r--include/linux/mfd/arizona/registers.h50
-rw-r--r--include/linux/mfd/atmel-hlcdc.h85
-rw-r--r--include/linux/mfd/axp20x.h59
-rw-r--r--include/linux/mfd/core.h7
-rw-r--r--include/linux/mfd/dln2.h103
-rw-r--r--include/linux/mfd/max77686.h7
-rw-r--r--include/linux/mfd/max77693-private.h1
-rw-r--r--include/linux/mfd/rtsx_pci.h37
-rw-r--r--include/linux/mfd/samsung/core.h2
-rw-r--r--include/linux/mfd/samsung/s2mps13.h186
-rw-r--r--include/linux/mfd/syscon/imx6q-iomuxc-gpr.h39
-rw-r--r--include/linux/mfd/tc3589x.h8
13 files changed, 568 insertions, 17 deletions
diff --git a/include/linux/mfd/abx500/ab8500-sysctrl.h b/include/linux/mfd/abx500/ab8500-sysctrl.h
index adba89d9c660..689312745b2f 100644
--- a/include/linux/mfd/abx500/ab8500-sysctrl.h
+++ b/include/linux/mfd/abx500/ab8500-sysctrl.h
@@ -12,7 +12,6 @@
12 12
13int ab8500_sysctrl_read(u16 reg, u8 *value); 13int ab8500_sysctrl_read(u16 reg, u8 *value);
14int ab8500_sysctrl_write(u16 reg, u8 mask, u8 value); 14int ab8500_sysctrl_write(u16 reg, u8 mask, u8 value);
15void ab8500_restart(char mode, const char *cmd);
16 15
17#else 16#else
18 17
diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h
index c0b075f6bc35..aacc10d7789c 100644
--- a/include/linux/mfd/arizona/registers.h
+++ b/include/linux/mfd/arizona/registers.h
@@ -125,6 +125,8 @@
125#define ARIZONA_MIC_BIAS_CTRL_1 0x218 125#define ARIZONA_MIC_BIAS_CTRL_1 0x218
126#define ARIZONA_MIC_BIAS_CTRL_2 0x219 126#define ARIZONA_MIC_BIAS_CTRL_2 0x219
127#define ARIZONA_MIC_BIAS_CTRL_3 0x21A 127#define ARIZONA_MIC_BIAS_CTRL_3 0x21A
128#define ARIZONA_HP_CTRL_1L 0x225
129#define ARIZONA_HP_CTRL_1R 0x226
128#define ARIZONA_ACCESSORY_DETECT_MODE_1 0x293 130#define ARIZONA_ACCESSORY_DETECT_MODE_1 0x293
129#define ARIZONA_HEADPHONE_DETECT_1 0x29B 131#define ARIZONA_HEADPHONE_DETECT_1 0x29B
130#define ARIZONA_HEADPHONE_DETECT_2 0x29C 132#define ARIZONA_HEADPHONE_DETECT_2 0x29C
@@ -279,8 +281,16 @@
279#define ARIZONA_AIF2_FRAME_CTRL_2 0x548 281#define ARIZONA_AIF2_FRAME_CTRL_2 0x548
280#define ARIZONA_AIF2_FRAME_CTRL_3 0x549 282#define ARIZONA_AIF2_FRAME_CTRL_3 0x549
281#define ARIZONA_AIF2_FRAME_CTRL_4 0x54A 283#define ARIZONA_AIF2_FRAME_CTRL_4 0x54A
284#define ARIZONA_AIF2_FRAME_CTRL_5 0x54B
285#define ARIZONA_AIF2_FRAME_CTRL_6 0x54C
286#define ARIZONA_AIF2_FRAME_CTRL_7 0x54D
287#define ARIZONA_AIF2_FRAME_CTRL_8 0x54E
282#define ARIZONA_AIF2_FRAME_CTRL_11 0x551 288#define ARIZONA_AIF2_FRAME_CTRL_11 0x551
283#define ARIZONA_AIF2_FRAME_CTRL_12 0x552 289#define ARIZONA_AIF2_FRAME_CTRL_12 0x552
290#define ARIZONA_AIF2_FRAME_CTRL_13 0x553
291#define ARIZONA_AIF2_FRAME_CTRL_14 0x554
292#define ARIZONA_AIF2_FRAME_CTRL_15 0x555
293#define ARIZONA_AIF2_FRAME_CTRL_16 0x556
284#define ARIZONA_AIF2_TX_ENABLES 0x559 294#define ARIZONA_AIF2_TX_ENABLES 0x559
285#define ARIZONA_AIF2_RX_ENABLES 0x55A 295#define ARIZONA_AIF2_RX_ENABLES 0x55A
286#define ARIZONA_AIF2_FORCE_WRITE 0x55B 296#define ARIZONA_AIF2_FORCE_WRITE 0x55B
@@ -2245,6 +2255,46 @@
2245#define ARIZONA_MICB3_ENA_WIDTH 1 /* MICB3_ENA */ 2255#define ARIZONA_MICB3_ENA_WIDTH 1 /* MICB3_ENA */
2246 2256
2247/* 2257/*
2258 * R549 (0x225) - HP Ctrl 1L
2259 */
2260#define ARIZONA_RMV_SHRT_HP1L 0x4000 /* RMV_SHRT_HP1L */
2261#define ARIZONA_RMV_SHRT_HP1L_MASK 0x4000 /* RMV_SHRT_HP1L */
2262#define ARIZONA_RMV_SHRT_HP1L_SHIFT 14 /* RMV_SHRT_HP1L */
2263#define ARIZONA_RMV_SHRT_HP1L_WIDTH 1 /* RMV_SHRT_HP1L */
2264#define ARIZONA_HP1L_FLWR 0x0004 /* HP1L_FLWR */
2265#define ARIZONA_HP1L_FLWR_MASK 0x0004 /* HP1L_FLWR */
2266#define ARIZONA_HP1L_FLWR_SHIFT 2 /* HP1L_FLWR */
2267#define ARIZONA_HP1L_FLWR_WIDTH 1 /* HP1L_FLWR */
2268#define ARIZONA_HP1L_SHRTI 0x0002 /* HP1L_SHRTI */
2269#define ARIZONA_HP1L_SHRTI_MASK 0x0002 /* HP1L_SHRTI */
2270#define ARIZONA_HP1L_SHRTI_SHIFT 1 /* HP1L_SHRTI */
2271#define ARIZONA_HP1L_SHRTI_WIDTH 1 /* HP1L_SHRTI */
2272#define ARIZONA_HP1L_SHRTO 0x0001 /* HP1L_SHRTO */
2273#define ARIZONA_HP1L_SHRTO_MASK 0x0001 /* HP1L_SHRTO */
2274#define ARIZONA_HP1L_SHRTO_SHIFT 0 /* HP1L_SHRTO */
2275#define ARIZONA_HP1L_SHRTO_WIDTH 1 /* HP1L_SHRTO */
2276
2277/*
2278 * R550 (0x226) - HP Ctrl 1R
2279 */
2280#define ARIZONA_RMV_SHRT_HP1R 0x4000 /* RMV_SHRT_HP1R */
2281#define ARIZONA_RMV_SHRT_HP1R_MASK 0x4000 /* RMV_SHRT_HP1R */
2282#define ARIZONA_RMV_SHRT_HP1R_SHIFT 14 /* RMV_SHRT_HP1R */
2283#define ARIZONA_RMV_SHRT_HP1R_WIDTH 1 /* RMV_SHRT_HP1R */
2284#define ARIZONA_HP1R_FLWR 0x0004 /* HP1R_FLWR */
2285#define ARIZONA_HP1R_FLWR_MASK 0x0004 /* HP1R_FLWR */
2286#define ARIZONA_HP1R_FLWR_SHIFT 2 /* HP1R_FLWR */
2287#define ARIZONA_HP1R_FLWR_WIDTH 1 /* HP1R_FLWR */
2288#define ARIZONA_HP1R_SHRTI 0x0002 /* HP1R_SHRTI */
2289#define ARIZONA_HP1R_SHRTI_MASK 0x0002 /* HP1R_SHRTI */
2290#define ARIZONA_HP1R_SHRTI_SHIFT 1 /* HP1R_SHRTI */
2291#define ARIZONA_HP1R_SHRTI_WIDTH 1 /* HP1R_SHRTI */
2292#define ARIZONA_HP1R_SHRTO 0x0001 /* HP1R_SHRTO */
2293#define ARIZONA_HP1R_SHRTO_MASK 0x0001 /* HP1R_SHRTO */
2294#define ARIZONA_HP1R_SHRTO_SHIFT 0 /* HP1R_SHRTO */
2295#define ARIZONA_HP1R_SHRTO_WIDTH 1 /* HP1R_SHRTO */
2296
2297/*
2248 * R659 (0x293) - Accessory Detect Mode 1 2298 * R659 (0x293) - Accessory Detect Mode 1
2249 */ 2299 */
2250#define ARIZONA_ACCDET_SRC 0x2000 /* ACCDET_SRC */ 2300#define ARIZONA_ACCDET_SRC 0x2000 /* ACCDET_SRC */
diff --git a/include/linux/mfd/atmel-hlcdc.h b/include/linux/mfd/atmel-hlcdc.h
new file mode 100644
index 000000000000..1279ab1644b5
--- /dev/null
+++ b/include/linux/mfd/atmel-hlcdc.h
@@ -0,0 +1,85 @@
1/*
2 * Copyright (C) 2014 Free Electrons
3 * Copyright (C) 2014 Atmel
4 *
5 * Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#ifndef __LINUX_MFD_HLCDC_H
21#define __LINUX_MFD_HLCDC_H
22
23#include <linux/clk.h>
24#include <linux/regmap.h>
25
26#define ATMEL_HLCDC_CFG(i) ((i) * 0x4)
27#define ATMEL_HLCDC_SIG_CFG LCDCFG(5)
28#define ATMEL_HLCDC_HSPOL BIT(0)
29#define ATMEL_HLCDC_VSPOL BIT(1)
30#define ATMEL_HLCDC_VSPDLYS BIT(2)
31#define ATMEL_HLCDC_VSPDLYE BIT(3)
32#define ATMEL_HLCDC_DISPPOL BIT(4)
33#define ATMEL_HLCDC_DITHER BIT(6)
34#define ATMEL_HLCDC_DISPDLY BIT(7)
35#define ATMEL_HLCDC_MODE_MASK GENMASK(9, 8)
36#define ATMEL_HLCDC_PP BIT(10)
37#define ATMEL_HLCDC_VSPSU BIT(12)
38#define ATMEL_HLCDC_VSPHO BIT(13)
39#define ATMEL_HLCDC_GUARDTIME_MASK GENMASK(20, 16)
40
41#define ATMEL_HLCDC_EN 0x20
42#define ATMEL_HLCDC_DIS 0x24
43#define ATMEL_HLCDC_SR 0x28
44#define ATMEL_HLCDC_IER 0x2c
45#define ATMEL_HLCDC_IDR 0x30
46#define ATMEL_HLCDC_IMR 0x34
47#define ATMEL_HLCDC_ISR 0x38
48
49#define ATMEL_HLCDC_CLKPOL BIT(0)
50#define ATMEL_HLCDC_CLKSEL BIT(2)
51#define ATMEL_HLCDC_CLKPWMSEL BIT(3)
52#define ATMEL_HLCDC_CGDIS(i) BIT(8 + (i))
53#define ATMEL_HLCDC_CLKDIV_SHFT 16
54#define ATMEL_HLCDC_CLKDIV_MASK GENMASK(23, 16)
55#define ATMEL_HLCDC_CLKDIV(div) ((div - 2) << ATMEL_HLCDC_CLKDIV_SHFT)
56
57#define ATMEL_HLCDC_PIXEL_CLK BIT(0)
58#define ATMEL_HLCDC_SYNC BIT(1)
59#define ATMEL_HLCDC_DISP BIT(2)
60#define ATMEL_HLCDC_PWM BIT(3)
61#define ATMEL_HLCDC_SIP BIT(4)
62
63#define ATMEL_HLCDC_SOF BIT(0)
64#define ATMEL_HLCDC_SYNCDIS BIT(1)
65#define ATMEL_HLCDC_FIFOERR BIT(4)
66#define ATMEL_HLCDC_LAYER_STATUS(x) BIT((x) + 8)
67
68/**
69 * Structure shared by the MFD device and its subdevices.
70 *
71 * @regmap: register map used to access HLCDC IP registers
72 * @periph_clk: the hlcdc peripheral clock
73 * @sys_clk: the hlcdc system clock
74 * @slow_clk: the system slow clk
75 * @irq: the hlcdc irq
76 */
77struct atmel_hlcdc {
78 struct regmap *regmap;
79 struct clk *periph_clk;
80 struct clk *sys_clk;
81 struct clk *slow_clk;
82 int irq;
83};
84
85#endif /* __LINUX_MFD_HLCDC_H */
diff --git a/include/linux/mfd/axp20x.h b/include/linux/mfd/axp20x.h
index d0e31a2287ac..81589d176ae8 100644
--- a/include/linux/mfd/axp20x.h
+++ b/include/linux/mfd/axp20x.h
@@ -14,6 +14,8 @@
14enum { 14enum {
15 AXP202_ID = 0, 15 AXP202_ID = 0,
16 AXP209_ID, 16 AXP209_ID,
17 AXP288_ID,
18 NR_AXP20X_VARIANTS,
17}; 19};
18 20
19#define AXP20X_DATACACHE(m) (0x04 + (m)) 21#define AXP20X_DATACACHE(m) (0x04 + (m))
@@ -49,11 +51,13 @@ enum {
49#define AXP20X_IRQ3_EN 0x42 51#define AXP20X_IRQ3_EN 0x42
50#define AXP20X_IRQ4_EN 0x43 52#define AXP20X_IRQ4_EN 0x43
51#define AXP20X_IRQ5_EN 0x44 53#define AXP20X_IRQ5_EN 0x44
54#define AXP20X_IRQ6_EN 0x45
52#define AXP20X_IRQ1_STATE 0x48 55#define AXP20X_IRQ1_STATE 0x48
53#define AXP20X_IRQ2_STATE 0x49 56#define AXP20X_IRQ2_STATE 0x49
54#define AXP20X_IRQ3_STATE 0x4a 57#define AXP20X_IRQ3_STATE 0x4a
55#define AXP20X_IRQ4_STATE 0x4b 58#define AXP20X_IRQ4_STATE 0x4b
56#define AXP20X_IRQ5_STATE 0x4c 59#define AXP20X_IRQ5_STATE 0x4c
60#define AXP20X_IRQ6_STATE 0x4d
57 61
58/* ADC */ 62/* ADC */
59#define AXP20X_ACIN_V_ADC_H 0x56 63#define AXP20X_ACIN_V_ADC_H 0x56
@@ -116,6 +120,15 @@ enum {
116#define AXP20X_CC_CTRL 0xb8 120#define AXP20X_CC_CTRL 0xb8
117#define AXP20X_FG_RES 0xb9 121#define AXP20X_FG_RES 0xb9
118 122
123/* AXP288 specific registers */
124#define AXP288_PMIC_ADC_H 0x56
125#define AXP288_PMIC_ADC_L 0x57
126#define AXP288_ADC_TS_PIN_CTRL 0x84
127
128#define AXP288_PMIC_ADC_EN 0x84
129#define AXP288_FG_TUNE5 0xed
130
131
119/* Regulators IDs */ 132/* Regulators IDs */
120enum { 133enum {
121 AXP20X_LDO1 = 0, 134 AXP20X_LDO1 = 0,
@@ -169,12 +182,58 @@ enum {
169 AXP20X_IRQ_GPIO0_INPUT, 182 AXP20X_IRQ_GPIO0_INPUT,
170}; 183};
171 184
185enum axp288_irqs {
186 AXP288_IRQ_VBUS_FALL = 2,
187 AXP288_IRQ_VBUS_RISE,
188 AXP288_IRQ_OV,
189 AXP288_IRQ_FALLING_ALT,
190 AXP288_IRQ_RISING_ALT,
191 AXP288_IRQ_OV_ALT,
192 AXP288_IRQ_DONE = 10,
193 AXP288_IRQ_CHARGING,
194 AXP288_IRQ_SAFE_QUIT,
195 AXP288_IRQ_SAFE_ENTER,
196 AXP288_IRQ_ABSENT,
197 AXP288_IRQ_APPEND,
198 AXP288_IRQ_QWBTU,
199 AXP288_IRQ_WBTU,
200 AXP288_IRQ_QWBTO,
201 AXP288_IRQ_WBTO,
202 AXP288_IRQ_QCBTU,
203 AXP288_IRQ_CBTU,
204 AXP288_IRQ_QCBTO,
205 AXP288_IRQ_CBTO,
206 AXP288_IRQ_WL2,
207 AXP288_IRQ_WL1,
208 AXP288_IRQ_GPADC,
209 AXP288_IRQ_OT = 31,
210 AXP288_IRQ_GPIO0,
211 AXP288_IRQ_GPIO1,
212 AXP288_IRQ_POKO,
213 AXP288_IRQ_POKL,
214 AXP288_IRQ_POKS,
215 AXP288_IRQ_POKN,
216 AXP288_IRQ_POKP,
217 AXP288_IRQ_TIMER,
218 AXP288_IRQ_MV_CHNG,
219 AXP288_IRQ_BC_USB_CHNG,
220};
221
222#define AXP288_TS_ADC_H 0x58
223#define AXP288_TS_ADC_L 0x59
224#define AXP288_GP_ADC_H 0x5a
225#define AXP288_GP_ADC_L 0x5b
226
172struct axp20x_dev { 227struct axp20x_dev {
173 struct device *dev; 228 struct device *dev;
174 struct i2c_client *i2c_client; 229 struct i2c_client *i2c_client;
175 struct regmap *regmap; 230 struct regmap *regmap;
176 struct regmap_irq_chip_data *regmap_irqc; 231 struct regmap_irq_chip_data *regmap_irqc;
177 long variant; 232 long variant;
233 int nr_cells;
234 struct mfd_cell *cells;
235 const struct regmap_config *regmap_cfg;
236 const struct regmap_irq_chip *regmap_irq_chip;
178}; 237};
179 238
180#endif /* __LINUX_MFD_AXP20X_H */ 239#endif /* __LINUX_MFD_AXP20X_H */
diff --git a/include/linux/mfd/core.h b/include/linux/mfd/core.h
index 73e1709d4c09..a76bc100bf97 100644
--- a/include/linux/mfd/core.h
+++ b/include/linux/mfd/core.h
@@ -111,6 +111,13 @@ extern int mfd_add_devices(struct device *parent, int id,
111 struct resource *mem_base, 111 struct resource *mem_base,
112 int irq_base, struct irq_domain *irq_domain); 112 int irq_base, struct irq_domain *irq_domain);
113 113
114static inline int mfd_add_hotplug_devices(struct device *parent,
115 const struct mfd_cell *cells, int n_devs)
116{
117 return mfd_add_devices(parent, PLATFORM_DEVID_AUTO, cells, n_devs,
118 NULL, 0, NULL);
119}
120
114extern void mfd_remove_devices(struct device *parent); 121extern void mfd_remove_devices(struct device *parent);
115 122
116#endif 123#endif
diff --git a/include/linux/mfd/dln2.h b/include/linux/mfd/dln2.h
new file mode 100644
index 000000000000..004b24576da8
--- /dev/null
+++ b/include/linux/mfd/dln2.h
@@ -0,0 +1,103 @@
1#ifndef __LINUX_USB_DLN2_H
2#define __LINUX_USB_DLN2_H
3
4#define DLN2_CMD(cmd, id) ((cmd) | ((id) << 8))
5
6struct dln2_platform_data {
7 u16 handle; /* sub-driver handle (internally used only) */
8 u8 port; /* I2C/SPI port */
9};
10
11/**
12 * dln2_event_cb_t - event callback function signature
13 *
14 * @pdev - the sub-device that registered this callback
15 * @echo - the echo header field received in the message
16 * @data - the data payload
17 * @len - the data payload length
18 *
19 * The callback function is called in interrupt context and the data payload is
20 * only valid during the call. If the user needs later access of the data, it
21 * must copy it.
22 */
23
24typedef void (*dln2_event_cb_t)(struct platform_device *pdev, u16 echo,
25 const void *data, int len);
26
27/**
28 * dl2n_register_event_cb - register a callback function for an event
29 *
30 * @pdev - the sub-device that registers the callback
31 * @event - the event for which to register a callback
32 * @event_cb - the callback function
33 *
34 * @return 0 in case of success, negative value in case of error
35 */
36int dln2_register_event_cb(struct platform_device *pdev, u16 event,
37 dln2_event_cb_t event_cb);
38
39/**
40 * dln2_unregister_event_cb - unregister the callback function for an event
41 *
42 * @pdev - the sub-device that registered the callback
43 * @event - the event for which to register a callback
44 */
45void dln2_unregister_event_cb(struct platform_device *pdev, u16 event);
46
47/**
48 * dln2_transfer - issue a DLN2 command and wait for a response and the
49 * associated data
50 *
51 * @pdev - the sub-device which is issuing this transfer
52 * @cmd - the command to be sent to the device
53 * @obuf - the buffer to be sent to the device; it can be NULL if the user
54 * doesn't need to transmit data with this command
55 * @obuf_len - the size of the buffer to be sent to the device
56 * @ibuf - any data associated with the response will be copied here; it can be
57 * NULL if the user doesn't need the response data
58 * @ibuf_len - must be initialized to the input buffer size; it will be modified
59 * to indicate the actual data transferred;
60 *
61 * @return 0 for success, negative value for errors
62 */
63int dln2_transfer(struct platform_device *pdev, u16 cmd,
64 const void *obuf, unsigned obuf_len,
65 void *ibuf, unsigned *ibuf_len);
66
67/**
68 * dln2_transfer_rx - variant of @dln2_transfer() where TX buffer is not needed
69 *
70 * @pdev - the sub-device which is issuing this transfer
71 * @cmd - the command to be sent to the device
72 * @ibuf - any data associated with the response will be copied here; it can be
73 * NULL if the user doesn't need the response data
74 * @ibuf_len - must be initialized to the input buffer size; it will be modified
75 * to indicate the actual data transferred;
76 *
77 * @return 0 for success, negative value for errors
78 */
79
80static inline int dln2_transfer_rx(struct platform_device *pdev, u16 cmd,
81 void *ibuf, unsigned *ibuf_len)
82{
83 return dln2_transfer(pdev, cmd, NULL, 0, ibuf, ibuf_len);
84}
85
86/**
87 * dln2_transfer_tx - variant of @dln2_transfer() where RX buffer is not needed
88 *
89 * @pdev - the sub-device which is issuing this transfer
90 * @cmd - the command to be sent to the device
91 * @obuf - the buffer to be sent to the device; it can be NULL if the
92 * user doesn't need to transmit data with this command
93 * @obuf_len - the size of the buffer to be sent to the device
94 *
95 * @return 0 for success, negative value for errors
96 */
97static inline int dln2_transfer_tx(struct platform_device *pdev, u16 cmd,
98 const void *obuf, unsigned obuf_len)
99{
100 return dln2_transfer(pdev, cmd, obuf, obuf_len, NULL, NULL);
101}
102
103#endif
diff --git a/include/linux/mfd/max77686.h b/include/linux/mfd/max77686.h
index 7e6dc4b2b795..553f7d09258a 100644
--- a/include/linux/mfd/max77686.h
+++ b/include/linux/mfd/max77686.h
@@ -131,13 +131,6 @@ enum max77686_opmode {
131 MAX77686_OPMODE_STANDBY, 131 MAX77686_OPMODE_STANDBY,
132}; 132};
133 133
134enum max77802_opmode {
135 MAX77802_OPMODE_OFF,
136 MAX77802_OPMODE_STANDBY,
137 MAX77802_OPMODE_LP,
138 MAX77802_OPMODE_NORMAL,
139};
140
141struct max77686_opmode_data { 134struct max77686_opmode_data {
142 int id; 135 int id;
143 int mode; 136 int mode;
diff --git a/include/linux/mfd/max77693-private.h b/include/linux/mfd/max77693-private.h
index 582e67f34054..08dae01258b9 100644
--- a/include/linux/mfd/max77693-private.h
+++ b/include/linux/mfd/max77693-private.h
@@ -26,7 +26,6 @@
26 26
27#include <linux/i2c.h> 27#include <linux/i2c.h>
28 28
29#define MAX77693_NUM_IRQ_MUIC_REGS 3
30#define MAX77693_REG_INVALID (0xff) 29#define MAX77693_REG_INVALID (0xff)
31 30
32/* Slave addr = 0xCC: PMIC, Charger, Flash LED */ 31/* Slave addr = 0xCC: PMIC, Charger, Flash LED */
diff --git a/include/linux/mfd/rtsx_pci.h b/include/linux/mfd/rtsx_pci.h
index 74346d5e7899..0c12628e91c6 100644
--- a/include/linux/mfd/rtsx_pci.h
+++ b/include/linux/mfd/rtsx_pci.h
@@ -558,6 +558,7 @@
558#define SD_SAMPLE_POINT_CTL 0xFDA7 558#define SD_SAMPLE_POINT_CTL 0xFDA7
559#define SD_PUSH_POINT_CTL 0xFDA8 559#define SD_PUSH_POINT_CTL 0xFDA8
560#define SD_CMD0 0xFDA9 560#define SD_CMD0 0xFDA9
561#define SD_CMD_START 0x40
561#define SD_CMD1 0xFDAA 562#define SD_CMD1 0xFDAA
562#define SD_CMD2 0xFDAB 563#define SD_CMD2 0xFDAB
563#define SD_CMD3 0xFDAC 564#define SD_CMD3 0xFDAC
@@ -707,6 +708,14 @@
707#define PM_CTRL1 0xFF44 708#define PM_CTRL1 0xFF44
708#define PM_CTRL2 0xFF45 709#define PM_CTRL2 0xFF45
709#define PM_CTRL3 0xFF46 710#define PM_CTRL3 0xFF46
711#define SDIO_SEND_PME_EN 0x80
712#define FORCE_RC_MODE_ON 0x40
713#define FORCE_RX50_LINK_ON 0x20
714#define D3_DELINK_MODE_EN 0x10
715#define USE_PESRTB_CTL_DELINK 0x08
716#define DELAY_PIN_WAKE 0x04
717#define RESET_PIN_WAKE 0x02
718#define PM_WAKE_EN 0x01
710#define PM_CTRL4 0xFF47 719#define PM_CTRL4 0xFF47
711 720
712/* Memory mapping */ 721/* Memory mapping */
@@ -752,6 +761,14 @@
752#define PHY_DUM_REG 0x1F 761#define PHY_DUM_REG 0x1F
753 762
754#define LCTLR 0x80 763#define LCTLR 0x80
764#define LCTLR_EXT_SYNC 0x80
765#define LCTLR_COMMON_CLOCK_CFG 0x40
766#define LCTLR_RETRAIN_LINK 0x20
767#define LCTLR_LINK_DISABLE 0x10
768#define LCTLR_RCB 0x08
769#define LCTLR_RESERVED 0x04
770#define LCTLR_ASPM_CTL_MASK 0x03
771
755#define PCR_SETTING_REG1 0x724 772#define PCR_SETTING_REG1 0x724
756#define PCR_SETTING_REG2 0x814 773#define PCR_SETTING_REG2 0x814
757#define PCR_SETTING_REG3 0x747 774#define PCR_SETTING_REG3 0x747
@@ -967,4 +984,24 @@ static inline u8 *rtsx_pci_get_cmd_data(struct rtsx_pcr *pcr)
967 return (u8 *)(pcr->host_cmds_ptr); 984 return (u8 *)(pcr->host_cmds_ptr);
968} 985}
969 986
987static inline int rtsx_pci_update_cfg_byte(struct rtsx_pcr *pcr, int addr,
988 u8 mask, u8 append)
989{
990 int err;
991 u8 val;
992
993 err = pci_read_config_byte(pcr->pci, addr, &val);
994 if (err < 0)
995 return err;
996 return pci_write_config_byte(pcr->pci, addr, (val & mask) | append);
997}
998
999static inline void rtsx_pci_write_be32(struct rtsx_pcr *pcr, u16 reg, u32 val)
1000{
1001 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg, 0xFF, val >> 24);
1002 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 1, 0xFF, val >> 16);
1003 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 2, 0xFF, val >> 8);
1004 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 3, 0xFF, val);
1005}
1006
970#endif 1007#endif
diff --git a/include/linux/mfd/samsung/core.h b/include/linux/mfd/samsung/core.h
index 1825edacbda7..3fdb7cfbffb3 100644
--- a/include/linux/mfd/samsung/core.h
+++ b/include/linux/mfd/samsung/core.h
@@ -28,6 +28,7 @@
28#define MIN_800_MV 800000 28#define MIN_800_MV 800000
29#define MIN_750_MV 750000 29#define MIN_750_MV 750000
30#define MIN_600_MV 600000 30#define MIN_600_MV 600000
31#define MIN_500_MV 500000
31 32
32/* Macros to represent steps for LDO/BUCK */ 33/* Macros to represent steps for LDO/BUCK */
33#define STEP_50_MV 50000 34#define STEP_50_MV 50000
@@ -41,6 +42,7 @@ enum sec_device_type {
41 S5M8767X, 42 S5M8767X,
42 S2MPA01, 43 S2MPA01,
43 S2MPS11X, 44 S2MPS11X,
45 S2MPS13X,
44 S2MPS14X, 46 S2MPS14X,
45 S2MPU02, 47 S2MPU02,
46}; 48};
diff --git a/include/linux/mfd/samsung/s2mps13.h b/include/linux/mfd/samsung/s2mps13.h
new file mode 100644
index 000000000000..ce5dda8958fe
--- /dev/null
+++ b/include/linux/mfd/samsung/s2mps13.h
@@ -0,0 +1,186 @@
1/*
2 * s2mps13.h
3 *
4 * Copyright (c) 2014 Samsung Electronics Co., Ltd
5 * http://www.samsung.com
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 */
18
19#ifndef __LINUX_MFD_S2MPS13_H
20#define __LINUX_MFD_S2MPS13_H
21
22/* S2MPS13 registers */
23enum s2mps13_reg {
24 S2MPS13_REG_ID,
25 S2MPS13_REG_INT1,
26 S2MPS13_REG_INT2,
27 S2MPS13_REG_INT3,
28 S2MPS13_REG_INT1M,
29 S2MPS13_REG_INT2M,
30 S2MPS13_REG_INT3M,
31 S2MPS13_REG_ST1,
32 S2MPS13_REG_ST2,
33 S2MPS13_REG_PWRONSRC,
34 S2MPS13_REG_OFFSRC,
35 S2MPS13_REG_BU_CHG,
36 S2MPS13_REG_RTCCTRL,
37 S2MPS13_REG_CTRL1,
38 S2MPS13_REG_CTRL2,
39 S2MPS13_REG_RSVD1,
40 S2MPS13_REG_RSVD2,
41 S2MPS13_REG_RSVD3,
42 S2MPS13_REG_RSVD4,
43 S2MPS13_REG_RSVD5,
44 S2MPS13_REG_RSVD6,
45 S2MPS13_REG_CTRL3,
46 S2MPS13_REG_RSVD7,
47 S2MPS13_REG_RSVD8,
48 S2MPS13_REG_WRSTBI,
49 S2MPS13_REG_B1CTRL,
50 S2MPS13_REG_B1OUT,
51 S2MPS13_REG_B2CTRL,
52 S2MPS13_REG_B2OUT,
53 S2MPS13_REG_B3CTRL,
54 S2MPS13_REG_B3OUT,
55 S2MPS13_REG_B4CTRL,
56 S2MPS13_REG_B4OUT,
57 S2MPS13_REG_B5CTRL,
58 S2MPS13_REG_B5OUT,
59 S2MPS13_REG_B6CTRL,
60 S2MPS13_REG_B6OUT,
61 S2MPS13_REG_B7CTRL,
62 S2MPS13_REG_B7OUT,
63 S2MPS13_REG_B8CTRL,
64 S2MPS13_REG_B8OUT,
65 S2MPS13_REG_B9CTRL,
66 S2MPS13_REG_B9OUT,
67 S2MPS13_REG_B10CTRL,
68 S2MPS13_REG_B10OUT,
69 S2MPS13_REG_BB1CTRL,
70 S2MPS13_REG_BB1OUT,
71 S2MPS13_REG_BUCK_RAMP1,
72 S2MPS13_REG_BUCK_RAMP2,
73 S2MPS13_REG_LDO_DVS1,
74 S2MPS13_REG_LDO_DVS2,
75 S2MPS13_REG_LDO_DVS3,
76 S2MPS13_REG_B6OUT2,
77 S2MPS13_REG_L1CTRL,
78 S2MPS13_REG_L2CTRL,
79 S2MPS13_REG_L3CTRL,
80 S2MPS13_REG_L4CTRL,
81 S2MPS13_REG_L5CTRL,
82 S2MPS13_REG_L6CTRL,
83 S2MPS13_REG_L7CTRL,
84 S2MPS13_REG_L8CTRL,
85 S2MPS13_REG_L9CTRL,
86 S2MPS13_REG_L10CTRL,
87 S2MPS13_REG_L11CTRL,
88 S2MPS13_REG_L12CTRL,
89 S2MPS13_REG_L13CTRL,
90 S2MPS13_REG_L14CTRL,
91 S2MPS13_REG_L15CTRL,
92 S2MPS13_REG_L16CTRL,
93 S2MPS13_REG_L17CTRL,
94 S2MPS13_REG_L18CTRL,
95 S2MPS13_REG_L19CTRL,
96 S2MPS13_REG_L20CTRL,
97 S2MPS13_REG_L21CTRL,
98 S2MPS13_REG_L22CTRL,
99 S2MPS13_REG_L23CTRL,
100 S2MPS13_REG_L24CTRL,
101 S2MPS13_REG_L25CTRL,
102 S2MPS13_REG_L26CTRL,
103 S2MPS13_REG_L27CTRL,
104 S2MPS13_REG_L28CTRL,
105 S2MPS13_REG_L30CTRL,
106 S2MPS13_REG_L31CTRL,
107 S2MPS13_REG_L32CTRL,
108 S2MPS13_REG_L33CTRL,
109 S2MPS13_REG_L34CTRL,
110 S2MPS13_REG_L35CTRL,
111 S2MPS13_REG_L36CTRL,
112 S2MPS13_REG_L37CTRL,
113 S2MPS13_REG_L38CTRL,
114 S2MPS13_REG_L39CTRL,
115 S2MPS13_REG_L40CTRL,
116 S2MPS13_REG_LDODSCH1,
117 S2MPS13_REG_LDODSCH2,
118 S2MPS13_REG_LDODSCH3,
119 S2MPS13_REG_LDODSCH4,
120 S2MPS13_REG_LDODSCH5,
121};
122
123/* regulator ids */
124enum s2mps13_regulators {
125 S2MPS13_LDO1,
126 S2MPS13_LDO2,
127 S2MPS13_LDO3,
128 S2MPS13_LDO4,
129 S2MPS13_LDO5,
130 S2MPS13_LDO6,
131 S2MPS13_LDO7,
132 S2MPS13_LDO8,
133 S2MPS13_LDO9,
134 S2MPS13_LDO10,
135 S2MPS13_LDO11,
136 S2MPS13_LDO12,
137 S2MPS13_LDO13,
138 S2MPS13_LDO14,
139 S2MPS13_LDO15,
140 S2MPS13_LDO16,
141 S2MPS13_LDO17,
142 S2MPS13_LDO18,
143 S2MPS13_LDO19,
144 S2MPS13_LDO20,
145 S2MPS13_LDO21,
146 S2MPS13_LDO22,
147 S2MPS13_LDO23,
148 S2MPS13_LDO24,
149 S2MPS13_LDO25,
150 S2MPS13_LDO26,
151 S2MPS13_LDO27,
152 S2MPS13_LDO28,
153 S2MPS13_LDO29,
154 S2MPS13_LDO30,
155 S2MPS13_LDO31,
156 S2MPS13_LDO32,
157 S2MPS13_LDO33,
158 S2MPS13_LDO34,
159 S2MPS13_LDO35,
160 S2MPS13_LDO36,
161 S2MPS13_LDO37,
162 S2MPS13_LDO38,
163 S2MPS13_LDO39,
164 S2MPS13_LDO40,
165 S2MPS13_BUCK1,
166 S2MPS13_BUCK2,
167 S2MPS13_BUCK3,
168 S2MPS13_BUCK4,
169 S2MPS13_BUCK5,
170 S2MPS13_BUCK6,
171 S2MPS13_BUCK7,
172 S2MPS13_BUCK8,
173 S2MPS13_BUCK9,
174 S2MPS13_BUCK10,
175
176 S2MPS13_REGULATOR_MAX,
177};
178
179/*
180 * Default ramp delay in uv/us. Datasheet says that ramp delay can be
181 * controlled however it does not specify which register is used for that.
182 * Let's assume that default value will be set.
183 */
184#define S2MPS13_BUCK_RAMP_DELAY 12500
185
186#endif /* __LINUX_MFD_S2MPS13_H */
diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
index ff44374a1a4e..c877cad61a13 100644
--- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
+++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
@@ -395,4 +395,43 @@
395#define IMX6SL_GPR1_FEC_CLOCK_MUX1_SEL_MASK (0x3 << 17) 395#define IMX6SL_GPR1_FEC_CLOCK_MUX1_SEL_MASK (0x3 << 17)
396#define IMX6SL_GPR1_FEC_CLOCK_MUX2_SEL_MASK (0x1 << 14) 396#define IMX6SL_GPR1_FEC_CLOCK_MUX2_SEL_MASK (0x1 << 14)
397 397
398/* For imx6sx iomux gpr register field define */
399#define IMX6SX_GPR1_VDEC_SW_RST_MASK (0x1 << 20)
400#define IMX6SX_GPR1_VDEC_SW_RST_RESET (0x1 << 20)
401#define IMX6SX_GPR1_VDEC_SW_RST_RELEASE (0x0 << 20)
402#define IMX6SX_GPR1_VADC_SW_RST_MASK (0x1 << 19)
403#define IMX6SX_GPR1_VADC_SW_RST_RESET (0x1 << 19)
404#define IMX6SX_GPR1_VADC_SW_RST_RELEASE (0x0 << 19)
405#define IMX6SX_GPR1_FEC_CLOCK_MUX_SEL_MASK (0x3 << 13)
406#define IMX6SX_GPR1_FEC_CLOCK_PAD_DIR_MASK (0x3 << 17)
407#define IMX6SX_GPR1_FEC_CLOCK_MUX_SEL_EXT (0x3 << 13)
408
409#define IMX6SX_GPR4_FEC_ENET1_STOP_REQ (0x1 << 3)
410#define IMX6SX_GPR4_FEC_ENET2_STOP_REQ (0x1 << 4)
411
412#define IMX6SX_GPR5_DISP_MUX_LDB_CTRL_MASK (0x1 << 3)
413#define IMX6SX_GPR5_DISP_MUX_LDB_CTRL_LCDIF1 (0x0 << 3)
414#define IMX6SX_GPR5_DISP_MUX_LDB_CTRL_LCDIF2 (0x1 << 3)
415
416#define IMX6SX_GPR5_CSI2_MUX_CTRL_MASK (0x3 << 27)
417#define IMX6SX_GPR5_CSI2_MUX_CTRL_EXT_PIN (0x0 << 27)
418#define IMX6SX_GPR5_CSI2_MUX_CTRL_CVD (0x1 << 27)
419#define IMX6SX_GPR5_CSI2_MUX_CTRL_VDAC_TO_CSI (0x2 << 27)
420#define IMX6SX_GPR5_CSI2_MUX_CTRL_GND (0x3 << 27)
421#define IMX6SX_GPR5_VADC_TO_CSI_CAPTURE_EN_MASK (0x1 << 26)
422#define IMX6SX_GPR5_VADC_TO_CSI_CAPTURE_EN_ENABLE (0x1 << 26)
423#define IMX6SX_GPR5_VADC_TO_CSI_CAPTURE_EN_DISABLE (0x0 << 26)
424#define IMX6SX_GPR5_CSI1_MUX_CTRL_MASK (0x3 << 4)
425#define IMX6SX_GPR5_CSI1_MUX_CTRL_EXT_PIN (0x0 << 4)
426#define IMX6SX_GPR5_CSI1_MUX_CTRL_CVD (0x1 << 4)
427#define IMX6SX_GPR5_CSI1_MUX_CTRL_VDAC_TO_CSI (0x2 << 4)
428#define IMX6SX_GPR5_CSI1_MUX_CTRL_GND (0x3 << 4)
429
430#define IMX6SX_GPR5_DISP_MUX_DCIC2_LCDIF2 (0x0 << 2)
431#define IMX6SX_GPR5_DISP_MUX_DCIC2_LVDS (0x1 << 2)
432#define IMX6SX_GPR5_DISP_MUX_DCIC2_MASK (0x1 << 2)
433#define IMX6SX_GPR5_DISP_MUX_DCIC1_LCDIF1 (0x0 << 1)
434#define IMX6SX_GPR5_DISP_MUX_DCIC1_LVDS (0x1 << 1)
435#define IMX6SX_GPR5_DISP_MUX_DCIC1_MASK (0x1 << 1)
436
398#endif /* __LINUX_IMX6Q_IOMUXC_GPR_H */ 437#endif /* __LINUX_IMX6Q_IOMUXC_GPR_H */
diff --git a/include/linux/mfd/tc3589x.h b/include/linux/mfd/tc3589x.h
index e6088c2e2092..e1c12d84c26a 100644
--- a/include/linux/mfd/tc3589x.h
+++ b/include/linux/mfd/tc3589x.h
@@ -164,13 +164,10 @@ struct tc3589x_keypad_platform_data {
164 164
165/** 165/**
166 * struct tc3589x_gpio_platform_data - TC3589x GPIO platform data 166 * struct tc3589x_gpio_platform_data - TC3589x GPIO platform data
167 * @gpio_base: first gpio number assigned to TC3589x. A maximum of
168 * %TC3589x_NR_GPIOS GPIOs will be allocated.
169 * @setup: callback for board-specific initialization 167 * @setup: callback for board-specific initialization
170 * @remove: callback for board-specific teardown 168 * @remove: callback for board-specific teardown
171 */ 169 */
172struct tc3589x_gpio_platform_data { 170struct tc3589x_gpio_platform_data {
173 int gpio_base;
174 void (*setup)(struct tc3589x *tc3589x, unsigned gpio_base); 171 void (*setup)(struct tc3589x *tc3589x, unsigned gpio_base);
175 void (*remove)(struct tc3589x *tc3589x, unsigned gpio_base); 172 void (*remove)(struct tc3589x *tc3589x, unsigned gpio_base);
176}; 173};
@@ -178,18 +175,13 @@ struct tc3589x_gpio_platform_data {
178/** 175/**
179 * struct tc3589x_platform_data - TC3589x platform data 176 * struct tc3589x_platform_data - TC3589x platform data
180 * @block: bitmask of blocks to enable (use TC3589x_BLOCK_*) 177 * @block: bitmask of blocks to enable (use TC3589x_BLOCK_*)
181 * @irq_base: base IRQ number. %TC3589x_NR_IRQS irqs will be used.
182 * @gpio: GPIO-specific platform data 178 * @gpio: GPIO-specific platform data
183 * @keypad: keypad-specific platform data 179 * @keypad: keypad-specific platform data
184 */ 180 */
185struct tc3589x_platform_data { 181struct tc3589x_platform_data {
186 unsigned int block; 182 unsigned int block;
187 int irq_base;
188 struct tc3589x_gpio_platform_data *gpio; 183 struct tc3589x_gpio_platform_data *gpio;
189 const struct tc3589x_keypad_platform_data *keypad; 184 const struct tc3589x_keypad_platform_data *keypad;
190}; 185};
191 186
192#define TC3589x_NR_GPIOS 24
193#define TC3589x_NR_IRQS TC3589x_INT_GPIO(TC3589x_NR_GPIOS)
194
195#endif 187#endif
generated by cgit v1.2.2 (git 2.25.0) at 2026-03-16 19:09:55 -0400