diff options
Diffstat (limited to 'include/linux/mfd')
| -rw-r--r-- | include/linux/mfd/da9052/da9052.h | 1 | ||||
| -rw-r--r-- | include/linux/mfd/db5500-prcmu.h | 88 | ||||
| -rw-r--r-- | include/linux/mfd/rc5t583.h | 47 | ||||
| -rw-r--r-- | include/linux/mfd/twl6040.h | 27 |
4 files changed, 104 insertions, 59 deletions
diff --git a/include/linux/mfd/da9052/da9052.h b/include/linux/mfd/da9052/da9052.h index 7ffbd6e9e7fc..8313cd9658e3 100644 --- a/include/linux/mfd/da9052/da9052.h +++ b/include/linux/mfd/da9052/da9052.h | |||
| @@ -80,6 +80,7 @@ struct da9052 { | |||
| 80 | struct regmap *regmap; | 80 | struct regmap *regmap; |
| 81 | 81 | ||
| 82 | int irq_base; | 82 | int irq_base; |
| 83 | struct regmap_irq_chip_data *irq_data; | ||
| 83 | u8 chip_id; | 84 | u8 chip_id; |
| 84 | 85 | ||
| 85 | int chip_irq; | 86 | int chip_irq; |
diff --git a/include/linux/mfd/db5500-prcmu.h b/include/linux/mfd/db5500-prcmu.h index 9890687f582d..5a049dfaf153 100644 --- a/include/linux/mfd/db5500-prcmu.h +++ b/include/linux/mfd/db5500-prcmu.h | |||
| @@ -8,41 +8,14 @@ | |||
| 8 | #ifndef __MFD_DB5500_PRCMU_H | 8 | #ifndef __MFD_DB5500_PRCMU_H |
| 9 | #define __MFD_DB5500_PRCMU_H | 9 | #define __MFD_DB5500_PRCMU_H |
| 10 | 10 | ||
| 11 | #ifdef CONFIG_MFD_DB5500_PRCMU | 11 | static inline int prcmu_resetout(u8 resoutn, u8 state) |
| 12 | |||
| 13 | void db5500_prcmu_early_init(void); | ||
| 14 | int db5500_prcmu_set_epod(u16 epod_id, u8 epod_state); | ||
| 15 | int db5500_prcmu_set_display_clocks(void); | ||
| 16 | int db5500_prcmu_disable_dsipll(void); | ||
| 17 | int db5500_prcmu_enable_dsipll(void); | ||
| 18 | int db5500_prcmu_abb_read(u8 slave, u8 reg, u8 *value, u8 size); | ||
| 19 | int db5500_prcmu_abb_write(u8 slave, u8 reg, u8 *value, u8 size); | ||
| 20 | void db5500_prcmu_enable_wakeups(u32 wakeups); | ||
| 21 | int db5500_prcmu_request_clock(u8 clock, bool enable); | ||
| 22 | void db5500_prcmu_config_abb_event_readout(u32 abb_events); | ||
| 23 | void db5500_prcmu_get_abb_event_buffer(void __iomem **buf); | ||
| 24 | int prcmu_resetout(u8 resoutn, u8 state); | ||
| 25 | int db5500_prcmu_set_power_state(u8 state, bool keep_ulp_clk, | ||
| 26 | bool keep_ap_pll); | ||
| 27 | int db5500_prcmu_config_esram0_deep_sleep(u8 state); | ||
| 28 | void db5500_prcmu_system_reset(u16 reset_code); | ||
| 29 | u16 db5500_prcmu_get_reset_code(void); | ||
| 30 | bool db5500_prcmu_is_ac_wake_requested(void); | ||
| 31 | int db5500_prcmu_set_arm_opp(u8 opp); | ||
| 32 | int db5500_prcmu_get_arm_opp(void); | ||
| 33 | |||
| 34 | #else /* !CONFIG_UX500_SOC_DB5500 */ | ||
| 35 | |||
| 36 | static inline void db5500_prcmu_early_init(void) {} | ||
| 37 | |||
| 38 | static inline int db5500_prcmu_abb_read(u8 slave, u8 reg, u8 *value, u8 size) | ||
| 39 | { | 12 | { |
| 40 | return -ENOSYS; | 13 | return 0; |
| 41 | } | 14 | } |
| 42 | 15 | ||
| 43 | static inline int db5500_prcmu_abb_write(u8 slave, u8 reg, u8 *value, u8 size) | 16 | static inline int db5500_prcmu_set_epod(u16 epod_id, u8 epod_state) |
| 44 | { | 17 | { |
| 45 | return -ENOSYS; | 18 | return 0; |
| 46 | } | 19 | } |
| 47 | 20 | ||
| 48 | static inline int db5500_prcmu_request_clock(u8 clock, bool enable) | 21 | static inline int db5500_prcmu_request_clock(u8 clock, bool enable) |
| @@ -50,69 +23,82 @@ static inline int db5500_prcmu_request_clock(u8 clock, bool enable) | |||
| 50 | return 0; | 23 | return 0; |
| 51 | } | 24 | } |
| 52 | 25 | ||
| 53 | static inline int db5500_prcmu_set_display_clocks(void) | 26 | static inline int db5500_prcmu_set_power_state(u8 state, bool keep_ulp_clk, |
| 27 | bool keep_ap_pll) | ||
| 54 | { | 28 | { |
| 55 | return 0; | 29 | return 0; |
| 56 | } | 30 | } |
| 57 | 31 | ||
| 58 | static inline int db5500_prcmu_disable_dsipll(void) | 32 | static inline int db5500_prcmu_config_esram0_deep_sleep(u8 state) |
| 59 | { | 33 | { |
| 60 | return 0; | 34 | return 0; |
| 61 | } | 35 | } |
| 62 | 36 | ||
| 63 | static inline int db5500_prcmu_enable_dsipll(void) | 37 | static inline u16 db5500_prcmu_get_reset_code(void) |
| 64 | { | 38 | { |
| 65 | return 0; | 39 | return 0; |
| 66 | } | 40 | } |
| 67 | 41 | ||
| 68 | static inline int db5500_prcmu_config_esram0_deep_sleep(u8 state) | 42 | static inline bool db5500_prcmu_is_ac_wake_requested(void) |
| 69 | { | 43 | { |
| 70 | return 0; | 44 | return 0; |
| 71 | } | 45 | } |
| 72 | 46 | ||
| 73 | static inline void db5500_prcmu_enable_wakeups(u32 wakeups) {} | 47 | static inline int db5500_prcmu_set_arm_opp(u8 opp) |
| 74 | |||
| 75 | static inline int prcmu_resetout(u8 resoutn, u8 state) | ||
| 76 | { | 48 | { |
| 77 | return 0; | 49 | return 0; |
| 78 | } | 50 | } |
| 79 | 51 | ||
| 80 | static inline int db5500_prcmu_set_epod(u16 epod_id, u8 epod_state) | 52 | static inline int db5500_prcmu_get_arm_opp(void) |
| 81 | { | 53 | { |
| 82 | return 0; | 54 | return 0; |
| 83 | } | 55 | } |
| 84 | 56 | ||
| 85 | static inline void db5500_prcmu_get_abb_event_buffer(void __iomem **buf) {} | ||
| 86 | static inline void db5500_prcmu_config_abb_event_readout(u32 abb_events) {} | 57 | static inline void db5500_prcmu_config_abb_event_readout(u32 abb_events) {} |
| 87 | 58 | ||
| 88 | static inline int db5500_prcmu_set_power_state(u8 state, bool keep_ulp_clk, | 59 | static inline void db5500_prcmu_get_abb_event_buffer(void __iomem **buf) {} |
| 89 | bool keep_ap_pll) | ||
| 90 | { | ||
| 91 | return 0; | ||
| 92 | } | ||
| 93 | 60 | ||
| 94 | static inline void db5500_prcmu_system_reset(u16 reset_code) {} | 61 | static inline void db5500_prcmu_system_reset(u16 reset_code) {} |
| 95 | 62 | ||
| 96 | static inline u16 db5500_prcmu_get_reset_code(void) | 63 | static inline void db5500_prcmu_enable_wakeups(u32 wakeups) {} |
| 64 | |||
| 65 | #ifdef CONFIG_MFD_DB5500_PRCMU | ||
| 66 | |||
| 67 | void db5500_prcmu_early_init(void); | ||
| 68 | int db5500_prcmu_set_display_clocks(void); | ||
| 69 | int db5500_prcmu_disable_dsipll(void); | ||
| 70 | int db5500_prcmu_enable_dsipll(void); | ||
| 71 | int db5500_prcmu_abb_read(u8 slave, u8 reg, u8 *value, u8 size); | ||
| 72 | int db5500_prcmu_abb_write(u8 slave, u8 reg, u8 *value, u8 size); | ||
| 73 | |||
| 74 | #else /* !CONFIG_UX500_SOC_DB5500 */ | ||
| 75 | |||
| 76 | static inline void db5500_prcmu_early_init(void) {} | ||
| 77 | |||
| 78 | static inline int db5500_prcmu_abb_read(u8 slave, u8 reg, u8 *value, u8 size) | ||
| 97 | { | 79 | { |
| 98 | return 0; | 80 | return -ENOSYS; |
| 99 | } | 81 | } |
| 100 | 82 | ||
| 101 | static inline bool db5500_prcmu_is_ac_wake_requested(void) | 83 | static inline int db5500_prcmu_abb_write(u8 slave, u8 reg, u8 *value, u8 size) |
| 102 | { | 84 | { |
| 103 | return 0; | 85 | return -ENOSYS; |
| 104 | } | 86 | } |
| 105 | 87 | ||
| 106 | static inline int db5500_prcmu_set_arm_opp(u8 opp) | 88 | static inline int db5500_prcmu_set_display_clocks(void) |
| 107 | { | 89 | { |
| 108 | return 0; | 90 | return 0; |
| 109 | } | 91 | } |
| 110 | 92 | ||
| 111 | static inline int db5500_prcmu_get_arm_opp(void) | 93 | static inline int db5500_prcmu_disable_dsipll(void) |
| 112 | { | 94 | { |
| 113 | return 0; | 95 | return 0; |
| 114 | } | 96 | } |
| 115 | 97 | ||
| 98 | static inline int db5500_prcmu_enable_dsipll(void) | ||
| 99 | { | ||
| 100 | return 0; | ||
| 101 | } | ||
| 116 | 102 | ||
| 117 | #endif /* CONFIG_MFD_DB5500_PRCMU */ | 103 | #endif /* CONFIG_MFD_DB5500_PRCMU */ |
| 118 | 104 | ||
diff --git a/include/linux/mfd/rc5t583.h b/include/linux/mfd/rc5t583.h index a2c61609d21d..0b64b19d81ab 100644 --- a/include/linux/mfd/rc5t583.h +++ b/include/linux/mfd/rc5t583.h | |||
| @@ -26,6 +26,7 @@ | |||
| 26 | 26 | ||
| 27 | #include <linux/mutex.h> | 27 | #include <linux/mutex.h> |
| 28 | #include <linux/types.h> | 28 | #include <linux/types.h> |
| 29 | #include <linux/regmap.h> | ||
| 29 | 30 | ||
| 30 | #define RC5T583_MAX_REGS 0xF8 | 31 | #define RC5T583_MAX_REGS 0xF8 |
| 31 | 32 | ||
| @@ -279,14 +280,44 @@ struct rc5t583_platform_data { | |||
| 279 | bool enable_shutdown; | 280 | bool enable_shutdown; |
| 280 | }; | 281 | }; |
| 281 | 282 | ||
| 282 | int rc5t583_write(struct device *dev, u8 reg, uint8_t val); | 283 | static inline int rc5t583_write(struct device *dev, uint8_t reg, uint8_t val) |
| 283 | int rc5t583_read(struct device *dev, uint8_t reg, uint8_t *val); | 284 | { |
| 284 | int rc5t583_set_bits(struct device *dev, unsigned int reg, | 285 | struct rc5t583 *rc5t583 = dev_get_drvdata(dev); |
| 285 | unsigned int bit_mask); | 286 | return regmap_write(rc5t583->regmap, reg, val); |
| 286 | int rc5t583_clear_bits(struct device *dev, unsigned int reg, | 287 | } |
| 287 | unsigned int bit_mask); | 288 | |
| 288 | int rc5t583_update(struct device *dev, unsigned int reg, | 289 | static inline int rc5t583_read(struct device *dev, uint8_t reg, uint8_t *val) |
| 289 | unsigned int val, unsigned int mask); | 290 | { |
| 291 | struct rc5t583 *rc5t583 = dev_get_drvdata(dev); | ||
| 292 | unsigned int ival; | ||
| 293 | int ret; | ||
| 294 | ret = regmap_read(rc5t583->regmap, reg, &ival); | ||
| 295 | if (!ret) | ||
| 296 | *val = (uint8_t)ival; | ||
| 297 | return ret; | ||
| 298 | } | ||
| 299 | |||
| 300 | static inline int rc5t583_set_bits(struct device *dev, unsigned int reg, | ||
| 301 | unsigned int bit_mask) | ||
| 302 | { | ||
| 303 | struct rc5t583 *rc5t583 = dev_get_drvdata(dev); | ||
| 304 | return regmap_update_bits(rc5t583->regmap, reg, bit_mask, bit_mask); | ||
| 305 | } | ||
| 306 | |||
| 307 | static inline int rc5t583_clear_bits(struct device *dev, unsigned int reg, | ||
| 308 | unsigned int bit_mask) | ||
| 309 | { | ||
| 310 | struct rc5t583 *rc5t583 = dev_get_drvdata(dev); | ||
| 311 | return regmap_update_bits(rc5t583->regmap, reg, bit_mask, 0); | ||
| 312 | } | ||
| 313 | |||
| 314 | static inline int rc5t583_update(struct device *dev, unsigned int reg, | ||
| 315 | unsigned int val, unsigned int mask) | ||
| 316 | { | ||
| 317 | struct rc5t583 *rc5t583 = dev_get_drvdata(dev); | ||
| 318 | return regmap_update_bits(rc5t583->regmap, reg, mask, val); | ||
| 319 | } | ||
| 320 | |||
| 290 | int rc5t583_ext_power_req_config(struct device *dev, int deepsleep_id, | 321 | int rc5t583_ext_power_req_config(struct device *dev, int deepsleep_id, |
| 291 | int ext_pwr_req, int deepsleep_slot_nr); | 322 | int ext_pwr_req, int deepsleep_slot_nr); |
| 292 | int rc5t583_irq_init(struct rc5t583 *rc5t583, int irq, int irq_base); | 323 | int rc5t583_irq_init(struct rc5t583 *rc5t583, int irq, int irq_base); |
diff --git a/include/linux/mfd/twl6040.h b/include/linux/mfd/twl6040.h index 9bc9ac651dad..b15b5f03f5c4 100644 --- a/include/linux/mfd/twl6040.h +++ b/include/linux/mfd/twl6040.h | |||
| @@ -174,8 +174,35 @@ | |||
| 174 | #define TWL6040_SYSCLK_SEL_LPPLL 0 | 174 | #define TWL6040_SYSCLK_SEL_LPPLL 0 |
| 175 | #define TWL6040_SYSCLK_SEL_HPPLL 1 | 175 | #define TWL6040_SYSCLK_SEL_HPPLL 1 |
| 176 | 176 | ||
| 177 | struct twl6040_codec_data { | ||
| 178 | u16 hs_left_step; | ||
| 179 | u16 hs_right_step; | ||
| 180 | u16 hf_left_step; | ||
| 181 | u16 hf_right_step; | ||
| 182 | }; | ||
| 183 | |||
| 184 | struct twl6040_vibra_data { | ||
| 185 | unsigned int vibldrv_res; /* left driver resistance */ | ||
| 186 | unsigned int vibrdrv_res; /* right driver resistance */ | ||
| 187 | unsigned int viblmotor_res; /* left motor resistance */ | ||
| 188 | unsigned int vibrmotor_res; /* right motor resistance */ | ||
| 189 | int vddvibl_uV; /* VDDVIBL volt, set 0 for fixed reg */ | ||
| 190 | int vddvibr_uV; /* VDDVIBR volt, set 0 for fixed reg */ | ||
| 191 | }; | ||
| 192 | |||
| 193 | struct twl6040_platform_data { | ||
| 194 | int audpwron_gpio; /* audio power-on gpio */ | ||
| 195 | unsigned int irq_base; | ||
| 196 | |||
| 197 | struct twl6040_codec_data *codec; | ||
| 198 | struct twl6040_vibra_data *vibra; | ||
| 199 | }; | ||
| 200 | |||
| 201 | struct regmap; | ||
| 202 | |||
| 177 | struct twl6040 { | 203 | struct twl6040 { |
| 178 | struct device *dev; | 204 | struct device *dev; |
| 205 | struct regmap *regmap; | ||
| 179 | struct mutex mutex; | 206 | struct mutex mutex; |
| 180 | struct mutex io_mutex; | 207 | struct mutex io_mutex; |
| 181 | struct mutex irq_mutex; | 208 | struct mutex irq_mutex; |
