diff options
Diffstat (limited to 'include/linux/mfd/dbx500-prcmu.h')
-rw-r--r-- | include/linux/mfd/dbx500-prcmu.h | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/include/linux/mfd/dbx500-prcmu.h b/include/linux/mfd/dbx500-prcmu.h index f73b9d9d2a24..8470c7d7121f 100644 --- a/include/linux/mfd/dbx500-prcmu.h +++ b/include/linux/mfd/dbx500-prcmu.h | |||
@@ -80,6 +80,29 @@ enum prcmu_wakeup_index { | |||
80 | #define EPOD_STATE_ON_CLK_OFF 0x03 | 80 | #define EPOD_STATE_ON_CLK_OFF 0x03 |
81 | #define EPOD_STATE_ON 0x04 | 81 | #define EPOD_STATE_ON 0x04 |
82 | 82 | ||
83 | /* DB5500 CLKOUT IDs */ | ||
84 | enum { | ||
85 | DB5500_CLKOUT0 = 0, | ||
86 | DB5500_CLKOUT1, | ||
87 | }; | ||
88 | |||
89 | /* DB5500 CLKOUTx sources */ | ||
90 | enum { | ||
91 | DB5500_CLKOUT_REF_CLK_SEL0, | ||
92 | DB5500_CLKOUT_RTC_CLK0_SEL0, | ||
93 | DB5500_CLKOUT_ULP_CLK_SEL0, | ||
94 | DB5500_CLKOUT_STATIC0, | ||
95 | DB5500_CLKOUT_REFCLK, | ||
96 | DB5500_CLKOUT_ULPCLK, | ||
97 | DB5500_CLKOUT_ARMCLK, | ||
98 | DB5500_CLKOUT_SYSACC0CLK, | ||
99 | DB5500_CLKOUT_SOC0PLLCLK, | ||
100 | DB5500_CLKOUT_SOC1PLLCLK, | ||
101 | DB5500_CLKOUT_DDRPLLCLK, | ||
102 | DB5500_CLKOUT_TVCLK, | ||
103 | DB5500_CLKOUT_IRDACLK, | ||
104 | }; | ||
105 | |||
83 | /* | 106 | /* |
84 | * CLKOUT sources | 107 | * CLKOUT sources |
85 | */ | 108 | */ |
@@ -111,6 +134,7 @@ enum prcmu_clock { | |||
111 | PRCMU_MSP1CLK, | 134 | PRCMU_MSP1CLK, |
112 | PRCMU_I2CCLK, | 135 | PRCMU_I2CCLK, |
113 | PRCMU_SDMMCCLK, | 136 | PRCMU_SDMMCCLK, |
137 | PRCMU_SPARE1CLK, | ||
114 | PRCMU_SLIMCLK, | 138 | PRCMU_SLIMCLK, |
115 | PRCMU_PER1CLK, | 139 | PRCMU_PER1CLK, |
116 | PRCMU_PER2CLK, | 140 | PRCMU_PER2CLK, |
@@ -139,12 +163,20 @@ enum prcmu_clock { | |||
139 | PRCMU_IRRCCLK, | 163 | PRCMU_IRRCCLK, |
140 | PRCMU_SIACLK, | 164 | PRCMU_SIACLK, |
141 | PRCMU_SVACLK, | 165 | PRCMU_SVACLK, |
166 | PRCMU_ACLK, | ||
142 | PRCMU_NUM_REG_CLOCKS, | 167 | PRCMU_NUM_REG_CLOCKS, |
143 | PRCMU_SYSCLK = PRCMU_NUM_REG_CLOCKS, | 168 | PRCMU_SYSCLK = PRCMU_NUM_REG_CLOCKS, |
169 | PRCMU_CDCLK, | ||
144 | PRCMU_TIMCLK, | 170 | PRCMU_TIMCLK, |
145 | PRCMU_PLLSOC0, | 171 | PRCMU_PLLSOC0, |
146 | PRCMU_PLLSOC1, | 172 | PRCMU_PLLSOC1, |
147 | PRCMU_PLLDDR, | 173 | PRCMU_PLLDDR, |
174 | PRCMU_PLLDSI, | ||
175 | PRCMU_DSI0CLK, | ||
176 | PRCMU_DSI1CLK, | ||
177 | PRCMU_DSI0ESCCLK, | ||
178 | PRCMU_DSI1ESCCLK, | ||
179 | PRCMU_DSI2ESCCLK, | ||
148 | }; | 180 | }; |
149 | 181 | ||
150 | /** | 182 | /** |
@@ -516,6 +548,21 @@ static inline int prcmu_request_clock(u8 clock, bool enable) | |||
516 | return 0; | 548 | return 0; |
517 | } | 549 | } |
518 | 550 | ||
551 | static inline long prcmu_round_clock_rate(u8 clock, unsigned long rate) | ||
552 | { | ||
553 | return 0; | ||
554 | } | ||
555 | |||
556 | static inline int prcmu_set_clock_rate(u8 clock, unsigned long rate) | ||
557 | { | ||
558 | return 0; | ||
559 | } | ||
560 | |||
561 | static inline unsigned long prcmu_clock_rate(u8 clock) | ||
562 | { | ||
563 | return 0; | ||
564 | } | ||
565 | |||
519 | static inline int prcmu_set_ape_opp(u8 opp) | 566 | static inline int prcmu_set_ape_opp(u8 opp) |
520 | { | 567 | { |
521 | return 0; | 568 | return 0; |