aboutsummaryrefslogtreecommitdiffstats
path: root/include/linux/i2c
diff options
context:
space:
mode:
Diffstat (limited to 'include/linux/i2c')
-rw-r--r--include/linux/i2c/adp5588.h12
-rw-r--r--include/linux/i2c/tps65010.h19
-rw-r--r--include/linux/i2c/twl.h (renamed from include/linux/i2c/twl4030.h)209
3 files changed, 221 insertions, 19 deletions
diff --git a/include/linux/i2c/adp5588.h b/include/linux/i2c/adp5588.h
index fc5db826b48e..02c9af374741 100644
--- a/include/linux/i2c/adp5588.h
+++ b/include/linux/i2c/adp5588.h
@@ -89,4 +89,16 @@ struct adp5588_kpad_platform_data {
89 unsigned short unlock_key2; /* Unlock Key 2 */ 89 unsigned short unlock_key2; /* Unlock Key 2 */
90}; 90};
91 91
92struct adp5588_gpio_platform_data {
93 unsigned gpio_start; /* GPIO Chip base # */
94 unsigned pullup_dis_mask; /* Pull-Up Disable Mask */
95 int (*setup)(struct i2c_client *client,
96 int gpio, unsigned ngpio,
97 void *context);
98 int (*teardown)(struct i2c_client *client,
99 int gpio, unsigned ngpio,
100 void *context);
101 void *context;
102};
103
92#endif 104#endif
diff --git a/include/linux/i2c/tps65010.h b/include/linux/i2c/tps65010.h
index 918c5354d9b8..08aa92278d71 100644
--- a/include/linux/i2c/tps65010.h
+++ b/include/linux/i2c/tps65010.h
@@ -72,6 +72,21 @@
72#define TPS_VDCDC1 0x0c 72#define TPS_VDCDC1 0x0c
73# define TPS_ENABLE_LP (1 << 3) 73# define TPS_ENABLE_LP (1 << 3)
74#define TPS_VDCDC2 0x0d 74#define TPS_VDCDC2 0x0d
75# define TPS_LP_COREOFF (1 << 7)
76# define TPS_VCORE_1_8V (7<<4)
77# define TPS_VCORE_1_5V (6 << 4)
78# define TPS_VCORE_1_4V (5 << 4)
79# define TPS_VCORE_1_3V (4 << 4)
80# define TPS_VCORE_1_2V (3 << 4)
81# define TPS_VCORE_1_1V (2 << 4)
82# define TPS_VCORE_1_0V (1 << 4)
83# define TPS_VCORE_0_85V (0 << 4)
84# define TPS_VCORE_LP_1_2V (3 << 2)
85# define TPS_VCORE_LP_1_1V (2 << 2)
86# define TPS_VCORE_LP_1_0V (1 << 2)
87# define TPS_VCORE_LP_0_85V (0 << 2)
88# define TPS_VIB (1 << 1)
89# define TPS_VCORE_DISCH (1 << 0)
75#define TPS_VREGS1 0x0e 90#define TPS_VREGS1 0x0e
76# define TPS_LDO2_ENABLE (1 << 7) 91# define TPS_LDO2_ENABLE (1 << 7)
77# define TPS_LDO2_OFF (1 << 6) 92# define TPS_LDO2_OFF (1 << 6)
@@ -152,6 +167,10 @@ extern int tps65010_config_vregs1(unsigned value);
152 */ 167 */
153extern int tps65013_set_low_pwr(unsigned mode); 168extern int tps65013_set_low_pwr(unsigned mode);
154 169
170/* tps65010_set_vdcdc2
171 * value to be written to VDCDC2
172 */
173extern int tps65010_config_vdcdc2(unsigned value);
155 174
156struct i2c_client; 175struct i2c_client;
157 176
diff --git a/include/linux/i2c/twl4030.h b/include/linux/i2c/twl.h
index 5306a759cbde..bf1c5be1f5b6 100644
--- a/include/linux/i2c/twl4030.h
+++ b/include/linux/i2c/twl.h
@@ -22,8 +22,8 @@
22 * 22 *
23 */ 23 */
24 24
25#ifndef __TWL4030_H_ 25#ifndef __TWL_H_
26#define __TWL4030_H_ 26#define __TWL_H_
27 27
28#include <linux/types.h> 28#include <linux/types.h>
29#include <linux/input/matrix_keypad.h> 29#include <linux/input/matrix_keypad.h>
@@ -61,28 +61,112 @@
61#define TWL4030_MODULE_PWMA 0x0E 61#define TWL4030_MODULE_PWMA 0x0E
62#define TWL4030_MODULE_PWMB 0x0F 62#define TWL4030_MODULE_PWMB 0x0F
63 63
64#define TWL5031_MODULE_ACCESSORY 0x10
65#define TWL5031_MODULE_INTERRUPTS 0x11
66
64/* Slave 3 (i2c address 0x4b) */ 67/* Slave 3 (i2c address 0x4b) */
65#define TWL4030_MODULE_BACKUP 0x10 68#define TWL4030_MODULE_BACKUP 0x12
66#define TWL4030_MODULE_INT 0x11 69#define TWL4030_MODULE_INT 0x13
67#define TWL4030_MODULE_PM_MASTER 0x12 70#define TWL4030_MODULE_PM_MASTER 0x14
68#define TWL4030_MODULE_PM_RECEIVER 0x13 71#define TWL4030_MODULE_PM_RECEIVER 0x15
69#define TWL4030_MODULE_RTC 0x14 72#define TWL4030_MODULE_RTC 0x16
70#define TWL4030_MODULE_SECURED_REG 0x15 73#define TWL4030_MODULE_SECURED_REG 0x17
74
75#define TWL_MODULE_USB TWL4030_MODULE_USB
76#define TWL_MODULE_AUDIO_VOICE TWL4030_MODULE_AUDIO_VOICE
77#define TWL_MODULE_PIH TWL4030_MODULE_PIH
78#define TWL_MODULE_MADC TWL4030_MODULE_MADC
79#define TWL_MODULE_MAIN_CHARGE TWL4030_MODULE_MAIN_CHARGE
80#define TWL_MODULE_PM_MASTER TWL4030_MODULE_PM_MASTER
81#define TWL_MODULE_PM_RECEIVER TWL4030_MODULE_PM_RECEIVER
82#define TWL_MODULE_RTC TWL4030_MODULE_RTC
83
84#define GPIO_INTR_OFFSET 0
85#define KEYPAD_INTR_OFFSET 1
86#define BCI_INTR_OFFSET 2
87#define MADC_INTR_OFFSET 3
88#define USB_INTR_OFFSET 4
89#define BCI_PRES_INTR_OFFSET 9
90#define USB_PRES_INTR_OFFSET 10
91#define RTC_INTR_OFFSET 11
92
93/*
94 * Offset from TWL6030_IRQ_BASE / pdata->irq_base
95 */
96#define PWR_INTR_OFFSET 0
97#define HOTDIE_INTR_OFFSET 12
98#define SMPSLDO_INTR_OFFSET 13
99#define BATDETECT_INTR_OFFSET 14
100#define SIMDETECT_INTR_OFFSET 15
101#define MMCDETECT_INTR_OFFSET 16
102#define GASGAUGE_INTR_OFFSET 17
103#define USBOTG_INTR_OFFSET 4
104#define CHARGER_INTR_OFFSET 2
105#define RSV_INTR_OFFSET 0
106
107/* INT register offsets */
108#define REG_INT_STS_A 0x00
109#define REG_INT_STS_B 0x01
110#define REG_INT_STS_C 0x02
111
112#define REG_INT_MSK_LINE_A 0x03
113#define REG_INT_MSK_LINE_B 0x04
114#define REG_INT_MSK_LINE_C 0x05
115
116#define REG_INT_MSK_STS_A 0x06
117#define REG_INT_MSK_STS_B 0x07
118#define REG_INT_MSK_STS_C 0x08
119
120/* MASK INT REG GROUP A */
121#define TWL6030_PWR_INT_MASK 0x07
122#define TWL6030_RTC_INT_MASK 0x18
123#define TWL6030_HOTDIE_INT_MASK 0x20
124#define TWL6030_SMPSLDOA_INT_MASK 0xC0
125
126/* MASK INT REG GROUP B */
127#define TWL6030_SMPSLDOB_INT_MASK 0x01
128#define TWL6030_BATDETECT_INT_MASK 0x02
129#define TWL6030_SIMDETECT_INT_MASK 0x04
130#define TWL6030_MMCDETECT_INT_MASK 0x08
131#define TWL6030_GPADC_INT_MASK 0x60
132#define TWL6030_GASGAUGE_INT_MASK 0x80
133
134/* MASK INT REG GROUP C */
135#define TWL6030_USBOTG_INT_MASK 0x0F
136#define TWL6030_CHARGER_CTRL_INT_MASK 0x10
137#define TWL6030_CHARGER_FAULT_INT_MASK 0x60
138
139
140#define TWL4030_CLASS_ID 0x4030
141#define TWL6030_CLASS_ID 0x6030
142unsigned int twl_rev(void);
143#define GET_TWL_REV (twl_rev())
144#define TWL_CLASS_IS(class, id) \
145static inline int twl_class_is_ ##class(void) \
146{ \
147 return ((id) == (GET_TWL_REV)) ? 1 : 0; \
148}
149
150TWL_CLASS_IS(4030, TWL4030_CLASS_ID)
151TWL_CLASS_IS(6030, TWL6030_CLASS_ID)
71 152
72/* 153/*
73 * Read and write single 8-bit registers 154 * Read and write single 8-bit registers
74 */ 155 */
75int twl4030_i2c_write_u8(u8 mod_no, u8 val, u8 reg); 156int twl_i2c_write_u8(u8 mod_no, u8 val, u8 reg);
76int twl4030_i2c_read_u8(u8 mod_no, u8 *val, u8 reg); 157int twl_i2c_read_u8(u8 mod_no, u8 *val, u8 reg);
77 158
78/* 159/*
79 * Read and write several 8-bit registers at once. 160 * Read and write several 8-bit registers at once.
80 * 161 *
81 * IMPORTANT: For twl4030_i2c_write(), allocate num_bytes + 1 162 * IMPORTANT: For twl_i2c_write(), allocate num_bytes + 1
82 * for the value, and populate your data starting at offset 1. 163 * for the value, and populate your data starting at offset 1.
83 */ 164 */
84int twl4030_i2c_write(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes); 165int twl_i2c_write(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes);
85int twl4030_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes); 166int twl_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes);
167
168int twl6030_interrupt_unmask(u8 bit_mask, u8 offset);
169int twl6030_interrupt_mask(u8 bit_mask, u8 offset);
86 170
87/*----------------------------------------------------------------------*/ 171/*----------------------------------------------------------------------*/
88 172
@@ -221,6 +305,38 @@ int twl4030_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes);
221 305
222/*----------------------------------------------------------------------*/ 306/*----------------------------------------------------------------------*/
223 307
308/*
309 * Accessory Interrupts
310 */
311#define TWL5031_ACIIMR_LSB 0x05
312#define TWL5031_ACIIMR_MSB 0x06
313#define TWL5031_ACIIDR_LSB 0x07
314#define TWL5031_ACIIDR_MSB 0x08
315#define TWL5031_ACCISR1 0x0F
316#define TWL5031_ACCIMR1 0x10
317#define TWL5031_ACCISR2 0x11
318#define TWL5031_ACCIMR2 0x12
319#define TWL5031_ACCSIR 0x13
320#define TWL5031_ACCEDR1 0x14
321#define TWL5031_ACCSIHCTRL 0x15
322
323/*----------------------------------------------------------------------*/
324
325/*
326 * Battery Charger Controller
327 */
328
329#define TWL5031_INTERRUPTS_BCIISR1 0x0
330#define TWL5031_INTERRUPTS_BCIIMR1 0x1
331#define TWL5031_INTERRUPTS_BCIISR2 0x2
332#define TWL5031_INTERRUPTS_BCIIMR2 0x3
333#define TWL5031_INTERRUPTS_BCISIR 0x4
334#define TWL5031_INTERRUPTS_BCIEDR1 0x5
335#define TWL5031_INTERRUPTS_BCIEDR2 0x6
336#define TWL5031_INTERRUPTS_BCISIHCTRL 0x7
337
338/*----------------------------------------------------------------------*/
339
224/* Power bus message definitions */ 340/* Power bus message definitions */
225 341
226/* The TWL4030/5030 splits its power-management resources (the various 342/* The TWL4030/5030 splits its power-management resources (the various
@@ -250,6 +366,7 @@ int twl4030_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes);
250 366
251#define RES_TYPE_ALL 0x7 367#define RES_TYPE_ALL 0x7
252 368
369/* Resource states */
253#define RES_STATE_WRST 0xF 370#define RES_STATE_WRST 0xF
254#define RES_STATE_ACTIVE 0xE 371#define RES_STATE_ACTIVE 0xE
255#define RES_STATE_SLEEP 0x8 372#define RES_STATE_SLEEP 0x8
@@ -310,8 +427,18 @@ int twl4030_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes);
310#define MSG_SINGULAR(devgrp, id, state) \ 427#define MSG_SINGULAR(devgrp, id, state) \
311 ((devgrp) << 13 | 0 << 12 | (id) << 4 | (state)) 428 ((devgrp) << 13 | 0 << 12 | (id) << 4 | (state))
312 429
430#define MSG_BROADCAST_ALL(devgrp, state) \
431 ((devgrp) << 5 | (state))
432
433#define MSG_BROADCAST_REF MSG_BROADCAST_ALL
434#define MSG_BROADCAST_PROV MSG_BROADCAST_ALL
435#define MSG_BROADCAST__CLK_RST MSG_BROADCAST_ALL
313/*----------------------------------------------------------------------*/ 436/*----------------------------------------------------------------------*/
314 437
438struct twl4030_clock_init_data {
439 bool ck32k_lowpwr_enable;
440};
441
315struct twl4030_bci_platform_data { 442struct twl4030_bci_platform_data {
316 int *battery_tmp_tbl; 443 int *battery_tmp_tbl;
317 unsigned int tblsize; 444 unsigned int tblsize;
@@ -391,12 +518,15 @@ struct twl4030_resconfig {
391 u8 devgroup; /* Processor group that Power resource belongs to */ 518 u8 devgroup; /* Processor group that Power resource belongs to */
392 u8 type; /* Power resource addressed, 6 / broadcast message */ 519 u8 type; /* Power resource addressed, 6 / broadcast message */
393 u8 type2; /* Power resource addressed, 3 / broadcast message */ 520 u8 type2; /* Power resource addressed, 3 / broadcast message */
521 u8 remap_off; /* off state remapping */
522 u8 remap_sleep; /* sleep state remapping */
394}; 523};
395 524
396struct twl4030_power_data { 525struct twl4030_power_data {
397 struct twl4030_script **scripts; 526 struct twl4030_script **scripts;
398 unsigned num; 527 unsigned num;
399 struct twl4030_resconfig *resource_config; 528 struct twl4030_resconfig *resource_config;
529#define TWL4030_RESCONFIG_UNDEF ((u8)-1)
400}; 530};
401 531
402extern void twl4030_power_init(struct twl4030_power_data *triton2_scripts); 532extern void twl4030_power_init(struct twl4030_power_data *triton2_scripts);
@@ -421,6 +551,7 @@ struct twl4030_codec_data {
421 551
422struct twl4030_platform_data { 552struct twl4030_platform_data {
423 unsigned irq_base, irq_end; 553 unsigned irq_base, irq_end;
554 struct twl4030_clock_init_data *clock;
424 struct twl4030_bci_platform_data *bci; 555 struct twl4030_bci_platform_data *bci;
425 struct twl4030_gpio_platform_data *gpio; 556 struct twl4030_gpio_platform_data *gpio;
426 struct twl4030_madc_platform_data *madc; 557 struct twl4030_madc_platform_data *madc;
@@ -429,19 +560,31 @@ struct twl4030_platform_data {
429 struct twl4030_power_data *power; 560 struct twl4030_power_data *power;
430 struct twl4030_codec_data *codec; 561 struct twl4030_codec_data *codec;
431 562
432 /* LDO regulators */ 563 /* Common LDO regulators for TWL4030/TWL6030 */
433 struct regulator_init_data *vdac; 564 struct regulator_init_data *vdac;
565 struct regulator_init_data *vaux1;
566 struct regulator_init_data *vaux2;
567 struct regulator_init_data *vaux3;
568 /* TWL4030 LDO regulators */
434 struct regulator_init_data *vpll1; 569 struct regulator_init_data *vpll1;
435 struct regulator_init_data *vpll2; 570 struct regulator_init_data *vpll2;
436 struct regulator_init_data *vmmc1; 571 struct regulator_init_data *vmmc1;
437 struct regulator_init_data *vmmc2; 572 struct regulator_init_data *vmmc2;
438 struct regulator_init_data *vsim; 573 struct regulator_init_data *vsim;
439 struct regulator_init_data *vaux1;
440 struct regulator_init_data *vaux2;
441 struct regulator_init_data *vaux3;
442 struct regulator_init_data *vaux4; 574 struct regulator_init_data *vaux4;
443 575 struct regulator_init_data *vio;
444 /* REVISIT more to come ... _nothing_ should be hard-wired */ 576 struct regulator_init_data *vdd1;
577 struct regulator_init_data *vdd2;
578 struct regulator_init_data *vintana1;
579 struct regulator_init_data *vintana2;
580 struct regulator_init_data *vintdig;
581 /* TWL6030 LDO regulators */
582 struct regulator_init_data *vmmc;
583 struct regulator_init_data *vpp;
584 struct regulator_init_data *vusim;
585 struct regulator_init_data *vana;
586 struct regulator_init_data *vcxio;
587 struct regulator_init_data *vusb;
445}; 588};
446 589
447/*----------------------------------------------------------------------*/ 590/*----------------------------------------------------------------------*/
@@ -473,6 +616,7 @@ int twl4030_sih_setup(int module);
473 * VIO is generally fixed. 616 * VIO is generally fixed.
474 */ 617 */
475 618
619/* TWL4030 SMPS/LDO's */
476/* EXTERNAL dc-to-dc buck converters */ 620/* EXTERNAL dc-to-dc buck converters */
477#define TWL4030_REG_VDD1 0 621#define TWL4030_REG_VDD1 0
478#define TWL4030_REG_VDD2 1 622#define TWL4030_REG_VDD2 1
@@ -499,4 +643,31 @@ int twl4030_sih_setup(int module);
499#define TWL4030_REG_VUSB1V8 18 643#define TWL4030_REG_VUSB1V8 18
500#define TWL4030_REG_VUSB3V1 19 644#define TWL4030_REG_VUSB3V1 19
501 645
646/* TWL6030 SMPS/LDO's */
647/* EXTERNAL dc-to-dc buck convertor contollable via SR */
648#define TWL6030_REG_VDD1 30
649#define TWL6030_REG_VDD2 31
650#define TWL6030_REG_VDD3 32
651
652/* Non SR compliant dc-to-dc buck convertors */
653#define TWL6030_REG_VMEM 33
654#define TWL6030_REG_V2V1 34
655#define TWL6030_REG_V1V29 35
656#define TWL6030_REG_V1V8 36
657
658/* EXTERNAL LDOs */
659#define TWL6030_REG_VAUX1_6030 37
660#define TWL6030_REG_VAUX2_6030 38
661#define TWL6030_REG_VAUX3_6030 39
662#define TWL6030_REG_VMMC 40
663#define TWL6030_REG_VPP 41
664#define TWL6030_REG_VUSIM 42
665#define TWL6030_REG_VANA 43
666#define TWL6030_REG_VCXIO 44
667#define TWL6030_REG_VDAC 45
668#define TWL6030_REG_VUSB 46
669
670/* INTERNAL LDOs */
671#define TWL6030_REG_VRTC 47
672
502#endif /* End of __TWL4030_H */ 673#endif /* End of __TWL4030_H */